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DESCRIPTION FEATURES
The MP1470 is a high-frequency, synchronous, Wide 4.7V-to-16V Operating Input Range
rectified, step-down, switch-mode converter 163m/86m Low-RDS(ON) Internal Power
with internal power MOSFETs. It offers a very MOSFETs
compact solution to achieve a 2A continuous Proprietary Switching-LossReduction
output current over a wide input supply range, Technique
with excellent load and line regulation. The High-Efficiency Synchronous-Mode
MP1470 has synchronous-mode operation for Operation
higher efficiency over the output current-load Fixed 500kHz Switching Frequency
range. Internal AAM Power-Save Mode for High
Current-mode operation provides fast transient Efficiency at Light Load
response and eases loop stabilization. Internal Soft-Start
Over-Current Protection and Hiccup
Protection features include over-current
protection and thermal shutdown. Thermal Shutdown
Output Adjustable from 0.8V
The MP1470 requires a minimal number of Available in a 6-pin TSOT-23 package
readily-available, standard, external
components and is available in a space-saving APPLICATIONS
6-pin TSOT23 package. Game Consoles
Digital Set-Top Boxes
Flat-Panel Television and Monitors
General Purposes
All MPS parts are lead-free and adhere to the RoHS directive. For MPS green
status, please visit MPS website under Products, Quality Assurance page.
MPS and The Future of Analog IC Technology are registered trademarks of
Monolithic Power Systems, Inc.
TYPICAL APPLICATION
VIN
3 6 100
IN BST
U1 95
3.3V/2A 90
GND SW 2 VOUT 85
MP1470 R1 80
40.2k
5 R3 75
EN EN FB 4
75k 70
GND R2
65
1 13k
60
55
50
0.01 0.1 1 10
ORDERING INFORMATION
Part Number* Package Top Marking
MP1470GJ TSOT23-6 ADJ
PACKAGE REFERENCE
TOP VIEW
GND 1 6 BST
MP1470
SW 2 5 EN
IN 3 4 FB
IL IL
500mA/div. 200mA/div. IL
1A/div.
IL IL
IL 500mA/div. 500mA/div.
1A/div.
VOUT/AC
50mV/div.
VOUT VOUT
2V/div. 2V/div.
VIN/AC
200mV/div.
VEN VEN
2V/div. 2V/div.
VSW VSW VSW
10V/div. 10V/div. 10V/div.
IL IL IL
1A/div. 1A/div. 1A/div.
PIN FUNCTIONS
Package
Name Description
Pin #
System Ground. Reference ground of the regulated output voltage: requires extra care
1 GND
during PCB layout. Connect to GND with copper traces and vias.
2 SW Switch Output. Connect using a wide PCB trace.
Supply Voltage. The MP1470 operates from a 4.7V-to-16V input rail. Requires C1 to
3 IN
decouple the input rail. Connect using a wide PCB trace.
Feedback. Connect to the tap of an external resistor divider from the output to GND to set
the output voltage. The frequency fold-back comparator lowers the oscillator frequency
4 FB
when the FB voltage drops below 140mV to prevent current-limit runaway during a short
circuit fault.
EN=HIGH to enable the MP1470. For automatic start-up, connect EN to VIN using a 100k
5 EN
resistor.
Bootstrap. Connect a capacitor and a resistor between SW and BS pins to form a floating
6 BST
supply across the high-side switch driver. Use a 1F BST capacitor.
BLOCK DIAGRAM
IN
+
-
VCC RSEN
Currrent Sense
Regulator
Amplifer
Bootstrap
Regulator BST
Oscillator HS
Driver
+
SW
- Comparator
1.2pF On Time Control VCC
Current Limit Logic Control
47pF
Comparator
EN Reference 500k
LS
6.5V 1MEG
Driver
+
20k +
FB -
OPERATION
The MP1470 is a high-frequency, synchronous,
Under the light load condition, the value of
rectified, step-down, switch-mode converter
VCOMP is low. When VCOMP is less than VAAM and
with internal power MOSFETs. It offers a very
VFB is less than VREF, VCOMP ramps up until it
compact solution to achieve a 2A continuous
exceeds VAAM. During this time, the internal
output current over a wide input supply range,
clock is blocked, thus the MP1470 skips some
with excellent load and line regulation.
pulses for PFM (Pulse Frequency Modulation)
The MP1470 operates in a fixed-frequency, mode and achieves the light load power save.
peak-currentcontrol mode to regulate the Clock
output voltage. An internal clock initiates the
VOUT
PWM cycle to turn on the integrated high-side VAAM
1.2pF
HS_driver
power MOSFET. This MOSFET remains on 47pF 500k
+
Q S R1
until its current reaches the value set by the
-
VCOMP 20k
- VFB
COMP voltage. When the power switch is off, it R
+ R2
remains off until the next clock cycle starts. If - VREF
reach the COMP set current value within 90% Figure 2: Simplified AAM Control Logic
of one PWM period, the power MOSFET is
forced to turn off. When the load current is light, the inductor peak
current is set internally to about 380mA for
Internal Regulator
VIN=12V, VOUT=3.3V, and L=6.5H. The curve
The 5V internal regulator powers most of the
of inductor peak current vs. inductor is shown in
internal circuits. This regulator takes VIN and
Figure 3.
operates in the full VIN range. When VIN
exceeds 5.0V, the regulator output is in full Inductor Peak Current
regulation. When VIN falls below 5.0V, the vs. Inductor
1.2
output decreases. 1.1
Error Amplifier 1
The error amplifier compares the FB voltage 0.9
against the internal 0.8V reference (REF) and 0.8
outputs a current proportional to the difference 0.7
between the two. This output current charges or 0.6
discharges the internal compensation network 0.5
to form the COMP voltage, which is used to 0.4
control the power MOSFET current. The 0.3
optimized internal compensation network 0.2
0 1 2 3 4 5 6 7
minimizes the external component counts and
simplifies the control-loop design. Figure 3: Inductor Peak Current vs. Inductor
AAM Operation Value
The MP1470 has AAM (Advanced Enable
Asynchronous Modulation) power-save mode EN is a digital control pin that turns the
for light load. The AAM voltage is set at 0.5V regulator on and off: Drive EN HIGH to turn on
internally. Under the heavy load condition, the the regulator, drive it LOW to turn it off. An
VCOMP is higher than VAAM. When the clock goes internal 1M resistor from EN to GND allows
high, the high-side power MOSFET turns on EN to float to shut down the chip.
and remains on until VILsense reaches the value The EN pin is clamped internally using a 6.5V
set by the COMP voltage. The internal clock series-Zener-diode as shown in Figure 4.
resets every time when VCOMP is higher than Connecting the EN input pin through a pullup
VAAM.
resistor to the VIN voltage limits the EN input issues and to protect the regulator. The
current to less than 100A. MP1470 exits hiccup mode once the over-
current condition is removed.
For example, with 12V connected to Vin,
RPULLUP (12V-6.5V) 100A =55k Thermal Shutdown
Thermal shutdown prevents the chip from
Connecting the EN pin directly to a voltage
operating at exceedingly high temperatures.
source without any pullup resistor requires
When the silicon die temperature exceeds
limiting the amplitude of the voltage source to
150C, it shuts down the whole chip. When the
6V to prevent damage to the Zener diode.
temperature falls below its lower threshold
(typically 130C) the chip is enabled again.
EN Floating Driver and Bootstrap Charging
Zener An external bootstrap capacitor powers the
EN LOGIC floating power MOSFET driver. This floating
6.5V-typ
GND driver has its own UVLO protection, with a
rising threshold of 2.2V and a hysteresis of
Figure 4: 6.5V Zener Diode
150mV. VIN regulates the bootstrap capacitor
voltage internally through D1, M1, R4, C4, L1
Under-Voltage Lockout (UVLO) and C2 (Figure 5). If (VIN-VSW) exceeds 5V, U2
Under-voltage lockout (UVLO) protects the chip will regulate M1 to maintain a 5V BST voltage
from operating at an insufficient supply voltage. across C4.
The MP1470 UVLO comparator monitors the D1
output voltage of the internal regulator, VCC. VIN
The UVLO rising threshold is about 4.2V while U2
M1
its falling threshold is consistently 3.85V.
R4
Internal Soft-Start 5V
U1
Soft-start prevents the converter output voltage C4
from overshooting during startup. When the
VOUT
chip starts, the internal circuit generates a soft-
SW L1
start voltage (SS) that ramps up from 0V to C2
1.2V: When SS falls below the internal
reference (REF), SS overrides REF so that the Figure 5: Internal Bootstrap Charger Start-Up
error amplifier uses SS as the reference; when and Shutdown Circuit
SS exceeds REF, the error amplifier resumes If both VIN and EN exceed their respective
using REF as its reference. The SS time is thresholds, the chip starts. The reference block
internally set to 1ms. starts first, generating stable reference voltage
Over-Current-Protection and Hiccup and currents, and then the internal regulator is
The MP1470 has a cycle-by-cycle over-current enabled. The regulator provides a stable supply
limit for when the inductor current peak value for the remaining circuits.
exceeds the set current-limit threshold. First, Three events can shut down the chip: EN low,
when the output voltage drops until FB falls VIN low, and thermal shutdown. The shutdown
below the Under-Voltage (UV) threshold procedure starts by initially blocking the
(typically 140mV) to trigger a UV event, the signaling path to avoid any fault triggering. The
MP1470 enters hiccup mode to periodically COMP voltage and the internal supply rail are
restart the part. This protection mode is then pulled down. The floating driver is not
especially useful when the output is dead- subject to this shutdown command.
shorted to ground. This greatly reduces the
average short-circuit current to alleviate thermal
I L
APPLICATION INFORMATION IL(MAX ) = ILOAD +
2
Setting the Output Voltage
The external resistor divider sets the output Under light-load conditions (below 100mA), use
voltage. The feedback resistor R1 also sets the a larger inductor to improve efficiency.
feedback-loop bandwidth through the internal Selecting the Input Capacitor
compensation capacitor (see the Typical The input current to the step-down converter is
Application circuit). Choose R1 around 10k, discontinuous, and therefore requires a
and R2with: capacitor to both supply the AC current to the
R1 step-down converter and maintain the DC input
R2 =
VOUT voltage. For the best performance, use low
1 ESR capacitors, such as ceramic capacitors
0.8V
with X5R or X7R dielectrics and small
Use a T-type network for when VOUT is low. temperature coefficients. A 22F capacitor is
RT R1 sufficient for most applications.
FB VOUT
The input capacitor (C1) requires an adequate
R2 ripple current rating because it absorbs the
input switching. Estimate the RMS current in
the input capacitor with:
Figure 6: T-Type Network
VOUT VOUT
Table 1 lists the recommended T-type resistors I C1 = ILOAD 1
VIN VIN
value for common output voltages.
The worst-case condition occurs at VIN = 2VOUT,
Table 1: Resistor Selection for Common Output
Voltages where:
VOUT (V) R1 (k) R2 (k) Rt (k) ILOAD
IC1 =
1.05 10(1%) 32.4(1%) 300(1%) 2
1.2 20.5(1%) 41.2(1%) 249(1%) For simplification, choose an input capacitor
1.8 40.2(1%) 32.4(1%) 120(1%) with an RMS current rating greater than half the
2.5 40.2(1%) 19.1(1%) 100(1%) maximum load current.
3.3 40.2(1%) 13(1%) 75(1%) The input capacitor can be electrolytic, tantalum,
5 40.2(1%) 7.68(1%) 75(1%) or ceramic. Place a small, high-quality, ceramic
capacitor (0.1F) as close to the IC as possible
Selecting the Inductor
when using electrolytic or tantalum capacitors.
Use a 1H-to-10H inductor with a DC current When using ceramic capacitors, make sure that
rating of at least 25% percent higher than the they have enough capacitance to provide
maximum load current for most applications. sufficient charge to prevent excessive input
For highest efficiency, select an inductor with a voltage ripple. Estimate the input voltage ripple
DC resistance less than 15m. For most caused by the capacitance with:
designs, derive the inductance value from the ILOAD V V
VIN = OUT 1 OUT
following equation. fS C1 VIN VIN
VOUT (VIN VOUT )
L1 = Selecting the Output Capacitor
VIN IL fOSC
The output capacitor (C2) maintains the DC
Where IL is the inductor ripple current. Choose output voltage. Use ceramic, tantalum, or low-
an inductor current approximately 30% of the ESR electrolytic capacitors. Use low ESR
maximum load current. The maximum inductor capacitors to limit the output voltage ripple.
peak current is: Estimate the output voltage ripple with:
VOUT V
2) Keep the connection between the input
VOUT = 1 OUT capacitor and IN pin as short and wide as
8 fS L1 C2
2
VIN
possible.
For tantalum or electrolytic capacitors, the ESR 3) Use short and direct feedback connections.
dominates the impedance at the switching Place the feedback resistors and compensation
frequency. For simplification, the output ripple components as close to the chip as possible.
can be approximated with:
4) Route SW away from sensitive analog areas
V V such as FB.
VOUT = OUT 1 OUT RESR
fS L1 VIN
The characteristics of the output capacitor also C1
R5
VOUT
z Duty cycle is high: D= >65%
VIN
C1A
Connect the external BST diode from the output
of voltage regulator to the BST pin, as shown in C1
GND
Figure 7 VIN
C6
C4
External BST Diode 3 2 1
R4 IN4148 R5
BST 4 5 6
R4
L1
MP1470 R2
C7
R6 C5
R7
SW 5V or 3.3V R1
L C3
C2
COUT
R3
R8
C2A
Design Example
Below is a design example following the
application guidelines for the specifications:
Table 2: Design Example
VIN 12V
VOUT 3.3V
IO 2A
The detailed application schematics are shown
in Figures 9 through 13. The typical
performance and circuit waveforms have been
shown in the Typical Performance
Characteristics section. For more device
applications, please refer to the related
Evaluation Board Datasheets.
1
NS 7.68k GND
NS
NS 13k GND
NS
R4
3 6
VIN IN BST
C1 C6 0R C4
GND 25V 25V
L1
GND
GND GND
MP1470 2
SW
2.5V/2A VOUT
SW
R3 C3 C2 C2A
R5 NS
100k NS NS
R7 R1 GND GND
100k 40.2k
5 4
EN EN FB
GND
R6 C5 R2
1
NS 19.1k GND
NS
R4
3 6
VIN IN BST
C1 C6 0R C4
GND 25V 25V
L1
GND
GND GND
MP1470 2
SW
1.8V/2A VOUT
SW
R3 C3 C2 C2A
R5 NS
100k NS NS
R7 R1 GND GND
120k 40.2k
5 4
EN EN FB
GND
R6 C5 R2
1
NS 32.4k GND
NS
NS 41.2k GND
NS
PACKAGE INFORMATION
TSOT23-6
See note 7
EXAMPLE
TOP MARK
PIN 1 ID
IAAAA
SEATING PLANE
SEE DETAIL''A''
NOTE:
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.