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Debugger
Allows you to trace the execution of a program
Allows you to view code, memory, registers, etc.
Example: 32-bit Windows debugger Positional Numbering System
-Any integer quantity can be represented exactly using any base
(radix).
-The binary system is called the base-2 system.
-Our decimal system is the base-10 system. It uses powers of 10
for each position in a number.
-The base is denoted by a subscript.
Example:
Base 10 to base 2 up to base n Conversion Base 10 to base 2 Conversion
2 methods for radix conversion:
the subtraction method
division remainder method
Base 10 to base 2 Conversion
SUBTRACTION METHOD
Base 10 to base 2 Conversion Example 1:
SUBTRACTION METHOD Convert 0.34375 base 10 to base 2 with 4-bits to the
Example 1: right of the radix point using subtraction method
Convert 147-base 10 to base 2 using subtraction NOTE: Reading from TOP to BOTTOM
NOTE: Reading from TOP to BOTTOM
MULTIPLICATION METHOD
Example 2:
Convert 0.34375 base 10 to base 2 with 4-bits to the
right of the radix point using multiplication
NOTE: Reading from TOP to BOTTOM
BCD
BCD(Binary-Coded Decimal) encodes
each digit of a decimal number to a
4-bit binary form.
When stored in an 8-bit byte, the
upper nibble is called the zone and
the lower part is called the digit.
The ALU
Consists of circuits to perform arithmetic and logic
operations
Adder
Multiplier
Shifter The bus carries three types of information
Comparator The address from the CPU of the intended
Operations in the ALU set status flags (carry, item to be accessed
overflow, positive, zero, negative) The control information (read versus write, or
Also, possibly, temporary registers before moving results status information like are you available?)
back to register or memory The data, either being sent to the device, or
The Control Unit from the device to CPU
In charge of managing the fetch-execute cycle Processor-memory buses -are short, high-speed buses
It sends out control signals to all other devices that are closely matched to the memory system on the
A control signal indicates that the device machine to maximize the bandwidth
should activate or perform its function I/O buses -are typically longer than processor-memory
The Bus buses and allow for many types of devices with varying
A bus is a collection of wires that allow current to flow bandwidths.
over them which is the current is the information being Memory Organization and Addressing
passed between components Memory is organized into byte or word-sized blocks
There are 3 parts to a bus - Each block has a unique address
data bus -for data and program instructions
control bus -control signals from the CU to the
devices, and feedback lines for ack that they
are ready or for interrupting the CPU
address bus -the address of the memory
location or I/O device that is to perform the Byte-addressable
given operation which means that each individual byte has a
Buses connect two types of devices unique address.
Masters If an architecture is byte-addressable, and the
Devices that can initiate requests instruction set architecture word is larger with
CPU a byte
some I/O devices Word-addressable
Slaves which means each word (not necessarily each
Devices that only respond to byte) has its own address
requests from masters Memory is often referred to using the notation LxW
Memory (length x width).
some I/O devices EXAMPLE :
Some buses are dedicated How many bits would you need to address a 2M X 32 memory if
The bus directly connects two devices (point- a. The memory is byte-addressable?
to-point bus) b. The memory is word-addressable?
Most buses connect multiple components ANSWER:
multipoint a. There are 2M x 4 bytes which equals 2 x 2^20 x 2^2 = 2 ^23
total bytes, so 23 bits are needed for an address
b. There are 2M words which equals 2 X 2^20 = 2^21, so 21 bits
are required for an address
How many bits are required to address a 1M x 8 main
memory if
a. Main memory is byte-addressable?
b. Main memory is word-addressable?