Sei sulla pagina 1di 42

A B C D E

Compal Confidential
Model Name : V5WE2/T2 (EA/EG)
File Name : LA-9532P
1 1

Compal Confidential
2 2

EA50 UMA M/B Schematics Document


Intel Shark Bay ULT (Hasswell + Lynx PointLP)

3 2013-04-18 3

REV:1.0

ZZZ
Part Number Description

4 DAZ0VR00200 PCB V5WE2 LA-9532P LS-9531P/9532P/9533P 4


V5WE2_PCB

ZZZ1

Security Classification Compal Secret Data Compal Electronics, Inc.


2012/07/10 2013/07/10 Title
HDMI_ROYALTY
Issued Date Deciphered Date Cover Page
ROYALTY HDMI W/LOGO+HDCP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
RO0000003HM AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
45@ DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. V5WE2 M/B LA-9532P Schematic
Date: Thursday, April 18, 2013 Sheet 1 of 42
A B C D E
A B C D E

CRT Conn. eDP & LVDS


Fan Control
page 21 Co-lay Conn. page 30
page 18

DP to VGA HDMI Conn. eDP to LVDS


1
ITE IT6511FN page 19
RTD2132R 1

page 17 204pin DDR3L-SO-DIMM X1


page 20 Intel Haswell ULT BANK 0, 1, 2, 3 page 15
DP x 2 lanes HDMI x 4 lanes eDP Memory BUS
2.7GT/s 2.97GT/s Dual Channel
DDI
Haswell ULT
Processor 1.35V DDR3L 1333/1600 204pin DDR3L-SO-DIMM X1
BANK 4, 5, 6, 7 page 16

MINI Card OPI


WLAN
USB port 8 page 24

PCIe 2.0 USB 3.0 USB 2.0 CMOS Touch


5GT/s conn x1 conn x2 Camera Module
2

port 4
Lynx Point - LP USB port 0 USB/B (port 1,2) USB port 7 USB port 6
2

Flexible IO
page 26 page 26 page 18 page 18
PCH
PCIe 2.0 48MHz
5GT/s USBx8
SATA3.0 SATA3.0
port 3 6.0 Gb/s 6.0 Gb/s
port 0 port 1 HD Audio 3.3V 24MHz

LAN(GbE) SATA HDD SATA CDROM


Boardcom Conn. Conn. HDA Codec
57786 page 1168pin BGA ALC3225
22 page 25 page 25
page 04~14 page 29
SPI

3
Card Reader LPC BUS 3
2 in 1 SPI ROM x2
(SD/MMC) CLK=24MHz Int. Speaker Int. MIC Combo Jack
page 23 page 07
ENE page 29 page 29 page 29

RTC CKT. Sub Board KB9012/KB932


page 27
page 06
LS-9531P
PWR/B
Power On/Off CKT. page 26 Touch Pad Int.KBD
page 28 page 28
page 28
LS-9532P
USB/B (port 1,2)
DC/DC Interface CKT. page 26
page 31 EC ROM x1
4 4

LS-9533P (KB932)
page 27

Power Circuit DC/DC BATT/B


page 33 Security Classification Compal Secret Data Compal Electronics, Inc.
page 32~40
2012/07/10 2013/07/10 Title
Issued Date Deciphered Date Block Diagrams
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. V5WE2 M/B LA-9532P Schematic
Date: Monday, April 08, 2013 Sheet 2 of 42
A B C D E
A B C D E

SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

Voltage Rails Full ON HIGH HIGH HIGH HIGH ON ON ON ON

Power Plane Description S1 S3 S5 S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
VIN Adapter power supply (19V) N/A N/A N/A
S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
BATT+ Battery power supply (12.6V) N/A N/A N/A
B+ AC or battery power rail for power circuit. N/A N/A N/A S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF
1 1
+CPU_CORE Core voltage for CPU ON OFF OFF
S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+0.675VS +0.675VSP to +0.675VS switched power rail for DDR terminator ON OFF OFF
+1.35V +1.35VP to +1.35V power rail for DDRIIIL ON ON OFF
+1.5VS +1.5V to +1.5VS switched power rail ON OFF OFF
Board ID / SKU ID Table for AD channel
+1.8VS +3VS to 1.8V switched power rail to CPU ON OFF OFF
+3VALW +3VALW always on power rail ON ON ON*
Vcc 3.3V +/- 5%
+3VLP B+ to +3VLP power rail for suspend power ON ON ON
Ra/Rc/Re 100K +/- 5%
Board ID Rb / Rd / Rf V AD_BID min V AD_BID typ V AD_BID max
+3VS +3VALW to +3VS power rail ON OFF OFF
+5VALW +5VALWP to +5VALW power rail ON ON ON*
0 0 0 V 0 V 0 V
+5VS +5VALW to +5VS switched power rail ON OFF OFF
1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V
+VSB +VSBP to +VSB always on power rail for sequence control ON ON ON*
2 18K +/- 5% 0.436 V 0.503 V 0.538 V
+RTCVCC RTC power ON ON ON
3 33K +/- 5% 0.712 V 0.819 V 0.875 V
+1.05VS_VTT +1.05VSP to +1.05VS_VTT switched power rail for cpu ON OFF OFF
4 56K +/- 5% 1.036 V 1.185 V 1.264 V
5 100K +/- 5% 1.453 V 1.650 V 1.759 V
6 200K +/- 5% 1.935 V 2.200 V 2.341 V
7 NC 2.500 V 3.300 V 3.300 V
2 2

BOARD ID Table
Board ID PCB Revision BTO Option Table
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
0 0.1 BTO Item BOM Structure
1 0.2 EC9012 9012@
EC SM Bus1 address EC SM Bus2 address 2 0.3 EC940 940@
3 0.4 Unpop @
Device Address Device Address 4 1.0 TPMCircuit TPM@
Smart Battery 0001 011X b On Board Thermal Senser 1001_101xb 5 eDPmode EDP@
PCH SM Bus address 6 eDPtoLVDS TL@
7 Connector CONN@
Device Address GSensor GSEN@
ChannelA DIMM0 A0 1010 000X JDIMM1(SPD)
USB Port Table XDP(DebugPort) XDP@
BOM config KBBacklight BL@
USB 3.0 Port
DebugOnly DEG@
3
1 USB Port(Left 3.0)
3

PCB P/N DA60000XR00 : PCB 0VR LA-9532P REV0 M/B MECrequirement EMC@
2
EVT BOM config 9012@;AMIC@;CHR@;BL@;EMC@;AOAC@ 11/1DelXDP@ XHCI MECrequirementunpop XEMC@
3
DVT BOM config 9012@;BL@;EMC@;EDP@(L01~L04) GPU_Select VGA@
4
9012@;BL@;EMC@;TL@(L05) reserve3,5VMOS 35V@
PVT BOM config 9012@;EMC@;EDP@;1ROM@;IOAC@ 3 External BIOS8MSolution 1ROM@
USB 2.0 USB 1.1 Port
PreMP BOM config 9012@;EMC@;EDP@;1ROM@;IOAC@ USB Port BIOS4+2MSolution 2ROM@
0 USB Port(Left 3.0) IOACFunction IOAC@
UHCI0
1 USB Port(Right 2.0) TouchscreenFunction TS@
43 level BOM table 2 USB Port(Right 2.0)
UHCI1
3
43 Level Description EHCI1
4 Mini Card(WLAN)
4319LWBOL01 SMT MB A9532 V5WE2 UMA I7 QDA7 HDMI UHCI2
5
4319LWBOL02 SMT MB A9532 V5WE2 UMA I5 QDJB HDMI
6 Touch Screen
4319LWBOL03 SMT MB A9532 V5WE2 UMA I5 QDJ7 HDMI UHCI3
7 Camera
4319LWBOL04 SMT MB A9532 V5WE2 UMA I5 QDJ9 HDMI
4319LWBOL05 SMT MB A9532 V5WE2 UMA I5 QDJB LVDS HDMI
4 4
4319LWBOL06 SMT MB A9532 V5WE2 UMA WO/CPU HDMI
4319LWBOL07 SMT MB A9532 V5WE2 UMA I5 QEA4 HDMI
4319LWBOL08 SMT MB A9532 V5WE2 UMA I5-4200 HDMI
4319LWBOL09 SMT MB A9532 V5WE2 UMA I3-4010 HDMI
SMT MB A9532 V5WE2 UMA I5-4250 HDMI
Security Classification Compal Secret Data Compal Electronics, Inc.
4319LWBOL10 2012/07/10 2013/07/10 Title
4319LWBOL21 SMT MB A9532 V5WC2 UMA I5-4200 HDMI
Issued Date Deciphered Date Notes List
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
4319LWBOL22 SMT MB A9532 V5WC2 UMA I3-4010 HDMI AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. V5WE2 M/B LA-9532P Schematic
Date: Friday, April 12, 2013 Sheet 3 of 42
A B C D E
5 4 3 2 1

HASWELL_MCP_E
U1A

C54 C45
20 CPU_DP1_N0 DDI1_TXN0 EDP_TXN0 EDP_TXN0 18
C55 B46
20 CPU_DP1_P0 DDI1_TXP0 EDP_TXP0 EDP_TXP0 18
B58 A47
20 CPU_DP1_N1 DDI1_TXN1 EDP_TXN1 EDP_TXN1 18
DP to CRT 20 CPU_DP1_P1
C58
B55 DDI1_TXP1
DDI1_TXN2
EDP_TXP1
B47
EDP_TXP1 18
A55 C47
A57 DDI1_TXP2 EDP_TXN2 C46 +VCCIOA_OUT
B57 DDI1_TXN3 EDP_TXP2 A49
DDI1_TXP3 DDI EDP EDP_TXN3 B49
D D
C51 EDP_TXP3
19 CPU_DP2_N0 DDI2_TXN0
C50 A45 EDP_AUXN 18
19 CPU_DP2_P0 DDI2_TXP0 EDP_AUXN
C53 B45 EDP_AUXP 18
19 CPU_DP2_N1 DDI2_TXN1 EDP_AUXP
HDMI 19
19
CPU_DP2_P1
CPU_DP2_N2
B54
C49 DDI2_TXP1
DDI2_TXN2 EDP_RCOMP
D20 EDP_COMP R1 1 2
B50 A43 24.9_0402_1%
19 CPU_DP2_P2 DDI2_TXP2 EDP_DISP_UTIL
A53
19 CPU_DP2_N3 DDI2_TXN3
B53 Tracewidth=20mils
19 CPU_DP2_P3 DDI2_TXP3 EDP_DISP_UTIL 18
Spacing=25mil
Maxlength=100mils
1 OF 19 Rev1p2
HASWELL-MCP-E-ULT_BGA1168

+1.35V
Reserved for ESD
HASWELL_MCP_E
U1B
1

C94 1 2 6.8P_0402_50V8C
R184 XEMC@ T20 @ D61
T2 @ K61 PROC_DETECT MISC
470_0603_5% CATERR
N62 J62 XDP_PRDY# @ T157
27 H_PECI PECI PRDY K62 XDP_PREQ# @ T158
2

2 1 R68 R8 JTAG
PREQ E60 XDP_TCK @ T159
+1.05VS_VTT PROC_TCK
62_0402_5% 56_0402_5% E61 XDP_TMS @ T160
1 2 H_PROCHOT#_R K63 PROC_TMS E59 XDP_TRST# @ T161
DIMM_DRAMRST# 15,16 27,32,33 H_PROCHOT# PROCHOT PROC_TRST
THERMAL F63 XDP_TDI @ T162
PROC_TDI
C Reserved for ESD C95 1 2 6.8P_0402_50V8C
PROC_TDO
F62 XDP_TDO @ T163 C
XEMC@
R6 1 2 10K_0402_5% H_CPUPWRGD C61
PROCPWRGD PWR
Reserved for ESD C60 1 2 6.8P_0402_50V8C
BPM#0
J60 XDP_OBS0 @ T164
XEMC@ H60 XDP_OBS1 @ T165
BPM#1 H61
BPM#2 H62
R11 1 2 200_0402_1% SM_RCOMP0 AU60 BPM#3 K59
R13 1 2 120_0402_1% SM_RCOMP1 AV60 SM_RCOMP0 DDR3 BPM#4 H63
R41 1 2 100_0402_1% SM_RCOMP2 AU61 SM_RCOMP1 BPM#5 K60
DIMM_DRAMRST# AV15 SM_RCOMP2 BPM#6 J61
DDR_PG_CTRL AV61 SM_DRAMRST BPM#7
15 DDR_PG_CTRL SM_PG_CNTL1
2 DDR3 Compensation Signals Rev1p2
2 OF 19
C993 HASWELL-MCP-E-ULT_BGA1168
6.8P_0402_50V8C
1
XEMC@

Reserved for ESD

B B

U1 U1

CPU_SR170 _C1 CPU_SR16Q _C1


SR170@ SR16Q@
A A
SA00006SMB0 SA00006SX70

U1 U1 U1 U1 U1 U1

Security Classification Compal Secret Data Compal Electronics, Inc.


2012/07/10 2013/07/10 Title
Issued Date Deciphered Date HSW MCP(1/11) DDI,MSIC,XDP
CPU_QDJB_B1 CPU_QDJ7_B1 CPU_QDJ6_B1 CPU_QDJ9_B1 CPU_QEVE _C0 CPU_QEVG_C0
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
QDJB@ QDJ7@ QDJ6@ QDJ9@ QEVE@ QEVG@ AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
SA000067060 SA000067H50 SA00006FY20 SA00006G120 SA00006SM30 SA00006SX30 Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. V5WE2 M/B LA-9532P Schematic
Date: Friday, April 12, 2013 Sheet 4 of 42
5 4 3 2 1
5 4 3 2 1

U1C HASWELL_MCP_E
U1D HASWELL_MCP_E

DDR_A_D0 AH63 AU37


SA_DQ0 SA_CLK#0 SA_CLK_DDR#0 15
DDR_A_D1 AH62 AV37
SA_DQ1 SA_CLK0 SA_CLK_DDR0 15
DDR_A_D2 AK63 AW36 DDR_B_D0 AY31 AM38
SA_DQ2 SA_CLK#1 SA_CLK_DDR#1 15 SB_DQ0 SB_CK#0 SB_CLK_DDR#0 16
DDR_A_D3 AK62 AY36 DDR_B_D1 AW31 AN38
SA_DQ3 SA_CLK1 SA_CLK_DDR1 15 SB_DQ1 SB_CK0 SB_CLK_DDR0 16
DDR_A_D4 AH61 DDR_B_D2 AY29 AK38
SA_DQ4 SB_DQ2 SB_CK#1 SB_CLK_DDR#1 16
DDR_A_D5 AH60 AU43 DDR_B_D3 AW29 AL38
SA_DQ5 SA_CKE0 DDRA_CKE0_DIMMA 15 SB_DQ3 SB_CK1 SB_CLK_DDR1 16
DDR_A_D6 AK61 AW43 DDR_B_D4 AV31
SA_DQ6 SA_CKE1 DDRA_CKE1_DIMMA 15 SB_DQ4
DDR_A_D7 AK60 AY42 DDR_B_D5 AU31 AY49
SA_DQ7 SA_CKE2 SB_DQ5 SB_CKE0 DDRB_CKE0_DIMMB 16
DDR_A_D8 AM63 AY43 DDR_B_D6 AV29 AU50
SA_DQ8 SA_CKE3 SB_DQ6 SB_CKE1 DDRB_CKE1_DIMMB 16
D DDR_A_D9 AM62 DDR_B_D7 AU29 AW49 D
DDR_A_D10 AP63 SA_DQ9 AP33 DDR_B_D8 AY27 SB_DQ7 SB_CKE2 AV50
SA_DQ10 SA_CS#0 DDRA_CS0_DIMMA# 15 SB_DQ8 SB_CKE3
DDR_A_D11 AP62 AR32 DDR_B_D9 AW27
SA_DQ11 SA_CS#1 DDRA_CS1_DIMMA# 15 SB_DQ9
DDR_A_D12 AM61 DDR_B_D10 AY25 AM32
SA_DQ12 SB_DQ10 SB_CS#0 DDRB_CS0_DIMMB# 16
DDR_A_D13 AM60 AP32 DDRA_ODT0 @ T4 DDR_B_D11 AW25 AK32
SA_DQ13 SA_ODT0 SB_DQ11 SB_CS#1 DDRB_CS1_DIMMB# 16
DDR_A_D14 AP61 DDR_B_D12 AV27
DDR_A_D15 AP60 SA_DQ14 AY34 DDR_B_D13 AU27 SB_DQ12 AL32 DDRB_ODT0 @ T5
SA_DQ15 SA_RAS DDR_A_RAS# 15 SB_DQ13 SB_ODT0
DDR_A_D16 AP58 AW34 DDR_B_D14 AV25
SA_DQ16 SA_WE DDR_A_WE# 15 SB_DQ14
DDR_A_D17 AR58 AU34 DDR_B_D15 AU25 AM35
SA_DQ17 SA_CAS DDR_A_CAS# 15 SB_DQ15 SB_RAS DDR_B_RAS# 16
DDR_A_D18 AM57 DDR_B_D16 AM29 AK35
SA_DQ18 SB_DQ16 SB_WE DDR_B_WE# 16
DDR_A_D19 AK57 AU35 DDR_B_D17 AK29 AM33
SA_DQ19 SA_BA0 DDR_A_BS0 15 SB_DQ17 SB_CAS DDR_B_CAS# 16
DDR_A_D20 AL58 AV35 DDR_B_D18 AL28
SA_DQ20 SA_BA1 DDR_A_BS1 15 SB_DQ18
DDR_A_D21 AK58 AY41 DDR_B_D19 AK28 AL35
SA_DQ21 SA_BA2 DDR_A_BS2 15 SB_DQ19 SB_BA0 DDR_B_BS0 16
DDR_A_D22 AR57 DDR_B_D20 AR29 AM36
SA_DQ22 SB_DQ20 SB_BA1 DDR_B_BS1 16
DDR_A_D23 AN57 AU36 DDR_A_MA0 DDR_B_D21 AN29 AU49
SA_DQ23 SA_MA0 SB_DQ21 SB_BA2 DDR_B_BS2 16
DDR_A_D24 AP55 AY37 DDR_A_MA1 DDR_B_D22 AR28
DDR_A_D25 AR55 SA_DQ24 SA_MA1 AR38 DDR_A_MA2 DDR_B_D23 AP28 SB_DQ22 AP40 DDR_B_MA0
DDR_A_D26 AM54 SA_DQ25 SA_MA2 AP36 DDR_A_MA3 DDR_B_D24 AN26 SB_DQ23 SB_MA0 AR40 DDR_B_MA1
DDR_A_D27 AK54 SA_DQ26 SA_MA3 AU39 DDR_A_MA4 DDR_B_D25 AR26 SB_DQ24 SB_MA1 AP42 DDR_B_MA2
DDR_A_D28 AL55 SA_DQ27 SA_MA4 AR36 DDR_A_MA5 DDR_B_D26 AR25 SB_DQ25 SB_MA2 AR42 DDR_B_MA3
DDR_A_D29 AK55 SA_DQ28 SA_MA5 AV40 DDR_A_MA6 DDR_B_D27 AP25 SB_DQ26 SB_MA3 AR45 DDR_B_MA4
DDR_A_D30 AR54 SA_DQ29 SA_MA6 AW39DDR_A_MA7 DDR_B_D28 AK26 SB_DQ27 SB_MA4 AP45 DDR_B_MA5
DDR_A_D31 AN54 SA_DQ30 SA_MA7 AY39 DDR_A_MA8 DDR_B_D29 AM26 SB_DQ28 SB_MA5 AW46DDR_B_MA6
DDR_A_D32 AY58 SA_DQ31 SA_MA8 AU40 DDR_A_MA9 DDR_B_D30 AK25 SB_DQ29 SB_MA6 AY46 DDR_B_MA7
DDR_A_D33 AW58 SA_DQ32 SA_MA9 AP35 DDR_A_MA10 DDR_B_D31 AL25 SB_DQ30 SB_MA7 AY47 DDR_B_MA8
DDR_A_D34 AY56 SA_DQ33 SA_MA10 AW41DDR_A_MA11 DDR_B_D32 AY23 SB_DQ31 SB_MA8 AU46 DDR_B_MA9
DDR_A_D35 AW56 SA_DQ34 DDR CHANNEL A SA_MA11 AU41 DDR_A_MA12 DDR_B_D33 AW23 SB_DQ32 SB_MA9 AK36 DDR_B_MA10
DDR_A_D36 AV58 SA_DQ35 SA_MA12 AR35 DDR_A_MA13 DDR_B_D34 AY21 SB_DQ33 DDR CHANNEL B SB_MA10 AV47 DDR_B_MA11
DDR_A_D37 AU58 SA_DQ36 SA_MA13 AV42 DDR_A_MA14 DDR_B_D35 AW21 SB_DQ34 SB_MA11 AU47 DDR_B_MA12
C DDR_A_D38 AV56 SA_DQ37 SA_MA14 AU42 DDR_A_MA15 DDR_B_D36 AV23 SB_DQ35 SB_MA12 AK33 DDR_B_MA13 C
DDR_A_D39 AU56 SA_DQ38 SA_MA15 DDR_B_D37 AU23 SB_DQ36 SB_MA13 AR46 DDR_B_MA14
DDR_A_D40 AY54 SA_DQ39 AJ61 DDR_A_DQS#0 DDR_B_D38 AV21 SB_DQ37 SB_MA14 AP46 DDR_B_MA15
DDR_A_D41 AW54 SA_DQ40 SA_DQSN0 AN62 DDR_A_DQS#1 DDR_B_D39 AU21 SB_DQ38 SB_MA15
DDR_A_D42 AY52 SA_DQ41 SA_DQSN1 AM58 DDR_A_DQS#2 DDR_B_D40 AY19 SB_DQ39 AW30DDR_B_DQS#0
DDR_A_D43 AW52 SA_DQ42 SA_DQSN2 AM55 DDR_A_DQS#3 DDR_B_D41 AW19 SB_DQ40 SB_DQSN0 AV26 DDR_B_DQS#1
SA_DQ43 SA_DQSN3 15 DDR_A_D[0..63] SB_DQ41 SB_DQSN1
DDR_A_D44 AV54 AV57 DDR_A_DQS#4 DDR_B_D42 AY17 AN28 DDR_B_DQS#2
DDR_A_D45 AU54 SA_DQ44 SA_DQSN4 AV53 DDR_A_DQS#5 DDR_B_D43 AW17 SB_DQ42 SB_DQSN2 AN25 DDR_B_DQS#3
SA_DQ45 SA_DQSN5 15 DDR_A_MA[0..15] SB_DQ43 SB_DQSN3
DDR_A_D46 AV52 AL43 DDR_A_DQS#6 DDR_B_D44 AV19 AW22DDR_B_DQS#4
DDR_A_D47 AU52 SA_DQ46 SA_DQSN6 AL48 DDR_A_DQS#7 DDR_B_D45 AU19 SB_DQ44 SB_DQSN4 AV18 DDR_B_DQS#5
SA_DQ47 SA_DQSN7 15 DDR_A_DQS#[0..7] SB_DQ45 SB_DQSN5
DDR_A_D48 AK40 DDR_B_D46 AV17 AN21 DDR_B_DQS#6
DDR_A_D49 AK42 SA_DQ48 AJ62 DDR_A_DQS0 DDR_B_D47 AU17 SB_DQ46 SB_DQSN6 AN18 DDR_B_DQS#7
SA_DQ49 SA_DQSP0 15 DDR_A_DQS[0..7] SB_DQ47 SB_DQSN7
DDR_A_D50 AM43 AN61 DDR_A_DQS1 DDR_B_D48 AR21
DDR_A_D51 AM45 SA_DQ50 SA_DQSP1 AN58 DDR_A_DQS2 DDR_B_D49 AR22 SB_DQ48 AV30 DDR_B_DQS0
DDR_A_D52 AK45 SA_DQ51 SA_DQSP2 AN55 DDR_A_DQS3 DDR_B_D50 AL21 SB_DQ49 SB_DQSP0 AW26DDR_B_DQS1
DDR_A_D53 AK43 SA_DQ52 SA_DQSP3 AW57DDR_A_DQS4 DDR_B_D51 AM22 SB_DQ50 SB_DQSP1 AM28 DDR_B_DQS2
DDR_A_D54 AM40 SA_DQ53 SA_DQSP4 AW53DDR_A_DQS5 DDR_B_D52 AN22 SB_DQ51 SB_DQSP2 AM25 DDR_B_DQS3
DDR_A_D55 AM42 SA_DQ54 SA_DQSP5 AL42 DDR_A_DQS6 DDR_B_D53 AP21 SB_DQ52 SB_DQSP3 AV22 DDR_B_DQS4
DDR_A_D56 AM46 SA_DQ55 SA_DQSP6 AL49 DDR_A_DQS7 DDR_B_D54 AK21 SB_DQ53 SB_DQSP4 AW18DDR_B_DQS5
DDR_A_D57 AK46 SA_DQ56 SA_DQSP7 DDR_B_D55 AK22 SB_DQ54 SB_DQSP5 AM21 DDR_B_DQS6
DDR_A_D58 AM49 SA_DQ57 AP49 DDR_B_D56 AN20 SB_DQ55 SB_DQSP6 AM18 DDR_B_DQS7
SA_DQ58 SM_VREF_CA SM_DIMM_VREFCA 15,16 SB_DQ56 SB_DQSP7
DDR_A_D59 AK49 AR51 DDR_B_D57 AR20
SA_DQ59 SM_VREF_DQ0 SA_DIMM_VREFDQ 15 SB_DQ57
DDR_A_D60 AM48 AP51 DDR_B_D58 AK18
SA_DQ60 SM_VREF_DQ1 SB_DIMM_VREFDQ 16 SB_DQ58
DDR_A_D61 AK48 DDR_B_D59 AL18
DDR_A_D62 AM51 SA_DQ61 DDR_B_D60 AK20 SB_DQ59
SA_DQ62 SB_DQ60 16 DDR_B_D[0..63]
DDR_A_D63 AK51 DDR_B_D61 AM20
SA_DQ63 DDR_B_D62 AR18 SB_DQ61
SB_DQ62 16 DDR_B_MA[0..15]
DDR_B_D63 AP18
SB_DQ63
B 16 DDR_B_DQS#[0..7] B

16 DDR_B_DQS[0..7]

3 OF 19 Rev1p2
HASWELL-MCP-E-ULT_BGA1168 4 OF 19 Rev1p2
HASWELL-MCP-E-ULT_BGA1168

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


2012/07/10 2013/07/10 Title
Issued Date Deciphered Date HSW MCP(2/11) DDRIII
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. V5WE2 M/B LA-9532P Schematic
Date: Monday, April 08, 2013 Sheet 5 of 42
5 4 3 2 1
5 4 3 2 1

PCH_RTCX1

1 2 PCH_RTCX2 U1E HASWELL_MCP_E


R101 10M_0402_5% +RTCVCC
1
C149
+RTCVCC 1U_0402_10V6K ME CMOS PCH_RTCX1 AW5
Y1 PCH_RTCX2 AY5 RTCX1
1 2 R69 2 R72 1 2 1M_0402_5% SM_INTRUDER# AU6 RTCX2 J5
INTRUDER RTC SATA_RN0/PERN6_L3 SATA_PRX_DTX_N0 25
20K_0402_1% PCH_INTVRMEN AV7 H5 SATA_PRX_DTX_P0 25
INTVRMEN SATA_RP0/PERP6_L3
1 2 PCH_SRTCRST# AV6
SRTCRST SATA_TN0/PETN6_L3
B15
SATA_PTX_DRX_N0 25 HDD
32.768KHZ_12.5PF_Q13FC 1 2 PCH_RTCRST# AU7 A15
RTCRST SATA_TP0/PETP6_L3 SATA_PTX_DRX_P0 25
1 1 R70

1
D C153 C154 20K_0402_1% 1 J8 SATA_PRX_DTX_N1 25 D
18P_0402_50V8J 18P_0402_50V8J C150 R71 SATA_RN1/PERN6_L2 H8
1U_0402_10V6K @ 0_0603_5% SATA_RP1/PERP6_L2 A17
SATA_PRX_DTX_P1 25 ODD
2 2 SATA_TN1/PETN6_L2 SATA_PTX_DRX_N1 25
B17
2 CMOS SATA_TP1/PETP6_L2 SATA_PTX_DRX_P1 25

2
HDA_BIT_CLK AW8 J6
HDA_SYNC AV11 HDA_BCLK/I2S0_SCLK SATA_RN2/PERN6_L1 H6
HDA_RST# AU8 HDA_SYNC/I2S0_SFRM SATA_RP2/PERP6_L1 B14
HDA_SDIN0 AY10 HDA_RST/I2S_MCLK SATA_TN2/PETN6_L1 C15
29 HDA_SDIN0 HDA_SDI0/I2S0_RXD AUDIO SATA SATA_TP2/PETP6_L1
T6 @ AU12
HDA_SDOUT AU11 HDA_SDI1/I2S1_RXD F5
+RTCVCC RTCRST close RAM door T7 @ AW10 HDA_SDO/I2S0_TXD SATA_RN3/PERN6_L0 E5
T8 @ AV10 HDA_DOCK_EN/I2S1_TXD SATA_RP3/PERP6_L0 C17
HDA_DOCK_RST/I2S1_SFRM SATA_TN3/PETN6_L0 GPIO34_SCI# 9
T9 @ AY8 D17
PCH_INTVRMEN R73 1 2 330K_0402_5% I2S1_SCLK SATA_TP3/PETP6_L0
R74 1 @ 2 330K_0402_5% R937
V1 GPIO34_SCI# 1 @ 2 0_0402_5%
SATA0GP/GPIO34 EC_SCI# 27,9
INTVRMEN U1 PCH_GPIO35
* LIntegrated
HIntegrated VRM enable
VRM disable
SATA1GP/GPIO35
SATA2GP/GPIO36
V6
AC1
PCH_GPIO36
PCH_GPIO37
PCH_GPIO35
PCH_GPIO36
9
9
+1.05VS_ASATA3PLL

SATA3GP/GPIO37 PCH_GPIO37 9
T95 @
PCH_JTAG_RST# AU62
51_0402_5% 1 @ 2 R97 PCH_JTAG_TCK AE62 PCH_TRST A12 SATA_IREF R75 1 @ 2 0_0603_5%
T21 @ PCH_JTAG_TDI AD61 PCH_TCK SATA_IREF L11 @ T13
T19 @ PCH_JTAG_TDO AE61 PCH_TDI RSVD K10 @ T14
PCH_TDO RSVD within500mils
T15 @ PCH_JTAG_TMS AD62 JTAG C12 SATA_RCOMP R2 1 2 3.01K_0402_1%
HDA for AUDIO T10 @ AL11 PCH_TMS SATA_RCOMP U3 PCH_SATALED#
RSVD SATALED PCH_SATALED# 28
T11 @ AC4
T22 @ PCH_TCK_JTAGX AE63 RSVD R10 1 2
JTAGX +3VS
RP14 T12 @ AV2 10K_0402_5%
C 1 8 HDA_BIT_CLK RSVD C
29 HDA_BITCLK_AUDIO
29 HDA_SYNC_AUDIO 2 7 HDA_SYNC
29 HDA_RST_AUDIO# 3 6 HDA_RST#
29 HDA_SDOUT_AUDIO 4 5 HDA_SDOUT
5 OF 19 Rev1p2
33_0804_8P4R_5% HASWELL-MCP-E-ULT_BGA1168
EMC@

27 HDA_SDO R163 1 9012@ 2 0_0402_5%

25,27,7 SPI_WP1#_R R161 1 940@ 2 4.7K_0402_5%

ME Debug

+RTCBATT1
+RTCBATT1
2

+CHGRTC
R446
+

@ 1K_0402_5%
3 1

B +RTCBATT_R B
2

20mil
20mil
+RTCVCC

D32 @
1

CHN202UPT_SC70-3 JBATT1
-

1 LOTES_AAA-BAT-054-K01
2

@ C168 CONN@
0.1U_0402_16V4Z SP07000H700
2

Reserve only

W=20mils trace width 10mil W=20mils


+RTCBATT +CHGRTC +RTCVCC
D22
2

3
A A

BAS40-04_SOT23-3 1
C151
0.1U_0402_16V4Z
2
Security Classification Compal Secret Data Compal Electronics, Inc.
2012/07/10 2013/07/10 Title
Issued Date Deciphered Date HSW MCP(3/11) RTC,SATA,XDP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. V5WE2 M/B LA-9532P Schematic
Date: Thursday, April 18, 2013 Sheet 6 of 42
5 4 3 2 1
5 4 3 2 1

XTAL24_IN
HASWELL_MCP_E
U1F
2 1 XTAL24_OUT
1M_0402_5% R48

Y2
24MHZ_12PF_X3G024000DC1H C43 A25 XTAL24_IN
1 3 C42 CLKOUT_PCIE_N0 XTAL24_IN B25 XTAL24_OUT
2 4 PCH_GPIO18 U2 CLKOUT_PCIE_P0 XTAL24_OUT
9 PCH_GPIO18 PCIECLKRQ0/GPIO18
1 1 K21 @ T16
B41 RSVD M21 @ T17
C2 C3 A41 CLKOUT_PCIE_N1 RSVD C26 XCLK_BIASREF R78 1 2 3.01K_0402_1%
D +1.05VS_AXCK_LCPLL D
12P_0402_50V8J 12P_0402_50V8J PCH_GPIO19 Y5 CLKOUT_PCIE_P1 DIFFCLK_BIASREF
2 2 9 PCH_GPIO19 PCIECLKRQ1/GPIO19 C35 R140 1 2 10K_0402_5%
CLK_PCIE_LAN# C41 CLOCK TESTLOW_C35 C34 R141 1 2 10K_0402_5%
22 CLK_PCIE_LAN# CLKOUT_PCIE_N2 TESTLOW_C34
CLK_PCIE_LAN B42 AK8 R142 1 2 10K_0402_5%
22 CLK_PCIE_LAN CLKOUT_PCIE_P2 TESTLOW_AK8
PCIE LAN +3VS R52 1 2 10K_0402_5% AD1
PCIECLKRQ2/GPIO20
SIGNALS
TESTLOW_AL8
AL8 R148 1 2 10K_0402_5%
22 LAN_CLKREQ#
CLK_PCIE_MINI1# B38 AN15 CLKOUT_LPC0 R390 2 EMC@ 1 22_0402_5%
24 CLK_PCIE_MINI1# CLKOUT_PCIE_N3 CLKOUT_LPC_0 CLK_PCI_LPC 27
WLAN 24 CLK_PCIE_MINI1
CLK_PCIE_MINI1 C37
CLKOUT_PCIE_P3 CLKOUT_LPC_1
AP15 CLKOUT_LPC1 R395 2 TPM@ 1 22_0402_5%
CLK_PCI_TPM 28
24,8 MINI1_CLKREQ# N1
PCIECLKRQ3/GPIO21 B35 CLK_BCLK_ITP# @ T184
A39 CLKOUT_ITPXDP_N A35 CLK_BCLK_ITP @ T183
B39 CLKOUT_PCIE_N4 CLKOUT_ITPXDP_P
PCH_GPIO22 U5 CLKOUT_PCIE_P4
PCIECLKRQ4/GPIO22
B37
A37 CLKOUT_PCIE_N5
PCH_GPIO23 T2 CLKOUT_PCIE_P5
9 PCH_GPIO23 PCIECLKRQ5/GPIO23

6 OF 19 Rev1p2
HASWELL-MCP-E-ULT_BGA1168
HASWELL_MCP_E
U1G

+3VS LPC_AD0 AU14 AN2 PCH_GPIO11


27,28 LPC_AD0 LAD0 SMBALERT/GPIO11 PCH_GPIO11 9
LPC_AD1 AW12 AP2 PCH_SMBCLK
27,28 LPC_AD1 LAD1 LPC SMBCLK PCH_SMBCLK 24
R216 1 2 10K_0402_5% PCH_GPIO22 LPC_AD2 AY12 AH1 PCH_SMBDATA
27,28 LPC_AD2 LAD2 SMBDATA PCH_SMBDATA 24
LPC_AD3 AW11 AL2 PCH_GPIO60
27,28 LPC_AD3 LAD3 SMBUS SML0ALERT/GPIO60 PCH_GPIO60 9
LPC_FRAME# AV12 AN1 SML0CLK
27,28 LPC_FRAME# LFRAME SML0CLK
C AK1 SML0DATA C
SML0DATA AU4 PCH_GPIO73
SML1ALERT/PCHHOT/GPIO73 PCH_GPIO73 9 +3VALW_PCH
AU3 SML1CLK
SML1CLK/GPIO75 AH3 SML1DATA
PCH_SPI_CLK AA3 SML1DATA/GPIO74
PCH_SPI_CS0# Y7 SPI_CLK AF2 @ T23 SML0CLK RP8 1 8 2.2K_0804_8P4R_5%
PCH_SPI_CS1# Y4 SPI_CS0 CL_CLK AD2 @ T24 SML0DATA 2 7
AC2 SPI_CS1 SPI C-LINK CL_DATA AF4 @ T25 PCH_SMBDATA 3 6
PCH_SPI_MOSI AA2 SPI_CS2 CL_RST PCH_SMBCLK 4 5
PCH_SPI_MISO AA4 SPI_MOSI
PCH_SPI_WP1# Y6 SPI_MISO
PCH_SPI_HOLD1# AF1 SPI_IO2 SML1CLK R114 1 2 2.2K_0402_5%
SPI_IO3 SML1DATA R113 1 2 2.2K_0402_5%

7 OF 19 Rev1p2
HASWELL-MCP-E-ULT_BGA1168
D29 design for Debug
board flash SPI ROM
(can be short after MP)
+BIOS_SPI +3VS

R305 1 9012@ 2 0_0402_5% +3VS

SPI ROM ( 2MByte ) D29 1 2 940@ RB751V40_SC76-2 R116


4.7K_0402_5%

2
C66 1 2 0.1U_0402_16V7K 1 2 +3VS
B R572 1 DEG@ 2 0_0402_5% PCH_SPI_CLK_1 U6 B
25 PCH_SPI_CLK_1_R
25 PCH_SPI_CS0#_1_R R599 1 DEG@ 2 0_0402_5% PCH_SPI_CS0# PCH_SPI_CS0# 1 8 RP19 PCH_SMBDATA 6 1 D_CK_SDATA D_CK_SDATA 15,16
R603 1 DEG@ 2 0_0402_5% PCH_SPI_MOSI_1 R108 PCH_SPI_MISO_1 2 CS# VCC 7 PCH_SPI_IO3_1 PCH_SPI_MOSI_1 1 8 PCH_SPI_MOSI
25 PCH_SPI_MOSI_1_R DO(IO1) HOLD#(IO3)
25 PCH_SPI_MISO_1_R R602 1 DEG@ 2 0_0402_5% PCH_SPI_MISO_1 PCH_SPI_WP1# 2 1 PCH_SPI_IO2_1 3 6 PCH_SPI_CLK_1 PCH_SPI_CLK_1 2 7 PCH_SPI_CLK Q7A
R604 1 DEG@ 2 0_0402_5% PCH_SPI_HOLD1# 33_0402_5% 4 WP#(IO2) CLK 5 PCH_SPI_MOSI_1 PCH_SPI_IO3_1 3 6 PCH_SPI_HOLD1# DMN66D0LDW-7_SOT363-6 R119
25 SPI_HOLD1#_R GND DI(IO0)
2ROM@ PCH_SPI_MISO_1 4 5 PCH_SPI_MISO 4.7K_0402_5%

5
EN25QH16-104HIP_SO8 1 2 +3VS
2ROM@ 33_8P4R_5%
2ROM@ PCH_SMBCLK 3 4 D_CK_SCLK D_CK_SCLK 15,16
+BIOS_SPI
C152
Reserve for EMI(Near SPI ROM) Q7B
10P_0402_50V8J DMN66D0LDW-7_SOT363-6
R105 1 1ROM@ 2 1K_0402_5% PCH_SPI_IO3_1 1 2 2 1 PCH_SPI_CLK_1
R106 1 1ROM@ 2 1K_0402_5% PCH_SPI_IO2_1 XEMC@ R104 XEMC@ 33_0402_5%
+3VS

SPI ROM ( 4MByte )


+3VS
R103 1 2ROM@ 2 1K_0402_5% PCH_SPI_HOLD1# C67 2ROM@
R102 1 2ROM@ 2 1K_0402_5% PCH_SPI_WP1# 0.1U_0402_16V7K
1 2

2
25,27,6 SPI_WP1#_R R564 1 940@ 2 1K_0402_5% PU 2.2K at EC side (+3VS)
U7 2ROM@
PCH_SPI_CS1# 1 8 RP20 SML1CLK 6 1 EC_SMB_CK2 27,30
R109 PCH_SPI_MISO_2 2 CS# VCC 7 PCH_SPI_IO3_2 PCH_SPI_MOSI_2 1 8 PCH_SPI_MOSI
PCH_SPI_WP1# 2 1 PCH_SPI_IO2_2 3 DO HOLD# 6 PCH_SPI_CLK_2 PCH_SPI_CLK_2 2 7 PCH_SPI_CLK Q8A
33_0402_5% 4 WP# CLK 5 PCH_SPI_MOSI_2 PCH_SPI_IO3_2 3 6 PCH_SPI_HOLD1# DMN66D0LDW-7_SOT363-6
GND DI

5
2ROM@ PCH_SPI_MISO_2 4 5 PCH_SPI_MISO
EN25QH32-104HIP_SO8

SPI ROM
33_8P4R_5% SML1DATA 3 4 EC_SMB_DA2 27,30
Reserve for EMI(Near SPI ROM) 2ROM@
A NOTE:R106&RP19value C453 Q8B
A

( 8MByte for Chrome) 1ROMsolutionuse15ohm 10P_0402_50V8J


1 2 2 1 PCH_SPI_CLK_2
DMN66D0LDW-7_SOT363-6

U6 U6
2ROMsolutionuse33ohm RP19
XEMC@ R402 XEMC@ 33_0402_5%

Security Classification Compal Secret Data Compal Electronics, Inc.


1ROM@ 2012/07/10 2013/07/10 Title
2 R108 1
Issued Date Deciphered Date HSW MCP(4/11) CLK,SPI,SMBUS
15_0402_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MX25L6406EM2I-12G_SO8 EN25QH64-104HIP SO8 15_8P4R_5% AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
940@ 1ROM@ 1ROM@ Custom 0.2
SA00004G600 SA00006MK00 SD300001P00
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. V5WE2 M/B LA-9532P Schematic
Date: Monday, April 08, 2013 Sheet 7 of 42
5 4 3 2 1
5 4 3 2 1

+3VS

1
R227
10K_0402_5%
DSWODVREN - On Die DSW VR Enable
* LDisable
HEnable(DEFAULT)

2
25 XDP_DBRESET# R59 1 DEG@ 2 0_0402_5% SYS_RESET#
PU at Page 4 (double PU) +RTCVCC

HASWELL_MCP_E
U1H
D R124 1 2 330K_0402_5% D
PM_APWROK R64 1 2 0_0402_5% PCH_PWROK_R R125 1 @ 2 330K_0402_5%
R206 SYSTEM POWER MANAGEMENT
SUSWARN# 1 @ 2 0_0402_5% SUSACK# AK2 AW7 DSWODVREN
SYS_RESET# AC3 SUSACK DSWVRMEN AV5 PCH_RSMRST#_R
SYS_PWROK R61 1 @ 2 0_0402_5% SYS_PWROK_R AG2 SYS_RESET DPWROK AJ5 PCH_PCIE_WAKE# 1K_0402_1% 1 2 R120 +3VALW_PCH
R110 1 @ 2 PBTN_OUT#_R R62 1 2 0_0402_5% PCH_PWROK_R AY7 SYS_PWROK WAKE
27 PBTN_OUT# 27 PCH_PWROK PCH_PWROK
0_0402_5% 11,27 VCCST_PG_EC R63 1 @ 2 0_0402_5% PM_APWROK AB5 8.2K_0402_5% 1 2 R157 +3VS
PLT_RST# AG7 APWROK V5 CLKRUN#
27,28 PLT_RST# PLTRST CLKRUN/GPIO32 CLKRUN# 28
AG4 LPCPD#
SUS_STAT/GPIO61 LPCPD# 28
AE6 SUSCLK
SUSCLK/GPIO62 SUSCLK 27
PCH_RSMRST# R117 1 2 10K_0402_5% AP5 PM_SLP_S5#
SLP_S5/GPIO63 PM_SLP_S5# 27
27 PCH_RSMRST# R79 1 @ 2 0_0402_5% PCH_RSMRST#_R AW6 @ T27
SUSWARN# AV4 RSMRST @ T28
9 SUSWARN# SUSWARN/SUSPWRDNACK/GPIO30
Note: EC is +3VL change to @ PBTN_OUT#_R AL7
PWRBTN SLP_S4
AJ6 PM_SLP_S4#
PM_SLP_S4# 27
PCH_ACIN AJ8 AT4 PM_SLP_S3#
ACPRESENT/GPIO31 SLP_S3 PM_SLP_S3# 27
+3VALW_PCH R156 1 2 8.2K_0402_5% PCH_BATLOW# AN4 AL5 @ T30 @ T29
T31 @ AF3 BATLOW/GPIO72 SLP_A AP4 @ T96
+3VALW_PCH AM5 SLP_S0 SLP_SUS AJ7 PM_SLP_LAN# R118 1 @ 2 10K_0402_5%
SLP_WLAN/GPIO29 SLP_LAN +3VALW_PCH
1

R245 not support Deep S4,S5 can NC


100K_0402_5% @ 8 OF 19 Rev1p2
HASWELL-MCP-E-ULT_BGA1168
@ D21 DDPB_CTRLDATA: Port B Detected
2

27,32,34 ACIN 1 2 PCH_ACIN


DDPC_CTRLDATA: Port C Detected
RB751V40_SC76-2
C C
1: Port B or C is detected
* 0: Port B or C is not detected
HASWELL_MCP_E
(Have internal PD)
U1I

+3VS

B8 B9
17,18 PCH_INV_PWM EDP_BKLCTL DDPB_CTRLCLK
A9 C9 R271 1 2 2.2K_0402_5%
27 ENBKL EDP_BKLEN eDP SIDEBAND DDPB_CTRLDATA
C6 D9 DDI2_CTRL_CK
18 PCH_ENVDD EDP_VDDEN DDPC_CTRLCLK DDI2_CTRL_CK 19
D11 DDI2_CTRL_DATA
DDPC_CTRLDATA DDI2_CTRL_DATA 19
+3VS 1 R420 @2 +3VS
EC_SMI# U6 100K_0402_5%
+1.05VS_VTT 27 EC_SMI# PIRQA/GPIO77
PCH_GPIO78 P4 C5
9 PCH_GPIO78 PIRQB/GPIO78 DDPB_AUXN DDI1_AUX_DN 20
1

PCH_GPIO79 N4 DISPLAY B6
9 PCH_GPIO79 PIRQC/GPIO79 DDPC_AUXN
U17 @ R310 PCH_GPIO80 N2 B5
PIRQD/GPIO80 DDPB_AUXP DDI1_AUX_DP 20
1 5 10K_0402_5% @ T26 @ AD4 A6
NC VCC PME GPIO DDPC_AUXP 1 2
11,39 VGATE 2 PCH_GPIO55 U7 R421 @
9 PCH_GPIO55
2

A 4 VGATE_3V PCH_GPIO52 L1 GPIO55 100K_0402_5%


Y VGATE_3V 27 GPIO52
3 Project_ID1 L3 C8 CPU_DP_HPD 20
GND PCH_GPIO51 R5 GPIO54 DDPB_HPD A8
9 PCH_GPIO51 GPIO51 DDPC_HPD CPU_HDMI_HPD 19
74AUP1G07GW_TSSOP5 Project_ID0 L4 D6 CPU_EDP_HPD 18
GPIO53 EDP_HPD
B B

9 OF 19 Rev1p2
HASWELL-MCP-E-ULT_BGA1168
+3VS

R403
5

R65 0_0402_5%
PCH_PWROK 2 0_0402_5% 2 @ 1
P

B 4 SYS_PWROK 1 2 PCH_PWROK +3VS


VGATE_3V 1 Y
A
G

+3VS
1

U43 @ RP27 1 8 PCH_GPIO52


3

R208 MC74VHC1G08DFT2G_SC70-5 R207 2 7 PCH_GPIO80

5
10K_0402_5% @ @ 10K_0402_5% 3 6 MINI1_CLKREQ# MINI1_CLKREQ# 24,7
4 5 DEVSLP0

VCC
DEVSLP0 25,9
10K_0804_8P4R_5% PLT_RST# 1
2

IN1 4
OUT PLT_RST_BUF# 22,24
2

GND
IN2

1
R416
100K_0402_5%

3
U30
MC74VHC1G08DFT2G_SC70-5

2
+3VS +3VS
1

A A
R205 R204
10K_0402_5% 10K_0402_5% @
@ Project_ID1 Project_ID0
Project ID
GPIO54 GPIO53
2

Project_ID1 Project_ID0
*V5WE2/T2 0 0 Security Classification Compal Secret Data Compal Electronics, Inc.
2

R214 R215 2012/07/10 2013/07/10 Title


10K_0402_5% 10K_0402_5% Reserved 0 1 Issued Date Deciphered Date HSW MCP(5/11) PM,GPIO,DDI
Reserved 1 0 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
1

Custom 0.2
Reserved 1 1 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. V5WE2 M/B LA-9532P Schematic
Date: Monday, April 08, 2013 Sheet 8 of 42
5 4 3 2 1
5 4 3 2 1

+3VS

+3VS
RP23 1 8 PCH_GPIO51 PCH_GPIO51 8
2 7 PCH_GPIO83
3 6 PCH_GPIO55 PCH_GPIO55 8 RP36 1 8 PCH_GPIO88
4 5 SERIRQ 2 7 PCH_GPIO92
10K_0804_8P4R_5% 3 6 PCH_GPIO85
RP24 1 8 EC_IN_RW 4 5 PCH_GPIO39
2 7 PCH_GPIO69 10K_0804_8P4R_5%
3 6 PCH_GPIO4
4 5 PCH_GPIO7
10K_0804_8P4R_5%
D RP25 1 8 PCH_GPIO5 D
2 7 PCH_GPIO1
3 6 PCH_GPIO94
4 5 PCH_GPIO93
10K_0804_8P4R_5%
RP26 1 8 PCH_GPIO2 +1.05VS_VTT
2 7 PCH_GPIO91
3 6 PCH_GPIO90

1
4 5 PCH_GPIO38 U1J HASWELL_MCP_E
10K_0804_8P4R_5% R144
RP16 1 8 PCH_GPIO19 PCH_GPIO19 7 1K_0402_5%
2 7 PCH_GPIO36 PCH_GPIO36 6
3 6 PCH_GPIO78 PCH_GPIO78 8

2
4 5 EC_KBRST# PCH_GPIO76 P1 D60 H_THERMTRIP#
10K_0804_8P4R_5% PCH_GPIO8 AU2 BMBUSY/GPIO76 THERMTRIP V4
GPIO8 RCIN/GPIO82 EC_KBRST# 27
RP28 1 8 PCH_GPIO18 PCH_GPIO18 7 AM7 T4 SERIRQ SERIRQ 27,28
2 7 PCH_GPIO35 EC_LID_OUT# AD6 LAN_PHY_PWR_CTRL/GPIO12 CPU/ SERIRQ AW15 PCH_OPIRCOMP 1 2 R145
PCH_GPIO35 6 27 EC_LID_OUT# GPIO15 MISC PCH_OPI_RCOMP
3 6 PCH_GPIO48 PCH_GPIO16 Y1 AF20 @ T106 49.9_0402_1%
4 5 GPIO34_SCI# PCH_GPIO17 T3 GPIO16 RSVD AB21 @ T32
GPIO34_SCI# 6 GPIO17 RSVD
10K_0804_8P4R_5% PCH_GPIO24 AD5
RP29 1 8 PCH_GPIO71 PCH_GPIO27 AN5 GPIO24
2 7 PCH_GPIO49 PCH_GPIO28 AD7 GPIO27
3 6 PCH_GPIO16 PCH_GPIO26 AN3 GPIO28
4 5 PCH_GPIO37 GPIO26 R6 PCH_GPIO83
PCH_GPIO37 6 GSPI0_CS/GPIO83
10K_0804_8P4R_5% PCH_GPIO56 AG6 L6 PCH_GPIO84
RP30 8 1 PCH_GPIO67 PCH_GPIO57 AP1 GPIO56 GSPI0_CLK/GPIO84 N6 PCH_GPIO85
7 2 PCH_GPIO65 PCH_GPIO58 AL4 GPIO57 GSPI0_MISO/GPIO85 L8 PCH_GPIO86
6 3 PCH_GPIO6 PCH_GPIO59 AT5 GPIO58 GSPI0_MOSI/GPIO86 R7 DGPU_PRSNT#
5 4 PCH_GPIO64 PCH_GPIO44 AK4 GPIO59 GSPI1_CS/GPIO87 L5 PCH_GPIO88
C 10K_0804_8P4R_5% PCH_GPIO47 AB6 GPIO44 GPIO GSPI1_CLK/GPIO88 N7 PCH_GPIO89 C
RP31 8 1 PCH_GPIO84 PCH_GPIO48 U4 GPIO47 GSPI1_MISO/GPIO89 K2 PCH_GPIO90
7 2 PCH_GPIO0 PCH_GPIO49 Y3 GPIO48 GSPI_MOSI/GPIO90 J1 PCH_GPIO91
6 3 PCH_GPIO3 PCH_GPIO50 P3 GPIO49 UART0_RXD/GPIO91 K3 PCH_GPIO92
5 4 PCH_GPIO89 PCH_GPIO71 Y2 GPIO50 UART0_TXD/GPIO92 J2 PCH_GPIO93
10K_0804_8P4R_5% PCH_GPIO13 AT3 HSIOPC/GPIO71 LPIO UART0_RTS/GPIO93 G1 PCH_GPIO94
RP32 8 1 PCH_GPIO17 PCH_GPIO14 AH4 GPIO13 UART0_CTS/GPIO94 K4 PCH_GPIO0
7 2 PCH_GPIO23 PCH_GPIO25 AM4 GPIO14 UART1_RXD/GPIO0 G2 PCH_GPIO1
PCH_GPIO23 7 GPIO25 UART1_TXD/GPIO1
6 3 PCH_GPIO76 PCH_GPIO45 AG5 J3 PCH_GPIO2
5 4 PCH_GPIO50 PCH_GPIO46 AG3 GPIO45 UART1_RST/GPIO2 J4 PCH_GPIO3
10K_0804_8P4R_5% R939 @ GPIO46 UART1_CTS/GPIO3 F2 PCH_GPIO4
R311 1 2 PCH_GPIO70 0_0402_5% PCH_GPIO9 AM3 I2C0_SDA/GPIO4 F3 PCH_GPIO5
10K_0402_5% EC_SCI# 1 2 GPIO10_SCI# AM2 GPIO9 I2C0_SCL/GPIO5 G4 PCH_GPIO6
27,6 EC_SCI# GPIO10 I2C1_SDA/GPIO6
DEVSLP0 P2 F1 PCH_GPIO7
25,8 DEVSLP0 DEVSLP0/GPIO33 I2C1_SCL/GPIO7
PCH_GPIO70 C4 E3 PCH_GPIO64
+3VALW_PCH PCH_GPIO38 L2 SDIO_POWER_EN/GPIO70 SDIO_CLK/GPIO64 F4 PCH_GPIO65
PCH_GPIO39 N5 DEVSLP1/GPIO38 SDIO_CMD/GPIO65 D3 PCH_GPIO66
PCH_SPKR V2 DEVSLP2/GPIO39 SDIO_D0/GPIO66 E4 PCH_GPIO67
29 PCH_SPKR SPKR/GPIO81 SDIO_D1/GPIO67
RP34 1 8 GPIO10_SCI# C3 EC_IN_RW EC_IN_RW 28
2 7 PCH_GPIO11 SDIO_D2/GPIO68 E2 PCH_GPIO69
PCH_GPIO11 7 SDIO_D3/GPIO69
3 6 SUSWARN#
SUSWARN# 8
4 5 USB_OC3# 10 OF 19 Rev1p2
USB_OC3# 10
10K_0804_8P4R_5% HASWELL-MCP-E-ULT_BGA1168
RP35 8 1 PCH_GPIO8
7 2 USB_OC1#
USB_OC1# 10
6 3 PCH_GPIO13
5 4 PCH_GPIO26 +3VALW_PCH
10K_0804_8P4R_5%
RP37 1 8 PCH_GPIO45
B 2 7 PCH_GPIO14 B
+3VS 3 6 PCH_GPIO44
1

4 5 PCH_GPIO46 +3VALW_PCH
10K_0804_8P4R_5% R301 R303
RP38 1 8 PCH_GPIO79 PCH_GPIO79 8 10K_0402_5% 10K_0402_5%
2 7 PCH_GPIO47 R247 1 @ 2 10K_0402_5% EC_LID_OUT#
3 6 PCH_GPIO24
2

4 5 PCH_GPIO28 PCH_GPIO56 PCH_GPIO57


10K_0804_8P4R_5% GPIO15 : TLS Confidentiality
RP39 1 8 PCH_GPIO58
2 7 PCH_GPIO59 1: Intel ME TLS with confidentiality
3 6 PCH_GPIO27
4 5 PCH_GPIO25 0: Intel ME TLS with no confidentiality
RP40 1 8
10K_0804_8P4R_5%
USB_OC2# USB_OC2# 10
* (Have internal PD)
2 7 PCH_GPIO60 PCH_GPIO60 7
3 6 USB_OC0#
USB_OC0# 10,26
4 5 PCH_GPIO9
10K_0804_8P4R_5%
R248 1 2 PCH_GPIO73 +3VS
PCH_GPIO73 7
10K_0402_5% PCH_GPIO66 R270 1 @ 2 1K_0402_1% +3VS
PCH_GPIO86 R272 1 @ 2 1K_0402_1%
+3VS R273 1 2 1K_0402_5%
R269 1 @ 2 1K_0402_1% PCH_SPKR
1

R306 SDIO_D0 / GPIO66 : Top-Block Swap Override GSPI0_MOSI / GPIO86 : Boot BIOS Strap SPKR / GPIO81 : NO REBOOT
10K_0402_5%

1: ENABLED (Have internal PU) 1: ENABLED 1: ENABLED


*
2

A A

DGPU_PRSNT#
GPIO87 0: DISABLED 0: SPI ROM (Have internal PL) 0: DISABLED (Have internal PD)
DGPU_PRSNT# * *
2

R219
10K_0402_5%
DIS,Optimus 0
VGA@
UMA 1
Security Classification Compal Secret Data Compal Electronics, Inc.
2012/07/10 2013/07/10 Title
Issued Date Deciphered Date HSW MCP(6/11) GPIO,LPIO
1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. V5WE2 M/B LA-9532P Schematic
Date: Monday, April 08, 2013 Sheet 9 of 42
5 4 3 2 1
5 4 3 2 1

U1K HASWELL_MCP_E

F10 AN8 USB20_N0


PERN5_L0 USB2N0 USB20_N0 26
E10 AM8 USB20_P0 USB2 Port 0 (USB3.0 P0)
PERP5_L0 USB2P0 USB20_P0 26
C23 AR7 USB20_N1
PETN5_L0 USB2N1 USB20_N1 26
C22 AT7 USB20_P1 USB2 Port 1
PETP5_L0 USB2P1 USB20_P1 26
F8 AR8 USB20_N2
PERN5_L1 USB2N2 USB20_N2 26
E8 AP8 USB20_P2 USB2 Port 2
PERP5_L1 USB2P2 USB20_P2 26
D B23 AR10 D
A23 PETN5_L1 USB2N3 AT10
PETP5_L1 USB2P3
H10 AM15 USB20_N4
PERN5_L2 USB2N4 USB20_N4 24
G10 AL15 USB20_P4 Mini Card(WLAN+BT)
PERP5_L2 USB2P4 USB20_P4 24
B21 AM13
C21 PETN5_L2 USB2N5 AN13
PETP5_L2 USB2P5
E6 AP11 USB20_N6
PERN5_L3 USB2N6 USB20_N6 18
F6 AN11 USB20_P6 Touch Module
PERP5_L3 USB2P6 USB20_P6 18
B22 AR13 USB20_N7
PETN5_L3 USB2N7 USB20_N7 18
A21 AP13 USB20_P7 Camera
PETP5_L3 USB2P7 USB20_P7 18

22 PCIE_PRX_DTX_N3 PCIE_PRX_DTX_N3 G11


PCIE_PRX_DTX_P3 F11 PERN3 G20
22 PCIE_PRX_DTX_P3 PERP3 USB3RN1 PCH_USB3_RX0_N 26
PCIE LAN USB3.0 P1 USB3RP1
H20 PCH_USB3_RX0_P 26
C155 1 2 0.1U_0402_16V7K PCIE_PTX_DRX_N3 C29 USB3 Port 0
22 PCIE_PTX_C_DRX_N3 PETN3 USB
C160 1 2 0.1U_0402_16V7K PCIE_PTX_DRX_P3 B30 PCIe C33
22 PCIE_PTX_C_DRX_P3 PETP3 USB3TN1 PCH_USB3_TX0_N 26
B34
USB3TP1 PCH_USB3_TX0_P 26
24 PCIE_PRX_DTX_N4 PCIE_PRX_DTX_N4 F13
PCIE_PRX_DTX_P4 G13 PERN4 E18
24 PCIE_PRX_DTX_P4 PERP4 USB3RN2
WLAN USB3.0 P2 USB3RP2
F18
C156 1 2 0.1U_0402_16V7K PCIE_PTX_DRX_N4 B29
24 PCIE_PTX_C_DRX_N4 PETN4
C157 1 2 0.1U_0402_16V7K PCIE_PTX_DRX_P4 A29 B33
24 PCIE_PTX_C_DRX_P4 PETP4 USB3TN2 A33
G17 USB3TP2
F17 PERN1/USB3RN3
C
PERP1/USB3RP3 C
C30 USB3.0 P3 / PCIE P1
C31 PETN1/USB3TN3 AJ10 USBRBIAS R154 1 2 22.6_0402_1%
PETP1/USB3TP3 USBRBIAS CADnote:
AJ11
F15 USBRBIAS AN10 @ T35 Routesingleend50ohmsandmax450milslength.
G15 PERN2/USB3RN4 RSVD AM10@ T36 Avoidroutingnexttoclockpinsorunderstitchingcapacitors.
PERP2/USB3RP4 USB3.0 P4 / PCIE P2 RSVD
Recommendedminimumspacingtoothersignaltracesis15mils
B31
A31 PETN2/USB3TN4
PETP2/USB3TP4 AL3 USB_OC0#
OC0/GPIO40 USB_OC0# 26,9
AT1 USB_OC1#
+1.05VS_AUSB3PLL OC1/GPIO41 USB_OC1# 9
AH2 USB_OC2#
OC2/GPIO42 USB_OC2# 9
T33 @ E15 AV3 USB_OC3#
RSVD OC3/GPIO43 USB_OC3# 9
T34 @ E13
R232 1 2 3.01K_0402_1% PCIE_RCOMP A27 RSVD
R155 1 @ 2 0_0603_5% PCIE_IREF B27 PCIE_RCOMP
PCIE_IREF

Tracewidth=15mils
11 OF 19 Rev1p2
Spacing=12mil HASWELL-MCP-E-ULT_BGA1168
Maxlength=500mils

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


2012/07/10 2013/07/10 Title
Issued Date Deciphered Date HSW MCP(7/11) PCIE,USB
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. V5WE2 M/B LA-9532P Schematic
Date: Monday, April 08, 2013 Sheet 10 of 42
5 4 3 2 1
5 4 3 2 1

+CPU_CORE
HASWELL_MCP_E
Shark Bay ULT have internal gate for VDDQ U1L

+1.35V +1.35V_CPU T37 @ L59 C36


+1.35V_CPU T38 @ J58 RSVD VCC C40
@ J2 RSVD VCC C44
1 2 AH26 VCC C48
AJ31 VDDQ VCC C52
JUMP_43X118 AJ33 VDDQ VCC C56
AJ37 VDDQ VCC E23
Q5 @ AN33 VDDQ VCC E25
AO4304L_SO8 AP43 VDDQ VCC E27
8 1 AR48 VDDQ VCC E29
D D
7 2 AY35 VDDQ VCC E31
6 3 AY40 VDDQ VCC E33
5 AY44 VDDQ VCC E35
+CPU_CORE AY50 VDDQ VCC E37
VDDQ VCC E39

4
F59 VCC E41
1 @ 2 T39 @ N58 VCC VCC E43
31 3VS_GATE RSVD VCC
T40 @ AC58 E45
R182 +1.05VS_VTT +VCCIO_OUT RSVD VCC E47
1 VCC
0_0402_5% C5 VCC_SENSE_R E63 E49
0.1U_0603_25V7K T41 @ AB23 VCC_SENSE VCC E51
@ 2 @ 1 A59 RSVD VCC E53
2 R164 0_1206_5% E20 VCCIO_OUT VCC E55
+VCCIOA_OUT VCCIOA_OUT VCC
T42 @ AD23 E57
T43 @ AA23 RSVD VCC F24
T44 @ AE59 RSVD VCC F28
RSVD VCC F32
H_CPU_SVIDALRT# L62 VCC F36
+3VS 0_0402_5% 1 @ 2 R165 H_CPU_SVIDCLK N63 VIDALERT VCC F40
+1.05VS_VTT 39 VR_SVID_CLK VIDSCLK VCC
VIDSOUT L63 F44
VCCST_PG_EC_R B59 VIDSOUT HSW ULT POWER VCC F48
VCCST_PWRGD VCC
1

+3VALW_PCH 0_0402_5% 1 2 R167 PCH_VR_EN F60 F52


39 VR_ON VR_EN VCC

1
R422 39,8 VGATE 0_0402_5% 1 2 R168 VR_READY C59 F56
100K_0402_5% U16 R309 @ C167 VR_READY VCC G23
@ 1 5 10K_0402_5% 1 2 0.1U_0402_16V7K D63 VCC G25
NC VCC R166 H59 VSS VCC G27
2

2 0_0402_5% CPU_PWR_DEBUG P62 PWR_DEBUG VCC G29


27,8 VCCST_PG_EC

2
A 4 VCCST_PG_EC_R 1 @ 2 T45 @ P60 VSS VCC G31
Y VCCST_PWRGD 27,38 RSVD_TP VCC
C 3 T46 @ P61 G33 C
GND T47 @ N59 RSVD_TP VCC G35
74AUP1G07GW_TSSOP5 T48 @ N61 RSVD_TP VCC G37
T98 @ T59 RSVD_TP VCC G39
T109 @ AD60 RSVD VCC G41
T110 @ AD59 RSVD VCC G43
T111 @ AA59 RSVD VCC G45
T112 @ AE60 RSVD VCC G47
RSVD VCC
SVID ALERT T113
T114
@
@
AC59
AG58 RSVD
RSVD
VCC
VCC
G49
G51
+1.05VS_VTT T115 @ U59 G53
T117 @ V59 RSVD VCC G55
+1.05VS_VTT RSVD VCC G57
+1.05VS_VTT VCC
Place the PU AC22
VCCST VCC
H23
+CPU_CORE AE22 J23
resistors close to CPU VCCST VCC
1

AE23 K23
R171 VCCST VCC K57
VCC

2
75_0402_1% XDP@ AB57 L22
R169 AD57 VCC VCC M23
R172 AG57 VCC VCC M57
150_0402_1%
2

43_0402_1% C24 VCC VCC P57


2 1 H_CPU_SVIDALRT# C28 VCC VCC U57
39 VR_ALERT#
1

C32 VCC VCC W57


CPU_PWR_DEBUG VCC VCC
12 OF 19 Rev1p2
HASWELL-MCP-E-ULT_BGA1168
SVID DATA
+1.35V_CPU
B +1.05VS_VTT B

Place the PU VDDQDECOUPLING


resistors close to CPU
1

R173

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M

2.2U_0402_6.3V6M
130_0402_1% EMC@ EMC@ 1

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M
1 1 1 1 1 1 1 1 1 1
+

C8

C9

C10

C11
R174 @ C18
2

C12

C13

C14

C15

C16

C17
0_0402_5% 330U_2.5V_M
2 @ 1 VIDSOUT
39 VR_SVID_DATA 2 2 2 2 2 2 2 2 2 2 2

+1.05VS_VTT 330UF/2.5V/3528
+CPU_CORE
1

10U_0603_6.3V6M
22U_0805_6.3V6M

R177 @ 1 1
100_0402_1% Note:0ohmPLACEDCLOSETOCPU
C6

C7

EMC@
2

2 2
VCC_SENSE_R 2 @ 1 R178
VCC_SENSE 39 +1.35V : 470UF/2V/7343 *2
0_0402_5%
10UF/6.3V/0603 * 6
2.2UF/6.3V/0402 * 4
A A
13 VSS_SENSE_R 2 @ 1 R235
VSS_SENSE 39
0_0402_5%
1

R233
100_0402_1% Security Classification Compal Secret Data Compal Electronics, Inc.
2012/07/10 2013/07/10 Title
Issued Date Deciphered Date HSW MCP(8/11) Power
2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. V5WE2 M/B LA-9532P Schematic
Date: Monday, April 08, 2013 Sheet 11 of 42
5 4 3 2 1
5 4 3 2 1

+1.05VS_VTT +1.05VS_VTT U1M HASWELL_MCP_E

K9 +3VALW_PCH +RTCVCC
VCCHSIO

1U_0402_6.3V6K
L10
VCCHSIO

1U_0402_6.3V6K
1 M9 C30 1 2 1U_0402_6.3V6K
N8 VCCHSIO mPHY AH11
+ VCC1_05 VCCSUS3_3

1U_0402_6.3V6K

0.1U_0402_16V7K

0.1U_0402_16V7K
C998 P9 RTC AG10
1 1 1 VCC1_05 VCCRTC +RTCVCC
+1.05VS_AUSB3PLL B18 AE7 +VCCRTCEXT 1 2 1 1 1
VCCUSB3PLL DCPRTC

C21

C20
220U_6.3V_M C31 +1.05VS_ASATA3PLL B11 C54 0.1U_0402_16V7K @ @
2 VCCSATA3PLL +3VS

C52

C51

C50
1U_0402_6.3V6K
2 2 2
EMC@ SPI 2 2 2
T99 @ Y20 Y8 C58 2 1 0.1U_0402_16V7K
RSVD VCCSPI
D Near PJ602 +1.05VS_APLLOPI AA21
VCCAPLL
OPI @ D
Near L10 Near M9 W21
VCCAPLL AG14 +1.05VS_VTT
VCCASW AG13
VCCASW
+3VALW_PCH +1.05VS_VTT
HDA --> 3.3V or 1.5V T105 @ J13 USB3
+1.05VS_VTT +1.05VS_AUSB3PLL I2C --> 1.8V DCPSUS3 J11 C27 1 2 10U_0603_6.3V6M
VCC1_05
Near B18 VCC1_05
H11 C33 1 2 1U_0402_6.3V6K
C42 1 2 1U_0402_6.3V6K 2 1 C38 AH14 AXALIA/HDA H15 C40 1 2 10U_0603_6.3V6M
L1 1 2 C32 1 2 100U_1206_6.3V6M 1U_0402_6.3V6K VCCHDA VCC1_05 AE8 EMC@ C41
2.2UH_LQM2MPN2R2NG0L_30% VCC1_05 AF22 1U_0402_6.3V6K
Idc 1.2A Rdc 0.11ohm +/-30% T116 @ AH13 VRM/USB2/AZALIA VCC1_05 AG19 +PCH_VCCDSW1 @ 2 +PCH_VCCDSW_R 1 2
DCPSUS2 CORE DCPSUSBYP AG20 R209 0_0402_5%
+1.05VS_ASATA3PLL +3VALW_PCH DCPSUSBYP AE9
VCCASW +1.05VS_VTT
C28 AF9 C36 1 2 22U_0805_6.3V6M
VCCASW
Near B11 Near AC9 2 1 22U_0805_6.3V6M AC9
VCCSUS3_3 VCCASW
AG8 C37 1 2 1U_0402_6.3V6K
C46 1 2 1U_0402_6.3V6K C59 EMC@ AA9 AD10 C43 @1 2 1U_0402_6.3V6K
VCCSUS3_3 DCPSUS1
L2 1 2 C61 1 2 100U_1206_6.3V6M Near AH10 2 1 0.1U_0402_16V7K AH10
VCCDSW3_3 DCPSUS1
AD8
2.2UH_LQM2MPN2R2NG0L_30% C29 V8 GPIO/LCC
VCC3_3
Near V8 2 1 22U_0805_6.3V6M W9
VCC3_3
+3VS J15 +1.5VS
+1.05VS_APLLOPI THERMAL SENSOR VCCTS1_5 K14
VCC3_3 +3VS
K16 C55 1 2 0.1U_0402_16V7K
VCC3_3
Near AA21
C47 1 2 1U_0402_6.3V6K
L3 1 2 C22 1 2 100U_1206_6.3V6M +1.05VS_AXCK_DCB J18
2.2UH_LQM2MPN2R2NG0L_30% K19 VCCCLK SDIO/PLSS U8
VCCCLK VCCSDIO +3VS
Idc 1.2A Rdc 0.11ohm +/-30% A20 T9 C44 1 2 1U_0402_6.3V6K
+1.05VS_AXCK_LCPLL VCCACLKPLL VCCSDIO
+1.05VS_VTT J17
C C57 R21 VCCCLK C
VCCCLK
Near J17 2 1 1U_0402_6.3V6K T21
VCCCLK
LPT LP POWER C53 @1 2 1U_0402_6.3V6K
+1.05VS_VTT +1.05VS_AXCK_DCB C56 T100 @ K18 SUS OSCILLATOR AB8 C25 @1 2 100U_1206_6.3V6M
RSVD DCPSUS4
Near R21 2 1 1U_0402_6.3V6K T101 @ M20
RSVD
Near J18 T102 @ V21
RSVD
C48 1 2 1U_0402_6.3V6K +3VALW_PCH AE20 AC20 @ T103
L4 1 2 C23 1 2 100U_1206_6.3V6M AE21 VCCSUS3_3 RSVD AG16
VCCSUS3_3 USB2 VCC1_05 +1.05VS_VTT
2.2UH_LQM2MPN2R2NG0L_30% AG17
Idc 1.2A Rdc 0.11ohm +/-30% VCC1_05 C45 1 2 1U_0402_6.3V6K

+1.05VS_AXCK_LCPLL
13 OF 19 Rev1p2
reserve on PVT HASWELL-MCP-E-ULT_BGA1168
C999 1 2 1U_0402_6.3V6K
C49 1 2 1U_0402_6.3V6K Near A20
L5 1 2 C24 1 2 100U_1206_6.3V6M
2.2UH_LQM2MPN2R2NG0L_30%
Idc 1.2A Rdc 0.11ohm +/-30%

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


2012/07/10 2013/07/10 Title
Issued Date Deciphered Date HSW MCP(9/11) Power
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. V5WE2 M/B LA-9532P Schematic
Date: Monday, April 08, 2013 Sheet 12 of 42
5 4 3 2 1
5 4 3 2 1

HASWELL_MCP_E HASWELL_MCP_E
U1N U1O U1P HASWELL_MCP_E
D H17 D
A11 AJ35 AP22 AV59 D33 VSS H57
A14 VSS VSS AJ39 AP23 VSS VSS AV8 D34 VSS VSS J10
A18 VSS VSS AJ41 AP26 VSS VSS AW16 D35 VSS VSS J22
A24 VSS VSS AJ43 AP29 VSS VSS AW24 D37 VSS VSS J59
A28 VSS VSS AJ45 AP3 VSS VSS AW33 D38 VSS VSS J63
A32 VSS VSS AJ47 AP31 VSS VSS AW35 D39 VSS VSS K1
A36 VSS VSS AJ50 AP38 VSS VSS AW37 D41 VSS VSS K12
A40 VSS VSS AJ52 AP39 VSS VSS AW4 D42 VSS VSS L13
A44 VSS VSS AJ54 AP48 VSS VSS AW40 D43 VSS VSS L15
A48 VSS VSS AJ56 AP52 VSS VSS AW42 D45 VSS VSS L17
A52 VSS VSS AJ58 AP54 VSS VSS AW44 D46 VSS VSS L18
A56 VSS VSS AJ60 AP57 VSS VSS AW47 D47 VSS VSS L20
AA1 VSS VSS AJ63 AR11 VSS VSS AW50 D49 VSS VSS L58
AA58 VSS VSS AK23 AR15 VSS VSS AW51 D5 VSS VSS L61
AB10 VSS VSS AK3 AR17 VSS VSS AW59 D50 VSS VSS L7
AB20 VSS VSS AK52 AR23 VSS VSS AW60 D51 VSS VSS M22
AB22 VSS VSS AL10 AR31 VSS VSS AY11 D53 VSS VSS N10
AB7 VSS VSS AL13 AR33 VSS VSS AY16 D54 VSS VSS N3
AC61 VSS VSS AL17 AR39 VSS VSS AY18 D55 VSS VSS P59
AD21 VSS VSS AL20 AR43 VSS VSS AY22 D57 VSS VSS P63
AD3 VSS VSS AL22 AR49 VSS VSS AY24 D59 VSS VSS R10
AD63 VSS VSS AL23 AR5 VSS VSS AY26 D62 VSS VSS R22
AE10 VSS VSS AL26 AR52 VSS VSS AY30 D8 VSS VSS R8
AE5 VSS VSS AL29 AT13 VSS VSS AY33 E11 VSS VSS T1
AE58 VSS VSS AL31 AT35 VSS VSS AY4 E17 VSS VSS T58
AF11 VSS VSS AL33 AT37 VSS VSS AY51 F20 VSS VSS U20
AF12 VSS VSS AL36 AT40 VSS VSS AY53 F26 VSS VSS U22
AF14 VSS VSS AL39 AT42 VSS VSS AY57 F30 VSS VSS U61
C AF15 VSS VSS AL40 AT43 VSS VSS AY59 F34 VSS VSS U9 C
AF17 VSS VSS AL45 AT46 VSS VSS AY6 F38 VSS VSS V10
AF18 VSS VSS AL46 AT49 VSS VSS B20 F42 VSS VSS V3
AG1 VSS VSS AL51 AT61 VSS VSS B24 F46 VSS VSS V7
AG11 VSS VSS AL52 AT62 VSS VSS B26 F50 VSS VSS W20
AG21 VSS VSS AL54 AT63 VSS VSS B28 F54 VSS VSS W22
AG23 VSS VSS AL57 AU1 VSS VSS B32 F58 VSS VSS Y10
AG60 VSS VSS AL60 AU16 VSS VSS B36 F61 VSS VSS Y59
AG61 VSS VSS AL61 AU18 VSS VSS B4 G18 VSS VSS Y63
AG62 VSS VSS AM1 AU20 VSS VSS B40 G22 VSS VSS
AG63 VSS VSS AM17 AU22 VSS VSS B44 G3 VSS
AH17 VSS VSS AM23 AU24 VSS VSS B48 G5 VSS V58
AH19 VSS VSS AM31 AU26 VSS VSS B52 G6 VSS VSS AH46
AH20 VSS VSS AM52 AU28 VSS VSS B56 G8 VSS VSS V23
AH22 VSS VSS AN17 AU30 VSS VSS B60 H13 VSS VSS E62
VSS VSS VSS VSS VSS VSS_SENSE VSS_SENSE_R 11
AH24 AN23 AU33 C11 AH16
AH28 VSS VSS AN31 AU51 VSS VSS C14 16 OF 19 Rev1p2 VSS
AH30 VSS VSS AN32 AU53 VSS VSS C18 HASWELL-MCP-E-ULT_BGA1168
AH32 VSS VSS AN35 AU55 VSS VSS C20
AH34 VSS VSS AN36 AU57 VSS VSS C25
AH36 VSS VSS AN39 AU59 VSS VSS C27
AH38 VSS VSS AN40 AV14 VSS VSS C38
AH40 VSS VSS AN42 AV16 VSS VSS C39
AH42 VSS VSS AN43 AV20 VSS VSS C57
AH44 VSS VSS AN45 AV24 VSS VSS D12
AH49 VSS VSS AN46 AV28 VSS VSS D14
AH51 VSS VSS AN48 AV33 VSS VSS D18
AH53 VSS VSS AN49 AV34 VSS VSS D2
AH55 VSS VSS AN51 AV36 VSS VSS D21
B AH57 VSS VSS AN52 AV39 VSS VSS D23 B
AJ13 VSS VSS AN60 AV41 VSS VSS D25
AJ14 VSS VSS AN63 AV43 VSS VSS D26
AJ23 VSS VSS AN7 AV46 VSS VSS D27
AJ25 VSS VSS AP10 AV49 VSS VSS D29
AJ27 VSS VSS AP17 AV51 VSS VSS D30
AJ29 VSS VSS AP20 AV55 VSS VSS D31
VSS VSS VSS 15 OF 19 Rev1p2 VSS
HASWELL-MCP-E-ULT_BGA1168

14 OF 19 Rev1p2
HASWELL-MCP-E-ULT_BGA1168

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


2012/07/10 2013/07/10 Title
Issued Date Deciphered Date HSW MCP(10/11) GND
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. V5WE2 M/B LA-9532P Schematic
Date: Monday, April 08, 2013 Sheet 13 of 42
5 4 3 2 1
5 4 3 2 1

HASWELL_MCP_E HASWELL_MCP_E
U1Q U1R

DC_TEST_AY2_AW2 AY2 A3 DC_TEST_A3_B3 T51 @ AT2 N23 @ T64


DC_TEST_AY3_AW3 AY3 DAISY_CHAIN_NCTF_AY2 DAISY_CHAIN_NCTF_A3 A4 @ T58 T52 @ AU44 RSVD RSVD R23 @ T65
T49 @ AY60 DAISY_CHAIN_NCTF_AY3 DAISY_CHAIN_NCTF_A4 T53 @ AV44 RSVD RSVD T23 @ T66
DC_TEST_AY61_AW61 AY61 DAISY_CHAIN_NCTF_AY60 A60 @ T59 T54 @ D15 RSVD RSVD U10 @ T67
DC_TEST_AY62_AW62 AY62 DAISY_CHAIN_NCTF_AY61 DAISY_CHAIN_NCTF_A60 A61 DC_TEST_A61_B61 RSVD RSVD
T50 @ B2 DAISY_CHAIN_NCTF_AY62 DAISY_CHAIN_NCTF_A61 A62 @ T60
D D
DC_TEST_A3_B3 B3 DAISY_CHAIN_NCTF_B2 DAISY_CHAIN_NCTF_A62 AV1 @ T61 T55 @ F22 AL1 @ T68
DC_TEST_A61_B61 B61 DAISY_CHAIN_NCTF_B3 DAISY_CHAIN_NCTF_AV1 AW1 @ T62 T56 @ H22 RSVD RSVD AM11 @ T69
DC_TEST_B62_B63 B62 DAISY_CHAIN_NCTF_B61 DAISY_CHAIN_NCTF_AW1 AW2 DC_TEST_AY2_AW2 T57 @ J21 RSVD RSVD AP7 @ T70
B63 DAISY_CHAIN_NCTF_B62 DAISY_CHAIN_NCTF_AW2 AW3 DC_TEST_AY3_AW3 RSVD RSVD AU10 @ T71
DC_TEST_C1_C2 C1 DAISY_CHAIN_NCTF_B63 DAISY_CHAIN_NCTF_AW3 AW61 DC_TEST_AY61_AW61 RSVD AU15 @ T72
C2 DAISY_CHAIN_NCTF_C1 DAISY_CHAIN_NCTF_AW61 AW62 DC_TEST_AY62_AW62 RSVD AW14 @ T73
DAISY_CHAIN_NCTF_C2 DAISY_CHAIN_NCTF_AW62 AW63 @ T63 RSVD AY14 @ T74
DAISY_CHAIN_NCTF_AW63
17 OF 19 Rev1p2 RSVD
HASWELL-MCP-E-ULT_BGA1168
18 OF 19 Rev1p2
HASWELL-MCP-E-ULT_BGA1168

U1S HASWELL_MCP_E

T104 @ CFG0 AC60 AV63 @ T75


CFG0 RSVD_TP
T107
T108
T166
@
@
@
CFG1
CFG2
CFG3
AC62
AC63
AA63
CFG1
CFG2
RSVD_TP
AU63 @ T76
CFG Straps for Processor
T167 @ CFG4 AA60 CFG3 C63 @ T77
T168 @ CFG5 Y62 CFG4 RSVD_TP C62 @ T78
C T169 @ CFG6 Y61 CFG5 RSVD_TP B43 @ T79 C
T170 @ CFG7 Y60 CFG6 RSVD CFG3
T171 @ CFG8 V62 CFG7 A51 @ T80
CFG8 RSVD_TP

1
T172 @ CFG9 V61 B51 @ T81
T182 @ CFG10 V60 CFG9 RSVD_TP R224
T181 @ CFG11 U60 CFG10 L60 @ T82 1K_0402_1%
T180 @ CFG12 T63 CFG11 RESERVED RSVD_TP @
T179 @ CFG13 T62 CFG12 N60 @ T83

2
T178 @ CFG14 T61 CFG13 RSVD
T177 @ CFG15 T60 CFG14 W23 @ T84
CFG15 RSVD Y22 @ T85
T176 @ CFG16 AA62 RSVD AY15 OPI_COMP
T175 @ CFG18 U63 CFG16 PROC_OPI_RCOMP
T174 @ CFG17 AA61 CFG18 AV62 @ T86
CFG17 RSVD
T173 @ CFG19 U62
CFG19 RSVD
D58 @ T87 Physical Debug Enable (DFX Privacy)
CFG_RCOMP V63 P22
CFG_RCOMP VSS
VSS
N21 1: DISABLED
T90 @ A5
RSVD CFG3
RSVD
P20 @ T88 0: ENABLED; SET DFX ENABLED BIT
T91 @ E1 R20 @ T89
T92 @ D1 RSVD RSVD IN DEBUG INTERFACE MSR
T93 @ J20 RSVD
T94 @ H18 RSVD
TD_IREF B12 RSVD CFG4
TD_IREF

1
19 OF 19 Rev1p2
HASWELL-MCP-E-ULT_BGA1168 R225
1K_0402_1%
B B

2
2 1 CFG_RCOMP
R222 49.9_0402_1%
2 1 OPI_COMP
R223 49.9_0402_1%
2 1 TD_IREF Display Port Presence Strap
R226 8.2K_0402_5%

1 : Disabled; No Physical Display Port


CFG4 attached to Embedded Display Port

0 : Enabled; An external Display Port device is


connected to the Embedded Display Port

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


2012/07/10 2013/07/10 Title
Issued Date Deciphered Date HSW MCP(11/11) RSVD
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. V5WE2 M/B LA-9532P Schematic
Date: Monday, April 08, 2013 Sheet 14 of 42
5 4 3 2 1
A B C D E

+1.35V
+1.35V +1.35V +1.35V
JDIMM1

1
+V_DDR_REFA 1 2
VREF_DQ VSS1 +5VALW +5VS

0.1U_0402_16V7K
3 4 DDR_A_D9
VSS2 DQ4

C34
R54 DDR_A_D13 5 6 DDR_A_D12 1
R293 1.8K_0402_1% DDR_A_D8 7 DQ0 DQ5 8 @ R187 1 2 SA_ODT0
2_0402_1% 9 DQ1 VSS3 10 DDR_A_DQS#1 66.5_0402_1%

2
1 2 11 VSS4 DQS#0 12 DDR_A_DQS1
5 SA_DIMM_VREFDQ DM0 DQS0 2

2.2U_0402_6.3V6M
1 13 14
VSS5 VSS6

2
@ 1 1 DDR_A_D14 15 16 DDR_A_D15 R186 R191 R188 1 2 SA_ODT1
DQ2 DQ6 +1.35V

C105

0.1U_0402_16V7K
C106
C158 @ DDR_A_D10 17 18 DDR_A_D11 100K_0402_5% 100K_0402_5% 66.5_0402_1%
0.022U_0402_25V7K R185 19 DQ3 DQ7 20 U45 @
2 1.8K_0402_1% DDR_A_D29 21 VSS7 VSS8 22 DDR_A_D25 1 5
DQ8 DQ12 NC VCC

1
2 2 DDR_A_D28 23 24 DDR_A_D24 LBSS138LT1G_SOT-23-3 R189 1 2 SB_ODT0
D Q18 SB_ODT0 16

1
DQ9 DQ13

1
25 26 4 DDR_PG_CTRL 2 66.5_0402_1%
1 VSS9 VSS10 A 1
R176 @ DDR_A_DQS#3 27 28 4 2
24.9_0402_1% DDR_A_DQS3 29 DQS#1 DM1 30 DIMM_DRAMRST# 3 Y G
DQS1 RESET# DIMM_DRAMRST# 16,4 GND
31 32 S M_A_B_DIMM_ODT R190 1 2 SB_ODT1
SB_ODT1 16
2

3
DDR_A_D30 33 VSS11 VSS12 34 DDR_A_D27 74AUP1G07GW_TSSOP5 66.5_0402_1%
DDR_A_D31 35 DQ10 DQ14 36 DDR_A_D26
37 DQ11 DQ15 38
DDR_A_D44 39 VSS13 VSS14 40 DDR_A_D45
DQ16 DQ20 DDR_VTT_PG_CTRL 36
DDR_A_D41 41 42 DDR_A_D40
43 DQ17 DQ21 44
VSS15 VSS16 DDR_A_DQS#[0..7] 5
DDR_A_DQS#5 45 46
DDR_A_DQS5 47 DQS#2 DM2 48
DQS2 VSS17 DDR_A_DQS[0..7] 5
49 50 DDR_A_D42
DDR_A_D43 51 VSS18 DQ22 52 DDR_A_D46
DQ18 DQ23 DDR_A_D[0..63] 5
DDR_A_D47 53 54
55 DQ19 VSS19 56 DDR_A_D52
All VREF traces should DDR_A_D51 57 VSS20 DQ28 58 DDR_A_D53
DDR_A_MA[0..15] 5
Layout Note: have 10 mil trace width DDR_A_D50 59 DQ24 DQ29 60
Place near JDIMM1 61 DQ25 VSS21 62 DDR_A_DQS#6
+1.35V 63 VSS22 DQS#3 64 DDR_A_DQS6
65 DM3 DQS3 66
DDR_A_D49 67 VSS23 VSS24 68 DDR_A_D54
DDR_A_D48 69 DQ26 DQ30 70 DDR_A_D55
DQ27 DQ31
1U_0402_6.3V6K
C107

1U_0402_6.3V6K
C108

1U_0402_6.3V6K
C109

1U_0402_6.3V6K
C110

71 72
VSS25 VSS26
1 1 1 1
@ @

5 DDRA_CKE0_DIMMA DDRA_CKE0_DIMMA 73 74 DDRA_CKE1_DIMMA DDRA_CKE1_DIMMA 5


2 2 2 2 75 CKE0 CKE1 76
77 VDD1 VDD2 78 DDR_A_MA15
DDR_A_BS2 79 NC1 A15 80 DDR_A_MA14
5 DDR_A_BS2 BA2 A14
81 82
DDR_A_MA12 83 VDD3 VDD4 84 DDR_A_MA11
DDR_A_MA9 85 A12/BC# A11 86 DDR_A_MA7
2 87 A9 A7 88 2
+1.35V DDR_A_MA8 89 VDD5 VDD6 90 DDR_A_MA6
DDR_A_MA5 91 A8 A6 92 DDR_A_MA4
93 A5 A4 94
DDR_A_MA3 95 VDD7 VDD8 96 DDR_A_MA2
A3 A2
10U_0603_6.3V6M
C111

10U_0603_6.3V6M
C112

10U_0603_6.3V6M
C113

10U_0603_6.3V6M
C114

DDR_A_MA1 97 98 DDR_A_MA0
99 A1 A0 100
1 1 1 1 VDD9 VDD10
5 SA_CLK_DDR0 SA_CLK_DDR0 101 102 SA_CLK_DDR1 SA_CLK_DDR1 5
SA_CLK_DDR#0 103 CK0 CK1 104 SA_CLK_DDR#1
5 SA_CLK_DDR#0 CK0# CK1# SA_CLK_DDR#1 5
105 106
2 2 2 2 DDR_A_MA10 107 VDD11 VDD12 108 DDR_A_BS1
A10/AP BA1 DDR_A_BS1 5 +1.35V
5 DDR_A_BS0 DDR_A_BS0 109 110 DDR_A_RAS# DDR_A_RAS# 5
111 BA0 RAS# 112
DDR_A_WE# 113 VDD13 VDD14 114 DDRA_CS0_DIMMA#
5 DDR_A_WE# WE# S0# DDRA_CS0_DIMMA# 5

1
5 DDR_A_CAS# DDR_A_CAS# 115 116 SA_ODT0
117 CAS# ODT0 118 R56
DDR_A_MA13 119 VDD15 VDD16 120 SA_ODT1 1.8K_0402_1%
DDRA_CS1_DIMMA# 121 A13 ODT1 122
+1.35V 5 DDRA_CS1_DIMMA# S1# NC2
123 124 R296

2
125 VDD17 VDD18 126 +VREF_CA 1 2
NCTEST VREF_CA SM_DIMM_VREFCA 16,5
EMC@ EMC@ 127 128 2_0402_1% 1
VSS27 VSS28

1
DDR_A_D0 129 130 DDR_A_D5 @
DQ32 DQ36
10U_0603_6.3V6M
C115

10U_0603_6.3V6M
C116

10U_0603_6.3V6M
C117

10U_0603_6.3V6M
C164

2.2U_0402_6.3V6M

0.1U_0402_16V7K
DDR_A_D1 131 132 DDR_A_D4 C162
133 DQ33 DQ37 134 R295 0.022U_0402_25V7K
1 1 1 1 1 VSS29 VSS30 1 1 2

C119

C120
DDR_A_DQS#0 135 136 @ 1.8K_0402_1%
DQS#4 DM4

1
+ C118 DDR_A_DQS0 137 138

2
330U_2.5V_M 139 DQS4 VSS31 140 DDR_A_D3
2 2 2 2 @ DDR_A_D2 141 VSS32 DQ38 142 DDR_A_D7 2 2 @ R294
2 DDR_A_D6 143 DQ34 DQ39 144 24.9_0402_1%
145 DQ35 VSS33 146 DDR_A_D18

2
DDR_A_D21 147 VSS34 DQ44 148 DDR_A_D19
DDR_A_D20 149 DQ40 DQ45 150
SF000002Z00 151 DQ41 VSS35 152 DDR_A_DQS#2
3 330U 2.5V H4.2 153 VSS36 DQS#5 154 DDR_A_DQS2 3
155 DM5 DQS5 156
17mohm OSCON DDR_A_D17 157 VSS37 VSS38 158 DDR_A_D22 R302
DDR_A_D16 159 DQ42 DQ46 160 DDR_A_D23 1 @ 2
+0.675VS DQ43 DQ47 +VREF_CB 16
161 162
DDR_A_D36 163 VSS39 VSS40 164 DDR_A_D37 0_0402_5%
DDR_A_D33 165 DQ48 DQ52 166 DDR_A_D32
167 DQ49 DQ53 168
VSS41 VSS42
1U_0402_6.3V6K
C121

1U_0402_6.3V6K
C122

1U_0402_6.3V6K
C123

1U_0402_6.3V6K
C124

DDR_A_DQS#4 169 170


DDR_A_DQS4 171 DQS#6 DM6 172
1 1 1 1 DQS6 VSS43
@ @ 173 174 DDR_A_D35
DDR_A_D34 175 VSS44 DQ54 176 DDR_A_D39
DDR_A_D38 177 DQ50 DQ55 178
2 2 2 2 179 DQ51 VSS45 180 DDR_A_D63
DDR_A_D62 181 VSS46 DQ60 182 DDR_A_D59
DDR_A_D58 183 DQ56 DQ61 184
185 DQ57 VSS47 186 DDR_A_DQS#7
187 VSS48 DQS#7 188 DDR_A_DQS7
189 DM7 DQS7 190
DDR_A_D60 191 VSS49 VSS50 192 DDR_A_D56
DDR_A_D61 193 DQ58 DQ62 194 DDR_A_D57
Layout Note: 195 DQ59 DQ63 196
Place near JDIMM1.203,204 197 VSS51 VSS52 198
199 SA0 EVENT# 200 D_CK_SDATA
+3VS VDDSPD SDA D_CK_SDATA 16,7
201 202 D_CK_SCLK
SA1 SCL D_CK_SCLK 16,7
+0.675VS 203 204 +0.675VS
VTT1 VTT2
2.2U_0402_6.3V6M

205 206
G1 G2
2

1 1
Channel A
0.1U_0402_16V7K
C125

C126

0_0402_5%
R211

0_0402_5%
R212

@
@ @ TYCO_2-2013022-1
CONN@
2 2
SP07000JN10
1

4 4

<Address: SA1:SA0=00>

DIMM_1 STD H:4mm


Security Classification Compal Secret Data Compal Electronics, Inc.
2012/07/10 2013/07/10 Title
Issued Date Deciphered Date DDRIII DIMMA
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
V5WE2 M/B LA-9532P Schematic
Date: Monday, April 08, 2013 Sheet 15 of 42
A B C D E
A B C D E

+1.35V
+1.35V +1.35V
JDIMM2
DDR_B_DQS#[0..7] 5

1
+V_DDR_REFB 1 2
3 VREF_DQ VSS1 4 DDR_B_D12
VSS2 DQ4 DDR_B_DQS[0..7] 5
R57 DDR_B_D8 5 6 DDR_B_D9
R297 1.8K_0402_1% DDR_B_D14 7 DQ0 DQ5 8
DQ1 VSS3 DDR_B_D[0..63] 5
2_0402_1% 9 10 DDR_B_DQS#1

2
1 2 11 VSS4 DQS#0 12 DDR_B_DQS1
5 SB_DIMM_VREFDQ DM0 DQS0 DDR_B_MA[0..15] 5

2.2U_0402_6.3V6M
1 13 14
VSS5 VSS6

1
@ 1 1 DDR_B_D10 15 16 DDR_B_D13
DQ2 DQ6

C127

0.1U_0402_16V7K
C128
C159 @ DDR_B_D11 17 18 DDR_B_D15
0.022U_0402_25V7K R213 19 DQ3 DQ7 20
2 1.8K_0402_1% DDR_B_D28 21 VSS7 VSS8 22 DDR_B_D25
DQ8 DQ12

1
2 2 DDR_B_D29 23 24 DDR_B_D24

2
25 DQ9 DQ13 26
1 VSS9 VSS10 1
R179 @ DDR_B_DQS#3 27 28
24.9_0402_1% DDR_B_DQS3 29 DQS#1 DM1 30 DIMM_DRAMRST#
DQS1 RESET# DIMM_DRAMRST# 15,4
31 32
2

DDR_B_D26 33 VSS11 VSS12 34 DDR_B_D30


DDR_B_D27 35 DQ10 DQ14 36 DDR_B_D31
37 DQ11 DQ15 38
DDR_B_D40 39 VSS13 VSS14 40 DDR_B_D45
DDR_B_D41 41 DQ16 DQ20 42 DDR_B_D44
43 DQ17 DQ21 44
DDR_B_DQS#5 45 VSS15 VSS16 46
DDR_B_DQS5 47 DQS#2 DM2 48
49 DQS2 VSS17 50 DDR_B_D47
DDR_B_D46 51 VSS18 DQ22 52 DDR_B_D43
DDR_B_D42 53 DQ18 DQ23 54
55 DQ19 VSS19 56 DDR_B_D61
All VREF traces should DDR_B_D56 57 VSS20 DQ28 58 DDR_B_D60
Layout Note: have 10 mil trace width DDR_B_D57 59 DQ24 DQ29 60
Place near JDIMM1 61 DQ25 VSS21 62 DDR_B_DQS#7
+1.35V 63 VSS22 DQS#3 64 DDR_B_DQS7
65 DM3 DQS3 66
DDR_B_D59 67 VSS23 VSS24 68 DDR_B_D63
DDR_B_D58 69 DQ26 DQ30 70 DDR_B_D62
DQ27 DQ31
1U_0402_6.3V6K
C129

1U_0402_6.3V6K
C130

1U_0402_6.3V6K
C131

1U_0402_6.3V6K
C132

71 72
VSS25 VSS26
1 1 1 1
@ @

5 DDRB_CKE0_DIMMB DDRB_CKE0_DIMMB 73 74 DDRB_CKE1_DIMMB DDRB_CKE1_DIMMB 5


2 2 2 2 75 CKE0 CKE1 76
77 VDD1 VDD2 78 DDR_B_MA15
DDR_B_BS2 79 NC1 A15 80 DDR_B_MA14
5 DDR_B_BS2 BA2 A14
81 82
DDR_B_MA12 83 VDD3 VDD4 84 DDR_B_MA11
DDR_B_MA9 85 A12/BC# A11 86 DDR_B_MA7
2 87 A9 A7 88 2
+1.35V DDR_B_MA8 89 VDD5 VDD6 90 DDR_B_MA6
DDR_B_MA5 91 A8 A6 92 DDR_B_MA4
93 A5 A4 94
DDR_B_MA3 95 VDD7 VDD8 96 DDR_B_MA2
A3 A2
10U_0603_6.3V6M
C133

10U_0603_6.3V6M
C134

10U_0603_6.3V6M
C135

10U_0603_6.3V6M
C136

DDR_B_MA1 97 98 DDR_B_MA0
99 A1 A0 100
1 1 1 1 VDD9 VDD10
5 SB_CLK_DDR0 SB_CLK_DDR0 101 102 SB_CLK_DDR1 SB_CLK_DDR1 5
SB_CLK_DDR#0 103 CK0 CK1 104 SB_CLK_DDR#1
5 SB_CLK_DDR#0 CK0# CK1# SB_CLK_DDR#1 5
105 106
2 2 2 2 DDR_B_MA10 107 VDD11 VDD12 108 DDR_B_BS1
A10/AP BA1 DDR_B_BS1 5 +1.35V
5 DDR_B_BS0 DDR_B_BS0 109 110 DDR_B_RAS# DDR_B_RAS# 5
111 BA0 RAS# 112
DDR_B_WE# 113 VDD13 VDD14 114 DDRB_CS0_DIMMB#
5 DDR_B_WE# WE# S0# DDRB_CS0_DIMMB# 5

1
5 DDR_B_CAS# DDR_B_CAS# 115 116 SB_ODT0 SB_ODT0 15 @
117 CAS# ODT0 118 R58
DDR_B_MA13 119 VDD15 VDD16 120 SB_ODT1 1.8K_0402_1%
A13 ODT1 SB_ODT1 15
5 DDRB_CS1_DIMMB# DDRB_CS1_DIMMB# 121 122 R300
+1.35V 123 S1# NC2 124 0_0402_5%

2
125 VDD17 VDD18 126 +VREF_CB 1 2
NCTEST VREF_CA SM_DIMM_VREFCA 15,5
127 128 @ 1
VSS27 VSS28

1
DDR_B_D4 129 130 DDR_B_D5 @
DQ32 DQ36
10U_0603_6.3V6M
C137

10U_0603_6.3V6M
C138

10U_0603_6.3V6M
C139

2.2U_0402_6.3V6M
DDR_B_D1 131 132 DDR_B_D0 @ C163
133 DQ33 DQ37 134 R298 0.022U_0402_25V7K
1 1 1 VSS29 VSS30 1 1 2

C141

0.1U_0402_16V7K
C142
DDR_B_DQS#0 135 136 @ 1.8K_0402_1%
DQS#4 DM4

1
DDR_B_DQS0 137 138

2
@ 139 DQS4 VSS31 140 DDR_B_D2 @
2 2 2 DDR_B_D3 141 VSS32 DQ38 142 DDR_B_D6 2 2 R299
DDR_B_D7 143 DQ34 DQ39 144 24.9_0402_1%
145 DQ35 VSS33 146 DDR_B_D16

2
DDR_B_D21 147 VSS34 DQ44 148 DDR_B_D17
DDR_B_D20 149 DQ40 DQ45 150
151 DQ41 VSS35 152 DDR_B_DQS#2
3 153 VSS36 DQS#5 154 DDR_B_DQS2 3
155 DM5 DQS5 156
VSS37 VSS38 +VREF_CB 15
DDR_B_D22 157 158 DDR_B_D19
DDR_B_D23 159 DQ42 DQ46 160 DDR_B_D18
+0.675VS 161 DQ43 DQ47 162
DDR_B_D36 163 VSS39 VSS40 164 DDR_B_D37
DDR_B_D33 165 DQ48 DQ52 166 DDR_B_D32
167 DQ49 DQ53 168
VSS41 VSS42
1U_0402_6.3V6K
C143

1U_0402_6.3V6K
C144

1U_0402_6.3V6K
C145

1U_0402_6.3V6K
C146

DDR_B_DQS#4 169 170


DDR_B_DQS4 171 DQS#6 DM6 172
1 1 1 1 DQS6 VSS43
@ @ 173 174 DDR_B_D34
DDR_B_D35 175 VSS44 DQ54 176 DDR_B_D38
DDR_B_D39 177 DQ50 DQ55 178
2 2 2 2 179 DQ51 VSS45 180 DDR_B_D51
DDR_B_D52 181 VSS46 DQ60 182 DDR_B_D55
+3VS DDR_B_D49 183 DQ56 DQ61 184
185 DQ57 VSS47 186 DDR_B_DQS#6
187 VSS48 DQS#7 188 DDR_B_DQS6
DM7 DQS7
2

189 190
R229 DDR_B_D48 191 VSS49 VSS50 192 DDR_B_D54
10K_0402_5% DDR_B_D53 193 DQ58 DQ62 194 DDR_B_D50
Layout Note: 195 DQ59 DQ63 196
Place near JDIMM1.203,204 197 VSS51 VSS52 198
1

199 SA0 EVENT# 200 D_CK_SDATA


+3VS VDDSPD SDA D_CK_SDATA 15,7
201 202 D_CK_SCLK
SA1 SCL D_CK_SCLK 15,7
+0.675VS 203 204 +0.675VS
VTT1 VTT2
2.2U_0402_6.3V6M

205 206
G1 G2
2

1 1
Channel B
0.1U_0402_16V7K
C147

C148

0_0402_5%
R231

@
@ TYCO_2-2013022-1
CONN@
2 2
SP07000JN10
1

4 4

<Address: SA1:SA0=10>

DIMM_2 STD H:4mm


Security Classification Compal Secret Data Compal Electronics, Inc.
2012/07/10 2013/07/10 Title
Issued Date Deciphered Date DDRIII DIMMB
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
V5WE2 M/B LA-9531P Schematic
Date: Monday, April 08, 2013 Sheet 16 of 42
A B C D E
5 4 3 2 1

+3VS_TL
+3VS +3VS_TL U50 TL@
TL@ 19 TXOUT_CLK+ TXOUT_CLK+ 18
TXEC+
30mil 30mil L63 2 1 DP_V33 40mil 3 DP_V33 TXEC-
20 TXOUT_CLK- TXOUT_CLK- 18
2 1 HCB2012KF-221T30 0805
R928 TL@ 0_0603_5% TL@ 60mil13 SWR_VDD TXE2+
21 TXOUT2+ TXOUT2+ 18
+1.2V_TL

Power
L64 2 1 SWR_VDD 18 22 TXOUT2-

LVDS
D PVCC TXE2- TXOUT2- 18 D
HCB2012KF-221T30 0805
TL@ L6 1 2 +1.2V_TL_OUT 60mil12 SWR_LX TXE1+
23 TXOUT1+ TXOUT1+ 18
60mil 4.7UH_PG031B-4R7MS_1.1A_20% 11 24 TXOUT1- TXOUT1- 18
27 SWR_VCCK TXE1-
+1.2V_TL VCCK
7 25 TXOUT0+ TXOUT0+ 18
DP_V12 TXE0+
60mil TXE0-
26 TXOUT0- TXOUT0- 18
Close to Pin3
DP_V33
2
RTD2132S
18 EDP_AUXP_C_TL AUX_P
10U_0603_6.3V6M
C981

0.1U_0402_16V4Z
C982

0.1U_0402_16V4Z
C983

DP-IN
1 14 TL_INVTPWM 1 TL@ 2

GPIO
18 EDP_AUXN_C_TL AUX_N GPIO(PWM OUT) INVTPWM 18
1 1 1 15 R9321 TL@ 20_0402_5%
GPIO(Panel_VCC) TL_ENVDD 18
5 16 R9481 TL@ 20_0402_5%
18 EDP_TXP0_C_TL LANE0P GPIO(PWM IN) PCH_INV_PWM 18,8
6 17 R934 0_0402_5%
18 EDP_TXN0_C_TL LANE0N GPIO(BL_EN) TL_BKOFF# 18
TL@

TL@

TL@

2 2 2
CSCL 9
CIICSCL1 LVDS MIICSCL1
29 I2CC_SCL I2CC_SCL 18
CSDA 10 28 I2CC_SDA
CIICSDA1 EDID MIICDA1 I2CC_SDA 18

Other
18 EDP_HPD 1 2 TL_HPD 32
HPD ROM MIICSCL0
31 MODE_CFG1
30 MODE_CFG0
R936 8 MIICSDA0
C DP_REXT C
1K_0402_5% 4 33
DP_GND GND

2
Close to L64 Close to Pin13 Close to P18 TL@
TL@
SWR_VDD R938 RTD2132R-CG_QFN32_5X5
12K_0402_1% Part Number = SA000069200 TL@ +3VS_TL
10U_0603_6.3V6M
C984

0.1U_0402_16V4Z
C985

22U_0805_6.3V6M
C986

0.1U_0402_16V4Z
C987

0.1U_0402_16V4Z
C988

RP41

1
I2CC_SDA 1 8
1 1 1 1 1 use2132Ssymbol I2CC_SCL 2 7
CSCL 3 6
TL@

TL@

TL@

TL@

TL@

CSDA 4 5
2 2 2 2 2
4.7K_8P4R_5%

+3VS_TL

Close to Close to Close to


L6 Pin27 Pin7
2

2
+1.2V_TL @
R943 R944
B B
4.7K_0402_5% 4.7K_0402_5%
10U_0603_6.3V6M
C989

0.1U_0402_16V4Z
C990

0.1U_0402_16V4Z
C991

0.1U_0402_16V4Z
C992

1 1 1 1 TL@
1

1
TL@

TL@

TL@

TL@

MODE_CFG0
2 2 2 2 MODE_CFG1
2

@
R945 R946
4.7K_0402_5% 4.7K_0402_5%
TL@
1

MODE_CFG0(PIN30)
0 1
0 X EPMODE
MODE_CFG1(PIN31)
A
1 ROMONLYMODE EEPROMMODE A

Security Classification Compal Secret Data


Issued Date 2011/07/08 Deciphered Date 2015/07/08 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LVDS Translator - RTD2132R
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
V5WE2 M/B LA-9532P Schematic
Date: Monday, April 08, 2013 Sheet 17 of 42
5 4 3 2 1
A B C D E

LCD POWER CIRCUIT Place closed to JLVDS1


+LCDVDD
+3VS

+3VS +LCDVDD
U8 W=60mils 1 1
1 C375 @ C419
5 OUT
IN 0.1U_0402_16V4Z 0.1U_0402_16V4Z
1 1 1 1
2 C368 2 2
GND
1U_0402_6.3V6K
C140

4 0.1U_0402_16V4Z
IN @
1
3 C367 2 2 +INVPWR_B+ B+
EN 4.7U_0603_6.3V6K
G5243T11U_SOT23-5
W=60mils
2 EMC@ L11
W=60mils
HCB2012KF-221T30 0805
2 1

1 @ 2 XEMC@ 1 1 XEMC@
8 PCH_ENVDD
R947 0_0402_5% C364
1000P_0402_50V7K
C365
68P_0402_50V8J
SM010014520 3000ma LCD/ LED PANEL Conn.
220ohm@100mhz
17 TL_ENVDD 2 2 DCR 0.04 @
1 R959 2
100K_0402_5%

U20 @ +3VS +3VS JLVDS1


M74VHC1GT125DF2G_SC70-5 +3VS W=60mils 1
+INVPWR_B+ 1
1 @ 2 1 5 XEMC@ 2 41
100K_0402_5% OE Vcc 2 G1

5
R362 INVTPWM C549 1 2 220P_0402_50V7K 3 42
R401 BKOFF# 2 XEMC@ 4 3 G2 43
W=60mils

P
27 BKOFF# B 4 G3
2 1K_0402_5% 4 DISPOFF# C528 1 2 220P_0402_50V7K +LCDVDD 5 44
IN A TL_BKOFF# 1 Y 6 5 G4 45
@ 17 TL_BKOFF# A 6 G5

G
U22 TL@ +3VS 7 46

2
2
3 4 INVTPWM NC7SZ08P5X_NL_SC70-5 INVTPWM 8 7 G6 2

3
GND OUT Y DISPOFF# 9 8
I2CC_SCL 10 9
17 I2CC_SCL 10
1 @ 2 I2CC_SDA 11
17,8 PCH_INV_PWM 17 I2CC_SDA 11
R363 0_0402_5% R949 1 @ 2 0_0402_5% +5VS_TS 12
1 2 TXOUT0- 13 12
4 EDP_DISP_UTIL 17 TXOUT0- 13
1

R404 @ 0_0402_5% R280 1 @ 2 10K_0402_5% TXOUT0+ 14


17 TXOUT0+ 14
R393 TS_EN_1 15
17 INVTPWM 15
@ 10K_0402_5% R951 1 TL@ 2 100K_0402_5% TXOUT1- 16
17 TXOUT1- 16
TXOUT1+ 17
17 TXOUT1+ 17
TS_EN_2 18
2

TXOUT2- 19 18
17 TXOUT2- 19
TXOUT2+ 20
17 TXOUT2+ 20
21
TXOUT_CLK- 22 21
17 TXOUT_CLK- 22
TXOUT_CLK+ 23
17 TXOUT_CLK+ 23
C374 1 2 0.1U_0402_16V7K EDP_TXN1_C 24
eDP 4
4
EDP_TXN1
EDP_TXP1
C373 1 2 0.1U_0402_16V7K EDP_TXP1_C EDP_TXN0_C
EDP_TXP0_C
25
26
24
25
26
27
EDP_TXN1_C 28 27
EDP@ EDP_TXP1_C 29 28
C372 1 2 0.1U_0402_16V7K EDP_TXN0_C 30 29
4 EDP_TXN0 +5VS +5VS_TS 30
C371 1 2 0.1U_0402_16V7K EDP_TXP0_C EDP_AUXN_C 31
4 EDP_TXP0 31
EDP@ EDP_AUXP_C 32
33 32
TL@ R81 EDP_HPD 34 33
3 3
C389 1 2 0.1U_0402_16V7K EDP_TXN0_C_TL 0_0603_5% USB20_P6 35 34
EDP_TXN0_C_TL 17 10 USB20_P6 35
C388 1 2 0.1U_0402_16V7K EDP_TXP0_C_TL EDP_TXP0_C_TL 17 1 TS@ 2 Touch Module 10 USB20_N6
USB20_N6 36
36
TL@ +3VS 37
USB20_P7 38 37
10 USB20_P7 38
For Camera 10 USB20_N7
USB20_N7 39
39
TL@ 40
C369 1 2 0.1U_0402_16V7K EDP_AUXN_C_TL 40
4 EDP_AUXN EDP_AUXN_C_TL 17
4 EDP_AUXP C370 1 2 0.1U_0402_16V7K EDP_AUXP_C_TL EDP_AUXP_C_TL 17 ACES_50203-04001-001
TL@ R414 1 TS@ 2 0_0402_5% TS_EN_1 SP010014B00
+3VS 27 TS_EN
R424 1 @ 2 0_0402_5% CONN@
EDP@
C377 1 2 0.1U_0402_16V7K EDP_AUXN_C R613 2 @ 1 100K_0402_1% R425 1 @ 2 0_0402_5% TS_EN_2
C376 1 2 0.1U_0402_16V7K EDP_AUXP_C R614 2 @ 1 100K_0402_1% R426 1 TS@ 2 0_0402_5%
EDP@
TS_INT_1 for TS one chip solution
TS_INT_2 for TS two chip solution

+3VS
+5VS
1

R383
10K_0402_5% Q13
2
G

@ L2N7002LT1G_SOT23-3
@
2

8 CPU_EDP_HPD 3 1 EDP_HPD EDP_HPD 17


4 4
S

1 @ 2
R406 R364
0_0402_5% 100K_0402_5% Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2012/07/10 Deciphered Date 2013/07/10 Title
2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
eDP Connector
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
V5WE2 M/B LA-9532P Schematic
Date: Monday, April 08, 2013 Sheet 18 of 42
A B C D E
A B C D E

W=40mils
SM070001310 400ma 90ohm@100mhz DCR 0.3
RP17
+5VS R367 +HDMI_5V_OUT 680_8P4R_5%
1 1
0_0603_5% 4 CPU_DP2_N1 C381 2 1 0.1U_0402_16V7K HDMI_TX1- 4 5 HDMI_CLK- R368 2 @ 1 0_0402_5% HDMI_R_CK-
1 @ 2 4 CPU_DP2_P1 C382 2 1 0.1U_0402_16V7K HDMI_TX1+ 3 6
4 CPU_DP2_N0 C379 2 1 0.1U_0402_16V7K HDMI_TX2- 2 7 HDMI_CLK+ R369 2 @ 1 0_0402_5% HDMI_R_CK+
4 CPU_DP2_P0 C380 2 1 0.1U_0402_16V7K HDMI_TX2+ 1 8
U52

HDMI_GND
1 4 CPU_DP2_N2 C383 2 1 0.1U_0402_16V7K HDMI_TX0- 4 5 HDMI_TX0- R370 2 @ 1 0_0402_5% HDMI_R_D0-
0.1U_0402_16V4Z

EMC@ 3 4 CPU_DP2_P2 C384 2 1 0.1U_0402_16V7K HDMI_TX0+ 3 6


OUT
C396

1 4 CPU_DP2_N3 C385 2 1 0.1U_0402_16V7K HDMI_CLK- 2 7 HDMI_TX0+ R371 2 @ 1 0_0402_5% HDMI_R_D0+

0.1U_0402_16V4Z
1 EMC@ 4 CPU_DP2_P3 C386 2 1 0.1U_0402_16V7K HDMI_CLK+ 1 8
2 IN

C378
2 680_8P4R_5% HDMI_TX1- R372 2 @ 1 0_0402_5% HDMI_R_D1-
GND 2 RP18

3
HDMI_TX1+ R373 2 @ 1 0_0402_5% HDMI_R_D1+
AP2330W-7_SC59-3

+3VS 5 HDMI_TX2- R374 2 @ 1 0_0402_5% HDMI_R_D2-

Q14B HDMI_TX2+ R375 2 @ 1 0_0402_5% HDMI_R_D2+

4
DMN66D0LDW-7_SOT363-6

+3VS

1
+3VS
2 R376 2
1M_0402_5%
Q14A

2
DMN66D0LDW-7_SOT363-6

2
8 CPU_HDMI_HPD 1 6 HDMI_HPD

1
1
EMC@
R121 C387
100K_0402_5% 220P_0402_50V7K
2

2
RP15
2.2K_0804_8P4R_5%
1 8 HDMI_SCLK
+HDMI_5V_OUT 2 7 HDMI_SDATA
3 6 DDI2_CTRL_CK
+3VS 4 5 DDI2_CTRL_DATA
3 HDMI connector 3

JHDMI1
25 HDMI_HPD HDMI_HPD 19
18 HP_DET
+HDMI_5V_OUT +5V
17
HDMI_SDATA 16 DDC/CEC_GND
HDMI_SCLK 15 SDA
+3VS 14 SCL
Reserved

2
13
HDMI_R_CK- 12 CEC
Q15A 11 CK-
CK_shield
2

DMN66D0LDW-7_SOT363-6 HDMI_R_CK+ 10
HDMI_R_D0- 9 CK+
1 6 HDMI_SCLK 8 D0-
8 DDI2_CTRL_CK D0_shield
D2 HDMI_R_D0+ 7
XEMC@ HDMI_R_D1- 6 D0+
4 3 HDMI_SDATA 5 D1-
8 DDI2_CTRL_DATA YSLC05CH_SOT23-3

1
Q15B HDMI_R_D1+ 4 D1_shield 20
DMN66D0LDW-7_SOT363-6 HDMI_R_D2- 3 D1+ GND 21
2 D2- GND 22
5

D2_shield GND
Reserved for ESD HDMI_R_D2+ 1
D2+ GND
23

ACON_HMR2U-AK120C
+3VS CONN@
4 DC232002700 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2012/07/10 Deciphered Date 2013/07/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDMI Conn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
V5WE2 M/B LA-9532P Schematic
Date: Monday, April 08, 2013 Sheet 19 of 42
A B C D E
5 4 3 2 1

+3VS_6511 +3VS +3VS_6511 +1.8VS +1.8VS_DAC


R399
0_0402_5%
2 @ 1 R80 1 @ 2 0_0603_5% 1 @ 2

10U_0603_6.3V6M

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
L48 0_0603_5%
Rated current 500mA, DC 0.1ohm

1U_0402_6.3V6K
+5VS
1 1 1 1 1 1 1

D
@ @ 3 1 @ @ @

C455

C456

C457

C579

C580

C581
C75
@ Q25

2
2 2 2 2 2 2 2

G
DMG2301U-7_SOT23-3

G
2
R396
8 CPU_DP_HPD 3 1 DP_HPD 1K_0402_5%
6511_PWR_EN# 2 @ 1

D
D D
Q24 1

1
L2N7002LT1G_SOT23-3 @ +1.8VS +1.8VS_RXVDD
@ R418 C411
4.7K_0402_5% ISPSCL_R 0.1U_0402_16V7K
ISPSDA_R 2 L30 1 @ 2 0_0603_5%

4.7U_0603_6.3V6K

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
2

1
1
Rated current 500mA, DC 0.1ohm

22_0402_5%
1 1 1 1 1
R407 @ @ @

R408

C476

C472

C473

C637

C474
22_0402_5%
R240 +3VS_6511 +1.8VS_RXVDD

2
2
4.7K_0402_5% 2 2 2 2 2
+3VS 1 @ 2
1 @ 2
R241
4.7K_0402_5% +3VS

55
56

16
46
54

17
15
49
52
U42
C477 +1.8VS +1.8VS_RXVCC

DDCSDA

OVDD
OVDD
OVDD

IVDD
IVDD
IVDD
IVDD
DDCSCL
DP_HPD 44 51 1 2 0.1U_0402_16V4Z
HPD MCUVDDH
C496 1 2 0.1U_0402_16V4Z L47 1 @ 2 0_0603_5%

4.7U_0603_6.3V6K

0.1U_0402_16V4Z

0.1U_0402_16V4Z
C68 2 1 0.1U_0402_16V7K CPU_DP1_C_P0 30 50 1 2 2 1
4 CPU_DP1_P0 RX0P MCUVDD Rated current 500mA, DC 0.1ohm
C69 2 1 0.1U_0402_16V7K CPU_DP1_C_N0 31 R133
4 CPU_DP1_N0 RX0N 4.7K_0402_5% C614 1 1 1
C70 2 1 0.1U_0402_16V7K CPU_DP1_C_P1 33 53 MCURSTN 0.1U_0402_16V7K @ @
4 CPU_DP1_P1 RX1P MCURSTN

C519

C497

C498
C71 2 1 0.1U_0402_16V7K CPU_DP1_C_N1 34
4 CPU_DP1_N1 RX1N
32 @ T97 1 @ 2 R413 22_0402_5% 2 2 2
URDBG ISPSCL 21
1 @ 2 R412 22_0402_5%
C ISPSDA 21 C
19 ISPSCL_R 1 2 R411 22_0402_5%
ISPSCL 20 ISPSDA_R 1 2 R410 22_0402_5%
C72 2 1 0.1U_0402_16V7K DDI1_AUX_C_DP 24 ISPSDA
8 DDI1_AUX_DP RXAUXP
C73 2 1 0.1U_0402_16V7K DDI1_AUX_C_DN 23 27 R397 1 2 22_0402_5% CRT_CLK_1
8 DDI1_AUX_DN RXAUXN VGADDCCLK CRT_CLK_1 21
25 R398 1 2 22_0402_5% CRT_DATA_1
VGADDCSDA CRT_DATA_1 21

+3VS 1M_0402_5% 2 @ 1 R50 22 1


DCAUXP VSYNC VSYNC 21
1M_0402_5% 2 @ 1 R51 21 2
DCAUXN HSYNC HSYNC 21

45
OSCOUT
+1.8VS_RXVCC 35 8 +1.8VS_DAC
29 AVCC VDDC 11 +HDMI_5V_OUT
AVCC VDDC 14

IT6511FN VDDC
+3VS

2.2K_0402_5%
1

1
+1.8VS_RXVCC 26 13 R53 1 2 37.4_0402_1%
38 PVCC IOBN 12 CRT_B R123
PVCC IOBP CRT_B 21
2.2K_0402_5%

R127
10 R76 1 2 37.4_0402_1%
IOGN 9 CRT_G
CRT_G 21

2
IOGP

2
+1.8VS_RXVDD 28 7 R147 1 2 37.4_0402_1%
37 DVDD18 IORN 6 CRT_R 1 6
DVDD18 IORP CRT_R 21 CRT_DATA 21
36
DVSS18

1
18
VGADETECT VGADETECT 21 RP42 Q27A

5
3 R196 1 2 100_0402_1% 4 5 CRT_DATA_1 DMN66D0LDW-7_SOT363-6
RSET +3VS
+1.8VS_RXVCC 39 3 6 CRT_CLK_1 4 3 CRT_CLK 21
ASPVCC 2 7 PCSDA

75_0402_1% 2

75_0402_1% 2

75_0402_1% 2
B 5 1 8 PCSCL B
VDDA +1.8VS_DAC Q27B
+3VS R134 1 @ 2 10K_0402_5% 42 DMN66D0LDW-7_SOT363-6
INT# 4 1 2 C500 4.7K_8P4R_5%
COMP

R197

R199

R201
PCSDA 48 0.1U_0402_16V4Z
PCSCL 47 PCSDA
PCSCL 41 XTALIN_6511
XTALIN 40 XTALOUT_6511
6511_PWR_EN 43 XTALOUT
38 6511_PWR_EN SYSRSTN
GND

IT6511FN_QFN56_7X7
57

+3VS
R419
XTALOUT_6511 1M_0402_5% XTALIN_6511
2

R584 X4
@ 100K_0402_5% 27MHZ_10PF_X3G027000BA1H-U
Crystal
3 4
1

6511_PWR_EN# OUT GND


31 6511_PWR_EN#
2 1
GND IN

18P_0402_50V8J

15P_0402_50V8J
1
D 1
1

6511_PWR_EN 2 C65
G 2 C74
@ Q52 S 2
3

L2N7002LT1G_SOT23-3
A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2012/07/10 Deciphered Date 2013/07/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
ITE IT6511FN
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
V5WE2 M/B LA-9532P Schematic
Date: Monday, April 08, 2013 Sheet 20 of 42
5 4 3 2 1
A B C D E

W=40mils
1 1
+HDMI_5V_OUT

1
@ C450
0.1U_0402_16V4Z
2

CRB1.0 use 47ohm@100Mhz Bead

L42 EMC@
20
20
ISPSDA
ISPSCL CRT Connector
BLM18BA470SN1D_2P
1 2 CRT_R_2 JCRT1
20 CRT_R
L45 EMC@ 6
BLM18BA470SN1D_2P 11
1 2 CRT_G_2 1
20 CRT_G
L46 EMC@ 7
BLM18BA470SN1D_2P 12
1 2 CRT_B_2 2
20 CRT_B
8

10P_0402_50V8J

10P_0402_50V8J

10P_0402_50V8J

10P_0402_50V8J

10P_0402_50V8J

10P_0402_50V8J
13
1 1 1 1 1 1 3
9

C648

C615

C611

C647

C618

C616
14
4
2 2 2 2 2 2 10 16
G
2 15 17 2
G
1 5
@ C606
C-H_13-12201560CP
100P_0402_50V8J CONN@
2
DC060006E00
+HDMI_5V_OUT R175 1 @ 2 0_0603_5% CRT_HSYNC_2
VGADETECT 20
U24 @
1 5 0.1U_0402_16V4Z 2 1 C447
OE Vcc CRT_DATA 20
R439 R180 1 @ 2 0_0603_5% CRT_VSYNC_2 1
0_0402_5% 1 1 @
2 @ 1 CRT_HSYNC 2 @ @ CRT_CLK 20
20 HSYNC IN A C448 C449

2
10P_0402_50V8J 10P_0402_50V8J C646 2
3 4 CRT_HSYNC_1 2 2 68P_0402_50V8J 1 R898
GND OUT Y @ @ 0_0402_5%
C607
68P_0402_50V8J

1
M74VHC1GT125DF2G_SC70-5 2

R239 +HDMI_5V_OUT
0_0402_5% U23
2 @ 1 1 5
OE Vcc

2 @ 1 CRT_VSYNC 2
20 VSYNC IN A
R441
0_0402_5%
3 4 CRT_VSYNC_1
GND OUT Y

3 3
M74VHC1GT125DF2G_SC70-5

+HDMI_5V_OUT
@ C451 +3VS
1 2 0.1U_0402_16V4Z
1 2 C452
@ 0.1U_0402_16V4Z
1
2
7

U10
VCC_SYNC

VCC_DDC
VCC_VIDEO

3 CRT_R_2
HSYNC 13 VIDEO_1 4 CRT_G_2
VSYNC 15 SYNC_IN1 VIDEO_2 5 CRT_B_2
SYNC_IN2 VIDEO_3
CRT_CLK_1 10 14 CRT_HSYNC_1
20 CRT_CLK_1 DDC_IN1 SYNC_OUT1
20 CRT_DATA_1 CRT_DATA_1 11 16 CRT_VSYNC_1
DDC_IN2 SYNC_OUT2
9 CRT_CLK
4 1 2 8 DDC_OUT1 12 CRT_DATA 4
C454 BYP DDC_OUT2
0.1U_0402_16V4Z DDC_CLK/DAT reserved PU Resistor
GND

For contact discharge ESD +/-8kV CM2009-00QR_QSOP16


6

@
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2012/07/10 Deciphered Date 2013/07/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CRT Connector
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
V5WE2 M/B LA-9532P Schematic
Date: Monday, April 08, 2013 Sheet 21 of 42
A B C D E
5 4 3 2 1

+1.2V_LAN
+VDDO_CR R03 modify
U48
+3VALW +3V_LAN
4.7U_0603_6.3V6K

37 +LAN_BIASVDDH
BIASVDDH +3V_LAN
0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
1 1 1 1 1 1 1 EMC@ 20 @ R759 L65 EMC@
VDDO_CR
C771

C772

C773

C774

C775

C776

C778
@ @ @ @ @ 10_0805_5%2 EMC@ 1 2 60mil
+1.2V_LAN

4.7U_0603_6.3V6K

0.1U_0402_16V4Z

4.7U_0603_6.3V6K

0.1U_0402_16V4Z

0.1U_0402_16V4Z
1 1 35 17 +LAN_XTALVDDH BLM31PG601SN1_2P 1 1 1
VDDC XTALVDDH

C777

C803

C779

C780

C781
1U_0402_6.3V6K
61 1 @ @
2 2 2 2 2 2 2 VDDC

4.7U_0603_6.3V6K

0.1U_0402_16V4Z
C782
S

D
48 +LAN_AVDDH 3 1 1 1
2 2 AVDDH 2 2 2

C784
42 @
+3V_LAN AVDDH 2

C783
7 Q6

G
2
56 VDDO DMG2301U-7_SOT23-3 2 2
VDDO 1
D 62 D
VDDO 49 LAN_MIDI3- C465
TRD3_N LAN_MIDI3- 23
50 LAN_MIDI3+ 0.1U_0402_16V4Z
TRD3_P LAN_MIDI3+ 23 2
47 LAN_MIDI2- 1 2
TRD2_N LAN_MIDI2- 23 LAN_PWR_EN# 27
46 LAN_MIDI2+ R242
TRD2_P LAN_MIDI2+ 23
10K_0402_5%
+LAN_AVDDL 39 43 LAN_MIDI1- 1 20mil
AVDDL TRD1_N LAN_MIDI1- 23
45 44 LAN_MIDI1+ L56
AVDDL TRD1_P LAN_MIDI1+ 23
51 C464 +LAN_XTALVDDH 1 1 2 +3V_LAN
AVDDL 41 LAN_MIDI0- C785 BLM18AG601SN1D_2P
TRD0_N LAN_MIDI0- 23 0.1U_0402_16V4Z
+LAN_GPHYPLLVDDL 36 40 LAN_MIDI0+ 2 0.1U_0402_16V4Z
GPHY_PLLVDDL TRD0_P LAN_MIDI0+ 23
R02 modify for ESD +LAN_PCIEPLLVDD 32
20mil 2 L57
PCIE_PLLVDDL +LAN_BIASVDDH 1 2
1
EMC@ 29 C787 BLM18AG601SN1D_2P
C786 1 2 0.1U_0402_16V4Z PLT_RST_BUF# PCIE_PLLVDDL 65 0.1U_0402_16V4Z
SO_LINKLED# LAN_LINK# 23
66 2
SCLK_SPD1000LED# 20mil L58
R02 Modify 2 +LAN_AVDDH 1 2
SPD100LED#_SERIALDO BLM18AG601SN1D_2P
1 1
@ C790
10 PCIE_PRX_DTX_P3 .1U_0402_16V7K 1 2 C788 PCIE_PRX_C_DTX_P3 28 67 C789
.1U_0402_16V7K 1 2 C791 PCIE_PRX_C_DTX_N3 27 PCIE_TXD_P TRAFFICLED#_SERIALDI LAN_ACTIVITY# 23 0.1U_0402_16V4Z 0.1U_0402_16V4Z
10 PCIE_PRX_DTX_N3 PCIE_TXD_N 2 2
33
10 PCIE_PTX_C_DRX_P3 PCIE_RXD_P
34 8 +VDDO_CR
10 PCIE_PTX_C_DRX_N3 PCIE_RXD_N GPIO1_LR_OUT
5
GPIO_0 5IN1_LED# 28

27 EC_PME# R763 1 @ 2 0_0402_5% 64 SPROM_DOUT


C SI_EEDATA 63 SPROM_CLK C
R764 1 2 4.7K_0402_5% LAN_PME# 3 CS#_EECLK
+3V_LAN WAKE#
11
24,8 PLT_RST_BUF# PREST#
31
7 CLK_PCIE_LAN PCIE_REFCLK_P
30
7 CLK_PCIE_LAN# PCIE_REFCLK_N 1 CR_XD_WE#_SD_DETECT_R R767 2 @ 1 0_0402_5% CR_XD_WE#_SD_DETECT
SD_DETECT/XD_WE# CR_XD_WE#_SD_DETECT 23,25
68
CR_DATA0 R768 1 EMC@ 2 33_0402_5% CR_DATA0_R 25 SR_DISABLE/XD_DETECT#
23 CR_DATA0 CR_DATA0
CR_DATA1 R769 1 EMC@ 2 33_0402_5% CR_DATA1_R 24 59
23 CR_DATA1 CR_DATA1 MS_INS#/XD_CE#
CR_DATA2 R770 1 EMC@ 2 33_0402_5% CR_DATA2_R 23
23 CR_DATA2 CR_DATA2
CR_DATA3 R771 1 EMC@ 2 33_0402_5% CR_DATA3_R 22 9
23 CR_DATA3 CR_DATA3 GPIO2_MEDIA_SENSE/XD_RE#
52
53 CR_DATA4 57 CR_WP#_XD_WP#
54 CR_DATA5 CR_WP#/XD_WP# CR_WP#_XD_WP# 23
CR_DATA6
55
CR_DATA7 CR_LED_CR_BUS_PWR/XD_ALE
60 CR_PWR_EN
CR_PWR_EN 23 For EMI request
21 CR_CLK_XD_RY_BY#_R R774 1 2 56_0402_5%
CR_CLK/XD_RY_BY# CR_CLK_XD_RY_BY# 23
EMC@
+3VS 26 CR_CMD_XD_CLE_R R775 1 2 22_0402_5%
CR_CMD_XD_CLE CR_CMD_XD_CLE 23
R776 1 2 1K_0402_5% 58 EMC@
VMAIN_PRSNT
+3V_LAN
R777 1 2 4.7K_0402_5% 6
TEST1
1 2 10 40mil L59 40mil
R778 4.7K_0402_5% TEST2 16 +1.2V_LAN_OUT 1 2
SR_LX +1.2V_LAN
4.7UH_PG031B-4R7MS_1.1A_20%
4 13 1 1
LOW_PWR SR_VFB
EMI Request...2010/07/27
C793 C794
B LAN_XTALO_R 19 0.1U_0402_16V4Z 10U_0603_6.3V6M B
LAN_XTALI 18 XTALO 2 2
XTALI SM010005500 500ma 600ohm@100mhz DCR 0.38
R02 Modify
20mil L60
40mil
Reserved for leakage current 15 +LAN_PCIEPLLVDD 1 2
GND PLANE

SR_VDDP +3V_LAN +1.2V_LAN


15mil38 14 BLM18AG601SN1D_2P
1 2 LAN_RDAC SR_VDD
RDAC 1 0.1U_0402_16V4Z 1 4.7U_0603_6.3V6K 1 1
R780 1.24K_0402_1% C795 C796 C797 C798
12
7 LAN_CLKREQ# CLK_REQ# 0.1U_0402_16V4Z 4.7U_0603_6.3V6K
BCM57786XA1KMLG_QFN68_8X8 2 2 2 2
69

PLACE NEXT P14

+3V_LAN 20mil L61


+LAN_GPHYPLLVDDL 1 2 +1.2V_LAN
BLM18AG601SN1D_2P
1 1
2
1K_0402_5%

1K_0402_5%
C801 C802
2
R782

R783 0.1U_0402_16V4Z 4.7U_0603_6.3V6K


@ 2 2
LAN_XTALI
1

LAN_XTALO_R
1
1

R779
20mil L62
Y6 200_0402_1% SPROM_DOUT SPROM_CLK +LAN_AVDDL 1 2 +1.2V_LAN
25MHZ 10PF X3G025000DA1H-X BLM18AG601SN1D_2P
2

1K_0402_5%

1 1
2

R784

C804 C805
1 3LAN_XTALO SPROM_CLK SPROM_DOUT
1 3 (EECLK) (EEDATA) 0.1U_0402_16V4Z 4.7U_0603_6.3V6K
A GND GND 2 2 A
1 1
1

On chip 1 0
C799 2 4 C800
15P_0402_50V8J 15P_0402_50V8J
2 2 AT24C02 1 1

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2012/07/10 Deciphered Date 2013/07/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Broadcom BCM57785
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom V5WE2 M/B LA-9532P Schematic 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, April 08, 2013 Sheet 22 of 42
5 4 3 2 1
5 4 3 2 1

D D
+3V_LAN

T1 +5VS

1
1 24
LAN_MIDI3+ 2 TCT1 MCT1 23 RJ45_MIDI3+ R786 R787
22
22
LAN_MIDI3+
LAN_MIDI3- LAN_MIDI3- 3 TD1+
TD1-
MX1+
MX1-
22 RJ45_MIDI3-
1
LAN Connector 1K_0402_5% 1K_0402_5%

0.1U_0402_16V4Z
4 21 EMC@

2
TCT2 MCT2

C395
22 LAN_MIDI2- LAN_MIDI2- 5 20 RJ45_MIDI2- XEMC@
LAN_MIDI2+ 6 TD2+ MX2+ 19 RJ45_MIDI2+ C806 1 2 220P_0402_50V7K
22 LAN_MIDI2+ TD2- MX2- 2
7 18 C807 1 2 220P_0402_50V7K
LAN_MIDI1+ 8 TCT3 MCT3 17 RJ45_MIDI1+ JRJ45 XEMC@
22 LAN_MIDI1+ TD3+ MX3+
22 LAN_MIDI1- LAN_MIDI1- 9 16 RJ45_MIDI1- RJ45_MIDI0+ 1
TD3- MX3- PR1+ 9 LAN_ACTIVITY#
10 15 RJ45_MIDI0- 2 LED_YELLOW_A1 LAN_ACTIVITY# 22
LAN_MIDI0- 11 TCT4 MCT4 14 RJ45_MIDI0- PR1- 10 C808 1 2 68P_0402_50V8J
22 LAN_MIDI0- TD4+ MX4+ LED_YELLOW_A2
22 LAN_MIDI0+ LAN_MIDI0+ 12 13 RJ45_MIDI0+ RJ45_MIDI1+ 3 XEMC@
TD4- MX4- PR2+
RJ45_MIDI2+ 4
PR3+

75_0402_1%

75_0402_1%
11 LAN_LINK#
LED_GREEN_B1 LAN_LINK# 22

1
0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z GST5009-E RJ45_MIDI2- 5


SP050006B10 PR3- 12 C809 1 2 68P_0402_50V8J
LED_GREEN_B2

R788

R789
1 1 1 1 RJ45_MIDI1- 6 XEMC@
PR2-
C810

C811

C812

C813

75_0402_1%

75_0402_1%
RJ45_MIDI3+ 7 13

2
PR4+ GND

1
14
2 2 2 2 RJ45_MIDI3- 8 GND
PR4- 40mil

R790

R791
C C
CARD READER_2in1 SP07000TF00 EMC@ EMC@ EMC@ EMC@ SANTA_130451-F
CONN@

2
DC234005300
RJ45_GND
Place close to TCT pin

BOTHHAND: S X'FORM_ GST5009-E LF LAN, SP050006B10


TIMAG:S X'FORM_ IH-160 LAN , SP050006F00
XEMC@ JP1
B88069X9231T203_4P5X3P2-2
2 1

EMC@
RJ45_GND C814 1 2 LANGND

10P_0402_50V8J

1
Card Reader Connector J15

1
40mil JUMP_43X118

L30ESDL5V0C3-2
@ JP2

2
XEMC@
B88069X9231T203_4P5X3P2-2

2
+XDPWR_SDPWR_MSPWR

D39

2
JREAD1

1
EMC@
B CR_CMD_XD_CLE 3 B
22 CR_CMD_XD_CLE CMD
4
EMC@ 5 VSS
R897 1 2 CR_CLK 6 VDD
22 CR_CLK_XD_RY_BY# CLK
BLM15BA220SN1D 0402 7
VSS
SM01000LU00nothavecreatesymbol.
CR_DATA0 8
Use(MURATABLM15AG102SN1D0402) 22 CR_DATA0 DAT0 +3VALW +XDPWR_SDPWR_MSPWR
CR_DATA1 9
22 CR_DATA1 DAT1
CR_DATA2 1
22 CR_DATA2 DAT2
CR_DATA3 2
22 CR_DATA3 CD/DAT3 L66 EMC@ 40mil

D
3 1 1 2
CR_WP#_XD_WP# 10 BLM31PG601SN1_2P
22 CR_WP#_XD_WP# WP SW

1
CR_XD_WE#_SD_DETECT 11
22,25 CR_XD_WE#_SD_DETECT CD SW

1U_0402_6.3V6K
C819

4.7U_0603_6.3V6K

0.1U_0402_16V4Z
12 R793 Q9

G
1 1

2
GND SW

C817

C818
13 10K_0402_5% DMG2301U-7_SOT23-3 1 @
GND SW EMC@

2
T-SOL_156-1000302601_NR 2 2
CONN@ 2
SP07000TF00 1 2
R794
Q23 10K_0402_5%
D

1
L2N7002LT1G_SOT23-3 1

C822
0.1U_0402_16V7K
2
C26 22 CR_PWR_EN
R26 G
CR_CLK 1 2 1 2 S

3
XEMC@ XEMC@ 2
22_0402_5%
6.8P_0402_50V8C

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2012/07/10 Deciphered Date 2013/07/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LAN Magnetic & RJ45
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
V5WE2 M/B LA-9532P Schematic
Date: Monday, April 08, 2013 Sheet 23 of 42
5 4 3 2 1
A B C D E

For Wireless LAN


+1.5VS J13 +1.5VS_WLAN
+3VS 60mil +3VS_WLAN JUMP_43X39
J3 @ 1 2
1 2 1 2
1 1 1
1 1 1 @ @ C461 @ C462 @ C463
JUMP_43X118 C458 @ C459 C460 0.1U_0402_16V4Z 0.1U_0402_16V4Z
0.1U_0402_16V4Z 4.7U_0603_6.3V6K
+3VALW 4.7U_0603_6.3V6K 2 2 2
@ J4 2 2 2
1 2 0.1U_0402_16V4Z
1 1
JUMP_43X118 +3VS_WLAN
Mini Card Power Rating
+3VS_WLAN R429
4.7K_0402_5% +1.5VS_WLAN
1 2
JMINI1
1 2
27 WLAN_PME# 1 2
3 4
5 3 4 6
R423 1 @ 2 0_0402_5% 7 5 6 8
7,8 MINI1_CLKREQ# 7 8
9 10
11 9 10 12
7 CLK_PCIE_MINI1# 11 12
13 14
7 CLK_PCIE_MINI1 13 14
15 16
17 15 16 18
19 17 18 20 WL_OFF#
+3VS_WLAN 19 20 WL_OFF# 27
21 22 PLT_RST_BUF#
+3VALW 21 22 PLT_RST_BUF# 22,8
10 PCIE_PRX_DTX_N4 23 24
U9 25 23 24 26
1
W=60mils 10 PCIE_PRX_DTX_P4
27 25 26 28
5 OUT 29 27 28 30 MINI1_SMBCLK R432 1 @ 2 0_0402_5%
IN 29 30 PCH_SMBCLK 7
31 32 MINI1_SMBDATA R434 1 @ 2 0_0402_5% PCH_SMBDATA 7
10 PCIE_PTX_C_DRX_N4 31 32
2 33 34
GND 10 PCIE_PTX_C_DRX_P4 33 34
1U_0402_6.3V6K
C165

4 35 36
IN 35 36 USB20_N4 10
1 37 38
37 38 USB20_P4 10
3 39 40
EN 41 39 40 42 R443 1 2 100K_0402_5%
+3VS_WLAN 41 42 +3VS_WLAN
IOAC@ G5243T11U_SOT23-5 43 44 MINI1_LED# 27
2 2 IOAC@ R435 @ 45 43 44 46 2
0_0402_5% 47 45 46 48
1 2 E51TXD_P80DATA_R 49 47 48 50
27 WLAN_ON 27 E51TXD_P80DATA 49 50
1 2 E51RXD_P80CLK_R 51 52
27 E51RXD_P80CLK 51 52

1
For DVT2 verify IOAC function R436 @ 53 54
0_0402_5% GNDGND
R437 @ R438 BELLW_80053-1021
100K_0402_5% 1K_0402_5% CONN@
DC040009P00

2
D

1
@
2 Q20
27 BT_ON#
G L2N7002LT1G_SOT23-3
S

3
3 3

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2012/07/10 Deciphered Date 2013/07/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MINI CARD (WLAN)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
V5WE2 M/B LA-9532P Schematic
Date: Monday, April 08, 2013 Sheet 24 of 42
A B C D E
A B C D E

SATA HDD1 Conn.


JHDD1

1
C392 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P0 2 GND
6 SATA_PTX_DRX_P0 A+
C393 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_N0 3
6 SATA_PTX_DRX_N0
C391 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_N0
4
5
A-
GND
SATA ODD Conn.
6 SATA_PRX_DTX_N0 C394 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P0 6 B- JODD1
1 1
6 SATA_PRX_DTX_P0 7 B+
GND 1
C401 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P1 2 GND
6 SATA_PTX_DRX_P1 A+
8 6 SATA_PTX_DRX_N1 C402 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_N1 3
+3VS V33 A-
9 4
R308 2 @ 1 +3VS_HDD 10 V33 C403 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_N1 5 GND
V33 6 SATA_PRX_DTX_N1 B-
0_0402_5% 11 C405 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P1 6
GND 6 SATA_PRX_DTX_P1 B+
8,9 DEVSLP0 R307 1 @ 2 0_0402_5% 12 7
13 GND GND
14 GND +5VS
+5VS V5
15 80mils 8
16 V5 9 DP
V5 +5V

10U_0603_6.3V6M
C404

0.1U_0402_16V4Z
C407
17 1 10
GND +5V

1
18 T185@ ODD_MD 11
19 Reserved 23 12 MD 14
+3VS +5VS 20 GND GND 24 13 GND GND 15

2
21 V12 GND 25 2 GND GND
22 V12 GND 26
100mils V12 GND SANTA_201902-1_13P-T
CONN@
10U_0603_6.3V6M
C420

1U_0402_10V6K
C161

0.1U_0402_16V4Z
C397
CCM_C127043HR022M27FZR_22P-T
1 1 1 LTCX004HZ00
1
0.1U_0402_16V4Z
C390

@ @
CONN@

DC231211190
2

2 2 2

2 2

Debug Board
JDB1
1 2
1 2 PCH_SPI_CLK_1_R 7
3 4
7 PCH_SPI_CS0#_1_R 3 4 PCH_SPI_MOSI_1_R 7
7 PCH_SPI_MISO_1_R 5 6 +BIOS_SPI
7 5 6 8
7 SPI_HOLD1#_R 7 8
9 10
27 EC_SPICLK 9 10 EC_SPICS#/FSEL#_R 27
11 12 EC_SI_SPI_SO_R1 27
27 EC_SO_SPI_SI_R1 11 12
+EC_SPI 13 14
13 14 EC_RST# 27,28
15 16
3 17 15 16 18 3
19 17 18 20
22,23 CR_XD_WE#_SD_DETECT 19 20
21 22
21 22 ON/OFFBTN# 26,28
23 24
25 23 24 26
27 25 26 28
29 27 28 30
29 30 REC_MODE_L 27

27 EC UART_TXD
31
33
35
31
33
32
34
32
34
36
EC UART_RXD
+3VALW_EC
27
Kill SPI_WP1#_R
SW
37 35 36 38
39 37 38 40
19 HDMI_HPD 39 40 SPI_WP1#_R 27,6,7
41 42
43 41 42 44 940@ JP5 CONN@
43 44 LID_SW# 26,27
45 46 1 R569 2 1 3
8 XDP_DBRESET# 45 46 KSI2 27,28 1 G1
47 48 1K_0402_1% 2 4
27,28 KSI0 47 48 KSO3 27,28 2 G2
49 50
27,28 KSO2 49 50 KSO4 27,28
ACES_87212-02G0
51 52 +3VALW
G1 G2
E&T_1001K-F50C-05R
CONN@

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2012/07/10 Deciphered Date 2013/07/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDD/ODD/USB3.0 Conn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
V5WE2 M/B LA-9532P Schematic
Date: Monday, April 08, 2013 Sheet 25 of 42
A B C D E
A B C D E

+5VALW +USB3_VCCA

U25
For ESD request C483 EMC@ W=60mils
SM070000S80 WCM2012F2SF-670T04 67ohm 0.1U_0402_16V7K 1 8
L24 EMC@ D15 1 2 2 GND OUT 7 R454
2 1 PCH_USB3_TX0_P_C 1 2 U3TXDP0 U3RXDN0 1 1 109 U3RXDN0 3 IN OUT 6 0_0402_5%
10 PCH_USB3_TX0_P 1 2 IN OUT
C484 0.1U_0402_16V7K 27 USB_CHARGE_2A# 4 5 1 @ 2
EN/ENB OCB USB_OC0# 10,9
U3RXDP0 2 2 98 U3RXDP0
10 PCH_USB3_TX0_N 2 1 PCH_USB3_TX0_N_C 4 3 U3TXDN0 SY6288D10CAC_MSOP8
C482 0.1U_0402_16V7K 4 3 U3TXDN0 4 4 77 U3TXDN0
DLW21SN900HQ2L-0805_4P
1 U3TXDP0 5 5 66 U3TXDP0 1

3 3
L25 EMC@
PCH_USB3_RX0_P 1 2 U3RXDP0 8 +USB3_VCCA
10 PCH_USB3_RX0_P 1 2 XEMC@
L05ESDL5V0NA-4 SLP2510P8 W=100mils SF000002Y00
PCH_USB3_RX0_N 4 3 U3RXDN0 XEMC@ EMC@
10 PCH_USB3_RX0_N 4 3 220U 6.3V OSCON
1 2 2

1000P_0402_50V7K
C487

0.1U_0402_16V4Z
DLW21SN900HQ2L-0805_4P
+ ESR 17mohm@100Khz

C994
C486
R458 1 @ 2 0_0402_5%
R461 1 @ 2 0_0402_5% 220U_6.3V_M 1 1

USB20_P0 3
L26
4 USB20_P0_L
2
USB3.0 Conn.
10 USB20_P0 3 4

USB20_N0 2 1 USB20_N0_L JUSB1


10 USB20_N0 2 1 1
WCM2012F2SF-670T04_0805 USB20_N0_L 2 VBUS
XEMC@ USB20_P0_L 3 D-
4 D+
U3RXDN0 5 GND
U3RXDP0 6 StdA-SSRX- 10
7 StdA-SSRX+ GND 11
U3TXDN0 8 GND-DRAIN GND 12
U3TXDP0 9 StdA-SSTX- GND 13
StdA-SSTX+ GND
OCTEK_USB-09EAAB
2 CONN@ 2
DC233008O20

3 3

USB/B
(USB Port 1, Port2)
+5VALW
PWR/B 1
JUSB2

JPWR1 2 1
1 3 2
1 +3VALW 3
2 +3VLP 4
2 3 LID_SW# USB_EN# 5 4
3 LID_SW# 25,27 27 USB_EN# 5
4 PWR_LED# PWR_LED# 28 6
4 5 ON/OFFBTN# USB20_N1 7 6
5 ON/OFFBTN# 25,28 10 USB20_N1 7
6 USB20_P1 8
6 10 USB20_P1 8
9
7 USB20_N2 10 9
GND 10 USB20_N2 10
8 USB20_P2 11
GND 10 USB20_P2 11
12
ACES_88514-00601-071 13 12
CONN@ 14 13
14
SP010014M00
ACES_88514-01201-071
CONN@
SP01001BF00
4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2012/07/10 Deciphered Date 2013/07/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDD/ODD/USB3.0 Conn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
V5WE2 M/B LA-9532P Schematic
Date: Monday, April 08, 2013 Sheet 26 of 42
A B C D E
A B C D E

+3VALW
R24
+3VALW_EC L31 (PU at Hall Sensor) +3VALW_EC
BLM18AG121SN1D_2P
1 @ 2 XEMC@ XEMC@ 1 2 +EC_VCCA +EC_VCCA LID_SW# R476 1 2 100K_0402_5%
C501 1
22P_0402_50V8J +3VLP 0_0805_5% 1 1 1 1 2 2

0.1U_0402_16V4Z
C502

0.1U_0402_16V4Z
C503

0.1U_0402_16V4Z
C504

0.1U_0402_16V4Z
C505

1000P_0402_50V7K
C506

1000P_0402_50V7K
C507
2 1 2 XEMC@ 1 CLK_PCI_LPC @ @ +EC_VCC C508 R485 1 2 4.7K_0402_5% +5VS
XEMC@ R477 33_0402_5% 2 @ 1 0.1U_0402_16V4Z R483 1 2 4.7K_0402_5%
2

ECAGND
R236 0_0805_5%
2 2 2 2 1 1
TP_CLK R478 1 @ 2 4.7K_0402_5% +3VS
+3VALW_EC TP_DATA R479 1 @ 2 4.7K_0402_5%
ECAGND 33

111
125
R480 2 1 47K_0402_5% EC_RST#_R

22
33
96

67
U28

9
EC_MUTE# R481 1 @ 2 10K_0402_5%
C509 2 1 0.1U_0402_16V7K

EC_VDD0
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC

EC_VDD/VCC

EC_VDD/AVCC
1 1
1 2 EC_ENTERING_RW R588 1 @ 2 10K_0402_5%
25,28 EC_RST#
R591 DEG@ 0_0402_5%
KBL_EN# 1 21 BT_ON#
+3VALW_EC 28 KBL_EN# GATEA20/GPIO00 GPIO0F BT_ON# 24
EC_KBRST# 2 23 BEEP#
9 EC_KBRST# KBRST#/GPIO01 BEEP#/GPIO10 BEEP# 29
SERIRQ 3 26 USB_EN#
28,9 SERIRQ LPC_FRAME# 4 SERIRQ GPIO12 27 USB_EN# 26 R482
28,7 LPC_FRAME# LPC_FRAME# ACOFF/GPIO13
R484 1 @ 2 100K_0402_5% EC_PME# LPC_AD3 5 0_0402_5%
28,7 LPC_AD3 LPC_AD3
PU at LAN side 28,7 LPC_AD2
LPC_AD2 7
LPC_AD2 PWM Output C510 2 1 100P_0402_50V8J ECAGND
39 VR_HOT#
2 @ 1 H_PROCHOT# 32,33,4
LPC_AD1 8 63 BATT_TEMP
28,7 LPC_AD1 LPC_AD1 BATT_TEMP/GPIO38 BATT_TEMP 32,33
LPC_AD0 10 LPC & MISC 64
28,7 LPC_AD0 LPC_AD0 GPIO39 D

1
65 ADP_I
+3VALW_EC ADP_I/GPIO3A ADP_I 33,34
RP12 CLK_PCI_LPC 12 AD Input 66 AD_BID0 H_PROCHOT#_EC 2 Q50
7 CLK_PCI_LPC CLK_PCI_EC GPIO3B
PLT_RST# 13 75 G L2N7002LT1G_SOT23-3
28,8 PLT_RST# PCIRST#/GPIO05 GPIO42
1 8 EC_SMB_DA1 EC_RST#_R 37 76 EC_PME# S
EC_PME# 22

3
2 7 EC_SMB_CK1 EC_SCI# 20 EC_RST# IMON/GPIO43
6,9 EC_SCI# EC_SCII#/GPIO0E
3 6 EC_SMB_CK2 WLAN_ON 38 Latest design guide suggest change to
24 WLAN_ON GPIO1D
+3VS 4 5 EC_SMB_DA2 68
DAC_BRIG/GPIO3C 70 EN_DFAN1 74LVC1G06.
EN_DFAN1/GPIO3D EN_DFAN1 30
2.2K_0804_8P4R_5% DA Output 71
+3VS KSI0 55 IREF/GPIO3E 72
KSI1 56 KSI0/GPIO30 CHGVADJ/GPIO3F
KSI2 57 KSI1/GPIO31
R488 1 @ 2 10K_0402_5% EC_SMI# KSI3 58 KSI2/GPIO32 83 EC_MUTE#
R492 1 @ 2 10K_0402_5% EC_SCI# KSI4 59 KSI3/GPIO33 EC_MUTE#/GPIO4A 84 LAN_PWR_EN# EC_MUTE# 29
KSI4/GPIO34 USB_EN#/GPIO4B LAN_PWR_EN# 22
KSI5 60 85 WLAN_PME#
KSI5/GPIO35 CAP_INT#/GPIO4C WLAN_PME# 24
KSI6 61 PS2 Interface 86 EC_ENTERING_RW R509
KSI6/GPIO36 EAPD/GPIO4D EC_ENTERING_RW 28
C511 1 2 0.01U_0402_16V7K PLT_RST# KSI7 62 87 TP_CLK 0_0402_5%
KSI7/GPIO37 TP_CLK/GPIO4E TP_CLK 28
XEMC@ KSO0 39 88 TP_DATA 2 @ 1 ACIN 32,34,8
KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA 28
KSO1 40
KSO1/GPIO21
ESD request KSI[0..7]
KSO2 41
KSO2/GPIO22
KSO3 42 97 VGATE_3V EC_ACIN C512 2 1 100P_0402_50V8J
25,28 KSI[0..7] KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00 VGATE_3V 8
2 KSO4 43 98 USB_CHARGE_2A# EMC@ 2
KSO[0..17] KSO4/GPIO24 WOL_EN/GPXIOA01 USB_CHARGE_2A# 26
KSO5 44 99 HDA_SDO
X1 @
25,28 KSO[0..17]
KSO6 45 KSO5/GPIO25 Int. K/B HDA_SDO/GPXIOA02 109 VCIN0_PH_R
HDA_SDO 6
32.768KHZ_12.5PF_FC-135 KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00
KSO7/GPIO27 SPI Device Interface
EC_XCLK1 2 1 EC_XCLK0 KSO8 47
KSO9 48 KSO8/GPIO28 119 EC_SI_SPI_SO 1 R158 2 940@ 49.9_0402_1% EC_SI_SPI_SO_R
KSO10 49 KSO9/GPIO29 SPIDI/GPIO5B 120 EC_SO_SPI_SI 1 R159 2 940@ 49.9_0402_1% EC_SO_SPI_SI_R
1 1
KSO11 50 KSO10/GPIO2A SPIDO/GPIO5C 126 EC_SPICLK_R 1 R160 2 940@ 49.9_0402_1% EC_SPICLK
KB930&9012 Co-Layout Item
KSO11/GPIO2B SPI Flash ROM SPICLK/GPIO58 EC_SPICLK 25
C513 C514 KSO12 51 128 EC_SPICS#/FSEL# 1 R146 2 49.9_0402_1% EC_SPICS#/FSEL#_R
@ 15P_0402_50V8J 15P_0402_50V8J @ KSO13 52 KSO12/GPIO2C SPICS#/GPIO5A 940@ +EC_VCC 1 @ 2
2 2 KSO13/GPIO2D +3VALW
KSO14 53 R691 2 1 100K_0402_5% R494 0_0402_5%
KSO15 54 KSO14/GPIO2E 73 ENBKL R495 2 @ 1 0_0402_5%
KSO15/GPIO2F ENBKL/GPIO40 ENBKL 8 +3VLP
KSO16 81 74 930_PECI
KSO17 82 KSO16/GPIO48 PECI_KB930/GPIO41 89 FSTCHG
KSO17/GPIO49 FSTCHG/GPIO50 FSTCHG 34 Pin 111 is a power source for HW operation of KB9012.
90 BATT_BLUE_LED#
BATT_CHG_LED#/GPIO52 91 EC_WLAN_LED#
BATT_BLUE_LED# 28 So, power plan will be different between KB930 and KB9012.
CAPS_LED#/GPIO53 EC_WLAN_LED# 28
EC_SMB_CK1 77 GPIO 92 PWR_LED PWR_LED 28 930_PECI R496 1 940@ 2 43_0402_1%
33,34 EC_SMB_CK1 EC_SMB_CK1/GPIO44 PWR_LED#/GPIO54 H_PECI 4
EC_SMB_DA1 78 93 BATT_AMB_LED#
33,34 EC_SMB_DA1 EC_SMB_DA1/GPIO45 BATT_LOW_LED#/GPIO55 BATT_AMB_LED# 28
EC_SMB_CK2 79 SM Bus 95 SYSON 9012_PECI R497 1 9012@ 2 43_0402_1%
30,7 EC_SMB_CK2 EC_SMB_CK2/GPIO46 SYSON/GPIO56 SYSON 31,36
EC_SMB_DA2 80 121
30,7 EC_SMB_DA2 EC_SMB_DA2/GPIO47 VR_ON/GPIO57 127 PM_SLP_S4#
PM_SLP_S4#/GPIO59 PM_SLP_S4# 8
Pin74(KB930),Pin118(KB9012) are with different PECI pin location,
PM_SLP_S3# 6 100 PCH_RSMRST#
R605 1 DEG@ 2 E51TXD_P80DATA
8 PM_SLP_S3#
PM_SLP_S5# 14 PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 101 EC_LID_OUT#
PCH_RSMRST# 8 so HW must co-layout for it.
25 EC UART_TXD 8 PM_SLP_S5# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04 EC_LID_OUT# 9 Please make sure which EC pin will be connected to PECI circuit.
0_0402_5% EC_SMI# 15 102 VCIN1_PROCHOT
8 EC_SMI# EC_SMI#/GPIO08 PROCHOT_IN/GPXIOA05
R606 1 DEG@ 2 E51RXD_P80CLK PCH_PWR_EN 16 103 H_PROCHOT#_EC
25 EC UART_RXD 31 PCH_PWR_EN GPIO0A H_PROCHOT#_EC/GPXIOA06 H_PROCHOT#_EC 33
0_0402_5% TS_EN 17 104 GPXIOA07 9012_PCH_PWROK 2 9012@ 1
18 TS_EN GPIO0B VCOUT0_PH/GPXIOA07
VCCST_PG_EC 18 GPO BKOFF#/GPXIOA08 105 BKOFF# R498 0_0402_5%
11,8 VCCST_PG_EC GPIO0C BKOFF# 18
WL_OFF# 19 GPIO 106 PBTN_OUT# GPXIOA07 2 940@ 1
24 WL_OFF# GPIO0D PBTN_OUT#/GPXIOA09 PBTN_OUT# 8 PCH_PWROK 8
EC_SPOK 25 107 R499 0_0402_5%
33 EC_SPOK EC_INVT_PWM/GPIO11 PCH_APWROK/GPXIOA10 +3VALW_EC
R565 FAN_SPEED1 28 108 MINI1_LED# 2 9012@ 1
3 30 FAN_SPEED1 FAN_SPEED1/GPIO14 SA_PGOOD/GPXIOA11 MINI1_LED# 24 MAINPWON 33,35 3
0_0402_5% 2 @ 1 REC_MODE_L_R 29 R500 0_0402_5%
25 REC_MODE_L E51TXD_P80DATA 30 EC_PME#/GPIO15
24 E51TXD_P80DATA EC_TX/GPIO16
E51RXD_P80CLK 31 110 EC_ACIN Pin104 This co-layouted circuit is for power fail function of
24 E51RXD_P80CLK EC_RX/GPIO17 AC_IN/GPXIOD01
9012_PCH_PWROK 32 112 EC_ON
PCH_PWROK/GPIO18 EC_ON/GPXIOD02 EC_ON 28,35 KB930 and KB9012.At KB930, PCH_PWROK will be connected to pin 104.

2
PWR_SUSP_LED# 34 114 ON/OFF
28 PWR_SUSP_LED# SUSP_LED#/GPIO19 ON/OFF/GPXIOD03 ON/OFF 28 At KB9012,PCH_PWROK will be connected to pin 32,
30 G_SEN_INT G_SEN_INT 36 GPI 115 LID_SW#
NUM_LED#/GPIO1A LID_SW#/GPXIOD04 LID_SW# 25,26
SUSP#/GPXIOD05
116 SUSP#
SUSP# 31,34,36,37,38
@ @ and VCOUT0_PH will be connected to pin 104.
117 VCCST_PWRGD R696
GPXIOD06 VCCST_PWRGD 11,38
118 9012_PECI R697 10K_0402_5%

1
PECI_KB9012/GPXIOD07
AGND/AGND

EC_XCLK1 122 10K_0402_5% VCIN0_PH_R R501 1 @ 2 0_0402_5%


XCLKI/GPIO5D VCIN0_PH 33
1 2 123 124
GND/GND
GND/GND
GND/GND
GND/GND

@ EC_XCLK0 +V18R
8 SUSCLK XCLKO/GPIO5E V18R VCIN1_PROCHOT 33

4.7U_0603_6.3V6K
R502 0_0402_5% 1 1
GND0

C515

0.1U_0402_16V4Z
2 940@ 1
For abnormal shutdown

C398
R504 100K_0402_5% XEMC@
+3VALW_EC
D25 940@ 1 2 9012@ KB9012QF-A3_LQFP128_14X14 2 2
11
24
35
94
113

69

RB751V40_SC76-2 C516 20P_0402_50V8 20mil


EC_SPOK 1 2 PCH_RSMRST# D28 design for Debug board flash SPI ROM KSO1 R507 2 940@ 1 47K_0402_5%
Follow KB930 checking List ECAGND 1 2 (can be short after MP)
D26 L32 KSO2 R508 2 940@ 1 47K_0402_5%
RB751V40_SC76-2 BLM18AG121SN1D_2P
@ 1 2 PCH_PWROK
KB932 use 256KB ROM +EC_SPI +3VALW_EC
KB932&9012 Co-Layout Item D28 1 2 940@ RB751V40_SC76-2
KB9012 Embedded 128KB ROM
EC_SPICS#/FSEL#_R
25 EC_SPICS#/FSEL#_R
U29 C518 1 2 940@ 0.1U_0402_16V4Z
1 8 R511
+3VALW_EC 1 DEG@ 2EC_SI_SPI_SO_R 2 /CS VCC 7 SPI_HOLD# 1 940@ 2 4.7K_0402_5%
25 EC_SI_SPI_SO_R1 DO_IO1 /HOLD +EC_SPI
R598 0_0402_5% 3 6 EC_SPICLK
Board ID +EC_SPI R510 1 @ 24.7K_0402_5% SPI_WP# 4 /WP CLK
GND DIO_IO0
5 EC_SO_SPI_SI_R 1 DEG@ 2
EC_SO_SPI_SI_R1 25
2

4 Analog Board ID definition, R600 4


R503 SPI_WP1#_R 1 940@ 2 W25X20BVSNIG_SO8 0_0402_5%
Please see page 3. 25,6,7 SPI_WP1#_R
Ra 100K_0402_5% R601 1K_0402_5% SA00003GM10
940@
EC_SPICLK 2 1 XEMC@
1

AD_BID0 U28 R513 XEMC@ 0_0402_5% C520 33P_0402_50V8K


1

R506 @
1
C517 Security Classification Compal Secret Data Compal Electronics, Inc.
Rb 56K_0402_5% 0.1U_0402_16V4Z
Issued Date 2012/07/10 Deciphered Date 2013/07/10 Title
2 KB932QF-A0_LQFP128 EC ENE-KB9012
2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
940@ AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
SA000055I00 Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
V5WE2 M/B LA-9532P Schematic
Date: Monday, April 08, 2013 Sheet 27 of 42
A B C D E
A B C D E

KSI0_SW R577 1 9012@ 2 0_0402_5% KSI0 TP_CLK


KSO5_SW R585 1 9012@ 2 0_0402_5% KSO5 TP_DATA

KB Conn.

100P_0402_50V8J
1 1
KSI[0..7] XEMC@ XEMC@
KSI[0..7] 25,27

C553
C551
KSO[0..17] 100P_0402_50V8J
KSO[0..17] 25,27 2 2

JKB1 JKB2
1 1
KSO0 1 KSO0 1 +3VALW_EC
KSO1 2 1 KSO1 2 1 C522
KSO2 3 2 KSO2 3 2 940@ 1 2
KSO3 4 3 KSO3 4 3 0.1U_0603_25V7K
KSO4 5 4 KSO4 5 4
KSO5_SW 6 5 KSO5_SW 6 5 U44 940@
KSO6 7 6 KSO6 7 6 1 5
KSO7 8 7 KSO7 8 7 VDD GND
KSO8 9 8 KSO8 9 8 ON/OFF 2 6
9 9 PWR_BTN# EC_ENT_RW EC_ENTERING_RW 27
KSO9 10 KSO9 10
KSO10 11 10 KSO10 11 10 F3_BTN 3 7 R586 1 940@ 2
11 11 BTN_A EC_IN_RW EC_IN_RW 9
KSO11 12 KSO11 12 0_0402_5%
KSO12
KSO13
13
14
12
13
KSO12
KSO13
13
14
12
13
4
BTN_B EC_RST#
8 R589 1 940@ 2
0_0402_5%
EC_RST# 25,27 To TP/B Conn.
KSO14 15 14 KSO14 15 14 9
KSO15 16 15 KSO15 16 15 PAD
KSO16 17 16 KSO16 17 16 SLG4N059VTR_TDFN8_2X2 +5VS
17 17
KSO17 18
18
KSO17 18
18
F3 + Power BTN --> Reset EC JTP2 0.1U_0402_16V4Z
KSI0_SW 19 KSI0_SW 19 1 C663 1 2 SW4 SW5
KSI1 20 19 KSI1 20 19 1 2 TP_DATA TJE-532QR5_4P TJE-532QR5_4P
20 20 2 TP_DATA 27
KSI2 21 KSI2 21 3 TP_CLK LEFT_BTN# 3 1 RIGHT_BTN# 3 1
21 21 3 TP_CLK 27
KSI3 22 KSI3 22 4
KSI4 23 22 KSI4 23 22 +3VALW_EC 4 5 RIGHT_BTN# 4 2 4 2
KSI5 24 23 KSI5 24 23 C523 940@ 5 6 LEFT_BTN#
KSI6 25 24 27 KSI6 25 24 27 0.1U_0603_25V7K U41 6

5
6

5
6
KSI7 26 25 G1 28 KSI7 26 25 G1 28 2 1 1 2 KSO5 7
26 G2 26 G2 VCC 1Y1 5 GND 8
3
KSO5_SW 1Y0 4 ON/OFF GND
2 E-T_6905-E26N-01R E-T_6905-E26N-01R KSI0_SW 9 1Z 1S CONN@ 2
2Z
CONN@ CONN@
2Y1
10 KSI0 ACES_88514-00601-071 100g for Press 100g for Press
SP01000IJ00 SP01000IJ00 6 7 F3_BTN SP010014M00
11 GND 2Y0 8 ON/OFF
PAD 2S
NX3L4684TK_MO-229-10_3X3
940@

KB BackLight Conn.
+5VS
JBL1
LED LED6 +3VALW
S

3 1 +5VS_BL 4 6 PWR_LED#
4 G2 PWR_LED# 26
3 5 27 BATT_BLUE_LED# BATT_BLUE_LED# 1 2 1 2
3 G1 D B

1
BL@ 2 Q17 R699 51_0402_5%
+5VALW Q44 1 2 2 L2N7002LT1G_SOT23-3
G

27 PWR_LED
2

DMG2301U-7_SOT23-3 1 G BATT_AMB_LED# 3 4 1 2
27 BATT_AMB_LED# A

2
1 BL@ 2KBL_EN_R ACES_50504-0040N-001 S R698 680_0402_5%

3
R451 1 CONN@ R452
100K_0402_5% @ SP01000Z300 100K_0402_5% LTST-C295TBKF-CA_AMBER-BLUE
1 @ 2 C525 LED7
R592 0.1U_0603_25V7K
1
D

1
1

0_0402_5% 2 PWR_LED# 1 2 1 2
2 C524 B R700 51_0402_5%
27 KBL_EN#
@ G 0.1U_0603_25V7K
Q26 S 2 +3VS PWR_SUSP_LED# 3 4 1 2
@ 27 PWR_SUSP_LED# A
3

3 L2N7002LT1G_SOT23-3 R701 680_0402_5% 3

HDD LED

2
+3VS LTST-C295TBKF-CA_AMBER-BLUE

+3VS R632 Need check CIS Symbol


10K_0402_5%

5
R740 LED4 U39 +3VS

1
51_0402_5% 2 LED8

P
B 5IN1_LED# 22
1 2 2 1 MEDIA_LED# 4
Y
A A
1
PCH_SATALED# 6 27 EC_WLAN_LED# EC_WLAN_LED# 1 2 1 2

G
A R702 499_0402_1%
LTST-C191TBKT-CA_BLUE MC74VHC1G08DFT2G_SC70-5

3
LTST-C191KFKT-2CA_ORANGE
+3VALW_EC +3VLP
ON/OFF BTN
2

R522
100K_0402_5%
940@
R534
100K_0402_5%
9012@
TPM Board CLKRUN# 1
JTPM1

2 LPC_AD3
8 CLKRUN# 1 2 LPC_AD3 27,7
27,8 PLT_RST# PLT_RST# 3 4 LPC_AD2
LPC_AD2 27,7
1

D24 5 3 4 6 CLK_PCI_TPM
5 6 CLK_PCI_TPM 7
2 7 8 LPC_FRAME#
ON/OFF 27 7 8 LPC_FRAME# 27,7 +3VS
25,26 ON/OFFBTN# ON/OFFBTN# 1 +3VALW 9 10 LPC_AD1
9 10 LPC_AD1 27,7 R392
3 51ON# +3VS 11 12 LPC_AD0
51ON# 32 11 12 LPC_AD0 27,7
13 14 LPCPD#_R 2 TPM@ 1
BAV70W_SOT323-3 15 13 14 16 SERIRQ
15 16 SERIRQ 27,9
4 10K_0402_5% 4
D 12/9 modify pin define
1

FOX_QT510166-L010-7H R444
EC_ON 2 CONN@ 8 LPCPD# 1 @ 2
27,35 EC_ON
G SP020011OA0 0_0402_5%
2

S Q39
3

R624 L2N7002LT1G_SOT23-3
10K_0402_5% 940@ Security Classification Compal Secret Data Compal Electronics, Inc.
940@ 2012/07/10 2013/07/10 Title
Issued Date Deciphered Date
KB & TP & TPM Connector & LED
1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
V5WE2 M/B LA-9532P Schematic
Date: Monday, April 08, 2013 Sheet 28 of 42
A B C D E
A B C D E

Int. Speaker Conn.


+5VS +VDDA JSPK1
J6 SPKR+ R527 1 @ 2 0_0603_5%
40mil SPK_R+ 1
40mil 1 2 40mil SPKR- R528 1 @ 2 0_0603_5% SPK_R- 2 1
2
1 SPKL+ R532 1 @ 2 0_0603_5% SPK_L+ 3 5
3 G1
C554 JUMP_43X118 4.75V SPKL- R533 1 @ 2 0_0603_5% SPK_L- 4
4 G2
6
EMC@ @
0.1U_0402_16V4Z ACES_88266-04001

3
2 CONN@ GND
SP02000K200
D27 D37
AZ5125-02S.R7G_SOT23-3 AZ5125-02S.R7G_SOT23-3
+VDDA XEMC@ XEMC@
(output = 300 mA)
1 GND 1

1
SM010014520 3000ma 220ohm@100mhz DCR 0.04 R523
+PVDD_HDA HP_PLUG#_1
40mil 100K_0402_5%

L33 2 1 0.1U_0402_16V4Z 0.1U_0402_16V4Z GND GND


+VDDA

2
HCB2012KF-221T30 0805 1 1 D

1
10U_0603_6.3V6M
C608
C558 C559 @
Q31
G
2 HP_PLUG#
C444
2 2
C445
GNDA Headphone Out
L2N7002LT1G_SOT23-3
2 2 2 S XEMC@ XEMC@ JHP1

3
330P_0402_50V7K 330P_0402_50V7K COM_MIC 4
1 1
GND GND
Place near Pin41 Place near Pin46 3
GNDA L36
HP_LEFT R238 1 2 60.4_0603_1% HPOUT_L_1 1 @ 2 0_0603_5% HPOUT_L_2 1
L55 1 @ 2 0.1U_0402_16V4Z +3VS_VDDA L38
+3VS
0_0603_5% 1 HP_RIGHT R237 1 2 60.4_0603_1% HPOUT_R_1 1 @ 2 0_0603_5% HPOUT_R_2 2
HD Audio Codec
1
10U_0603_6.3V6M
C605

C604 5

GNDA
2

2 HP_PLUG# 6 7

GNDA SINGA_2SJ3053-100111F
Place near Pin40 SM010030010 200ma 120ohm@100mhz DCR 0.2 CONN@
20mil +MIC2_VREFO COM_MIC DC230009K00
SM010030010 200ma 120ohm@100mhz DCR 0.2
+3VS_DVDD 0.1U_0402_16V4Z 10U_0603_6.3V6M L52 1 @ 2 +3VS HP_PLUG# GNDA

1
+AVDD1_HDA 0_0603_5%

2
R539
L54 1 @ 2 0.1U_0402_16V4Z 20mil 1
@ C582 1
1
C564 MIC2JD_1 2.2K_0402_5% D1
+VDDA
10U_0603_6.3V6M
C567

0_0603_5% 1 1 C636 Q28 @ R542 AZ5125-02S.R7G_SOT23-3


D
1

1
2 @ LBSS138LT1G_SOT-23-3 22K_0402_5% EMC@ 2

2
C561 C562 2 2 2 MIC2JD 1 2 COM_MIC
2 G
2

2 2 0.1U_0402_16V4Z S 1

2
0.1U_0402_16V4Z GND Place near Pin1, 9 C571
GNDA R543
26

40

41

46

36

1
1

9
Place near Pin25, 38 U34 10U_0603_6.3V6M 22K_0402_5%
2

CPVDD

DVDD

DVDD_IO
AVDD1

AVDD2

PVDD1

PVDD2
Internal MIC INT_MIC_R 2 1 INT_MIC C770 1 2 LINE2_C_L 24 GNDA

1
R726 1K_0402_5% 1U_0603_6.3V6M LINE2_L
1 2 C769 1 2 LINE2_C_R 23
C62 EMC@ 1000P_0402_50V7K 1U_0603_6.3V6M LINE2_R 35mA 42 SPKL+
GNDA C568 1 2 MIC2_C_L 17 68mA 600mA SPK_OUT_L+
GNDA GNDA GND
COM_MIC 2 1 COM_MIC_R 2.2U_0603_6.3V6M~N MIC2_L
Combo MIC
R540 1K_0402_5% C569 1 2 MIC2_C_R 18 43 SPKL-
2.2U_0603_6.3V6M~N MIC2_R SPK_OUT_L-
22 45 SPKR+
LINE1_L SPK_OUT_R+
21
LINE1_R 44 SPKR-
19 SPK_OUT_R-
MIC1_L 32 HP_LEFT
20 HPOUT_L +INTMIC_VREFO
MIC1_R 33 HP_RIGHT
35 HPOUT_R
1 SM010004010 300ma 70ohm@100mhz DCR 0.3
CBN
Int. MIC

1
SDATA_IN
8 HDA_SDIN0_AUDIO 1 R547 2 HDA_SDIN0 6 For EMI
C570 33_0402_5% R417
2.2U_0402_6.3V6M 37 5 10K_0402_5%
2 CBP SDATA_OUT HDA_SDOUT_AUDIO 6
29 10
15mil JMIC1
+MIC2_VREFO HDA_SYNC_AUDIO 6 15mil

2
MIC2_VREFO SYNC INT_MIC_R 1 @ 2 INT_MIC_R_1 1
10mil 11 HDA_RST_AUDIO# L51 0_0603_5% 2 1
RESETB HDA_RST_AUDIO# 6 2
30 1
3 MIC1_VREFO_R 6 C550 3
+INTMIC_VREFO 10mil31 BCLK HDA_BITCLK_AUDIO 6
XEMC@ 3
MIC1_VREFO_L XEMC@ 220P_0402_50V7K 4 G1
C584 1 2
10mil27 1 XEMC@ 2 1 2 C573
For EMI 2 G2
GNDA LDO1_CAP
10U_0603_6.3V6M R548 0_0402_5% 22P_0402_50V8J ACES_88266-02001_2P
GNDA C574 1 2 39 GND GND CONN@
10U_0603_6.3V6M LDO2_CAP 2
GPIO0/DMIC_DATA SP020008Y00
GND C583 1 2 7
10U_0603_6.3V6M LDO3_CAP 3
R546 2 1 20K_0402_1% 15 GPIO1/DMIC_CLK
GNDA JDREF GNDA
47
PD# EC_MUTE# 27
Place near
codec GND
C575 1 2 2.2U_0402_6.3V6M CPVEE 34 12 MONO_IN 2 1 BEEP#_R 1 @ 2
CPVEE PCBEEP BEEP# 27
HP_PLUG#_1 R545 2 1 39.2K_0402_1% SENSE_A
10mil13 16 C555 R529
MIC2JD_1 R549 2 @ 1 20K_0402_1% 14 SENSE A MONO_OUT 38 1U_0402_6.3V6K 47K_0402_5%
SENSE B AVSS2
2

28 CODEC_VREF 1 1 2
MIC2JD 48 VREF XEMC@ PCH_SPKR 9
SPDIFO 10mil 1 1 1
2.2U_0402_6.3V6M
C577

R531
4.7K_0402_5%

C556
@ 100P_0402_50V8J R530
0.1U_0402_16V4Z
C576

10U_0603_6.3V6M
C578@

4 25 47K_0402_5%
DVSS AVSS1 2
1

49 2 2 2
GND
ALC3225-CG_MQFN48_6X6

GND
GNDA Place next pin27 GNDA
J7 J14
JUMP_43X39 JUMP_43X39
4 1 2 1 2 4
@ 1 2 @ 1 2
GNDA
J11 J12
JUMP_43X39 JUMP_43X39
1 2 1 2
@ 1 2 @ 1 2

GND GNDA GND GNDA


Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2012/07/10 Deciphered Date 2013/07/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HD Audio Codec ALC3225
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
V5WE2 M/B LA-9532P Schematic
Date: Monday, April 08, 2013 Sheet 29 of 42
A B C D E
FAN1 Conn
+5VS C632
4.7U_0603_10V6K H3 H4 H5 H6 H9 H10 H11 H12 H17 FD1 FD2
1 2 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0

@ @

1
U31

1
1 8 FIDUCIAL_C40M80 FIDUCIAL_C40M80
2 EN GND 7
+VCC_FAN1 3 VIN GND 6 FD3 FD4
2 @ 1 4 VOUT GND 5 @ @ @ @ @ @ @ @ @
27 EN_DFAN1 VSET GND
R515 1 AP2113AMTR-G1_SO8 H13 H14 H15 H24 H20 H16 @ @

1
0_0402_5% @ H_4P0 H_4P0 H_4P0 H_4P0 H_3P2 H_3P2
C626 FIDUCIAL_C40M80 FIDUCIAL_C40M80
0.1U_0402_16V4Z
2

1
C627 @ @ @ @ @ @
4.7U_0603_10V6K
+3VS 1 2 H21 H22 H23
H_3P0 H_2P5N H_2P5X3P5N
@ C631
1

1000P_0402_50V7K
R516 1 2 @ @ @

1
10K_0402_5%
40mil JFAN1
2

+VCC_FAN1 1
2 1 4
27 FAN_SPEED1 2 GND
3 5
3 GND
1 XEMC@
C630
1000P_0402_50V7K ACES_88231-03041
CONN@
2
SP020020710

+3VS
1

R518 +3VS
10K_0402_5%
GSEN@ U2 GSEN@
1 C633 1 2 10U_0603_6.3V6M
2

8 Vdd_IO GSEN@
4 CS 14 C628 1 2 0.1U_0402_16V4Z
27,7 EC_SMB_CK2 SCLSPC Vdd
27,7 EC_SMB_DA2 6
7 SDA/SDI/SDO
R519 1 @ 2 10K_0402_5% SDO/SA0 11 G_SEN_INT
+3VS INT1 G_SEN_INT 27
R520 1 GSEN@ 2 10K_0402_5% 16 9
15 ADC1 INT2
13 ADC2 10
ADC3 RES
2
3 NC 5
NC GND 12
GND
LIS3DHTR_LGA16_3X3
GSEN@

LIS3DH
SA0 ->0, Address is 0011 000 (0x30h)
SA0 ->1, Address is 0011 001 (0x32h)

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2012/07/10 Deciphered Date 2013/07/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FAN & Screw Hole & G-Sensor
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
V5WE2 M/B LA-9532P Schematic
Date: Monday, April 08, 2013 Sheet 30 of 42
A B C D E

Normall Platform (Not support M-STATE and Deep Sleep)

+5VALW TO +5VS
+5VALW +5VS
1 U33 35V@ 1
DMN3030LSS-13_SOP8L-8
8 1
7 2

2
4.7U_0603_10V6K
C587

1U_0402_10V6K
C588
6 3 1 1
4.7U_0603_10V6K
C585

4.7U_0603_10V6K
C586
1 1 5 R551 U11 @ J36
470_0603_5% +3VALW 1 14 1 2 +3VS
35V@ 35V@ 2 VIN1 VOUT1 13 1 2

4
35V@ 2 2 VIN1 VOUT1 C976 JUMP_43X118

1
2 2 +5VS_R SUSP# 2 1 3VS_ON 3 12 2 1 330P_0402_50V7K
R927 47K_0402_5% ON1 CT1

3
2 1 +5VALW 4 11
C980 0.1U_0402_16V7K VBIAS GND
20mil 10mil 1 @ 2 5VS_ON 5 10 2 1
2 35V@ 1 5VS_GATE 5 SUSP R926 0_0402_5% ON2 CT2 330P_0402_50V7K
+VSB
R553 +5VALW 6 9 C967 @ J37
100K_0402_1% Q30B 35V@ 1@ 2 7 VIN2 VOUT2 8 1 2
1 +5VS

4
VIN2 VOUT2 1 2
6

35V@ C592 DMN66D0LDW-7_SOT363-6 C979 0.1U_0402_16V4Z


0.1U_0603_25V7K 15 JUMP_43X118
GPAD EMC@1 2
2

Q30A
SUSP 2

35V@
Reserved TPS22966DPUR_SON14_2X3 C995
EMC@1
C996
2
22U_0805_6.3V6M

22U_0805_6.3V6M
1

DMN66D0LDW-7_SOT363-6

2 +3VALW TO +3VS 2

+3VALW +3VS
U35 35V@
DMN3030LSS-13_SOP8L-8
8 1
7 2 +1.35V +5VALW

2
4.7U_0603_6.3V6K
C594

4.7U_0603_6.3V6K
C595

4.7U_0603_6.3V6K
C596

2 2 6 3 2 1
1U_0402_6.3V6K
C597
5 R558

2
470_0603_5%
35V@ 35V@ 35V@ R573 R554
4

1 1 1 2 470_0603_5% 100K_0402_5% +1.8VS


6 1

+3VS_R 35V@ 35V@

2
10mil SYSON# 35V@
20mil R568
+VSB 2 35V@ 1 3VS_GATE 2 SUSP +1.35V_R 470_0603_5%

3
Q40A Q40B
R559 1 Q32A 35V@ DMN66D0LDW-7_SOT363-6 DMN66D0LDW-7_SOT363-6
1

1
3

150K_0402_1% 35V@ C598 DMN66D0LDW-7_SOT363-6 35V@ 35V@ +1.8VS_R


0.1U_0603_25V7K SYSON# 2 5
SYSON 27,36
D

1
SUSP 5 2

4
2
20 6511_PWR_EN#
Q32B 35V@ G
4

DMN66D0LDW-7_SOT363-6 Q38 S

3
L2N7002LT1G_SOT23-3
3VS_GATE 11
35V@
3 3

+5VALW +5VALW
+0.675VS +1.05VS_VTT

+3VALW TO +3VALW(PCH AUX Power)

2
R552 R561 35V@ 35V@
Short J5 for PCH VCCSUS3.3 100K_0402_5% 100K_0402_5% R566 R567
35V@ 35V@ 22_0603_5% 470_0603_5%

1
+3VALW +3VALW_PCH SUSP
36 SUSP

1
PCH_PWR_EN# +0.675VS_R +1.05VS_VTT_R
Q29
J5 @ 40mil L2N7002LT1G_SOT23-3
D D D D
1

1
20mil 1 2 35V@ 35V@
1 2 2 2 Q33 SUSP 2 2
SUSP
27,34,36,37,38 SUSP# 27 PCH_PWR_EN
4.7U_0603_6.3V6K
C590

2 JUMP_43X79 2 1 EMC@ G G 2N7002K_SOT23-3 G G


1

1
1U_0402_6.3V6K
C591

10U_0603_6.3V6M
C997

@ @ @ S S Q36 S Q37 S
3

3
C589 R555 35V@ L2N7002LT1G_SOT23-3 L2N7002LT1G_SOT23-3
4.7U_0603_6.3V6K 10K_0402_5% R563 35V@ 35V@
2

1 1 2 35V@ 100K_0402_5%
2

2
4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2012/07/10 Deciphered Date 2013/07/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DC Interface
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
V5WE2 M/B LA-9532P Schematic
Date: Monday, April 08, 2013 Sheet 31 of 42
A B C D E
A B C D

+5VS
1 VIN 1

CONN@ PJP101 EMI@ PL101


ACES_50305-00441-001_4P HCB2012KF-121T50_0805
DC_IN_S1 1 2
1 +3VALW
2
3
4
GND
1

1
GND ESD@ PC101 EMI@ PC102 EMI@ PC104 @ PR102
0.1U_0603_25V7K 100P_0603_50V8 1000P_0603_50V7K 27,33,4 H_PROCHOT# 47K_0402_1% @ PR103
2

2
10K_0402_1%

2
8
@ PC105
D

6
0.022U_0402_16V7K 3

P
+ BATT_TEMP 27,33
2 2 1 1
@ PQ101A G O 2
-

G
DMN66D0LDW-7_SOT363-6 @ PU102A

1
S LM393DR_SO8

4
@ PD102

1
LL4148_LL34-2 @ PR104

1
1.5M_0402_5%
@ PC106 @ PR101

2
100P_0402_50V8J 100K_0402_1%

2
1
2 VIN H_PROCHOT#
PR106
@
47K_0402_1%
2

@ PU102B

2
2

8
@ PC107 LM393DR_SO8
D

3
@ PD101 0.022U_0402_16V7K 5

P
LL4148_LL34-2 5 2 1 7 +
@ PQ101B G O 6
- ACIN 27,34,8

G
930@ PD104 DMN66D0LDW-7_SOT363-6

1
LL4148_LL34-2 @ PJ101 S

4
2 1 1 2 @ PD103
1 2

1
BATT+ JUMP_43X39 @ PR108 @ PR109
LL4148_LL34-2 @ PR107
1.5M_0402_5%
68_1206_5% 68_1206_5%

2
930@ PQ102
TP0610K-T1-E3_SOT23-3
2

2
N1 3 1
VS
1

930@ PR110 @ PC109


100K_0402_1% 930@ PC108 0.1U_0603_25V7K
0.22U_0603_25V7K
2

930@ PR111
2

22K_0402_1%
1 2
28 51ON#

3 3

@ PR105
0_0402_5%
1 2
+3VLP +CHGRTC

- PBJ101 @ + PR113
560_0603_5%
PR112
560_0603_5%
2 1 1 2 1 2 +RTCBATT

ML1220T13RE

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2012/07/10 Deciphered Date 2013/07/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DCIN
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom V5WE2 M/B LA-9532P Schematic 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, April 08, 2013 Sheet 32 of 42
A B C D
A B C D

+3VLP

1
@ PC209

1
0.1U_0603_25V7K

2
1
CONN@ PJP201 1

WAFER SUYIN 200109MS020G209ZR 20P P2 EMI@ PL201 @ PR229 @ PR230

BATT+ <45,47>
HCB2012KF-121T50_0805 10K_0402_1% 10K_0402_1%
1 2 BATT_S1 1 2

2
1 2

1
3 4 @ PU204
3 4 @ PR231 1 8
VCC TMSNS1

1
5 6 100K_0402_1%
5 6 EMI@ PC202 2 7 2 1
7 8 1000P_0402_50V7K GND RHYST1

2
7 8

1
MAINPWON 3 6 @ PR232
9 10 OT1 TMSNS2 47K_0402_1%
9 10 4 5 @ PH202
11 12 OT2 RHYST2 100K_0402_1%_NCP15WF104F03RC
PR202 100_0402_1% 11 12 G718TM1U_SOT23-8

2
2 1 EC_SMCK 13 14 BI
27,34 EC_SMB_CK1 13 14
PR201 100_0402_1%
2 1 EC_SMDA 15 16 TH 2 1
27,34 EC_SMB_DA1 15 16 +3VLP
PR206
17 18 6.49K_0402_1%
17 18 1 2
BATT_TEMP 27,32

1
19 20 PR208
19 20 1K_0402_1%
PR203
1K_0402_1%

2
2 2

For KB9012
OTP
For KB9012
sense 20m
Active Recovery

92 1.2V, Active 65W 84W,1.2V 56W,0.793V

56 2.255V, Recovery 90W 117W,1.2V 77W,0.791V


@ PQ202
TP0610K-T1-E3_SOT23-3

3 1 +VSBP
PH201 under CPU botten side : 120W
B+
CPU thermal protection at 92 degree C ( shutdown )
0.22U_0603_25V7K

0.1U_0603_25V7K
1

Recovery at 56 degree C
1

+3VLP +EC_VCCA
PC205

PC206

@ PR211
27 EC_SPOK
100K_0402_1%
2

3 3

@ PR212 @ @
2

22K_0402_1% ADP_I 27,34


VL 2 1
65W@ PR218

1
4.87K_0402_1%
1

@ PC207 @ PR214 PR228

1
@ PR213 0.1U_0603_25V7K 21K_0402_1% 12.4K_0402_1% 90W@ PR218

2
1
100K_0402_1% 10.5K_0402_1%
@ PR217 @ PU201

2
@ PR219 @ PR216 100K_0402_1% 1 8
2

D VCC TMSNS1
1

0_0402_5% 100K_0402_1%

2
1 2 2 27,32,4 H_PROCHOT# 2 7 2 1 VCIN0_PH 27
2
35 SPOK G @ PQ203 GND RHYST1 @ PR220
2N7002KW_SOT323-3
D 27,35 MAINPWON MAINPWON 3
~OT1TMSNS2
6 9.53K_0402_1%
1

S
3

@ PC208 2 1 2 4
~OT2 RHYST2
5 1 2 VCIN1_PROCHOT 27
1U_0402_6.3V6K G
2

@ PQ204 @ PR221 G718TM1U_SOT23-8 @ PR222 @ PR204


S 2N7002KW_SOT323-3 1_0402_1% 16.2K_0402_1% 127K_0402_1%
3

1
1 2 H_PROCHOT#_EC 27
PH201

1
100K_0402_1%_NCP15WF104F03RC @ PR222
@ PJ201 B value:4250K1% 10.5K_0402_1%
1 2 PR225
+VSBP +VSB

2
1 2 10K_0402_1%
JUMP_43X39

2
1

1_0402_1%
PR227
0_0402_5%
PR226
For 65W adapter==>action 70W , Recovery 54W @
4 4

2
2
For 90W adapter==>action 97W , Recovery 75W
27 ECAGND
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2012/07/10 Deciphered Date 2013/07/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
BATTERY CONN / OTP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
V5WE2 M/B LA-9532P Schematic
Date: Monday, April 08, 2013 Sheet 33 of 42
A B C D
A B C D

for reverse input protection


D

1
2 PQ301
G 2N7002KW_SOT323-3
S

3
PQ304
SIS412DN-T1-GE3_POWERPAK8-5
1 2 1 2 1
2
1
PR302 PR301 5 3 1
1M_0402_5% 3M_0402_5%
100ppm

0.01U_0402_50V7K
VIN PQ302 P1 PQ303 P2 B+ CHG_B+

4
AON6414AL_DFN8-5 SIS412DN-T1-GE3_POWERPAK8-5 PR303

1_0402_1%
1 1 0.02_1206_1% EMI@ PL301

PC308

PR305
1
2 2 1.2UH_PNS40201R2YAF_3A_30%
5 3 3 5 1 4 1 2

2200P_0402_50V7K
4x4x2

2
0.1U_0402_25V6
2 3
2200P_0402_50V7K

10U_0805_25V6K

10U_0805_25V6K

2
0.1U_0402_25V6
4

4
1

1
1_0402_1%

PC303

PC304

@EMI@ PC305

EMI@ PC307
PR304 BQ24735_BATDRV 1 2
1

1
VIN
PC301

PC302
PC306 PR306

2
0.1U_0402_25V6 4.12K_0603_1%
2

2
@ 1 2
2

2
0.1U_0603_25V7K

0.1U_0402_25V6
PD302
BAS40CW_SOT323-3

1
PC311

PC309
2

1
4.12K_0603_1%

4.12K_0603_1%
PC310
0.047U_0402_25V7K
1

1 2
PR307

PR308

5
10_1206_1%

0_0603_5%
1

PR310
PR309
2

PR311 PQ305
0_0603_5% SIS412DN-T1-GE3_POWERPAK8-5

BQ24735_ACN
BQ24735_ACP
2 2

BQ24735_BST 2

1
DH_CHG 1 2 DH_CHG-1 4

BQ24735_LX
1 2 PD303

DH_CHG
RB751V-40_SOD323-2
PC312 PL302 PR312

3
2
1
1U_0603_25V6K 1 2 10UH_FDSD0630-H-100M-P3_3.8A_20% 0.01_1206_1%
BQ24735_LX 1 2 CHG 1 4 BATT+
PC313

5
2 3

680P_0402_50V7K 4.7_1206_5%
1U_0603_25V6K

20

19

18

17

16

SIS412DN-T1-GE3_POWERPAK8-5

EMI@ PR313
PU301

1 CSOP1

1 CSON1
VCC

PHASE

HIDRV

REGN
BTST

10U_0805_25V6K

10U_0805_25V6K
21

0.1U_0402_25V6

0.1U_0402_25V6
PAD

PC314

PC317

PC315

PC318
1

1
PQ306
1 15 DL_CHG 4

2
ACN LODRV

2
1

EMI@ PC316
2 14
ACP GND PR314

3
2
1
BQ24735RGRR_QFN20_3P5X3P5 10_0603_5%

2
BQ24735_CMSRC 3 13 SRP 1 2 CSOP1
CMSRC SRP

0.1U_0603_25V7K
PC321
BQ24735_ACDRV 4 12 SRN 1 2 CSON1

2
ACDRV SRN PR315
6.8_0603_5%
+3VLP 1 2 ACOK 5 11 BQ24735_BATDRV
PR316 ACOK ACDET BATDRV
100K_0402_1%
IOUT

SDA

ILIM
SCL
3 27,32,8 ACIN 3
6

10
ACDET PR317
316K_0402_1%
2 1 +3VALW
1

100K_0402_1%
1
PR318 VIN

0.01U_0402_25V7K
PC322
PR320

1
2M_0402_1%

Vin Dectector
2

2
2
1
1

PR321
PR322
422K_0402_1%
Min. Typ Max.
2M_0402_1% L-->H 17.520V 18.006V 18.504V
H-->L 16.967V 17.593V 18.237V
2
1 2

ACDET
2200P_0402_50V7K

PQ307
ILIM and external DPM
1

PR323 PDTC115EU_SOT323-3 EC_SMB_CK1 27,33


1
PC326

100K_0402_1% PR324
27 FSTCHG
1 2 2 64.9K_0402_1%
EC_SMB_DA1 27,33 Min. Typ Max.
2

@ PR325 Close EC 3.906A 4.006A 4.108A


2

PQ308 0_0402_5%
D
1

2N7002KW_SOT323-3 2 1 1 2
ADP_I 27,33
3

2
7,31,36,37,38 SUSP#
1

G PC324 @ PC325
4
100P_0402_50V8J 0.1U_0402_16V7K 4

S
3

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2012/07/10 Deciphered Date 2013/07/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CHARGER
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
V5WE2 M/B LA-9532P Schematic
Date: Monday, April 08, 2013 Sheet 34 of 42
A B C D
5 4 3 2 1

D D

@ PR415
0_0402_5%
1 2

EN1 and EN2 dont't floating PR410


PU401 1K_0402_1%
B+ EMI@ PL401 7 1 3V_EN_R 1 2 3V5V_EN @ PR413 PR401
HCB2012KF-121T50_0805 IN EN1 0_0402_5% 499K_0402_1%

4.7U_0603_6.3V6K
1 2 3V_VIN 8 3 FB_3V 1 2 ENLDO_3V5V 1 2
IN EN2 B+

2200P_0402_50V7K

10U_0805_25V6K

10U_0805_25V6K
0.1U_0402_25V6

4.7U_0603_6.3V6K
PR404 PC401

1
150K_0402_1%
PC426
6 1
BST_3V 2BST-1_3V
1 2 PC428 0.01U_0402_25V7K PR414 1K_0402_1%
BS

1
@EMI@ PC403

EMI@ PC410

PC408

PC405

PC425

PR405
0_0603_5% 1 2 FB-1_3V 1 2
1

1
0.1U_0603_25V7K

2
@ PL402

2
@ 10 LX_3V 1 2 @
+3VALWP
2

2
LX

@EMI@ PR409
9 4 1UH_FDSD0630-H-1R0M-P3_11A_20%
GND OUT

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
1

1
680P_0603_50V7K 4.7_1206_5%
2 5
+3VALWP PG LDO +3VLP

PC411

PC416

PC414

PC413
1
SY8208BQNC_QFN10_3X3

2
PC422

13V_SN
4.7U_0603_6.3V6K

2
1

PR416
100K_0402_1%
C C

3.3V LDO 150mA~300mA

@EMI@ PC423
2

2
Vout is 3.234V~3.366V
33 SPOK

TDC=8A
@ PJ401
+3VALWP 1 2 +3VALW
1 2
JUMP_43X118

1ENLDO_3V5V
@ PR411
0_0402_5%
B+ EMI@ PL404
HCB2012KF-121T50_0805 PU402

2
1 2 5V_VIN 8 1 3V5V_EN PC427 PR412
IN EN1
2200P_0402_50V7K
10U_0805_25V6K

10U_0805_25V6K

0.1U_0402_25V6

6800P_0402_25V7K 1K_0402_1%
3 FB_5V 1 2 FB-1_5V 1 2
EN2 PR403 0_0603_5% PC404 0.1U_0603_25V7K
1

1
PC406

PC407

EMI@ PC409

@EMI@ PC402

B 6 BST_5V 1 2BST-1_5V 1 2 B
BS
2

@ PL403
9 10 LX_5V 1 2 +5VALWP
GND LX
VCC_3.3V 5 4 1UH_FDSD0630-H-1R0M-P3_11A_20%
VCC OUT
1

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
680P_0603_50V7K 4.7_1206_5%

1
@EMI@ PC424 @EMI@ PR408

SPOK 2 7
PG LDO VL
1

PC420

PC417

PC418

PC415

PC412
4.7U_0603_6.3V6K

SY8208CQNC_QFN10_3X3

2
15V_SN
2

2
1

PC421
4.7U_0603_6.3V6K
2

@ PJ402
+5VALWP 1 2 +5VALW
2

1 2
JUMP_43X118
Vout is 4.998V~5.202V
5V LDO 150mA~300mA TDC=8A
PR407
2.2K_0402_5%
1 2
27,28 EC_ON
@ PR402
1 2
27,33 MAINPWON 0_0402_5%
A A

3V5V_EN
1M_0402_1%

4.7U_0603_6.3V6K
1

1
PR406

PC419

Security Classification Compal Secret Data Compal Electronics, Inc.


2

@ 2012/07/10 2013/07/10 Title


Issued Date Deciphered Date
2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
3VALW/5VALW
EN1 and EN2 dont't floating AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom V5WE2 M/B LA-9532P Schematic 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, April 08, 2013 Sheet 35 of 42
5 4 3 2 1
A

+1.35VP EMI@ PL507


HCB2012KF-121T50_0805
Ipeak = max{ 0.7*Ibudget, 1st +2nd max loading} 1.35V_B+ 2 1 B+
Ipeak = max{ 12.34*0.7 , 4.2+8.14 }

2200P_0402_50V7K
10U_0805_25V6K

0.1U_0402_25V6
Ipeak=12.34A ; 1.2Ipeak=14.808A ;Imax=8.638A
1/2Delta I=0.7353A (F=300K Hz)

1
PC502

EMI@ PC503

ESD@ PC521
PR504=(1.2Ipeak-1/2Delta I) *Rds(on)(max)*1.2/9uA=8.45Kohm

5
choose PR504=8.45Kohm (for safety >1.2Ipeak)

MDV1525URH_PDFN33-8-5

2
Rds(on)=5.0m ohm(max) ; Rds(on)=4.2m ohm(typical) +1.35VP
Ilimit_min=(8.366K*9uA)/(5.0m*1.2)=15.058A

PQ502
Ilimit_max=(8.535K*11uA)/(4.2m*1.2)=22.352A UG_1.35V 4
Iocp=Ilimit+1/2Delta I=15.79A~23.09A

JUMP_43X79
PJ503
Iocp(min)>1.2Ipeak

1
2011/9/19

3
2
1
2
@

2
OVP=110% 115% 120% PR502
2.2_0603_5%
PC504
0.1U_0603_25V7K
PL501
S COIL 1.5UH 20% TMPB0604M-1R5MN-Z01 11A
BST_1.35V 2 1 BST_1.35V-1 2 1 1 2
+0.675VSP 6.6x7.3x3.8 TAI-TECH +1.35VP

S TR MDU1512RH 1N POWERDFN56-8
Output Cap PAD

10U_0805_25V6K

10U_0805_25V6K
LX_1.35V

1
DCR:8.5m

5
20

19

18

17

16
1

1
PC501

PC505
PU501 ESD@ PR503
4.7_1206_5% 1

VTT

VLDOIN

BOOT

UGATE

PHASE
21
2

2
PAD

PQ503
+ PC506
1 15 LG_1.35V 4 330U_2.5V_M
VTTGND LGATE

1
ESD@ PC507
680P_0402_50V7K 2
2 14

2
VTTSNS PGND PR504

3
2
1
8.45K_0402_1%
3 13 2 1
GND RT8207MZQW_WQFN20_3X3 CS

4 12 Rds=4.2m(Typ)
+VTT_REFP VTTREF VDDP
5.0m(Max)
5 11 2 1
+1.35VP VDDQ VDD
+5VALW

PGOOD
PR505
+3VALW
1

1U_0603_10V6K
5.1_0603_5% @ PJ504

TON
@ PR513 PC508 +1.35VP 1 2 +1.35V

FB

S3

S5
0.033U_0402_16V7K 1 2

10K_0402_1%
0_0402_5%
2

1
PC509
15 DDR_VTT_PG_CTRL 1 2 JUMP_43X118

S3_1.35V 7

S5_1.35V 8

10

PR506
PC510
1U_0603_10V6K @ PJ505

2
@ PR501 1 2
680K_0402_1% @ 1 2

2
7,31,34,37,38 SUSP# 1 2 PGOOD_1.35V JUMP_43X118

@ PR507 PR508
0_0402_5% 887K_0402_1%
1 27,31 SYSON 1 2 2 1 1.35V_B+
1
@ PJ506
2
1

PR509 +0.675VSP 1 2 +0.675VS


8.06K_0402_1% JUMP_43X79
1

@ PC512 2 1
0.1U_0402_16V7K
@ PQ501 D FB=0.75V
1

2
1

2N7002KW_SOT323-3
2 To GND = 1.5V
31 SUSP SUSP
G
@ PC511
0.1U_0402_16V7K PR510 To VDD = 1.8V
2

10K_0402_1%
S
3

STATE S3 S5 1.35VP VTT_REFP 0.675VSP


S0 Hi Hi On On On
Off
S3 Lo Hi On On (Hi-Z)

S4/S5 Lo Lo Off Off Off


(Discharge) (Discharge) (Discharge) Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2012/07/10 Deciphered Date 2013/07/10 Title

Note: S3 - sleep ; S5 - power off THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
1.35VP/0.675VSP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
V5WE2 M/B LA-9532P Schematic
Date: Monday, April 08, 2013 Sheet 36 of 42
A
5 4 3 2 1

D D

C C

+3VS

1
@ PC526
1U_0402_6.3V6K

2
Note:Iload(max)=3A
PU503
APL5930KAI-TRG_SO8
6
VCNTL

0.022U_0402_16V7K
5 3
B 9 VIN VOUT 4 +1.5VSP B
VIN VOUT

1
1
PC528 8
EN

1
PC529

22U_0805_6.3V6M

22U_0805_6.3V6M
4.7U_0603_6.3V6K 7 2 PR519

GND
POK FB 20K_0402_1%

1
FB=0.8V

PC525

PC524
1
@ PR523 FB_1.5VSP
0_0402_5%

2
1 2 +1.5VSP_ON @
27,31,34,36,38 SUSP#

1
1
PR521
1

@ PR522 22.6K_0402_1%
PC527 22K_0402_5%

2
0.1U_0402_16V7K
2

Ien=10uA, Vth=0.3V, notice


the res. and pull high
A
@ PJ508 voltage from HW A
1 2
+1.5VSP 1 2 +1.5VS
JUMP_43X39

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2012/07/10 Deciphered Date 2013/07/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+1.5VSP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. V5WE2 M/B LA-9531P Schematic
Date: Monday, April 08, 2013 Sheet 37 of 42

5 4 3 2 1
5 4 3 2 1

+1.05VSP Ipeak=5.36A ; Imax=3.752A ; 1.2Ipeak=6.432


Delta I=0.xxxxA=>1/2Delta I=0.xxxxA,F= 800K Hz(typ)

PR603
D 1K_0402_1% D
2 1 SUSP# 27,31,34,36,37

@ PR607
1M_0402_1%
1 2

B+ PC606
PU601 0.1U_0402_16V7K

2200P_0402_50V7K
8 1 EN_+1.05VSP PR602 PC605 1 2
IN EN

10U_0805_25V6K

10U_0805_25V6K
0_0603_5% 0.1U_0603_25V7K

0.1U_0402_25V6
6 BST_+1.05VSP 1 2 1 2 PL601
BS

1
@EMI@ PC602

EMI@ PC603

PC604

PC623
0.68UH_PCMC063T-R68MN_15.5A_20%
9
GND LX
10 SW_+1.05VSP 1 2 +1.05VSP

2
4

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
FB_+1.05VSP
FB

1
1

PC624

PC625

PC626

PC627

PC628

PC629
+3VS 1 2 3 7
@ PR613 ILMT BYP
+3VALW

2
1
10K_0402_1% 2 5 @EMI@ PR604
PG LDO

1
PR619 4.7_0805_5% @
@ PC614 1M_0402_1% SY8208DQNC_QFN10_3X3

1 2
0.1U_0402_16V7K
2 @EMI@ PC607

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K
2
680P_0402_50V7K

2
1

1
PC601

PC608
C PR618 C
10K_0402_1% PR605

2
+3VS 2 1 100K_0402_1%
2 1 @ PJ602
PC609 1 2
+1.05VSP 1 2 +1.05VS_VTT
VFB=0.6V 4700P_0402_25V7K
11,27 VCCST_PWRGD 2 1 JUMP_43X118
@ PJ603
1 2
1 2

1
JUMP_43X118
PR608
127K_0402_1%

2
+3VS
1

@ PC615
1U_0402_6.3V6K
2

Note:Iload(max)=3A
PU602
APL5930KAI-TRG_SO8
B
6 B
5 VCNTL 3
0.022U_0402_16V7K

9 VIN VOUT 4 +1.8VS


VIN VOUT
1
1

PC610 8
EN
1
PC611

7 2 22U_0805_6.3V6M

22U_0805_6.3V6M
4.7U_0603_6.3V6K PR609
GND

POK FB 20K_0402_1%
2

1
FB=0.8V
PC613

PC612
1

@ PR610 FB_1.8VSP
0_0402_5%
2

20 6511_PWR_EN 1 2 +1.8VSP_ON @
1
1

PR611
1

@ PR612 15.8K_0402_1%
@ PC616 22K_0402_5%
2

0.1U_0402_16V7K
2

Ien=10uA, Vth=0.3V, notice


the res. and pull high
voltage from HW
A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2012/07/10 Deciphered Date 2013/07/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+1.05VSP/1.8VSP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
V5WE2 M/B LA-9532P Schematic
Date: Monday, April 08, 2013 Sheet 38 of 42
5 4 3 2 1
5 4 3 2 1

51622_VREF

1
150K_0402_1% 100K_0402_1%

39K_0402_1% 270K_0402_1%

150K_0402_1% 8.87K_0402_1%
1

1
PH705

PR702

PR703

PR704
100K_0402_1%_TSM0B104F4251RZ
CPU_B+
B value:4250K Close MOS.
EMI@ PL701

2
PC748 @ HCB2012KF-121T50_0805

2
PR708 4700P_0402_25V7K 2 1 B+

2200P_0402_50V7K
10K_0402_1% 1 2

1
2 1 THERM

10U_0805_25V6K

10U_0805_25V6K

10U_0805_25V6K

0.1U_0402_25V6

68U_25V_M_R0.36
1

PR705

PR706

PR707

1
PC747 +

PC702

PC703

PC709

EMI@ PC704

@EMI@ PC705

PC706
0.1U_0402_25V6 PR709 PR710
D 2 1 392K_0402_1% 56K_0402_1% D

2
1 2 1 2 2
@ PR711 @
10K_0402_1%
1 2 SLEWA OCP-I

1
PR712 B-RAMP
39K_0402_1% EMI@ PC749
2 1 F-IMAX 1000P_0402_50V7K

2
O-USR PU702
PR713 CSD97374CQ4M_SON8_3P5X4P5 +CPU_CORE
10K_0402_1% PR701 2.2_0603_5% 5 1 SKIP#
CPU_B+ 1 2 VBAT 2 1CPU_BOOT1 6 VIN SKIP# 2
+5VS PL702
PC701 0.1U_0603_25V7K BOOT_R VDD 3 0.22UH_PCMB104T-R22MS_35A_20%
1 2CPU_BOOT1-1 7 PGND1 4 CPU_PHASE1 1 4
PWM1 8 BOOT VSW
9 PWM

1
CSP1-1 2 3

680P_0402_50V7K 4.7_1206_5%
PGND2

EMI@ PR714
PC740

1
1U_0603_10V6K DCR:0.82m5%

2.21K_0402_1%
2

PR715
PR716

1 2
24.9K_0402_1%

2
1 2
16

15

14

13

12

11

10

EMI@ PC714
PH702 PR717
10K_0402_1%_TSM0A103F34D1RZ
VBAT

IMON
THERM

OCP-I

O-USR
SLEWA

B-RAMP

F-IMAX

2
3.01K_0402_1%
1 2 1 2
CSP1 17
CSP1 VR_ON
8
VR_ON 11 Close choke.
PC711 B value:3435K
CSN1 18 7 SKIP# 0.082U_0402_16V7K
CSN1 SKIP#

1
@ PR718 0_0402_5% 1 2
2 1 19 6 PWM1
@ PR719 0_0402_5% CSN2 PWM1 PR734 PC712
1 2 20 PU701 5 10K_0402_1% 0.082U_0402_16V7K
C CSP2 PWM2 C
1 2 CSN1

2
+3VS 21 TPS51622RSM_QFN32_4X4~D 4
PU3 N/C CSP1
22 3
N/C PGOOD VGATE 11,8
@ PR721 0_0402_5%
11 VSS_SENSE 1 2 GFB 23
GFB VDD
2 VDD 2 1 +3VS Use X7R is better or far away inductor.

2
@ PR722 0_0402_5%
Maximum current: 32A
VR_HOT#

ALERT#

1 2 24 1
DROOP

11 VCC_SENSE VFB @ PR724 @ PR725


VFB VDIO
COMP

1
VREF

VCLK

0_0402_5% 2K_0402_1%
GND

PAD
V5A

PC746
1U_0402_6.3V6K

1
25

26

27

28

29

30

31

32

33

+1.05VS_VTT

75_0402_1%

130_0402_1%
54.9_0402_1%

0.1U_0402_16V7K
1

1
PR729

PR730

PR731

PC741
Close to PWR IC
DROOP

2
COMP

PC742 @
51622_VREF

2
100P_0402_50V8J
2 1

PR726 PR727 VR_SVID_DATA 11


10K_0402_1% 3.48K_0402_1%
2 1 2 1 VR_ALERT# 11

VR_SVID_CLK 11
1

PC743 PR728 PC744


1500P_0402_50V7K 10K_0402_1% 0.33U_0402_10V6K
VR_HOT# 27
2 1 1 2
2

V5A 2 1 +5VS
PR732
10_0603_5%
1

B PC745 B
1U_0402_6.3V6K Consider use 0603 for inrush power.
2

VIN 12V-20V
MAX current 32A
Thermal current 10A
Dynamic current 27A
Over current level 45A
Switching frequency 600KHz
Boot voltage 1.7V
DC Load- line 2m Ohm

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2012/07/10 Deciphered Date 2013/07/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+CPU_CORE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
V5WE2 M/B LA-9532P Schematic
Date: Monday, April 08, 2013 Sheet 39 of 42
5 4 3 2 1
5 4 3 2 1

PWR Rule
CPU DCLL=1.5m ohm dedign 330uF/9m *0, 22uF *30 +CPU_CORE

1
22U_0805_6.3V6M
PC902

22U_0805_6.3V6M
PC903

22U_0805_6.3V6M
PC904

22U_0805_6.3V6M
PC905

22U_0805_6.3V6M

22U_0805_6.3V6M
PC907

22U_0805_6.3V6M
PC908

22U_0805_6.3V6M
@

PC906

PC909
2

2
D D

For BOT side

1
22U_0805_6.3V6M
PC920

22U_0805_6.3V6M
PC921

22U_0805_6.3V6M
PC922

22U_0805_6.3V6M
PC923

22U_0805_6.3V6M
PC924

22U_0805_6.3V6M
PC925

22U_0805_6.3V6M

22U_0805_6.3V6M
@

PC926

PC927
2

2
+CPU_CORE

1 1 1 1 1 1 1 1

22U_0805_6.3V6M
PC934

22U_0805_6.3V6M
PC935

22U_0805_6.3V6M
PC936

22U_0805_6.3V6M

22U_0805_6.3V6M
PC938

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
@

PC937

PC939

PC940

PC941
2 2 2 2 2 2 2 2

For TOP side


C 22u *27, @*5 C
1 1 1 1 1 1 1 1

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
PC951

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
@ @

PC949

PC950

PC952

PC953

PC954

PC955

PC956
2 2 2 2 2 2 2 2

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2012/07/10 Deciphered Date 2013/07/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CPU_CORE_CAP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
V5WE2 M/B LA-9532P Schematic
5 4 3 2 Date: Monday, April 08, 2013 1 Sheet 40 of 42
A B C D E

1 1

2 2

3 3

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2012/07/10 Deciphered Date 2013/07/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PIR-HW
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
V5WE2 M/B LA-9532P Schematic
Date: Monday, April 08, 2013 Sheet 41 of 42
A B C D E
5 4 3 2 1

Version change list (P.I.R. List) Page 1 of 2


for PWR
Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase
1 Module Design Module Design change 3/5V solution 3/5V 11/13 DVT
D 2 Change RTC type to non-charge 31 Un-pop PR112, PR113 11/13 DVT D

3 TPS51622 update to ES2.1 Compensation modify 39


Change PR701 to 2.2, PR703 to 270K, PR727 to 3.48K
Un-pop PC742 11/16 DVT
4 EMI request Cut-in EMI solution EMI Add PR313, PC316, PR714, PC714, PC749 11/20 DVT
5 EMI request EMI confirm remove EMI Delete PL102, PC103, PC101, PL202, PC201 and PL703 11/26 DVT
6 Costdown 35 Change PL402, PL403 from 5x5x3 to 7x7x3 12/13 DVT2
7 SY8208B/C update 35 Add PR411, PR413 12/22 DVT2
+1.05V ripple close Add PC609 into 4700P
8 Adjust output voltage and add Cff 36 12/22 DVT2
upper and mean too low Change PR608 from 133K to 127K
9 Improve CPU transient character 40 Unpop PC926 01/09 DVT2
10 Tune sequence 35 Change PC428 from 4700p to 10n, 02/04 PVT
PC427 from 0.047u to 6.8n
11 0 ohm reduce Change PR507,PR513,PR523 to R-pad 02/22 PVT
12 Provide 3/5V PG signal to EC 35 Add PR416 02/22 PVT
13 ESD request 32 Add PC101 into 0.1uF 02/26 PVT
14 ESD request 36 Add PC521, PR503, PC507 02/26 PVT
C C

12
B B

13

14

15

16

A 17 A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2012/07/10 Deciphered Date 2013/07/10 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PIR (PWR)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
V5WE2 M/B LA-9532P Schematic
Date: Monday, April 08, 2013 Sheet 42 of 42
5 4 3 2 1

Potrebbero piacerti anche