371gat Microprocessor-Theory PDF

TECHGURU PUBLICATIONS (A Unit of TECHGURU EDUCATIONALS Pvt. Ltd.
)
MICROPROCESSOR : GATE / EC/EE/IN
MICROPROCESSOR - 8085 PERSONAL REMARK :
, Microprocessor is a programmable integrated device that has computing
and decision making capability (similar to that of the central processing
unit, CPU) of a computer.
, A Microprocessor is a semiconductor device which is manufactured
by using LSI or VLSI technology, which includes ALU, Control Unit
and a group of Registers in a single Integrated circuit.
, A device / machine / system that includes all the components (i.e.
microprocessor, memory, input, output) on one chip (fabricated using
VLSI or ULSI technology)is called microcontroller. For example:
Washing machine, traffic light controller, automatic testing instruments,
dishwashers, automobile dashboard controls are the typical examples
of microcontroller based product. Finally we can say microcontroller is
essentially a entire computer on a single chip.
, A Microprocessor is a multipurpose, programmable, register based clock
driven electronic device that reads binary instructions from the storage
device called memory, accepts binary data as input and processes data
according to instructions and provides results as output.
, Thus, we can say Microprocessor can be embedded in a larger system
using only one controlling unit i.e. CPU, called Microcomputer.
, Microcomputer is a device which is application specific.
, The microprocessor communicates and operates in binary numbers 0
and 1, called bits.
, Some times microcontroller is called microcomputer. The term
microprocessor and microprocessor unit (MPU) are often used
synonymously. Microprocessor unit means a complete processing unit
with the desired / necessary control signals.
, Bit : Binary digit. (i.e. 0 or 1).
, Nibble : A group of four bits is called a nibble.
, Byte : A group of eight bits is called a byte.
, Word : A group of bits the computer recognizes and processes at a
time, 1 word = 2 byte.
, Machine Language: The microprocessor and microcomputer
communicates and operates in the binary number 0 and 1 called bits.
Each microprocessor / microcomputer has a fixed set of instructions in
the form of binary pattern called a machine language.
, A typical programmable Machine / Device / System can be represented
with five components namely -
Microprocessor Memory
Input Output
System Bus
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TECHGURU PUBLICATIONS (A Unit of TECHGURU EDUCATIONALS Pvt. Ltd.)
Figure 1 shows the block diagram of a programmable device/machine/ PERSONAL REMARK :
system.
Input Microprocessor Memory
Output
Devices
Fig.1
, Instruction : A command in binary that is recognized and executed by
the computer to accomplish a task.
, A set of instructions written for the microprocessor to perform a task
is called program, and a group of program is called software.
, Mnemonic Instruction : A meaningful combination of letters used to
suggest the operation of an instruction. For ex. MOV, ADD, SUB etc.
, Bus : A group of wires or lines used to transfer bits between the
microprocessor and other components of the computer system or a
path used to carry signals, such as connection between memory and
the CPU in a digital computer.
A MICROPROCESSOR AS A PROGRAMMABLE DEVICE
, Microprocessor : The programmable means it can be instructed to
perform given tasks within its capability Ex. A piano is a programmable
machine.
, Memory : Memory is like the pages of a note book with space for a
fixed number of binary numbers on each line. However these pages
are generally made of semiconductor material. Typically, each line is
an 8 bit register that can store eight binary digits (bits) and several of
these register are arranged in a sequence called memory.
There are two types of memory ROM and RAM
The ROM memory is used to store programs that do not need
alterations. It means programs stored in the ROM can only be
read, they cannot be altered.
The RAM (Read/write memory)is also known as user memory.
It means it is used to store user programs and data. The
information stored in the RAM can be easily read and altered.
, The function of each and every component of a Machine / Device /
System is shown below in the form of tree structure.
Machine / Device / System
Microprocessor Memory Input Device Output Device System Bus
Read instruction Stores binary information

From memory (i.e. Instructions and data)
Enters data & instructions Accepts data from Carries information
Controls the timing under the control of a memory when instructed in the form of bits
of information flow Stores result and
data for microprocessor program such as by microprocessor between the
through bus monitor program microprocessor,
memory and
Provides the instructions inputs / Outputs
Communicates with all
and data to the (i.e. I/O)
peripheral
(i.e. Memory microprocessors on request.
and Input / Outputs)
Using system bus
Performs all calculations
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, Input/output : The user can enter instructions and data into memory PERSONAL REMARK :
through devices such as a keyboard or simple switches. These devices
are called input devices. The microprocessor reads the instructions
from the memory and process the data according to these instructions.
The result can be displayed by a device such as seven-segment LEDs
(light emitting diodes) or printed by a printer, such devices are called
output devices.
, Microprocessor as a CPU : The computer represented in block
diagram as shown below. The block diagram shows that the computer
has four component.
CPU
Arithmetic/
Logic Unit (ALU) Input Microprocessor Output
as CPU
Input Control Unit Output
Memory
Memory
Traditional block diagram Block diagram of computer with

of a computer Microprocessor as CPU.
Memory, Input, output and the central processing unit, which consists
of the arithmetic/logic unit (ALU) and control unit. The CPU contains
various registers to store data. The ALU performs arithmetic and logical
operation by using instruction from decoders, counters and control lines.
The CPU reads instructions from the memory and communicates with
devices such as memory, input, and output. The timing of the
communication process is controlled by the group of circuits called
the control unit.
, Organization of a Microprocessor-Based System
ALU Register Input Output

Array System Bus
Control
ROM RAM
Memory
Figure given above shows a simplified but formal structure of a

microprocessor based system.It includes four component
Microprocessor, input, output and memory around a common
communication path called a BUS.
, The Microprocessor can be divided into 3 segment for the sake of
clarity Arithmetic Logical Unit (ALU), register array and control unit.
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(i) ALU : This is the area of the Microprocessor where various
computing functions are performed on data. The ALU unit PERSONAL REMARK :
performs such arithmetic operation as addition and subtraction
and such logic operations as AND, OR and EX-OR Results are
stored either in register or memory.
(ii) Register array : These registers are primarily used to store
data temporarily during the execution of a program.
(iii) Control unit : The control unit provides the necessary timing
and control signal to control the flow of data between the
microprocessor memory and peripherals.
, Low Level Language : A medium of communication that is machine
dependent or specific to a given computer. The machine and the
assembly languages of a computer are considered low-level language.
, High Level Language : A medium of communication that is
independent of a given computer programs are written in english like
words and they can be executed on machine using a translator (a
compiler or an interpreter).
, Compiler : A program that translates english-like words of a high-
level language in the machine language of a computer.
, Monitor Program : A program that interprets the input from a
keyboard and converts the input into its binary equivalent.This is stored
in EPROM of a microcomputer.
Microprocessor Architecture and Micro Computer System : A
Microprocessor system consists of four components. The
Microprocessor, memory, input, and output.
The Microprocessor manipulates data and communicates with such
peripheral devices such as memory and I/O. The internal logic design
of the microprocessor called its architecture.
, Architecture : The process of data manipulation and communication
is determined by the logic design of the microprocessor called the
architecture. The various functions performed by the microprocessor
can be classified in three general categories :
(1) Microprocessor-initiated operations.
(2) Internal data operations
(3) Peripheral (Externally) initiated Operations.
To perform these functions, the microprocessor requires a group of
logic circuits and a set of signals called control signals.
The Microprocessor functions listed above are explained here in relation
to the 8085 or 8080(A).
, Microprocessor - initiated operations and 8085 BUS organization :
The MPU performs primarily four operations :

1. Memory read : Reads data from memory.
2. Memory write : Writes data into memory
3. I/O read : Accepts data from input devices
4. I/O write : Sends data to output devices

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, The MPU needs to perform the following steps : PERSONAL REMARK :
Input : The input section transfers data and instructions in binary from
the outside world to the microprocessor. It includes devies such as a
keyboard, a teletype and analog to digital converter.
Output : The output section transfers data from the microprocessor
to such output devices as Light Emitting Diodes (LEDs), a
cathode ray tube (CRT), a printer, a magnetic tape or another computer.
Memory : Memory stores such binary information as instructions and
provides that information to the microprocessor whenever necessary.
Memory has two sections Read only Memory (ROM) and Read/Write
memory (R/WM) popularly known as random access memory
(RAM).
ROM : The ROM restore programs that do not need alterations. The
monitor program of a single board Micro-computer is generally stored
in the ROM. Programs stored in the ROM can only be read and cannot
be altered.
Read/Write memory : R/W memory is also known as user memory.
It is used to store user programs and data. The information stored in
this memory can be easily read and altered.
System bus : The system bus is a communication path between the
microprosessor and peripheral. It is nothing but a group of wires to
carry bits. The Microprocessor communicates with only one pheripheral
at a time, but here one important question arises. How does the
Microprocessor work ? The program includes binary instructions to
add given data and display the answer at the seven segment display
i.e. LEDs. When the microprocessor is given a command to execute
the program, it reads and executes one instruction at a time and finally
sense the result to the seven segment LEDs to display.
The various functions performed by the microprocessor can be classified
into three categories :
1. Microprocessor initiated operations
2. Internal operations
3. Peripheral (externally initiated) operations.
Microprocessor-initiated operations and 8085 BUS organization
The MPU performs primarily four operations :-
1. Memory Read : Reads data from memory.
2. Memory write : Writes data into memory.
3. I/O Read : Accepts data from input devices.
4. I/O Write : Sends data to output devices.
The MPU needs to perform the following steps.
Step 1: Identify the peripheral or the memory location
Step 2 : Transfer data
Step 3 : Provide timing or synchronization signals.
The 8085 MPU performs these functions using three sets of
communication lines called buses. namely address bus, data bus and
the control bus.
, Address bus : The address bus is a group of 16 lines generally identified
as A0 to A15. The address bus is unidirectional bits flow in the one
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direction from the MPU to peripheral device. In a computer system, PERSONAL REMARK :
each peripheral or memory location is identified by a binary number
called an address and the address bus is used to carry a 16-bit address.
, Data bus : The data bus is a group of eight lines used for data flow.
These lines are bidirectional i.e.,data flow in both directions between
the MPU & peripheral devices. The largest number that can appear on
the data bus is 1111 1111 (255)10. It determines the word length and the
register size of a microprocessor, thus the 8085 microprocessor is
called an 8-bit p. Microprocessors such as Intel 8086, Zilog Z8000,
and Motorola 6800 have 16 data lines, they are known as 16-bit
Microprocessors.
A0 to Address Bus
A15
Write
8085 word
MEMORY INPUT
p-unit
OUTPUT Real
word
Data bus
D0 to D7 Control bus
8085 Bus organization

, Control bus : The control bus is comprised of various single lines that
carry synchronization signals. The MPU uses such lines to perform the
third functions providing timing signals. Control bus is mixed direction
i.e., some lines into p and some others out of p.
, Internal data operations and the 8085 register : The internal
architecture of 8085 microprocessor determines how and what
operations must be performed with the data. These operations are
1. Store 8-bit data
2. Perform arithmetic and logical operations.
3. Test for conditions
4. Sequence the execution of instructions

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figure shown below is a simplified representation of the 8085 internal
architecture of register.
PERSONAL REMARK :
Accumulator (8) Flag Register

B (8) C (8)
D (8) E (8)
H (8) L (8)
Stack Pointer (SP) 16
Program Counter (PC) 16
8 lines 16 lines
(D 0 D7) (A 0 A15)
Bidirectional Unidirectional
Internal Architecture of 8085 microprocessor
, 8085 has 6 general purpose registers to store 8-bit data as B, C, D, E,
H and L. They can be combined as register pairs - BC, DE, & HL to
perform some 16 bit operations.
, Register Array : Two additional registers called termporary registers
W and Z are included in the register array.
These register are used to hold 8-bit data during the execultion of some
inrtructions. Howerver, because they are used internally. They are not
available to the programmer.
, Accumulator : The Accumulator is an 8-bit register that is part of the
ALU. This register is used to store 8-bit data and to perform
Arithmetic and logical operations. The result of an operation is stored
in accumulator.
, Flags : The ALU includes 5 flip-flops that are set or reset according to
data conditions in the accumulator. For Example : After an addition
of two numbers if the sum in the accumulator is larger than eight bits,
the flip-flop that is used to indicate a carry called the carry flag (CY)
becomes set.
THE 8085 FLAGS

, Flags : The flags are affected by the arithmetic and logic operations in
the ALU. The flags generally reflect data conditions in the accumulator.
The descriptions and conditions of the flags are as follows.
D7 D6 D5 D4 D3 D2 D1 D0
S Z X AC X P X CY
X = denotes the Flags which are not in use.
, S (Sign Flag) : After the execution of an arithmetic or logic operation
if the result is one, the sign flag is set. This flag is used with sign numbers.
If bit D7 is 1, the number will be viewed as a negative number; if it is 0,
the number will be considered positive.
, This bit is irrelevant for the operations of unsigned numbers. Therefore,
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for unsigned number even if bit D7 of a result is 1 and the flag is set, it PERSONAL REMARK :
does not mean the result is negative.
, Z (Zero flag) : The zero flag is set if the ALU operation results in zero,
and the flag is reset if the result is not zero.
, PROGRAM COUNTER (PC) : Is a 16-bit register used to hold
memory addresses.
The size of this register is 16 bits because the memory addresses are
16 bits.
Program counter is used to sequence execution of a program. It
always holds the address of the next memory location to be
accessed.
, It keeps the track of memory addresses of the instructions in a program
while they are being executed.
, When a byte (machine code) is being fethed the program counter is
increment by one point to the next memory location.
, STACK POINTER(SP) : The stack pointer is also a 16-bit register.
Basically stack is a group of memory locations in the R/W memory
that is used for temporary storage of binary information during the
execution of a program.
, Stack pointer works on the principle of LIFO (Last-in-first-out)
, The stack pointer holds the address of the top element of data stored in
the stack.
, The stack pointer is initialized by the programmer at the beginning of a
program which needs stack operation.
, Stack Pointer (SP) stores the contents of Program Counter (PC) when
it jumps to a subroutine using CALL instruction.
, Some times stack memory is called rough memory.
, The stack is shared by the programmer and the microprocessor.
, The beginning of the stack is defined in the program by using the
instruction LXI SP, or SPHL.
, The programmer can store and retrieve the contents of a register pair
by using PUSH and POP instructions.
PERIPHERAL OR EXTERNALLY INITIATED OPERATIONS
, Reset : When this pin is activated by an external key , all the internal
operations are suspended and the program counter is cleared (it hold
0000H).
, Interrupt : The microprocessor can be interrupted from the normal
execution and asked to execute some other instructions called service
routine.
, Ready : When this pin is LOW, the microprocessor enteres the wait
state. This signal is used primarily to synchronize slower peripherals
with the microprocessor.
, Hold : When this pin is activated, the microprocessor relinquishes
control of buses and allows the external peripherals to use them. for
example, the HOLD signal is used in Direct memory Access (DMA)
data transfer.
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Some commonly used components are given below. PERSONAL REMARK :
Tri-State devices : Tri state logic devices have three stages; logic 1,
logic 0 and high impedance. A tri-state logic devices has a third line
called enable, as shown below in figure (1).
Fig. 1(a) shows a tri-state inverter when the enable is high this circuit
functions as an ordinary inverter, when the enable is low, The inverter
stays in the high impedance state. fig. 1(b) also shows a tristate inverter
with active low Enable line.
Enable
Enable
1 (a) Active high 1 (b) Active Low
Figure 1 : Tri-state inverter with active high
and active low enable lines
2 (a) Enable
Active low
2 (b)
Figure 2 : A buffer and a tri-state buffer

Buffer : Buffer has three logic states namely 0, 1 and high impedance
(Z). Basically buffer is used to transfer the data. The active buffer is a
logic circuit that amplifies the current or power. It has one input line
and one output line as shown in Fig. 2(a). The logic level of the output
is the same as that of the input. Logic 1 input provides logic one output.
Fig. 2(b) also shows a tristate buffer when the enable line is low, the
circuit functions as a buffer otherwise it stays in the high impedance
state.
DECODER : The decoder is a logic circuit that identifies each
combination of the signals present at its input.
For example : If the input to a decoder has two binary lines, the
decoder will have four output lines. i.e. 2 4 line decoder.
ENCODER : The encoder is a logic circuit that provides the
appropriate code (binary, BCD etc. as output for each input signal.
This process is reverse of decoding.
, MEMORY MAP AND ADDRESSES
, A memory map is a pictorial respresentation in which memory device
in the system and the interfacing logic defines the range of memory
addresses for each memory device.
, Memory addresses provide the locations of various memory devices in
the system and the interfacing logic defines the range of memory
addresses for each memory device.
, For the figure shown below The range of memory address is found as
follows: A15
A14
A13
A12 MEMRD
A11
A10 MEMWR
A9 CS RD WR
A8
A7 to A0
I/O
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In order to activate the chip, we have to ON the CS (Chip select) pin PERSONAL REMARK :
which is active low. The output of NAND gate is low when input (A15
to A8) is low. Once the chip is selected combination from 00 to FF.
A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 = 0000
1 1 1 1 1 1 1 1 = 00FF
Chip Enable or Chip Select Register select
If there are x address lines then number of registers or size of memory

is 2x.
Group of 256 registers equals one page.
e.g. For 13 address lines, the memory size is 213 = 8 k - byte.
Total number of bits stored
Number of memory chips = Memory chip size
eg. For 8 k - byte memory number of registers is 8 1024 .Each register
stores 8 - bit of data.
Therefore chip size(given) is 1024 1.
8 1024 8
Number of memory chips = 64chips
1024
Question : The memory address of the last location of an 8 k byte of

memory chip is FFFFH. Find the starting address.
Soln.: For 8 k byte memory total number of registers used 8 1024 .
For selecting 8 1024 registers we need 8 1024 combinations .
The binary range to select 8 1024 registers is from 0000H to 1FFFH
if the memory address starts from 0000 H.
Given last memory address FFFFH so starting address is FFFFH -
1FFFH = E000H
Required memory range is E000H to FFFFH.
FEATURES OF 8085 MICROPROCESSOR :
(1) 8 - bit general purpose microprocessor.
(2) 64 K - byte memory
(3) 40 pins
(4) uses + 5V power supply.
(5) operating frequency 3 MHz
(6) 8085A2 5MHZ
, 8085 MICROPROCESSOR ARCHITECTURE

The 8085 is an 8-bit general purpose microprocessor capable of
addressing 64 K of memory The device has 40 pins requires a + 5
V single power supply and can operate with a 3 MHz single phase

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clock. figure. given below shows the logic pin diagram of the 8085 P
All the signals can be classified in to six groups (1) address bus
PERSONAL REMARK :
(2) data bus (3) control and status signals (4) power supply and frequency
signals (5) externally initiated signals (6) serial Input output ports.
Power supply and frequency signals
+ 5V GND
2 40 20
Serial I/O SID 54 X1 X2 Vcc Vss
ports A15 28
SOD
6 21 Address Bus
7 A8
8
9
Signals 10 19 MultiplexedAddress
35 Ad7 /Data Bus
39 8085 12
36 Ad0 30
29 ALE
S0
33 S1
External signal INTA 11 34 IO/M Status Control and
signals
Ack nowledgement HLDA 38 32 RD
31 WR
3 37
RESETCLK
OUT OUT
Pin Configuration of 8085 P
, Control and status signals : This group of signals includes two
control signals (RD and WR). Three status signals (IO/ M , S1, and S0)
and ALE.
ALE ( Address Latch Enable) This is a psitive going pulse generated
every time the 8085 begins an operation (Machine cycle). This signal
is used primarily to latch the low-order address from the multiplexed
data bus and generate a separate set of eight address lines, A7 A0.
RD (Read) : This is a Read control signal. This signal indicates that
the selected I/O or memory device is to be read and data are available
on the data bus.
WR (Write) : This is a write control signal. This signal indicates that
the data on the data bus are to be written in to a selected memory or I/
O and memory operation.
IO/ M , S0, S1 are status signals and, are the control signals available
in 8085.
IO/ M : This is a status signal used to differentiate between I/O and
memory operation. When it is low it indicates a memory operation.
S1 and S0 : These status signals similar to IO/ M can identify
various operations as given right n and side. S1 S0 Operation
, 8085 INTERRUPTS AND EXTERNALLY INITIATED 0 0 Halt
SIGNALS
INTR (Input) Interrupts Request : This is used as a general purpose. 0 1 Write
INT A (OUTPUT) : (Interrupt acknowledge) : This is used to 1 0 Read
acknowledge an interrupt.
RST 7.5 1 1 Fetch
RST 6.5
RST 5.5
Restart Interrupts : These are vectored interrupts and transfer the
program control to specific memory locations. They cause an internal
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restart to be automatically inserted. They have higher priorities than
INTR interrupt. Among these three the priority order is 7.5, 6.5, 5.5. PERSONAL REMARK :
, 8085 have five hardware interrupts : TRAP (Highest priority) RST
7.5, RST 6.5, RST 5.5 and INTR (Lowest priority).
, RST 7.5 is positive edge triggered while RST 6.5 and RST 5.5 is level
triggered interrupt.
, TRAP is both edge and level triggered interrupt.
, Except TRAP all other interrupts are called maskable interrupts.
*TRAP (INPUT) : This is a nonmaskable interrupt and the
highest priority and INTR is least priority.
*Nonmaskable means we cannot disable this interrupt.
, HLDA : (HOLD Acknowledge) This signal acknowledges the hold
request.
, HOLD (Input):- This singal indicates that a peripheral such as a DMA
controller is requesting the use of the address and data BUS.
, Ready (Input) : Ready pin in 8085 is used to synchronize slower
peripherals with the microprocessor This signal is used to delay the
microprocessor read or write cycles with a slow-responding peripheral
The microprocessor is ready to send or accept data, when this signal
goes low. The microprocessor waits for an integral number of clock
cycles until it goes high.
, ALU : The arithmetic / logic circuit performs the computing
functions,includes the accumulator, the temporary register, the
arithmetic and logic circuits and five flags. The result is stored in
accumulator.
NOTE :
(1) In the memory write cycle, the 8085 writes (stores) data in memory
using the control signal and the status signal IO/M.
(2) In the memory read cycle, the 8085 asserts the RD signal to
memory and than 8085 places the data byte on the data bus and
then asserts the signal to write into the addressed memory.
, POINTS TO REMEMBER
(1) The data bus and the low order address bus are multiplexed
they can be demultiplexed by using the ALE (Address Latch
Enable) signal and a latch.
(2) The IO/ M is a status signal. When it is high it indicates an I/O
operation. When it is low, it indicates a memory operation.
(3) The RD and WR are control signals, the RD is asserted to read
from an external device and the WR is asserted to write into an
external device.
(4) The RD and WR signal are logically ANDed with IO/ M signal
to generate four active low control signals; MEMR, MEMW,
IOR and IOW.
(5) To interface a memory chip with the 8085, it is necessary that
low order address lines of the 8085 address bus are connected
to the address lines of the memory chip. The higher order address
lines are decoded to generate signal to enable the chip.

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PERSONAL REMARK :
CLASSIFICATION OF INSTRUCTION
, Based on the operation performed by each instruction the 8085
instructions can be classified into five groups namely :
(i) Data transfer instruction
(ii) Arithmetic instruction
(iii) Logical instruction
(iv) Branch instruction
(v) Machine control, stack and I/O related instruction.
, An Instruction is a command to the microprocessor to perform a given
task on specified data.
, Each instruction has two parts :
(i) Operation code (OPcode) : It specifies the task to be performed
by computer
(ii) Operand : It specifies the data to be operated.
For example :
(i) MOV C, A
(ii) ADD B
(iii) CMA
In (i) part OP-code is MOV and operand is C, A
In (ii) part OP-code is ADD and operand is B
In (iii) part OP-code is CMA and no operand.
The meaning of the first part is, copy the contents of the accumulator
in register C.
The meaning of the second part is, add the contents of the register
B to the contents of the accumulator and stores the result in the
accumulator.
The meaning of third part is, invert (complement) each bit in the
accumulator.
, The operand (data) given in the instruction may be in various forms
such as 8-bit or 16-bit data, 8-bit or 16-bit address, internal registers or
a register or memory location. In some instructions the operand is implicit
(not expressed in a direct way)
, When operand is register it is understood that the data is the content of
the register.
, The time required to complete the operation of accessing either memory
or I/O, is called machine cycle. One machine cycle consists of 3T to
6T-states.
, T-states means the operation performed in one clock-period. (In 8085
T-state value =1/3s).
, The time required to complete the execution of an instruction is called
instruction cycle.
, Each instruction cycle of the 8085 microprocessor can be divided into
few basic operations called machine cycle, and each machine cycle
can be divided into T-states.
, Instruction cycle = Fetch cycle + Execute cycle.
i.e. instruction cycle = opcode fetch machine cycle + MR machine
cycle + MW machine cycle.
, The 8085 instruction cycle consists of 1 to 5 machine cycle or 1 to 5
operations.
, The Ist Machine cycle of 8085 consists of 4T to 6T-states and all other
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subsequent machine cycle consist of 3T-states only. PERSONAL REMARK :
, The First Machine cycle of each instruction cycle is always OP-code
fetch machine cycle. Other machine cycles are Memory read and
Memory write, I/O read and I/O write.
, The opcode fetch and the memory read are operationally similar except
that the memory read cycle has three T-states The 8085 reads opcode
during the opcode fetch cycle, and it reads 8-bit data during the memory
read cycle.
, In 8085, CALL instruction is the lengthy instruction which takes 18T
states and the shortest instruction takes only 4T states. (Ex. MOV A,
B).
, Example of Arithmetic Instructions : ADD, SUB, ADI, SUI, ADC,
SBB, ADI, SBI, INR, DCR, INX, DCX etc.
, Example of Data Transfer Instructions : LDA, STA, MOV, MVI
etc.
, Example of Logical Instructions : ORA, ANA, XRA, ORI, ANI,
XRI, RLC, RRC, RAL etc.
, Example of Branch Instructions : JMP, CALL, RC, RNC, JC, JNC,
CC, CNC etc.
TYPES OF INSTRUCTION
, Example of Stack, I/O and Machine control Instruction : IN,
OUT, PUSH, POP, HLT, NOP, SIM, RIM etc.
, According to the length of instruction, the 8085 instructions can be
classified into three groups :
(i) One byte instructions : This type of instruction requires one
memory location to store in memory. The one byte instructions
include both opcode and operand in the same byte. Eg : MOV A,
B, ADD B, CMA etc.
(ii) Two byte instructions : This type of instruction requires two
memory locations to store in memory. In a two byte instruction, the
first byte specifies the operation code and the second byte specifies
the operand. Eg : MVI A 45 H; ADI 36 H, SUI 78 H, ORI 67 H,
XRI 9A H etc.
(iii) Three byte instructions : This type of instruction requires three
memory locations to store in the memory. In three byte instruction,
the first byte specifies the Opcode and the following two bytes
specify the 16-bit address or data.
Ex. : JMP 2500 H, STA 4509 H, LDA 3456 H, LXI, 2345 H etc.
NOTE :
1. One-Byte instructions can be recognized as follows :
(a) Data transfer instructions that copy the contents from one
register (or memory) into another register (or memory) are one-
byte instruction. Ex. : MOV.
(b) Arithmetic/logical instructions without the ending letter I
are one byte.
Ex. : ADD, SUB, ORA.
2. Two byte instructions can be recognized as follows :
(a) Instructions that load or manipulate 8-bit data directly are 2-
byte instructions.
Ex. : MVI, ADI, SUI, SBI, IN, OUT, ORI, XRI, ANI etc.
(b) All three letter instructions with ending letter I (except LXI)
are two byte instructions.

LUCK NOW
Correspondance
3. Three-Byte instructions can be recognized as follows :
The instructions that load 16 bits are refer to memory addresses
PERSONAL REMARK :
are 3-byte instructions.
Ex. : LXI, JMP, conditional jumps, CALL, conditional calls, STA, LDA,
LHLD, SHLD.
, ADDRESSING MODES :
The way in which the operand information is specified in the instruction
code is called addressing mode. The 8085 microprocessor supports
five addressing modes.
, 1. Implicit or Inherent addressing mode : There are certain
instructions which operate on the content of the accumulator.
Such instructions do not require the address of the operand.
Ex. : CMA, STC, RLC, RRC, RAL, RAR etc.
2. Direct addressing mode : In this mode the address of the
operand (data) is given in the instruction itself.
Ex. : STA, LDA, SHLD, LHLD, IN, OUT etc.
3. Register addressing mode or (register direct) : In this mode
the operands are in the general purpose registers. The operation
code specifies the address of the register in addition to the
operation to be performed.
Ex. : MOV A, B ; ADDB ; SUB C ; ORA B ; etc.
4. Register Indirect addressing mode : In this mode the address
of the operand is specified by a register pair.
Ex. : STAX, LDAX etc.
5. Immediate addressing mode : In this mode the operand is
specified in the instruction itself.
Ex. : MVI, ADI, LXI, ORI, SUI, SBI, ACI, XRI, ANI etc.
Note : All the branch operation uses immediate addressing
modes.
Some Instructions which does not uses any addressing
EI : Enable Interrupt DI : Disable Interrupt
SIM : Set Interrupt Mask RIM : Read Interrupt Mask
NOP : No Operation
States 4 Machine cycles 1
, In some instructions only one resistor is specified. The content of the
specified register is one of the operands. It is understood that the other
operand is in accumulator.
, The operation of CALL and RET instructions are similar to that of the
operation of PUSH and POP instructions.
, Comparison of PUSH and POP instructions :
The instructions PUSH and POP are similar to the instructions CALL
and RETURN respectively. The similarities and differences are as
follows :
PUSH and POP
1. The programmer uses the instructions PUSH to save the contents
of register specified in the register pair on the stack.
2. When PUSH is executed, the stack pointer register is
decremented by two.
3. The instruction POP transfers the contents of the top two locations
of the stack to the specified register pair.
4. When the instruction POP is executed the stack pointer is
incremented by two.
5. There are no conditional PUSH and POP instructions.
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15
CALL and RETURN PERSONAL REMARK :
1. When CALL is executed, the microprocessor automatically
stores the 16-bit address of the instruction next to CALL on the
stack.
2. When CALL is executed, the stack pointer register is
decremented by two.
3. The instruction RET transfers the contents of the top two
locations of the stack to program counter.
4. When the instruction RET is executed, the stack pointer is
incremented by two.
5. In addition to the unconditional CALL and RET instructions,
there are eight conditional CALL and RETURN instructions.
, MAPPING
Assigning addresses to I/O devices or memory locations is called
mapping.
, Memory mapping : Assigning address to memory locations is called
memory mapping.
(i) Changing the hardware logic used for the chip selection can change
memory mapping.
(ii) To interface a memory chip with the 8085, the necessary low-
order address lines of the 8085 address bus are connected to the
address lines of the memory chip.
(iii) The high-order address lines are decoded to generate CS (chip
select signal to enable the chip).
, Absolute decoding : In this decoding all the address lines which are
not used for memory chip to identify a memory register must be decoded.
Thus, chip select can be asserted by only one address.
, Linear decoding : In this decoding technique, one address line is used
for CS, and others are left dont care. This technique reduces hardware,
but generates multiple addresses resulting in fold back memory space.
, I/O devices can be connected to microprocessor in two different
techniques.
(i) Memory mapped I/O technique and
(ii) I/O mapped or Peripheral mapped I/O technique.
(i) Memory mapped I/O technique :
* In memory mapped I/O, the I/O devices are also treated as
memory locations, under that assumption they will be given 16-
bit address.
* In memory mapped I/O, microprocessor uses memory related
instructions to communicate with I/O devices.
Ex. : STA, LDA, MOV A, M; MOV M, A etc.
* In memory mapped I/O, MEMR and MEMW control signals
are used to activate I/O devices.
* In memory mapped I/O, the entire memory map is shared by
memory locations and I/O devices. One address can be used
only once. This technique is used in a system where the number
of I/O devices are more.
* The maximum number of I/O devices that can be connected to
microprocessor in this technique are 65536.
(ii) I/O mapped I/O Technique / pheripheral Mapped I/O
Technique.
* In this technique the I/O devices are identified by the
microprocessor with separate 8-bit port address.
LUCK NOW
Correspondance
* This technique uses separate control signals (IOR and IOW) to
activate I/O devices and separate instructions (IN and OUT) to PERSONAL REMARK :
communicate with I/O devices.
* In this technique I/O mapping is independent of memory
mapping. Same address can be used to identify input and output
devices.
* This technique is used in a system where number of I/O devices
are less. By using this method a maximum of 256 input devices
and 256 output devices can be connected to the processor (total
of 512 I/O devices).
* The input and output devices are differential by control signals.
* The MPU communicates with only one peripherals at a time by
enabling the peripherals through its control signals
, Interfacing : Designing hardware circuit and writing software
instructions to enable the microprocessor to communicate with
peripheral devices is called interfacing. And the hardware circuit
is called the interfacing device.
, There are two basic types of interfacing devices are available.
(i) Non-programmable interfacing devices and
(ii) Programmable interfacing devices.
(i) Non-programmable interfacing devices : Once the
microprocessor based system is designed it is not possible to
program such type of devices. Examples : 8212-Non-programmable
I/O port, 74LS245-bi-directional buffers, 74LS373 transparent
latches etc.
(ii) Programmable interfacing devices : Writing a specific word,
called the control word, according to the internal logic, can program
a programmable interfacing device.
* 8155 : Programmable peripheral interfacing (PPI) device
with 256 bytes RAM and 16-bit timer/counter. It is a general
purpose interfacing device i.e. it can be used to interface variety
of I/O devices to the microprocessor.
* 8255 : PPI is also called Programmable Interface Adapter
(PIA). It consists of three 8-bit ports.
Summary of logical instructions / operations
S. No. Instruction Meaning Type of Addressing

1. ANA R Logically AND (R) Register Direct
with A
2. ANI 8-bit Logically AND 8-bit data Immediate
with A
3. ORA R Logically OR (R) with A Register Direct
4. ORI 8-bit Logically OR 8-bit data Immediate
with A
5. XRA R Logically exclusive OR Register Direct
(R) with A
6. XRI 8-bit Logically exclusive OR Immediate
8-bit data with A
7. CMA Complement A
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, Summary of data transfer (Copy) instructions/operations PERSONAL REMARK :
1. MOV A, B Copy B (source Register Direct
register) into A
2. MVI R, 8-bit Load register R with Immediate
the 8-bit data
3. IN 8-bit port Read data from the Direct
address input port
4. OUT 8-bit port Write data in the Direct
address output port
, Summary of arithmetic Instructions/operations

1. ADD R Add R to A Register direct
2. ADI 8-bit Add 8-bit data to A Immediate
3. SUB R Subtract R from A Register direct
4. SUI 8-bit Subtract 8-bit data Immediate
from A
5. INR R Increment the content Register Direct
of register R
6. DCR R Decrement the content Register Direct
of register R
, Summary of branch instructions/operations
S.No. Instruction Meaning Type of Addressing

1. JMP 16-bit Jump to 16-bit address Immediate
unconditionally
2. JC 16-bit Jump to 16-bit address Immediate
if CY flag is set
3. JNC 16-bit Jump to 16-bit address Immediate
if CY flag is reset
4. JZ 16-bit Jump to 16-bit address Immediate
if Zero flag is set
5. JNZ 16-bit Jump to 16-bit address Immediate
if Zero flag is reset
6. JP 16-bit Jump to 16-bit address Immediate
if sign flag is reset
7. JM 16-bit Jump to 16-bit address Immediate
if sign flag is set
8. JPE 16-bit Jump to 16-bit address Immediate
if Parity flag is set
9. JPO 16-bit Jump to 16-bit address Immediate
if Parity flag is reset
LUCK NOW
Correspondance
, Summary of Machine Control Instructions/Operations PERSONAL REMARK :
(i) NOP : No operation
(ii) HLT : End of programming/stop processing and wait
Note :
The data transfer (copy) instructions copy the contents of the source
into the destination without affecting the source contents.
The results of the arithmetic and logical operations are usually placed
in the accumulator.
The conditional jump instructions are executed according to the flags
set after an operation.
Data transfer instructions do not set the flags.
The instruction ADD A will add the content of the accumulator to
itself; this is equivalent to multiplying by 2.
The instruction SUB A will subtract the content of the accumulator
to itself ; this will clear the accumulator. The flag status will be CY
= 0, Z = 1 always.
Registers are used to load data directly or to save data bytes.
The instructions INR and DCR :
(i) Affect the contents of the specified register
(ii) Affect all the flags except the CY flag
The instruction CMA does not affect any flags.
The branch instructions are classified in three categories :
1. Jump instructions
2. Call and return instructions
3. Restart instructions
The jump instructions specify the memory location explicitly. Jump
instructions are three byte instructions.
Jump instructions are classified into two categories:
(i) Unconditional jump
(ii) Conditional jump
All the branch instructions uses immediate addressing.
The call and return instructions are associated with the subroutine
technique.
Restart instructions are associated with the interrupt technique.
The conditional jump instructions check the flag conditions and make
decisions to change or not to change the sequence of a program.
Instruction CMP means compare with accumulator. Here the
comparison is performed by subtracting the contents of the operand
(Register or Memory) from the contents of accumulator.
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19
(i) If A < (Register / Memory) : CY = 1, Z = 0 PERSONAL REMARK :
(i.e. carry flag set and zero flag reset)
(ii) If A = (Register/Memory) : Z = 1
(i.e. zero flag is set)
(iii) If A > (Register / Memory) : CY = 0 and Z = 0
(i.e. both the carry and zero flag reset)
Instruction CPI means compare immediate with accumulator.
(i) If A < Data : CY = 1, Z = 0
(ii) If A = Data : Z = 1, CY = 0
(iii) If A > Data : CY = 0, Z = 0
Note : Here both the contents are preserved and the comparison is
shown by setting the flags.
SUB : Subtract register or memory from accumulator. Here the
contents of the register or memory location specificed by the operend
are subtracted from the contents of the accumulator and the result
is placed in the accumulator
SOME VERY IMPORTANT 8085 INSTRUCTIONS
RLC : Rotate Accumulator left
Byte 1 CY
M - Cycles 1 D7 D7 D D5 D4 D3 D2 D1 D0
6
T - States 4
Addressing Mode Implicit
Here Each binary bit of the accumulator is rotated left by one position.
Bit D7 is placed in the position of D0 as well as in the carry flag.
Flags : CY is modified according to bit D7 . S, Z, P, AC are not affected.
RRC: Rotate Accumulator Right
Byte 1
CY
M - Cycles 1
D0 D7 D D5 D4 D3 D2 D1 D0
6
T - States 4
Here Each binary bit of the accumulator is rotated right by one position.
Bit D0 is placed in the position of D7 as well as in the carry flag.
RAL : Rotate Accumulator left through carry.
Byte 1
CY
M - Cycles 1
D7 D7 D D D4 D D D D
T - States 4 6 5 3 2 1 0

Here Each binary bit of the accumulator is rotated left by one position.
through the carry flag. Bit D7 is placed in the bit in the carry flag and

LUCK NOW
Correspondance
the carry flag is placed in the least significant position D0.
PERSONAL REMARK :
RAR : Rotate Accumulator Right through carry.
Byte 1
CY
M - Cycles 1
D0 D7 D D5 D4 D 3 D2 D1 D0
6
T - States 4
Here Each binary bit of the accumulator is rotated right by one position
through the carry flag. Bit D0 is placed in the carry flag and the bit in
the carry flag is placed in the most significant position D7.
RST : Restart.
Byte 1 M - Cycles 3 T - States 12
Addressing Mode Register Indirect
This instruction is equivalent to 1 - byte call instruction to one of the
eight memory locations on page 0. The instructions are generally used
in conjuction with interrupts and inserted using external hardware. These
can also be used as software instructions in a program to transfer
program execution to one of the eight locations.
Opcode/ Operand Binary code Hexcode Restart Address(H)
RST 0 1 1 000 111 C7 0000
RST 1 1 1 001 111 CF 0008
RST 2 1 1 010 111 D7 0010
RST 3 1 1 011 111 DF 0018
EST 4 1 1 011 111 E7 0020
RST 5 1 1 100 111 EF 0028
RST 6 1 1 110 111 F7 0030
RST 7 1 1 111 111 FF 0038
Flags :No flags are affected.

Additional 8085 Interrupts : The 8085 has four additional interrupts
and these interrupts generate RST instructions internally and thus do
not require any external hardware.
Interrupts Restart Address
TRAP 24 H
RST 5.5 2C H
RST 6.5 34 H
RST 7.5 3C H
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21
Note : In order to find the Restart address do the following procedure. PERSONAL REMARK :
For RST3, multiplying 3 by 8 we get 24. The hex equivalent of 24 is
18 H which is the required restart address.
For RST 7.5, 7.5 * 8 = 60. The hex equivalent of 60 is 3C H.
PCHL : Load Program Counter with HL contents.

Byte 1
M - Cycles 1
T - States 6
Addressing Mode Register
Here The content of registers H and L are copied into the program
counter. The contents of H are placed as a high order byte and of L as
a lower - byte.
Flags : No flags are affected.
NOTE : This instruction is equivalent to a 1- byte unconditional jump
instruction. A program sequence can be changed to any location by
simple loading the H and L registers with the appropriate address and
by using this instruction.
SPHL : Copy H and L registers to the stack Pointer.
Addressing Mode Register
Here The instruction loads the contents of the H and L registers into
the stack pointer register. The contents of the H register provide the
high - order address and the contents of the L register provide the low
- order address. The contents of the HL registers are not altered.
PUSH : Push Register Pair onto stack
Addressing Mode Register (Source)/ Register Indirect (Destination)
Here The contents of the register pair is designated in the operand
are copied into the stack in the following sequence. The SP register is
decremented and the contents of the high - order address (B, D, H, A)
are copied into that location. This SP is decremented again and the
contents of the low - order address (C,E, L, flags) are copied to that
location.
flags : No flags are affected.
Example : Assume the stack pointer register contains 2099 H, register
B contains 32H and register C contains 57 H.PUSH B
Function of PUSB B instruction is desscribed
Register and stack contents B 32 57 C SP 2099
before instruction

LUCK NOW
Correspondance
Stack contents 2097 57 PERSONAL REMARK :
after instruction 2098 32
2099 XX
Register contents
after instruction B 32 57 C SP 2097
Note : Operand PSW (Program status word) represents the contents

of the accumuator and the flag register, the acumulator is the high -
order register and the flags are the low - order register.
POP : POP off stack to Register Pair
Here The contents of the memory location pointed out by the stack
pointer register are copied to the low - order register (C, E,land flags)
of the operand. The SP is increamented by one and the contents of the
memory location are copied to the high - order register (B, D, H, A) of
the operand. The SP is again incremented by one.
Flags : No flags are madified.
Example : Assume the stack pointer register contains 2090 H, data
byte F5 is stored in memory location 2090 H and data byte 01H is
stored in location 2091H. POP H
Register contents H XX XX L
before instruction SP 2090
Stack 2090 F5
contents 2091 01
2092
Register contents H 01 F5 L
after instruction 2092
XTHL : Exchange H and L with Top of stack

Here The contents of the L register are exchanged with the stack
location poined out by the contents of the stack pointer register.The
contents of the H register are exchanged with the next stack locatio
(SP + 1) : however, the contents of the stack pointer register are not
altered.
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23
Example : The contents of various registers and stack locations are PERSONAL REMARK :
as shown. Stacks
H A2 57 L 2095 38
SP 2095 2096 67
Register contents
after XTHL Stcks

H 67 38 L 2096 57
SP 2095 2096 A2
16-bit Data Transfer to Register Pairs (LXI)

LXI Rp, 16-bit : Load Register Pair
For Ex :
LXI B, 16-bit The operands B, D and H represents, BC,
LXI D, 16-bit DE and HL registers, and SPrepresents the

LXI H, 16-bit stack pointer register

LXI SP, 16-bit
Important Features
This is 3-type instruction
The secons bute is loaded in the low order register of the register
pair and third in the high-order register pair.

LUCK NOW
Correspondance

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Input Microprocessor Memory

Microprocessor Memory Input Device Output Device System Bus

Read instruction Stores binary information

Performs all calculations

Classroom Study Course

Traditional block diagram Block diagram of computer with

, Organization of a Microprocessor-Based System

ALU Register Input Output

Figure given above shows a simplified but formal structure of a

The MPU performs primarily four operations :

Classroom Study Course

8085 Bus organization

Classroom Study Course

Accumulator (8) Flag Register

THE 8085 FLAGS

Figure 2 : A buffer and a tri-state buffer

A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

If there are x address lines then number of registers or size of memory

Question : The memory address of the last location of an 8 k byte of

, 8085 MICROPROCESSOR ARCHITECTURE

Classroom Study Course

Classroom Study Course

Classroom Study Course

S. No. Instruction Meaning Type of Addressing

, Summary of arithmetic Instructions/operations

S. No. Instruction Meaning Type of Addressing

, Summary of branch instructions/operations

S.No. Instruction Meaning Type of Addressing

Addressing Mode Implicit

Classroom Study Course

Flags :No flags are affected.

PCHL : Load Program Counter with HL contents.

Classroom Study Course

Note : Operand PSW (Program status word) represents the contents

XTHL : Exchange H and L with Top of stack

after XTHL Stcks

16-bit Data Transfer to Register Pairs (LXI)

Classroom Study Course

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