This chapter introduces various algorithms and techniques to perform some basic arithmetic operations related

to a computer.

INTRODUCTION

Most of the programs, in one form or other, carry out some arithmetic operations. In cases like addition of two
unsigned integers, these operations may be performed by the hardware circuit, as shown in the case of full-
adders in Chapter 3 (Section 3.5). However, apart from addition, computers perform subtraction, multiplication
and division, which offer the basic and minimum arithmetic operations. Sometimes these operations are
implemented by hardware circuits and in other cases through software, using different algorithms.

ADDITION AND SUBTRACTION

In Chapter 3, we have illustrated how a full-adder (Section 3.5.2) may be used for adding two bits. This full-
adder is capable of performing the addition with or without carry, and would generate an eventual carry if
demanded by the result. Four basic variations of 1-bit addition using binary numbers are presented in Figure
4.1(a), without considering the carry-in (i.e., carry = 0). If carry is taken into account, the result would be as
shown in Figure 4.1(b). In several cases, as indicated in the diagram, the result would also generate a carry,
which is designated as carry-out. For multiple-bit additions, this carry-out would be treated as carry-in for the
next (at its immediate left) bit.

Figure 4.1. Variations of binary addition (a) without carry and (b) with carry
MULTIPLICATION ALGORITHMS

Apart from addition and subtraction, multiplication is another frequently used arithmetic operation. Several
algorithms are available to implement it with binary numbers, both unsigned as well as signed. We shall show
only a few of those in this section.

Paper and Pencil Method

The paper and pencil method that we adopt to perform multiplication of decimal numbers is also applicable for
binary numbers, as illustrated in Figure 4.5. Rules of multiplication using binary numbers are shown in Figure
4.5(c). Note its similarity with ANDing operation of Boolean algebra. To illustrate binary multiplication, we
have selected two integers, 2 and 3 and shown their multiplication details by interchanging the multiplier and
multiplicand to confirm that the order does not affect the result.

Array Multiplier

An array multiplier is a digital combinational circuit that is used for the multiplication of two binary numbers by
employing an array of full adders and half adders. This array is used for the nearly simultaneous addition of the
various product terms involved. To form the various product terms, an array of AND gates is used before the
Adder array.

To clarify more on the concept, let us take the example of a 2X2 bit multiplication with A and B being the
multiplicand and the multiplier respectively. Assuming A = a(1)a(0) and B= b(1)b(0), the various bits of the
final product term P can be written as:-

P(0)= a(0)b(0)

P(1)=a(1)b(0) + b(1)a(0)

P(2) = a(1)b(1) + C1 where C1 is the carry generated during the addition for the P(1) term.

P(3)=C2 where C2 is the carry generated during the addition for the P(2) term.

For the above multiplication, an array of four AND gates is required to form the various product terms like
a(0)b(0) etc. and then an Adder array is required to calculate the sums involving the various product terms and
carry combinations mentioned in the above equations in order to get the final Product bits.

The Hardware requirement for an m x n bit array multiplier is given as:-

(m x n) AND gates (m-1).n Adders containing at least (m-2).n full adders. The rest n can be either half adders or
full adders used with the input carry kept at 0.
Array Multiplier
Combination circuit
Product generated in one microoperation
Requires large number of gates
Became feasible after integrated circuits
developed
Needed for j multiplier and k multiplicand bits
j x k AND gates
j 1 k-bit adders to produce product of j + k bits

Booth Multiplication Algorithm

Booth's multiplication algorithm is a multiplication algorithm that multiplies two signed binary numbers in
two's complement notation. The algorithm was invented by Andrew Donald Booth in 1950 while doing research
on crystallography at Birkbeck College in Bloomsbury, London. Booth used desk calculators that were faster at
shifting than adding and created the algorithm to increase their speed. Booth's algorithm is of interest in the
study of computer architecture.
 Zeros in multiplier require no addition
But shifting still required
String of 1s in the multiplier from weight 2k
to 2m can be rewritten as 2k+1 2m
Example: 001110 [+14]

Booth's algorithm examines adjacent pairs of bits of the N-bit multiplier Y in signed two's complement
representation, including an implicit bit below the least significant bit, y-1 = 0. For each bit yi, for i running from
0 to N-1, the bits yi and yi-1 are considered. Where these two bits are equal, the product accumulator P remains
unchanged. Where yi = 0 and yi-1 = 1, the multiplicand times 2i is added to P; and where yi = 1 and yi-1 = 0, the
multiplicand times 2i is subtracted from P. The final value of P is the signed product.

A typical implementation

Booth's algorithm can be implemented by repeatedly adding (with ordinary unsigned binary addition) one of
two predetermined values A and S to a product P, then performing a rightward arithmetic shift on P. Let m and
r be the multiplicand and multiplier, respectively; and let x and y represent the number of bits in m and r.

1. Determine the values of A and S, and the initial value of P. All of these numbers should have a length
equal to (x + y + 1).

1. A: Fill the most significant (leftmost) bits with the value of m. Fill the remaining (y + 1) bits
with zeros.

2. S: Fill the most significant bits with the value of (m) in two's complement notation. Fill the
remaining (y + 1) bits with zeros.

3. P: Fill the most significant x bits with zeros. To the right of this, append the value of r. Fill the
least significant (rightmost) bit with a zero.

2. Determine the two least significant (rightmost) bits of P.

1. If they are 01, find the value of P + A. Ignore any overflow.

2. If they are 10, find the value of P + S. Ignore any overflow.

3. If they are 00, do nothing. Use P directly in the next step.

4. If they are 11, do nothing. Use P directly in the next step.

3. Arithmetically shift the value obtained in the 2nd step by a single place to the right. Let P now equal this
new value.

4. Repeat steps 2 and 3 until they have been done y times.

5. Drop the least significant (rightmost) bit from P. This is the product of m and r.