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H958_MB_MP2.0_20120822.

sch-1 - Mon Oct 22 15:22:06 2012

Note: AFC > 3G_TX_VGA > APC > 3G_VBIAS


U201-I
K11 PWM4 C
[7] GPIO_SUB_CMPDN A
U201-A D


D4 CMFLASH V
[7] GPIO_SUB_CMRST [5] _
UMTSRX_IP AF20 DL_I_P 5 I BPI_BUS0 AK9 ASM_VCT1
2 P
[5] UMTSRX_IN AF21 D B AJ9 ASM_VCT2 [6] ED31 C27
DL_I_N D _ BPI_BUS1 ED31
[5] V D [6]
[7] CMMCLK E6 CMMCLK UMTSRX_QP AG21 DL_Q_P A D BPI_BUS2 AJ8 ASM_VCT3 ED30 B25 ED30 /ECS0 A16 ECS0_B [4]
[5] V [6]
[7] CMPCLK E7 CMPCLK UMTSRX_QN AH21 DL_Q_N D BPI_BUS3 AF10 ED29 D25 ED29 /ECS1 D16 ECS1_B [4]
[7] CMRST B2 AG10 ED28 A26
CMRST BPI_BUS4 ED28
[7] CMPDN E5 CMPDN BPI_BUS5 AJ10 [6] ED27 B24 ED27 EWR# A19
PAEN
[7] CMHREF B1 [5] AG23 DVDD AH11 ED26 D24 B14
CMHSYNC GSM_UMTSTX_IP UL_I_P BPI_BUS6 DVDD12_EMI ED26 ERAS#
[7] M ED25
CMVREF B3 CMVSYNC A [5] GSM_UMTSTX_IN AF23 UL_I_N BPI_BUS7 AJ11 C23 ED25 ECAS# D15
C
D _ [5] GSM_UMTSTX_QP AG24 AF11 ED24 D23 C16 ECKE0
D UL_Q_P BPI_BUS8 ED24 ECKE0 [4]
[7] D [5] ED23
CMDAT9 A3 CMDAT9 V GSM_UMTSTX_QN AH24 UL_Q_N BPI_BUS9 AK10 C8 ED23
D
[7] CMDAT8 D6 CMDAT8 BPI_BUS10 AG11 [6] ED22 A9 ED22 DQM0 A11 EDQM0 [4]
W_PA1_ON
[7] CMDAT7 B5 [6] VM0 AK13 ED21 D9 B23 EDQM1 [4]
CMDAT7 VM0 DVDD_BPI ED21 DQM1
[7] CMDAT6 E4 [6] VM1 AJ13 AB14 DVDD12_EMI ED20 A7 B7 EDQM2 [4]
CMDAT6 VM1 BSI0_CS0 1 ED20 DQM2
[7] CMDAT5 A2 [6] VAPC Y16 AC14 ED19 B8 B26 EDQM3
CMDAT5 APC BSI0_CS1 1 ED19 DQM3 [4]
[7] CMDAT4 A4 CMDAT4
[5] AFC AB16 AFC I BSI0_DATA AF14 R210 ED18 B9 ED18
P 1K 1% C208
[7] CMDAT3 B4 CMDAT3 B BSI0_CLK AA13 ED17 C7 ED17 EDQS0 E12 EDQS0 [4]
_
[7] CMDAT2 B6 AC19 D 2 100nF ED16 D8 E20 EDQS1
CMDAT2 3G_VBIAS D ED16 EDQS1 [4]
[7] V [5] [1,4] 2
CMDAT1 C3 CMDAT1 D BSI1_CS0 AH15 BSI1_CS0 ED15 A24 ED15 EDQS2 E9 EDQS2 [4]
[7] CMDAT0 C4 AJ12 AG14 BSI1_CS1 [5] EVREF ED14 A23 E24 EDQS3
CMDAT0 BPI_BUS11 BSI1_CS1 ED14 EDQS3 [4]
[6] [5] [4]
W_PA5_ON AG12 BPI_BUS12 BSI1_DATA AJ14 BSI1_DATA ED13 C24 ED13 /EDQS0 E13 EDQS0_B
[5] 1 [4]
[1,7] SCL1 K10 SCL_1 AK12 BPI_BUS13 BSI1_CLK AG15 BSI1_CLK R11 ED12 E21 ED12 /EDQS1 E19 EDQS1_B
1 1 [4]
[1,7] SDA1 K9 SDA_1 AH12 BPI_BUS14
4.7K C207 ED11 B22 ED11 /EDQS2 E10 EDQS2_B
AF12 C209 1uF ED10 D20 E23 EDQS3_B [4]
TDD_TIMINGSYNC DVDD_BSI ED10 /EDQS3
AD11 2 100nF 2 ED9 D21
TDD_AFC_SW ED9
MT6575E2_mDDR1 2 ED8 A22 E16 EDCLK_B
ED8 /EDCLK [4]
I2C1: CAMERA, ATV ED7 D11 ED7 EDCLK E17 EDCLK [4]
MT6575E2_mDDR1 ED6 B11 ED6
ED5 B12 ED5 NLD15 B30
ED4 C12 B29
ED4 NLD14
Need to turn off if I2C1 devices not operated ED3 B10 ED3 NLD13 E27
ED2 D12 ED2 NLD12 G30
ED1 A10 ED1 NLD11 E29
ED0 C11 C30
ED0 NLD10
NLD9 D30
VCAM_IOPMU
[1,4] D19 RVREF NLD8 A28 GPS_SYNC_6620 [8]
EVREF
NLD7 C28
NLD6 G27
[12] P-SENSOR_LDO_EN NLD5 G29
NLD4 D29
[3] KEY_LDO_EN B16 EBA1 NLD3 F29
A20 EBA0 NLD2 D28
[3] SN3199_RST UTXD1 [1] C20 EA13 NLD1 E26
URXD1 [1] B13 EA12 NLD0 B28
R212 R211 [3,12] KCOL2 B15 EA11
KCOL1 B20 A29
4.7K 4.7K
[3,12]
I EA10 NRNB
C [1,2] KCOL0
M EA9 B19 EA9 NCLE B27
D UTXD3 EA8 B21 C29
H URXD3
[8]
[8] EA7 C19
EA8 NALE
E28
EA7 NWEB
R
[1,7] SCL1
O UTXD4 [1] EA6 D17 EA6 NREB F30
[1,7] SDA1 KROW5
[12]
F URXD4 [1] EA5 B18 EA5 NCEB0 F27
[12] KROW4
C EA4 A17 EA4 NCEB1 F28
[3] KROW2 2 EA3 B17
[3] KROW1
I [7] EA2 A14
EA3
EA2
[1,2] O FLASH_SW
KROW0
T FLASH_EN [7] EA1
EA0
C15
A13
EA1 MEMPLL_TXN K21
K22
O EA0 MEMPLL_TXP
I GPIO_CTP_RST [7]
P GPIO_CTP_PWR_EN
G [7]

D7 DDR3RSTB

6 01 6 7 6 6 8 7 9 7 11 8 7 7 8 5 7 6 7 5 1 5 2 E
3 1 5 8 6 2 G
3 H
1 4 MT6575E2_mDDR1
U201-E AG AC FA AF AJ AK AH AK AF AJ AB AF AH AG AG AJ R2 P2 P2 R2 C A
AE A F A D
A D
A 2
P 2
R G
A A A F
A

0W 1W 2W 3W 4W 5W 6W 7W 0L 1L 2L 3L 4L 5L 6L 7L 1D 1D 1S 1S D 2
2 D 2
S 2
S D 3
3 D D 4
4 D O
M I
M K
L N
S driving calibration setting (LPDDR1/LPDDR2)
RO_ _RO RO_ _RO RO_ RO_ _RO RO_ _CO CO_ _CO CO_ _CO CO_ _CO CO_ TXU URX RTU UCT X
T X
R
U U
T
R T
C
U U
X
T X
R
U U
X
T X
R
U U
_
I
P
_
I
P
C
_ C
_
PK KP PK KP PK PK KP KP PK PK KP KP PK PK KP PK S S I
P
S
I
P
S
F 1
p 0
8 2 SYSCLK
1 C [5] AB21 CLK26M SYSRST_B W30 SYSRST_B [2]
DVDD_NML6 DVDD_NML2 DVDD_NML6
z
H 1
AK15 RTC_XOUT 100 Ohm
K 02 AK16 U29
8 RTC_XIN DVDD_NML5 SRCLKENAI differential
6 X0 RTC_GPIO_2V8 AD16 V29 SRCLKENA
7 [2,8] 32K_OUT SRCLKENA [2]
. AVDD33_RTC
2 AJ16
3 TESTMODE
[2] BBWAKEUP AG16 AA3 DAICLK PWM1-3 can be used for sleep mode
BBWAKEUP DAICLK [8]
AA2 DAIPCMOUT U201-G
DAIPCMOUT [8]
DVDD_EFUSE DVDD_NML1 [7]
F D27 FSOURCE DAIPCMIN AA4 DAIPCMIN [8] MIPI2_D0- E3 RDN0 DPICK T4 DPI_CK [7]
p WATCHDOG_RESET_B EINT0: HEADSET / SENSOR [7]
8 2 [2] AF5 WATCHDOG_B BTSYNC AB1 DAISYNC [8] MIPI2_D0+ F3 RDP0 DPIDE N5 DPI_DE [7]
1 0 DVDD_NML2 [7]
2
C DAIRSTB Y2 DAIRST [8] EINT1: AST2001 GPIO0_EINT / SENSOR [7]
MIPI2_D1- C2 RDN1 DPIVSYNC L5 DPIVSYNC [7]
MIPI2_D1+ D2 M5 [7]
R30 AC2
EINT2: MT6620 BGF_EINT / SENSOR [7]
MIPI2_CLK- D1
RDP1 DPIHSYNC DPIHSYNC
JTRST_B EINT0 RCN
TP251 TP30MIL 1 T30
MCU_JTCK JTCK EINT1 AD2 EINT1_GY [12] EINT3: SENSOR / USB (reserved) [7] MIPI2_CLK+ E2 RCP DPIR0 T2 DPI_R0
Close to MT6575 T29 JTDI EINT2 AE4 EINT_ALS [12] EINT4: MT6620 WIFI_EINT / SENSOR [7]
DPIR1 U4 DPI_R1
TP253 TP30MIL 1 MCU_JTMS U27 AA5 EINT3_G [12] MIPI_D0- F2 R1 DPI_R2
U28
JTMS DVDD_NML6 DVDD_NML2 EINT3
AD4
EINT5: ATV / SENSOR [7] MIPI_D0+ F1
TDN0 DPIR2
R2 DPI_R3
JTDO EINT4 TDP0 DPIR3
B R29 JRTCK EINT5 AE2 EINT6: CTP [7] MIPI_D1- G1 TDN1 DPIR4 N1 DPI_R4
[7]
EINT6 AA6 EINT6_C [7] EINT7: AST2001 HI_EINT / SENSOR [7]
MIPI_D1+ G2 TDP1 D
C DPIR5 M1 DPI_R5
U26 AB5 MIPI_CLK- H4 L P6 DPI_R6
T26
SWCLKTCK EINT7
Y4 EINT8_HP
EINT8: MT6329 [7] MIPI_CLK+ G5
TCN _
D
DPIR6
N8 DPI_R7
SWDIOTMS EINT8 [3] TCP D DPIR7
DVDD_NML1
EINT9 AA1 PMU_INT [2] EINT9: MT6329 Watchdog V
D DPI_R[0:7] [7]

[2] CHD_DP AA27 CHD_DP DPI_B0 N2 DPIB0 DPIG0 R5 DPI_G0


[2] CHD_DM AA26 AB2 PWM1 [7] DPI_B1 P8 T5 DPI_G1
90 Ohm CHD_DM PWM1
DPI_B2
DPIB1 DPIG1
DPI_G2
VUSB_PMU AA29 USB_VBUS PWM2 AB4 N7 DPIB2 DPIG2 P4
AVDD33_USB DVDD_NML2
USB_DM AB26 AB3 DPI_B3 P2 N4 DPI_G3
[1,3] USB_DM PWM3 DPIB3 DPIG3
[1,3] USB_DP AC26 USB_DP DPI_B4 N3 DPIB4 DPIG4 P7 DPI_G4
[1] USB_VRT AA30 USB_VRT LPCE1B K4 BGF_INT_B_6620 [8] DPI_B5 M2 DPIB5 DPIG5 U5 DPI_G5
Y29 IDDIG LPCE0B K1 DPI_B6 L2 DPIB6 DPIG6 P3 DPI_G6
DVDD_NML5 DVDD_LCD
LPTE J2 LPTE [7] DPI_B7 T1 DPIB7 DPIG7 P5 DPI_G7
[1,3,7,12] SCL0 AG1 SCL_0 LRSTB K2 LRSTB [7]
DVDD_NML3 DPI_G[0:7]
[1,3,7,12] SDA0 AH2 SDA_0 LRDB K5 ALL_INT_B_6620 [8] DPI_B[0:7]
J3 [7]
DVDD_NML6 LPA0 [7]
I2S1_CK W5 K3 WIFI_INT_B_6620 MT6575E2_mDDR1
[8] I2S1_CK DVDD_NML1 LWRB [8]
[8] I2S1_DAT Y5 I2S1_DAT
[8] I2S1_WS W1 I2S1_WS LSCE1B U2 [7]
VCAMA_EN
R203 LSCE0B V4 [7]
5.1K 1% W2 I2S0_CK
DVDD_MC3 DVDD_MC2 DVDD_MC1 DVDD_MC0
LSDA V2
SPI_CS
LCD_SPI_SDI [7] UART1: Download Note: tied together (1.8V or 2.8V)
[1] USB_VRT Y6
V1
I2S0_WS LSA0 V3
V5 LCD_SPI_SCK [7]
UART2: NFC DVDD28_MIPITX/DVDD28_MIPIRX/DVDD28_MIPIIO/AVDD28_MIPI
I2S0_DAT LSCK
I LSDI U3 LCD_SPI_SDO [7] UART3: MT6620
DM KL T0A T1A T2A T3A DM KL T0A T1A T2A T3A DM KL T0A T1A T2A T3A B
T D K 0
T 1
T 2
T 3
T 4
T 5
T 6
T 7
T P
W I
S MP Test Points
_C3 _C3 _D3 _D3 _D3 _D3 _C2 _C2 _D2 _D2 _D2 _D2 _C1 _C1 _D1 _D1 _D1 _D1
S
R
_
M
C
_
L
C
_
A
D
_
A
D
_
A
D
_
A
D
_
A
D
_
A
D
_
A
D
_
A
D
_
D
S
_
N
I
_
UART4: Debug
CD CD CD CD CD CD CD CD CD CD CD CD CD CD CD CD CD CD 0
C 0
C 0
C 0
C 0
C 0
C 0
C 0
C 0
C 0
C 0
C 1
C 1
C
SM SM SM SM SM SM SM SM SM SM SM SM SM SM SM SM SM SM D
S D
S D
S D
S D
S D
S D
S D
S D
S D
S D
S D
S D
S
M M M M M M M M M M M M M
I2C0: CTP, M-Sensor, G-Sensor, ALS&PS, Gyro, OFN 3 4 4 3 4 3 9 6 4 0 9 8 6 6 8 0 9 7 9 2
9 6 7 7 6
7 2 8 9 0 0 6 9
AJ AH AJ AH AG AK J2 H2 K2 J3 H2 J2 J2 K2 K2 K3 K2 J2 2
L M 2
M 2
N 2
L 2 N
K N 2 2
P N 2
3 L
3 M 2
N
TP201
MT6575E2_mDDR1 I2C0 : G/M/GYRO/ CTP / OFN
I2C1 : Camera / ATV
SH1
[8] MC3CMD I2C2 : PMIC VBAT TP202
[8] MC3CLK
MC3DA0 EMMC_DAT7 [4]
[8] [2,12] PWRKEY TP203
MC3DA1 EMMC_DAT6 [4]
[8] SH2
VDD1V8_PMU [4] [1] UTXD1 TP204
[8] MC3DA2 EMMC_DAT5
A
[8] MC3DA3 EMMC_DAT4 [4] I2S0 : ATV [1] URXD1 TP205
Close to MT6573 EMMC_DAT3 [4]
[4] I2S1 : MT6620 [1,3] TP206
EMMC_DAT2 USB_DM
SH3
EMMC_DAT1 [4]
[1,3] USB_DP TP207
EMMC_DAT0 [4]
R205 R204 EMMC_CLK [4] MSDC0 : Reserved [1] UTXD4 TP208
[4]
4.7K 4.7K
EMMC_CMD
EMMC_RST [4] MSDC1 : T-Card (Support SD3.0) [1] URXD4 TP209
SH4
[8] GPIO186_6620_LNAEN
MSDC2 : Reserved [1,2] KCOL0 TP210
[8] PMU_EN_6620
MSDC3 : MT6620 [1,2] KROW0
[1,3,7,12] SCL0 TP211
MC1DA3 [9]
MC1DA2 Title
[9]
[1,3,7,12] SDA0 MC1DA1
MC1DA0
[9] 02 MT6575 - Baseband
[9]
Size Document Number Rev
MC1CK [9]
A1 V1.0
MC1CM0 [9] MT6575 PHONE
Date: Tuesday, September 13, 2011 Sheet 1 of 12
5 4 3 2 1
H958_MB_MP2.0_20120822.sch-2 - Mon Oct 22 15:22:07 2012

1. Close to Battery Connector.


(Rsense (R312) <10mm)
2. Main path should be 40mil.
(VBUS -> U301's E, -> U301's C -> R312 -> VBAT)
3. Star connection from R312 to BAT Connector

Charger
VBAT

U331
VBUS
F F
n n
OVP: 12V 0 0
0 0
7 AUDIO 1 1
6
2
C P8 VBAT_SPK1

F C0402
u P7 P13 2 1
2 VBAT_SPK2 SPK1_P 2 2
. P12 3 3
2 SPK1_N C C
GND
P5 VBI_P
L212 BLM18PG221SH1
N5 VBI_N
L213 BLM18PG221SH1
SPK2_P P10 SPK+ [3]
R308 N3 AUD1_P SPK2_N P11
SPK- [3]
25V rating VCDT rating: 1.268V N4 AUD1_N
[12]
VCDT [2] ISINK0 M13 ISINK0
HPRP
100nF C204 DRIVER
[2,3] AUD2_P P2 AUD2_P ISINK1 N14
C336 330k 1%
AUD2_N P3 AUD2_N ISINK2 N13
1uF 25V 100nF C203
ISENSE/BSTSNS 4mil ISINK3 N12
C0603 [12]
BYPASS M5 BYPASS ISINK4 M10 ISINK4
R311 39k 1% differential to Rsense 1uF C269 [12]
ISINK5 N11 ISINK5
80mil GND Direct to main GND BST_GDRV K9
GND VCDT VCDT N1 CHARGER L14
[2] VCDT KPLED KEY_BL [3]
[2] CHR_LDO CHR_LDO H5 L13 [7]
CHR_LDO FLASH FLASH
[2] VDRV VDRV L1 VDRV
CHR_LDO [2] ISENSE ISENSE H1
[2] ISENSE
BATSNS BATSNS H2 BATSNS ASW_IN1 N7
R307 3.3k [2]
80mil BAT_ON BAT_ON K1 BATON ASW_IN2 N8
[2]
TREF TREF J3 N6
C E3 [2] TREF ASW_OUT
I
E C383 C380 C384
M2 PCH_DET
G
R
A BUCK OUTPUT
H C2 [1] KROW0 K3 USB_DLN
C 1uF 1uF KCOL0 L316
[1] L3 USB_DLP VCORE F12 VCORE_SW VCORE_PMU
1 100pF (NC) C0402
1 F13
0 B1 CONTROL SIGNAL
VCORE
C316
3 E12
Q U302 VCORE
3 2 VDRV [2] GND [1] SRCLKENA A2
Close to MT6329 SYSRST_B
SRCLKEN star connect to cap. (3mil)
4.7uF
[1] L2 RESETB VCORE_FB B12 VCORE_PMU
SSM3K35MFV R304 1K
80mil [1,12] PWRKEY PWRKEY_PMIC N2 GND
2-1L1B/SMD/SSM3K35MFV PWRKEY
M4 PMU_TESTMODE
[1] M3 C14 VAPROC_SW L305
BBWAKEUP PWRBB VPROC VAPROC_PMU
[1] WATCHDOG_RESET_B B4 SYSRSTB VPROC D13
AVDD18_DIG
C318
A4 FSOURCE VPROC D14 C314 10NF
80mil 4mil ISENSE [2]
SCL_2 4.7uF
[2] D3 SCK VPROC_FB E10 VAPROC_FB [2]
R1206/SMD
Rsense R312
[2] SDA_2 D2 SDA star connect to cap. (3mil)
[1] PMU_INT B3 INT
0.2R 1% L309
VIO18 G12 VDD18_SW VDD1V8_PMU
R1206/SMD C356
[2] PMUCTRL0 C1 G13
DVS1 VIO18
R338 0R C315 1NF
80mil 4mil [2] PMUCTRL1 C4 DVS2
VBAT BATSNS [2] A13 VDD1V8_PMU star connect to cap. (3mil) D301 RB551V-30
VIO18_FB
1 2 4.7uF
[2] PACTRL0 B2 PA_SEL0
L313 1 2
VBAT
[1,2,3,6,7,8,12]
PACTRL1 C3 PA_SEL1 VPA J13
[2]
[2] PACTRL2 B1 PA_SEL2 VPA K13 VPA
VBAT C359 VPA_PMU

A3
BATTERY CONNECTOR [3] HOME_KEY E6
BL_PWM
HOMEKEY VPA_FB C12 VPA_PMU
star connect to cap. (3mil) GND
4.7uF
40mil 40mil
VBAT INPUT L312
25mil
L315 0R
VBAT VBAT_VCORE E13 VBAT_VCORE VRF18 H12 VRF18_SW VRF18_PMU VRF18_PMU
C351
E14 VBAT_VCORE star connect to cap. (3mil)
SD-47275-001 LC close to IC. (<10mm)
L319 0R 4.7uF
80mil 40mil 25mil A14 VBAT_VPROC VRF18_FB D12 VRF18_PMU
C463
VBAT+ 1 VBAT 8 B13 VBAT_VPROC GND
Add Zenar Diode 4
0
V
6
BAT_ON Place on the path 7
3
D
Z
3 SOD323 22uF
B14 VBAT_VPROC
NTC 2 [2] 6 M C13 VBAT_VPROC
R340 1K
from VBAT to IC C3
9 9
3
C
500mW L321 0R LDO OUTPUT
GND- 3
R339 24K
TREF [2]
(Battery connectorNC F
CLOSE TO CONN GND
VBAT_VIO18 G14
H14
VBAT_VIO18
A10
u VBAT_VIO18 VM12_1 VM12_1_PMU
0 25mil
GND- 4
or test point or IO 0 J14 VBAT_VPA VM12_2 C9
VR301 VR302 1 L318 0R 1V2_2825
VBAT_VPA K14 VBAT_VPA VM12_INT B10 VDD12_INT_PMU VDD12_INT_PMU
connector) VRF28 E1 VRF_PMU VRF_PMU
AVL 5M 02 200 AVLC 5S 02 050 L317 0R
H13 VBAT_VRF18 VTCXO F5 VTCXO_PMU VTCXO_PMU
CON301 Rfg VA1 E3
VDD25_VA1_6575
VBAT N9 VBAT_MISC VIO28 B9 VDD28_PMU
VDD28_PMU
VSIM A8 VSIM_A VSIM_A
R366 0.02R 1%
[2] FGN VBAT C7 VBAT_LDO2 VSIM2 C8 VSIM_B VSIM_B
R1206
25mil E8 VBAT_LDO2 VMC C10 VMC_PMU VMC_PMU
GND VMCH A11 VMCH
VBAT C5 VBAT_LDO3 VGP B7
VGP
C6 VBAT_LDO3 VGP2 B11
VGP2
VUSB B8 VUSB_PMU VUSB_PMU
VBAT C11 VBAT_LDO4 VCAMA F2 1.8V_2825 1.8V_2825
R367 0R [2] C349 1uF
[2] FGN FGN_IC VCAMA_S F3 1.8V_2825
R368 1 2 0R [2]
FGP_IC D1 VBAT_LDO5 VCAM_AF A7 VCAM_AFPMU VCAM_AFPMU
1 2
E2 VBAT_LDO5 VCAMD B5 VCAMD_PMU
VDD1V8_PMU VCAMD_PMU
R367, R368 close to Rfg (R366) VCAM_IO A5 VCAM_IOPMU
VCAM_IOPMU
F6 AVDD18_IO VIBR B6 VIBR_PMU_OUT VIBR_PMU_OUT
R366 close to U304 E9 AVDD18 VA2 G3 VDD25_VA2_6575
VA2_S G5
5 AVDD18_DIG E5
3 AVDD18_DIG
3
C
FGN_IC/FGP_IC 4mil VRTC E7 VRTC
F 5 3 4 5 2 4 6 6
u 3 4 4 4 6 6 6 7
1 C241 2 2 2 2 4 4 4 2 differential to [2] FGP_IC GAS GAUGE
C C C C C C C C G1 CS+ VREF J2
GND Rfg (R366) [2] FGN_IC G2
22uF F F F
CS- 1
F u u u F F F F 4
u 7 7 7 u u u u [1,8] RTC_GPIO_2V8 K5 32K_IN C
2 . . . 1 1 1 1
2 4 4 4
F
u
BC 1.1 1
GND
Keep at least 1 [1] CHD_DP J5 CHG_DP GND_VREF K2
GND
VIA1-2 each ball CHD_DM
[1] H3 CHG_DM

F8 GND_VPROC
F9 GND_VPROC GND_DRV L12
F10 GND_VPROC GND_DRV M12
G8 GND_VCORE GND_ISINK M11
D
N
G G9 GND_VCORE GND_ISINK K10
G10 GND_VCORE GND_SPK1 M8
H8 GND_VCORE GND_SPK1 M9
H9 GND_VIO18 GND_SPK2 K7
H10 GND_VIO18 GND_SPK2 M7
J8 GND_VIO18
VDD1V8_PMU
J9 GND_VRF18 GND_LDO K6
J10 GND_VRF18 GND_LDO M6
J12 GND_VPA GND_LDO G7
K12 GND_VPA GND_LDO H7
1.8V IO for DDR GND_LDO J7
DVDD12_EMI
F7 GND_LDO GND_LDO K8
1.2V IO for DDR2 R206 R207
G6 GND_LDO GND_LDO H6
J6 GND_LDO
U201-B 4.7K 4.7K
R318 VM12_1_PMU BGA_NC-P14 P14
0
VDD_EMI F9 DVDD12_EMI A1 BGA_NC-A1
VDD_EMI F12 P1 GND
C377 C334 R0603/SMD BGA_NC-P1
H12 VSS VDD_EMI F14 GND
H16 F15 [2] SCL_2
VSS VDD_EMI
100nF 2.2uF
H21 VSS VDD_EMI F16
MT6329_TFBGA
J8 VSS VDD_EMI F17 GND GND [2] SDA_2
J10 VSS VDD_EMI F18
J13 VSS VDD_EMI F21
J16 F23
J19
VSS
VSS
VDD_EMI
VDD_EMI G11
Close to MT6575
J20 VSS VDD_EMI G15
J22 G17 U201-D
VSS VDD_EMI
C398 100nF
J24 VSS DVDD_NFI N22 VDD1V8_PMU GND
K14 VSS DVDD_NFI N23
C392 100nF SCL_2
K18 VSS DVDD_LCD N10 GND [2] W26 SCL_2 USB11_DM AC29
L14 N11 [2] SDA_2 Y26 AB29
VSS DVDD_LCD SDA_2 USB11_DP
L15 VSS DVDD_LCD P10
L16 VSS [10] SIMRST_A AD27 SRST PACTRL0 V30 PACTRL0
[2]
L17 VSS [10] AC27 SIO PACTRL1 V28 PACTRL1 [2]
C376 100nF SIMIO_A
L18 VSS GND [10] AD26 SCLK PACTRL2 W29 PACTRL2 [2]
SIMCLK_A
M14 VSS DVDD_CAM K8 VCAM_IOPMU VCAM_IOPMU
M15 VSS DVDD_BPI AF13 VDD28_PMU VDD28_PMU [10] SIMRST_B AD29 SRST2 PMUCTRL0 W27 PMUCTRL0 [2]
C347 1uF
M16 VSS DVDD_BSI AB12 GND [10] SIMIO_B AD30 SIO2 PMUCTRL1 V27 PMUCTRL1 [2]
M17 VSS [10] SIMCLK_B AD28 SCLK2
M18 VSS DVDD_NML1 AB8 VDD1V8_PMU VDD1V8_PMU
N13 VSS DVDD_NML2 AB9
C341 C338 Symbol Vout (V) Iout (mA) External HW Control
N14 VSS DVDD_NML3 AE5
N15 VSS DVDD_NML4 AC9 Separate SIO1/2 and SCLK1/2 VPA 0.9 ~ 3.4 (100mV/step) 800 PA_SEL[2:0]
100nF 100nF
GND N16 VSS DVDD_NML5 Y25 GND
SIO/SCLK trace 6mil MT6575E2_mDDR1
N17 VSS DVDD_NML6 U23
VPROC 0.75 ~ 1.3 (25mV/step) 1800 SRCLKENA, DVS[2:1]
N18 VSS DVDD_NML6 V23 VDD28_PMU
C348 1uF
N19 VSS GND
Buck VRF18 1.8 250 SRCLKENA
P13 VSS
P14 VSS DVDD_MC0 R22 VDD1V8_PMU VDD1V8_PMU
P15 R23 VGP
VCORE 0.75 ~ 1.3 (25mV/step) 1300 SRCLKENA
VSS DVDD_MC1 VGP
P16 VSS DVDD_MC2 P23 VDD28_PMU VDD28_PMU
VIO18 1.8 1000 N/A
P17 VSS DVDD_MC3 AK4 VDD28_PMU VDD28_PMU
P18 VSS VRF 2.85 200 SRCLKENA
P19 VSS VDDK P11
C371 C342 C343 C379
R13 VSS VDDK K12
VTCXO 2.8 40 SRCLKENA
R14 VSS VDDK N12
R15 P12
100nF 1uF 100nF 100nF
GND
Analog
VSS VDDK
R16 R12
VDD1V8_PMU
LDO VCAMA 1.5/1.8/2.5/2.8 250
VSS VDDK
R17 VSS VDDK T12 TVOUT trace:
VA1 1.8/2.0/2.1/2.5 200 SRCLKENA
R18 VSS VDDK U12 Close to MT6575 VRTC W=8mil, S=6mil,
R19 VSS VDDK V12
T13 W12 GND>20mil with GND vias VA2 2.5/2.8 100 N/A
VSS VDDK
T14 L13 U201-H
VSS VDDK VM12_1 1.2 200
T15 M13 AH16 J1 U201-C
VSS VDDK AVDD28_RTC DVDD18_MIPITX 4.7uF X5R
C339 1uF
T16 VSS VDDK W13 VRTC AJ15 AVSS28_RTC DVSS18_MIPITX H5 AF18 VDAC_OUT AVDD18_AUD AF29 star connect to cap gnd VDD1V8_PMU
T17 G14 AG25
C458 VM12_2 1.2 200
VSS VDDK AVSS18_AUD
T18 VSS VDDK H14 AVDD18_MIPI H3
C344 100nF C313 2.2uF X5R VM12_INT 1.35 50
T19 VSS VDDK J14 Close to MT6575 VTCXO_PMU
C470 1uF
AK18 AVDD28_DAC AVSS18_MIPI J5 [3] ACCDET AK28 ACCDET COUT_AVSS12N AK29 AVSS12N GND
U13 VSS VDDK W14 AVSS12N_DAC AJ30 star connect to cap.(thicker)
VRF28
U14 VSS VDDK K15 DVDD18_MIPIRX H2
C360 1uF C363 1uF X5R
U15 VSS VDDK V15 VCORE_PMU VCORE_PMU DVSS18_MIPIRX J4 CF AG29 FLYP
R319 close to IC VIO28 2.8 100
U16 VSS VDDK K16 VDD25_VA1_6575 AK22 AVDD25_MD GND CF_IN AG30 FLYN
1k C459 1uF
U17 VSS VDDK V16 AC20 AVSS25_MD
U19 K17
C352 C353 C354 C355 C387 C368 C389 C388 C390 C391 C312
MICP0 AK25 AH27
VSIM1 1.8/3.0 100
VSS VDDK [3] NS_AU_VIN0_P VMIC VMIC
V13 V17 MICN0 AJ25 AF26 EARBIAS
VSS VDDK VDD1V8_PMU [3] NS_AU_VIN0_N EARBIAS [3] VSIM2
1uF 2.2uF 100nF 100nF 100nF 100nF 22uF 22uF 22uF 22uF/NC 100nF C362
V14 VSS VDDK G18 VDD25_VA1_6575 K23 AVDD25_MEMPLL [3] MICP1 AJ27 NS_AU_VIN1_P
1 C460 1uF LCD_ID
Digital
VDDK H18 H20 AVSS25_MEMPLL AVDD18_MD AK24 [3] MICN1 AK27 NS_AU_VIN1_N AUX_IN0 AJ20 [7]
C361 1uF ADC1_ACCESSORY 1uF LDO VUSB 3.3 100
VDDK J18 AVSS18_MD AJ26 AF25 NS_AU_VIN2_P AUX_IN1 AJ17 [3] GND
VDDK U18 GND + GND AE25 NS_AU_VIN2_N AUX_IN2 AF16 ADC2_MCP_TEMP [4]
VCAMD 1.3/1.5/1.8/2.5/2.8/3.0/3.3 100
GB301
VDDK V19 Close to MT6575 VDD25_VA1_6575 AK19 AVDD25_VDAC AUX_IN3 AJ18 ADC3_UMTS_TEMP
[5]
HB414 IV01E C461 1uF
W15 AVSS25_VDAC [2,3] HPRP AJ29 HPRP AUX_IN4 AJ19 ADC0: Not used VCAM_IO
VDDK_DVFS M20 Close to MT6575 [3] HPLP AJ28 HPLP ADC1: Accessory
N20 VAPROC_PMU VAPROC_PMU AH19
A1 CORNER
VDDK_DVFS
VDDK_DVFS P20 - VDD25_VA1_6575 AK21 AVDD25_PLL AVDD33_USB11 AA28 VSIM_A [3] HSP AH28 HSP
AUX_XM
AUX_XP AG19 ADC2: UMTS Power VCAM_AF
2 C468 1uF
AVSS12N
A30
AK30
CORNER VDDK_DVFS R20
T20
C350 C374 C372 C373 C358 C394 C364
C393 C395 C399 W16 AVSS25_PLL AVSS33_USB11 V18
C369
[3] HSN AH29 HSN AUX_YM AF17
AG18
ADC3: UMTS Temp VMC 1.3/1.5/1.8/2.5/2.8/3.0/3.3 200
CORNER VDDK_DVFS AUX_YP
AJ1 CORNER VDDK_DVFS U20 22uF 22uF 22uF/NC AVDD33_USB AB28 VUSB_PMU AH30 AUDREFN
100nF 100nF 100nF 100nF 2.2uF 22uF 100nF 100nF VMCH
AK1 CORNER VDDK_DVFS V20 GND VDD25_VA2_6575 AC22 AVDD25_VBUF AVSS33_USB W18
C469 1uF
AK2 CORNER VDDK_DVFS M21 GND AF28 FMINR REFP AJ23
N21 GND AF27 AJ22
VGP
VDDK_DVFS 5 FMINL REFN
P21 GND AB30
0R 1
VDDK_DVFS AVDD30_VSIM VSIM_A 3
R VGP2
VDDK_DVFS R21 Close to MT6575 AVDD30_VSIM2 AE30
VSIM_B
7
5
4
VDDK_DVFS T21 AVSS30_VSIM W17 C
C521 C520 MT6575E2_mDDR1 Vibrator VIBR 1.3/1.5/1.8/2.5/2.8/3.0/3.3 200
VDDK_DVFS V21 GND 4 mil trace Gnd Via
F
VDDK_VSRAM M19 VDD12_INT_PMU VDD12_INT_PMU GND u Close to MT6575 Audio Gnd
1uF 1uF Close to MT6329 1 RTC VRTC 1.8/2.8/3.0/3.3
VDDK_VSRAM U21
MT6575E2_mDDR1 C366
[2] E25 VDDK_DVFS_OUT VDDK_VSRAM V22 GND
VAPROC_FB C385 C386 VREF
GND GND
8 1uF
6
2 2
C 0 MT6575E2_mDDR1 100nF 2.2uF
4
0
F C
u
1
GND
GND Close to MT6575
GND

Title

03 MT6575 - Power and ABB


Size Document Number Rev
A1
MT6575 PHONE V1.0

Date: Tuesday, September 13, 2011 Sheet 2 of 12


H958_MB_MP2.0_20120822.sch-3 - Mon Oct 22 15:22:08 2012

HANDSET RECEIVER
close to IC close to connector
TP461

8 B401 B403
Close to MIC Close to BB R421 1
6 V [2] HSN
4 6
1K D Z 6
VMIC 3 0 REC401
M 4
1 C 2
VBUS VCHARGE C403
384 F 1
[3] USB_DM_IO 2 100pF p
0
C R419 D-
GND 8 0
[3] 3 1 2403 260 00031
USB_DP_IO
uF 1.5K
D+ RECEIVE/SMD/NXP
10
9
4 GND
[2] HSP
AU_OUT0_P_F B405
VBAT/ID
MIC+ C437 5 1 2
1
[3] MICP0 [2] GND 1
4 4
1uF R R
6 V V

Handset Microphone 2
GND R
R
O O REC402
7
GND T T
S
S
I I 2
C404 C405 S
624 4
6
4 614 C407 C408 S
I I
R
1
33pF 33pF 33pF 33pF R A
VR R
V VR A
V V
2403 260 00031
MIC- C436 1uF MICN0 [2]
[3] RECEIVE/SMD/NXP
CON403
16
R4 IO/MICRO7PIN-9

5K.
1
4
42R

1K
tie together and single via to GND plane

VDD1V8_PMU

R445

RE
10K 10K
R443 R444 470K

close to IC close to connector


VI
EC
C422
33pF [1]
R448 47K
EINT8_HP
C419

ER
USB_DM_IO 33pF
[3]
B408 CON401

Audio Jack
USB_DP_IO CON402
[3] [2] HPLP R434 33R BLM18BD252SN1

VBUS 1
NC C420 1
2
AGND 2

en
3 100pF
0R R403 SDATA B409 3
USB_DM [2] VIBR_PMU_OUT
4
VAA BLM18BD252SN1 4 3 Stage:MIC
[1] R402 47K 5
SCLK 5 4 Stage:R
oh
USB_DP R401 47K 6 R436 33R
RESET [2] HPRP 6
[1] R400
47K
7
FVALID C423
5 GND
8
STANDBY C421 33pF 2 Stage:L
pr
[3] MIC+ 9
LVALID
[3] MIC- 10
VDD 33pF 1 Stage:EINT
11
VDD_IO Microphone: 6k~13k Ohm
aE
[2] SPK+ 12
D9
[2] SPK- 13
M_CLK
14
[1] SN3199_RST D8
[1,7,12] SDA0 15
[3] DGND_IO
VBAT_KEY 16
[1,7,12] SCL0 D7 B407
17
PCLK
[2] KEY_BL 18 [3] HP_MIC_R
D6 BLM18BD252SN1
19
VBAT D2
0R R1609 [1] KROW1 20
D5
[1] KROW2 21
D3
[1,12] KCOL1 22
D4
R437 0R FM_ANT [8]
[1,12] KCOL2 23
D1
[2] 24
HOME_KEY D0
25
GND
3
0 1
VR409 VR410 VR408 4 H
S
L 2
07 96 06 36 66 76 86 C430 0
1
D
R4V R4V R4V R4V R4V R4V R4V 56pF B
8
VR407 1
M
L
B
R439 0R FM_RX_N_6620 [8]

Single via to GND plane

Earphone MICPHONE
USB&CONNECTOR 460
C412 U403
VBAT AME8801
1uF

1 5 VBAT_KEY [3]
VIN VOUT
0R R409
2
GND C418

KEY_LDO_EN 3 4 [2] EARBIAS


EN BYP C411
[1]
1uF
Close to BB Close to MIC 33pF GND of C454(10uF) and headset
0
41R
K
001
SC70PIN5
C410
R408 should tie together and single
1K
1uF
C454
via to GND plane
[2] MICN1
C415 AU_VIN1_N1
1uF 4.7uF

C409 R411 Close to CON401


33pF
1.5K
C402

100pF

C416 tie together and single via to GND plane


33pF
C417 HP_MIC_R
[2] MICP1 HP_MIC_R [3]
1uF

R481 1K
ACCDET [2]

ADC1_ACCESSORY [2]
R4800R(NC)

5 4 3 2 1
H958_MB_MP2.0_20120822.sch-4 - Mon Oct 22 15:22:08 2012

MCP
VDD1V8_PMU

Reference Pin for Output


Drive Strength Calibration DM
0
S4B VDD1=1.8V,VDD2=1.20V,VDDCA,VDDQ= 1.20V
/S3 075
06 R
0R
U501
EA0 U3 CA0 VDD1 E6
1 1
EA1 T3 F1
EA2 R3
CA1
VDD1 : Core 1 VDD1
V1 C514 C515

eMMC
CA2 VDD1 DVDD12_EMI
EA3 R2 W6 2 2.2uF 2 100nF
CA3 VDD1
EA4 R1 CA4
EA5 K2 CA5 VDD2 E5
EA6 J2 CA6 VDD2 G2
1 1 1 1 1
EA7 J3 CA7 VDD2 K1
C509 C510 C511 C516 C513
VDD2 : Core 2
EA8 H3 CA8 VDD2 M7
EA9 H2 CA9 VDD2 U2 2 2.2uF 2 2.2uF 2 100nF 2 100nF 2 100nF
VDD2 W5
ED0 T8 DQ0
ED1 R8 DQ1 VDDQ F7
ED2 R7 DQ2 VDDQ F10
ED3 R9 DQ3 VDDQ G5

[1,4] R527 10K


ED4 R6 DQ4 Power VDDQ H9
EMMC_CMD VDD1V8_PMU ED5 P7 DQ5 VDDQ J10
1 2 [1,2,3,4,5,7,8,12]
ED6 P8 DQ6 VDDQ L6
[1,4] EMMC_DAT0 R531 47K ED7 P9 M6
1 2 DQ7 VDDQ
[1,4] EMMC_DAT1 R524 47K ED8 K9 N6
1 2 DQ8 VDDQ
[1,4] EMMC_DAT2 R526 47K ED9 K8 R10
1 2 DQ9 VDDQ
[1,4] EMMC_DAT3 R514 47K ED10 K7 T9
1 2 DQ10 VDDQ
[1,4] EMMC_DAT4 R525 47K ED11 J6 U5
1 2 DQ11 VDDQ
[1,4] EMMC_DAT5 R10 47K ED12 J9 V7
1 2 DQ12 VDDQ
[1,4] EMMC_DAT6 R9 47K ED13 J7 V10
DQ13 VDDQ
[1,4] EMMC_DAT7 R530 1 2
47K ED14 J8 DQ14
1. VCC : Core Voltage 2.7v ~ 3.6v
1 2
ED15 H8 DQ15 VDDCA J1 2. VCCQ : IO Voltage 1.7v~1.95v (low voltage range)
ED16 W7 L1
ED17 U6
DQ16 VDDCA
T2
2.7v~3.6v(high voltage range)
DQ17 VDDCA
ED18 W8 DQ18
ED19 T5 DQ19 VCC A8 VMC_PMU VMC_PMU
ED20 U7 DQ20 VCC B2
ED21 W9 DQ21 VCCQ B8 VDD1V8_PMU
VDD1V8_PMU
ED22 V8 DQ22 VDDI A5
ED23 T6 DQ23
ED24 H6 B5 EMMC_CLK [1]
DQ24 CLKM 4 8 7
ED25 F8 DQ25 RST C1 EMMC_RST [1] 0
5 1
5 0
5
ED26 E9 C5 EMMC_CMD [1,4] C C C
DQ26 CMD
ED27 G7 DQ27 eMMC [1,4]
2

4.7uF
2

4.7uF
ED28 H5 DQ28 DAT7 B4 EMMC_DAT7
ED29 E8 A4 EMMC_DAT6 [1,4] 1 C0603 1 C0603
DQ29 DAT6 R R R
ED30 G6 A6 EMMC_DAT5 [1,4] 5 5 5
DQ30 DAT5
[1,4]
X X X
ED31 E7 DQ31 DAT4 B6 EMMC_DAT4 F
u F
u F
u
A7 EMMC_DAT3 [1,4] 1 1 1
DAT3
R501 243 Ohm 1% G3 ZQ0 DAT2 B7 EMMC_DAT2 [1,4]
R502 243 Ohm 1% F3 ZQ1 DAT1 B3 EMMC_DAT1 [1,4]
[1,4]
Close to Memory
DAT0 A3 EMMC_DAT0

F6 P1 ECS0_B [1]
VSSQ CS0#
F9 P2 ECS1_B [1]
VSSQ CS1#
G10 VSSQ
H10 N1 ECKE0 [1,4]
VSSQ CKE0
J5 N2 ECKE0 [1,4]
VSSQ CKE1
K10 VSSQ
Thermal Sensor - MCP M5
P10
VSSQ CLK M3
L3
EDCLK
EDCLK_B
[1]
[1]
VDD25_VA1_6575 VSSQ CLK#
R5 VSSQ
T10 P6 EDQS0 [1]
VSSQ DQS0
U10 P5 EDQS0_B [1]
VSSQ DQS0#
V6 K6 EDQS1 [1]
2 VSSQ DQS1
V9 K5 EDQS1_B [1]
VSSQ DQS1#
R504 DQS2 U8 EDQS2 [1]
39K T1 VSSCA DQS2# U9 EDQS2_B [1]
M1 VSSCA DQS3 G8 EDQS3 [1]
[2] ADC2_MCP_TEMP 1 H1 G9 [1]
2 VSSCA DQS3# EDQS3_B
1 R505 [1]
R K 6 B9 VSSM DM0 N5 EDQM0
2
0 47 50 221K E1 VSSM DM1 L5 EDQM1 [1]
4 R
0 2
1
F2 VSS LP-DDR2 DM2 T7 EDQM2 [1]
[1]
F5 VSS DM3 H7 EDQM3
G1 VSS
L2 VSS VREFCA K3 EVREF [1]
M8 VSS VREFDQ M9 4.7uF /10V (X5R, 0805)
U1 VSS 1
V2 VSS NC C2 C519
V5 VSS NC C4 100nF (X7R)
C3 C6 2
VSSQM NC
NC D1
A1 DNU NC D2
A2 DNU NC D3
A9 DNU NC D4
A10 DNU NC D5
B1 DNU NC D6
B10 DNU NC E2
E10 DNU NC E3
W1 DNU NC M2
W10 DNU NC N3
Y1 DNU NC P3
Y2 DNU NC V3
Y9 DNU NC W2
Y10 DNU NC W3

LPDDR2+eMMC (Hynix 162 MCP)


FBGA162/P0.5/B0.27/12X13.5/HYNIX
H958_MB_MP2.0_20120822.sch-5 - Mon Oct 22 15:22:09 2012

7/7 Add matching components and Use RFWS matching circuit

SF18-0942GASBA1
47pF C602 5 3

L602 6
GSM850_OUT_2 NDG NDG
21nH
47pF C604
4
IN_2
7
GSM850_OUT_1

8
GSM900_OUT_2
47pF C605 2.7nH
15nH L603 3
L605
1 0 GSM850/900_RX [6]
IN_1 6
6 C
9 0
GSM900_OUT_1 D D 6
47pF C607 GN GN C
10 2
U605

F
p
7
F 4
p
[6] PDET 7
4
[6] W_PA_LB_IN SF18-1960DASBA1
5 3

RF_MT6162_RX
[6] GGE_PA_LB_IN
6 G G
DCS_OUT_2
[6] GGE_PA_HB_IN
47pF C608
4.7nH
L608 IN_2
4
[6] W_PA_B1_IN
7
DCS_OUT_1
47pF C609
8 F
PCS_OUT_2 p
7
4
1 2
1
IN_1
6 3.0nH L609 DCS/PCS_RX [6]
C
9
PCS_OUT_1
G G
VTCXO_PMU 47pF C611 01 2
R601 0
L611 1
U606 6
VRF_PMU
4.7nH C
39K 47pF F
C613 p
7
[2] ADC3_UMTS_TEMP 4 VDD1V8_PMU 4
0
6
R
VRF18_PMU

R6031 2 47KK1
0402R
2
2
C614 C616 C617 C618 C619

1uF 1uF 1uF 1uF 1uF

0713
VTCXO_PMU=VDDXO 1 1 8 1 1 7 7 8 7 7
8 1 3
U603 K D 1
N H 2
L 2
J 1
B 1
M 1 G 1
F 1 H 1
J K 1
B
ADC7_UMTS_Temp=RF_TEMP 8
1 N A
T 8 B 1
P A 2 3
2 B 3 B 1
B 2 B 1
2 T
2 8 P B B E
VDD18_PMU=VINT _
D
D
V
I
V _
D
2
_
D
V D
D V
U
S P
U
V V
S
P
U
S
U
S
V V
H
_
X
H
_
X
T T
H
_
X
T
L
_
X
L
_
X
T T
D
P

VRF18_PMU=VDD_18
BSI1_CS0=EN [1]
[1]
GSM_UMTSTX_IN
GSM_UMTSTX_IP
B17
C18
TX_IN
TX_IP
LNA8N
LNA8P
V17
U16
BSI1_DATA=DATA0 [1] GSM_UMTSTX_QN D17
E18
TX_QN LNA7N U14
V15
[1] GSM_UMTSTX_QP TX_QP LNA7P
BSI1_CS1=DATA1 [1]
LNA6N U12
UMTSRX_QN M1 V13
BSI1_CLK=CLK [1] UMTSRX_QP N2
RX_BBQN
RX_BBQP
LNA6P
LNA5N U10 U602
[1] UMTSRX_IN P1 RX_BBIN LNA5P V11 SAYFP836MCC0F00
W_PA_OUT_B5 [6]
[1] UMTSRX_IP R2 RX_BBIP LNA4N U8
LNA4P V9 C620 3 TX ANT 6 C621
TRX_WCDMA_850 [6]
[1] SYSCLK C629 A2 REFCLK1 LNA3N U6 1.5nH 47nH 1 RX NM
1nF L614 C622 18pF
B3 REFCLK2 LNA3P V7 8 RX
A4 REFCLK3 LNA2N U4 5
V5 C623 G G G G G
8.2nH 1
6
LNA2P L
VTCXO_PMU B5 VDDXO LNA1N U2 1.5nH 2 4 5 7 9
B9 VTUNE LNA1P V3

A8 XO1_/_REF_IN P O
P
B7 E O
_ U604
XO2 D T _
T
0 A
1 O
M S
E
T T S
E SAYFP1G95CA0B00 W_PA_OUT_B1 [6]
A _ E T
M C637 N T
E A T
D A K
L K
D C L E _
S
C R C _
F
D R
D
G N D
N D
G N D
N D
G G N D
N
G G
D
N D
G N D
G N
G C
N C624
[1] AFC R611 0R 8 N C636 3 6 C625
3
6 6.8pF 4.7nH TX ANT
TRX_WCDMA_2100 [6]
C 1nF C 1 E
2 F 0 6 7
2 1
2 G 8 2 4
5 1 6 B
1 1
8 1 1
8 3 7 L617 1 C626 C628
100nF 1 R
A A P 1 1
B 1 A
A A 1 L T U 6 1
T RX
8 RX 1.2nH
3.9nH 0.5pF
C627 G G G G G
X601 TX0275A 6.8pF
MT6162 2 4 5 7 9

4 3 1117 change U603 Footprint


VCC OUT
1 2 [1] BSI1_CS0
VCTRL GND
[1] BSI1_DATA
C643 L650 [1] BSI1_CS1
[1] BSI1_CLK
10nF

NC

1007 Update for sens


1. B8
C634 from 8.2nH to 5.6nH
1117 Update Note 2. B2 use B7955, C639,
1. Change U603 Footprint to MT6162/AQFN62/P0.333/B0.27/6.2X6.2 C642 from 8.2pF to 6.8pF,
2. Change U603 GND_PIN from Pin1 to Pin63 L621 from 5.6nH to 6.8nH, C641 from 3.6nH to 15nH
3. Add B2 Common Mode trap 3. B1
4, VDD_28 change to VRF_PMU C624 and C627 from 8.2pF to 6.8pF, C625 from 1.2nH to 1.1nH
5. Remove R605 4. DCS
6. Add R616, R631, R632 0201 Short 0ohm for Current Measure C608, C609 from 39pF to 3pF
7. C614, C616 from NM change to 1uF
8. VBAT in RF change to VBAT_RF, add 0805 0ohm
9. VTCXO_PMU add LDO
H958_MB_MP2.0_20120822.sch-6 - Mon Oct 22 15:22:09 2012

ASM Control Truth Table


0713 Update Net Name TX_EN Vct3 Vct2 Vct1
ADC6_UMTS_POWER =GGE_PA_VDET
(TRX1)W_Band2/5 L L H H
EDGE_MODE =GGE_PA_MODE
(TRX2)W_Band1 L L L H
ADC6_UMTS_POWER =GGE_PA_VDET
RX1_900/850 L H L L
VAPC =GGE_PA_VRAMP
RX2_1900/1800 L L H L
BANDSW =GGE_PA_BS
(TX_L)GSMK_LB H L H L
PAEN =GGE_PA_ENABLE (TX_H)GSMK_HB H L H H
E_TXL_900/850 H L L L
VM1 =W_PA_VMODE1 E_TXH_1900/1800 H L L H
VM0 =W_PA_VMODE0
W_PA5_ON =W_PA_B5_EN
W_PA8_ON =W_PA_B8_EN
W_PA1_ON =W_PA_B1_EN
W_PA2_ON =W_PA_B2_EN

1109 Update Lists


R703 change to 1.1K, C701 change to 1nF
RF_TX_ASM for RC filter
GSM_PA
[1] ASM_VCT3

[1] ASM_VCT2
ANT
[1] ASM_VCT1

C770 C771 C772


3 4 U2
2
VBAT 33pF GND
33pF 33pF [6] 1 2 1
IN GND
3
ANT_ASM
4
GND
5 6
MM9329-2700B
CON701
C702 C707 MM8430-2610B_RA1_RB3

22uF NM

C765

1nF

[1] PAEN

R703
[1] VAPC 1
1.1K 2
C701
R728 3 2 1 0 9 8 7
2 2 2 2 1 1 1
NC 1nF 1 D P E 0 1 T 2 16
GND N
G M
A L
B L
R L
R A
B L
R GND
R
V A
N T
C T
C V T
C
E
_ P
G P
G P
G
2 X 15
GND T GND
C710
3
[5] GGE_PA_LB_IN RF_IN_LB

56pF 4 PA_RF3233 14 C703 100pF


GND ANT ANT_ASM [6]
C712
5 13
[5] GGE_PA_HB_IN RF_IN_HB TRX2 TRX_WCDMA_850 [5]

18pF 6
GND 1
D
N D
N D
N 1
X 2
X X
R
G G G R R T
7 8 9 0 1 2
U101 1 1 1

TRX_WCDMA_2100 [5]

X
R X
R
_
0 _
S
0
9 C
P
/
0 /
S
5
8 C
D
M
S
G

VBAT WCDMA_850 ]
5
[
]
5
[

[6] W_PA_VCC C716 C717


82pF 100nF
[1,6] VM1 C721
[1,6] VM0
100nF

C733
4 3
0 _
_
E
D
M
V
1
E
O D
O
M
V
C
V
0
1 1
1 2
C C
C
V
VBAT WCDMA_2100
2 9 C724 3.6nH C718
[5] W_PA_LB_IN RF_IN RF_OUT W_PA_OUT_B5 [5]
[6] W_PA_VCC
C719 C720
R720 82pF 100nF 4.7uF
56pF C730
51R C729 [1,6] VM1 C722
8 CPL_IN U706 CPL_OUT 6
ACPM5405 NM
NM [1,6] VM0
100nF

[1] 5 VEN 4 3 1 01
W_PA5_ON
D N
N D
G G 0_ 1_ 1C 2C
CPL_OUT_B5
[6] DEO ODE VC VC
7 1
1 MV MV
C725 C726
[5] W_PA_B1_IN 2 RF_IN RF_OUT 9 [5]
W_PA_OUT_B1
C731 C732
18pF 0R 3.9nH
R751
8 CPL_IN U707 CPL_OUT 6 NM 0.5pF
ACPM5401

[1] W_PA1_ON 5 VEN


D D
GN GN
7 11 [6] CPL_OUT_B1

[6] CPL_OUT_B5 2
5
7 N
C
R

1117 Update
1. VBAT in RF change to VBAT_RF, add 0805 0ohm

VPA_PMU
R718 [6]
W_PA_VCC
0R
R737
R733
CPL_OUT_B1 [6]
C735 27R
R739 27R
2.2uF
35R

PDET [5]
H958_MB_MP2.0_20120822.sch-7 - Mon Oct 22 15:22:09 2012
4.5HD LCM Connector 810
VDD1V8_PMU
VDD1V8_PMU
VGP2
BACKLIGHT DRIVER
K
7
4
800
L801 22uH
VBAT 1 2 KTD259EHD-TR,UP TO 39V(10)
CON705 1 L-NR3012
0 [7]
C802 8
LEDA
1 C
1
1 4.7uF R888 25V rating
8 F 3
R p 20R D801 0
7 8
1 4 C
GND RB551V-30
2
3
VCI(3.0V) U801 2
VCC(3.0V)
4
IOVCC(1.8V)
LCD_ID
[2]
5
6
7
M_ID_LOW
PWM(B/C) [1] PWM1
VIH = 1.4V
6

4
VIN

EN VOUT
LX 1

5 F
U
Capacitive Touch Panel
GND 1
8
[1,7] LRSTB /RES 2 3 LEDK [7]
9 GND FB
[1] LPTE VSYNC_OUT
10
GND
11 C888 1
OTP R803 RT9293BJ6 (TSOT-23)
VGP2 VDD1V8_PMU 12 4.7uF
GND 100k R802
[7] LEDK 13

3
1
4
1
6
1
[7] LEDA
14
15
16
LED_C
LED_A
GND 2
10R 880
8 8 8 [7] MIPI_D3P_OUT D3+
C C C [7] MIPI_D3N_OUT 17
D3-
C815 18
GND
4.7uF [7] MIPI_D2P_OUT 19
D2+ 0
8
[7] MIPI_D2N_OUT 20 8
D2- P 1
8
21
GND T 8
[7] 22 P
T
MIPI_CLK+_OUT
F F F CLK+
p p p 23
7 7 7 [7] MIPI_CLK-_OUT CLK-
4 4 4 24
GND H
[7] 25 C
MIPI_D1+_OUT D1+ T
26 N
[7] MIPI_D1-_OUT D1- I
27 P
GND 4
[7] 28 3 . TP_2.8V
MIPI_D0+_OUT D0+ 0 0
29 8 -
[7] MIPI_D0-_OUT D0- J 1
30 -
GND 4
N 2 3
8 4 5 CON880
I F 8 8 8 8
P u 0 P 8
P 8
P 8
P
1 2 3 4 5 - 7 8 T T T T
D . 8
A 4 C
P
1 TP_8PIN
H950_LCM TP_2V8

2
GND
[2] [1] EINT6_C
FLASH
R750 R753 R755 47K [1,3,12] SDA0 3
517 Fu [1,3,12]
EINT
C .7 10K U710 KTD256
SCL0
4 10K [1] GPIO_CTP_RST 4
SDA0 GND
9
VBAT
1 14 0 1 2 3
[1] MIPI_D1+ 47K R820 2
RSETM D2
13
8
8 8
8 8
8 8
8
5
SCL0 GND
10
RSETF AGND R
V R
V R
V R
V
3 12
AGND D1 6
4 11 FLASH_SW [1] RSET
VIN ENM
[1] MIPI_D1- 47K R821 L701L-NR3012 22uH 5
LX ENF
10
[1] 7
6 9 FLASH_EN T VDD_1V8
LX VOUT A
B
1 2 7 8 47K R756 V
PGND VOUT 8
TP_1.8V GND
[7] MIPI_D1P
1 3 MIPI_D1+_OUT [7] F 50 6
C7
IN_P OUT_P u 8
R830 47K 1 8
P C881
T
1uF 1
0 8
[7] MIPI_D1N
2 4 MIPI_D1-_OUT [7] 8
R831 47K
IN_N OUT_N R

[1] MIPI_CLK- R823 47K


EMI801
[1] MIPI_CLK+ 47K R822

[7] MIPI_CKP R832 47K 1


IN_P OUT_P
3 MIPI_CLK+_OUT [7]

TP_1.8V TP_2.8V

[7] MIPI_CKN 47K R833 2


IN_N OUT_N
4 MIPI_CLK-_OUT [7]

VBAT
[1] MIPI_D0- 47K R824
EMI802
[1] MIPI_D0+ 47K R825 U813
3 EN2 V2(1_8V) 1
[7] R834 47K 1 3 [7]
MIPI_D0P IN_P OUT_P MIPI_D0+_OUT
VIH = 1.2V 5 6
VIN V1(2_8V)
Enable @ Reset
4 2
[7] MIPI_D0N R835 47K 2
IN_N OUT_N
4 MIPI_D0-_OUT [7] [1] GPIO_CTP_PWR_EN EN1 GND

NC
K 1
0
0 0
8
C820 200mA
EMI803 1 R 1uF

1 3 [7] MIPI_D2P_OUT
[7] MIPI_D2P IN_P OUT_P

[7] MIPI_D2N 2 4 [7] MIPI_D2N_OUT


IN_N OUT_N

EMI804

[7] MIPI_D3P 1
IN_P OUT_P
3 [7] MIPI_D3P_OUT
Sub Camera 3
5
8
C
J841
[7] MIPI_D3N 2 4 [7] MIPI_D3N_OUT 1uF C851
IN_N OUT_N 1
NC
2 [1] MIPI2_CLK- 1 3 MIPI2_CLK-_OUT [7]
AGND IN_P OUT_P
3
[1,7] SDA1 SDA
F 4
EMI805 VCAMA p AVDD
7 5
U701 [1,7] SCL1 4 SCK [1] MIPI2_CLK+ 2 4 MIPI2_CLK+_OUT [7]
6 IN_N OUT_N
[1] GPIO_SUB_CMRST NC
7
[1] CMVREF VSYNC
G8 [1] 8
PS0 GPIO_SUB_CMPDN PWDN
9
[1] CMHREF HREF EMI3
F7 VCAMD_PMU 10
PS1 NC
47pF C850 11
DOVDD
VCAM_IOPMU
CMDAT9 12
Y7
[1,7] CMMCLK 13
MCLK
DPI_R0 D6 G4 MIPI_CKP [7] CMDAT8 14
DATA0 CLKP0 Y6
15 [1] MIPI2_D1- 1 3 MIPI2_D1-_OUT [7]
DGND IN_P OUT_P
DPI_R1 B7
DATA1 CLKN0
F4 MIPI_CKN [7] [2] 47K R721 2825_1.8V_IO [7] CMDAT7 16
Y5
1.8V_2825
[1] CMPCLK 17
PCLK
DPI_R2 A7 CMDAT6 18
DATA2 Y4 [1] MIPI2_D1+ 2 4 MIPI2_D1+_OUT [7]
CMDAT2 19 IN_N OUT_N
Y0
DPI_R3 C6 H2 MIPI_D0P [7] CMDAT5 20
DATA3 DATAP0 Y3
CMDAT3 21
Y1
DPI_R4 D5 G2 MIPI_D0N [7] CMDAT4 22
DATA4 DATAN0 Y2 EMI2
Disable @ Reset CMDAT1 23
NC
DPI_R5 B6 C868 CMDAT0 24
DATA5 NC

A6 G3
100nF
DPI_R6 DATA6 DATAP1 MIPI_D1P [7]
CMDAT[0:9] CON_24
DPI_R7 C5 F3 MIPI_D1N [7] [1] MIPI2_D0+ 1 3 MIPI2_D0+_OUT [7]
DPI_R[0:7] DATA7 DATAN1 IN_P OUT_P
[1]
DPI_G0 D4
DATA8
[1] MIPI2_D0- 2 4 MIPI2_D0-_OUT [7]
DPI_G1 B5 G5 MIPI_D2P [7] IN_N OUT_N
DATA9 DATAP2

DPI_G2 A5 G6 MIPI_D2N [7]


DATA10 DATAN2

DPI_G3 C4 EMI1
DATA11

DPI_G4 B4 F6 MIPI_D3P [7]


DATA12 DATAP3

DPI_G5

DPI_G6
A4

E3
DATA13

DATA14
DATAN3
G7 MIPI_D3N [7] Main Camera
DPI_G7 C3 F8 LRSTB [1,7]
DATA15 MIPI_RESET
DPI_G[0:7]
[1] DPI_B0 B3
DATA16

DPI_B1 A3 B8 analog
DATA17 PLXEL_CLK DPI_CK [1]
VCAM_IOPMU
io core VCAMA
DPI_B2 D3 C1
DATA18 SYSC_CLK_OUT
[2] 47K R722 2825_1.2V [7]
VCAMD_PMU
1V2_2825
DPI_B3 D2
DATA19 [2,7]

DPI_B4 C2
DATA20

DPI_B5 B2
DATA21

B1
Disable @ Reset
DPI_B6 DATA22 C871 K
7 K
1 F 4 7
2825_1.8V_IO 4 u 3 4 5 F
DPI_B7 A2
DATA23 C862 100nF 8 7. 4 4 u7
C 4 8 8
56PF C840 C842 C F C844 C 4.
u
100nF 100nF 7 100nF
.
DPI_B[0:7] 4
E7 G1
[1] LCD_SPI_SCK [1] SCK VDDIO
0 7
47K 4 1 4
R710 E6 F1 8 4 8 200mA
SDC MAVDD 2825_1.2V [7]
R 8 C
R
J840 U847
[1] LCD_SPI_SDI E4 E8 0
SDI MDVDD 4 AME8801
C864 8
D8 B 1
[1] LCD_SPI_SDO SDO 56PF [7] 2 1 5
MIPI2_D1-_OUT VBAT VIN VOUT [7]
[7] VCAMA
A8 MIPI2_D1+_OUT 3 F
[1] DPIVSYNC VSYNC u
4 1 2
GND
C7 F5 5
[1] DPIHSYNC HSYNC GND
6 3 4
[1] VCAMA_EN EN BYP
C8 H1 7
[1] DPI_DE DEN MGNDS
8 7 9 8
[7]
MIPI2_CLK-_OUT 4 4 4
[1] SPI_CS A1
CSX0 MGNDS
H3 [7] MIPI2_CLK+_OUT
9 Disable @ Reset 8
R SC70PIN5
8
C
8
C
10

2825_1.8V_IO
47K R712 E5
SHUT MGNDS
H4 11 VIH = 1.5V
12
H5 [7] MIPI2_D0+_OUT 13
MGNDS
14
X701 TX0275A 47K [7] MIPI2_D0-_OUT
R711 D1
TX_CLK MGNDS
H6 15
K F F
7 u u
16
4 1 1
4 3 E2 H7 17
VCC OUT TX_CLK_XIO MGNDS
18
1 2 0 1 [2] VCAM_AFPMU
VCTRL GND 6 6 F2 D7 19
8 8 TX_CLK_XIN MDGND
C C [1,7] 20
CMMCLK
[1] 21
CMRST
22
[1,7] SDA1
H8 [1,7] 23
TEST0 SCL1
24
[1] CMPDN
E1 25
F F DBCL
p p 26
7 7
4 4 27
2825_1.8V_IO 28
LCD-2011-1205 5
5 29
8
47K R713
4 C 30
1
7
R
30-0.4

F
p
7
4
K
7
4
H958_MB_MP2.0_20120822.sch-8 - Mon Oct 22 15:22:10 2012

BT&WIFI

ANT1002 ANT1001 RFNTF1608060BM1TDB (FM EMI Filter)


101266-1 101266-1 LFB182G45SG9A293

50 Ohm U1007
50 Ohm MAXIN LNA
R1018 0R 50 Ohm 50 1Ohm 3 C1022 15pF 50 Ohm WIFI/BT_ANT [8]
1 2 IN OUT

C1027 C1026
2

NC NC D
N
G

R1016 R1017

0R 0R
ANT1004 ANT1003 U1006
SAFEB1G57KE0F00 [1] GPIO186_6620_LNAEN
ANTENNA_FM to BT
50 Ohm R1052 0R 1 4
ANTENNA_FM to BT 2 1 IN OUT U1008
47pF C1042
1 6 [8]
GND L1013 GND RFOUT
C1041 C1088
GPS_RF
6.8nH 2 GND SHDN 5 47pF 47pF
L1004 L1003 2 3 5 3 RFIN VCC 4

NC NC TCXO_LDO
MAXIM_2659
L1088
1
C1052 NC
L1014
33nF 2
NC
GND
GND

VDD28_PMU

RTC_GPIO_2V8 [1,2]

VDD1V8_PMU 5
R 0
VDD28_PMU 0 0
1
R
C1005
OSC_IN_6620 [8]
100nF
VBAT C1025
5
0K 01
100nF 10 R1 U1001 0
6 9
5 8
5 7
5 6
5 2
5 8
2 5
1 6 5 04 43 33 53

D
N D
N D
N D
N D
N D
N D
N 1
D 3
L 2EL ID KL O_ NI
G G G G G G G S
_ E
S EE CCT LKC C_S
[1] PMU_EN_6620 4 PMU_EN O
I T
N TS
VBAT 14 D
D A NA R CT
R
O
VBAT V
LXB_6620 11 D 1
LXB SYSRST_B DAIRST [1]
L1001 LQM2HPN2R2MG0 (2.2uH)
C1001 C1002 12 BUCKOUT OSC_EN 3
8 WF_PA_LDOOUT
4.7uF 4.7uF 42
C0603 7
GPS_SYNC GPS_SYNC_6620 [1] SYNC -----> BPI_BUS8
PCTCXO/SMD/2.5X2/IT2200MV/RAKON WF_PA_VDD
9 DVDDIO18
13 54
U1002 GND_SMPS FSOURCE
2
N 36 TCXO_LDO
E
VDD28_PMU 41 DVDDIO28 MT6620 module BGF_INT_B 2 BGF_INT_B_6620 [1]
C1003 C1004 32 VRTC WIFI_INT_B 10 WIFI_INT_B_6620 [1]
3 1 VRTC
GND VREF
C1006 C1009 2.2uF C1010 1uF ALL_INT_B 55 [1]
ALL_INT_B_6620
4.7uF 100nF
S
N 1uF [1] MC3DA1 20 39 50 Ohm
C1008 1nF 4 E 6 SD1_DAT1 GPS_ANT_P GPS_RF [8]
[8] OSC_IN_6620 OUT S
T VCC 17
[1] MC3DA2 SD1_DAT2
0R R1003 21 50
5 TCXO_LDO [1] MC3DA3 SD1_DAT3 PCM1SYNC DAISYNC [1]
[1] MC3CMD 19 SD1_CMD PCM1IN 49 DAIPCMOUT [1]
[1] MC3CLK 18 SD1_CLK PCM1OUT 48 DAIPCMIN [1]
Close to MT6620 [1] MC3DA0 16 SD1_DAT0 PCM1CLK 47 DAICLK [1]

C1007 1uF star connect to U1001.18 [1] UTXD3 23 UART1_URXD NI TOU RF_I_CAL 38
[1] URXD3 22 T T
U R _L T_R T_L
_ _ _ 37
UART1_UTXD TAA ATA KL S AUX_REF
Separate MC1CK and MC1CK_FB with GND shield N
A N
_
I
T
A
O
X
T
_ P
_ N
X
R
_
X
R
I NUI UUO UUO
N
U
A D D C W
F
I _
T _
M M _
_ M _
M _A A_ _A S_2 S_2 _S2 S_2
W B F F F F FM FM MF I I I I
1
3 5 9 3 1
0 3 7 26 24 25 43 46 44 45
S500 5 2 2

I2S1_WS [1]
I2S1_CK [1]

I2S1_DAT [1]
[8] WIFI/BT_ANT

[3] FM_RX_N_6620
L1007
[3] FM_ANT
27nH

C1012 10pF

XTEST EEDI ANTSEL_3


2.8V TCXO or OSC 0 0 0 Default
clock setting 1.8V TCXO or OSC 0 1 0
XTAL 0 0 1
external clock mode 0 1 1

XTEST ANTSEL_2 ANTSEL_1


WIFI :SDIO1 0 0 0 Default
WIFI host
interface WIFI :SDIO2 0 0 1
WIFI :SPI 0 1 0
WIFI :reserved 0 1 1

XTEST ANTSEL_0
BT/common host
interface UART1 0 0 Default
SDIO2 0 1
H958_MB_MP2.0_20120822.sch-9 - Mon Oct 22 15:22:10 2012

SD CARD

VMCH

CON1401

0R R1401
1
[1] MC1DA2 DAT2
2
[1] MC1DA3 R1402 0R DAT3/CD
3
[1] MC1CM0 CMD
0R R1403 4
VDD
5
[1] MC1CK CLK
0R R1404 6
VSS2
[1] 7
MC1DA0 DAT0
0R R1405 8
DAT1 D N
D D N
D
[1] MC1DA1 N N
0R R1406 G G G G
C1401 9 1
0 1 1
2
1
1uF

Separate MC0CK and MC0CK_FB with GND shield


H958_MB_MP2.0_20120822.sch-10 - Mon Oct 22 15:22:10 2012

13 16

CON1001
VE103-027-X7

14 15

1 2 3 4 5 6 7 8 9 0
1 1
1 12

[2] SIMCLK_A
SIMCLK_B [2]
[2] SIMIO_A
SIMIO_B [2]
[2] SIMRST_A
SIMRST_B [2]
[2] VSIM_A

VSIM_B [2]

C1504 C1514

100nF 100nF
H958_MB_MP2.0_20120822.sch-12 - Mon Oct 22 15:22:10 2012

M-Sensor
VDD1V8_PMU

VDD28_PMU

2
4.7uF
C1611 R1629
MMC3280-5-6 U1011
U1601 4.7k
1
A1 D4 1 8 [1,3,7,12]
CAP SDA VDD SDA SDA0

SCL0 A3 D1
SCL NC
[1,3,7,12] 7 2 [1,3,7,12]
[1] EINT_ALS INT SCL SCL0
A4 C4 [1,2,3,4,5,7,8,12]
TEST VDD VDD1V8_PMU
3 6
GND LDR
[2,8,12] VDD28_PMU B1 C2
VDA VPP
C1602
SDA0 B3 C1 4 5
SDA VSA VPSENSOR LEDA LEDK
[1,3,7,12] 100nF
C1601

1uF TAOS2771/3_8PIN
1 U1620
C1620
2.2uF C1604 VBAT AME8801
2 1uF
C1608 100nF
1 5 VPSENSOR [12]
VIN VOUT

2
GND

3 4
P-SENSOR_LDO_EN EN BYP C1623
[1]
100nF
0
2 K SC70PIN5
6 0
0 C1622
1
R 1
100nF

G Sensor Gyro Sensor


SDA0 [1,3,7,12]

0 1610
U1610 1
A
D

[1,2,3,4,5,7,8,12]
S 1650
VDD1V8_PMU 1 IOVDD SCL 9 [1,3,7,12]
9 SCL0
5 D ]
1
6
2 NC U ADDR 8 2
1
1
C X ,
3 AUXIN K NC 7 8
,
7 ]
, U 2
5 M 1
4 GND CS 6 , P ,
4 _ 7
D , 8 , [1,3,7,12] SCL0 C1653
D
V 3 V 3
, 1 , 2.2nF
VDD1V8_PMU 2 D 1 [1,3,7,12] SDA0
F 5 , D [
p 1 V
7 [
4
0
6 [1,12] L 42 32 22 12 02 91
0
EINT3_G C U1650
6 S
1 AD LC TU VS T VS
C VDD28_PMU S S OK RE OU RE
PC
CL

1 CLKIN GND 18
2 NC NC 17
3 NC NC 16
F R1655
p 4 NC NC 15
7 0R
4 5 NC NC 14
6 IME_DA VDD 13 VDD28_PMU
2 1 0 C1652
1 1 1 U1613 CL CI UT C
E_M GOL 0D OGE YNS TN
X S B I V A R F I 100nF
C P S
1 S C 9
SDO GND MPU-3050 7 8 9 10 11 12

2 8 EINT1_GY [1]
[1,3,7,12] SDA0 SDA GNDIO
3 7
VDDIO 1 2
VDD VDD28_PMU [2,8,12]
T T VDD1V8_PMU
C N N
C1613 N I I C1650 1

4 5 6 BMA222E-DS00 1
Sync to Camera key
C1614 10nF 2 C1651
100nF
100nF
100nF 2

I2C Address: 0x68 (Write:0xD0, Read:0xD1)


G
_
3
T
N
I
E
]
2
1
,
1
[

Power Key
KEY
DO NOT put pull-up resistor on PWRKEY KEY
1620
CON1620

[1,2,12] PWRKEY
1
2
6
1

2
1621 Indicator LED
1
C
216
CON1621
R1V LED1601
[2]
4 4 ISINK5
[1,2,12] PWRKEY 1
B
5 3 ISINK4 [2]
F 2 2 3
p 6 G
7 1
C [2]
4 226 VBAT 1 1 2 2 ISINK0
R
R1V
19-237D-BHR6GHC-C01-2T (3-Color-LED)

F
p
7
4

VOL_UP VOL_DWON

CON1602
[1] 1
KROW4
[1,3] 2
KCOL1
[1,3] 3 4
KCOL2 GND

[1] KROW5 5

03 04 05 06
16R 16R 16R 16R 5-1_0.4PITCH
V V V V

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