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Compal Confidential
1
Model Name : 1

File Name : LA-8671P

Compal Confidential 2

TN-Note Schematic Document

2012-10-04
3 3

REV:1A_1004A

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2010/08/25 Deciphered Date 2012/08/25 Title
AMY WEN THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
Cover Page
Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1A
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8671P_SDV
Date: Thursday, October 04, 2012 Sheet 1 of 50
A B C D E
A B C D E

Compal Confidential
Model Name : TN-Note
UCPU1 UCPU1 UCPU1 UCPU1
CPU2@ SA00005L5H0 S IC AV8063801058401 SR0N9 L1 1.8G A39! Sub-board
CPU3@ SA00005K6I0 S IC AV8063801058002 SR0N8 L1 1.7G A39!
File Name : Block Diagram CPU4@ SA00005L9F0 S IC AV8063801057801 SR0N7 L1 1.8G A39!

ZZZ
CPU2@
1.8G
SA00005L5H0
CPU3@
1.7G
SA00005K6I0
CPU4@
1.8G
SA00005L9F0
CPU5@
1.9G
SA00005K5E0
CPU5@ SA00005K5E0 S IC AV8063801057605 SR0N6 L1 1.9G A39! 1. PWR Board (LS-8671P)
CPU6@ SA00005UH60 S IC AV8062701313000 SR0U3 J1 1.4G A39!

UCPU1 2. HDD Board (LS-8672P)


DAZ0RP00201
1

U5006 U5009 U5008 U5007 CPU6@


3. P-Sensor1 Board (LS-8673P) 1

1.4G
SA00005UH60
4. P-Sensor2 Board (LS-8674P)
DDR2@ DDR2@ DDR2@ DDR2@
ELIPDA 8G ELIPDA 8G ELIPDA 8G ELIPDA 8G
SA000058U20 SA000058U20 SA000058U20 SA000058U20

UD1 UD2 UD3 UD4 ZZZ1 ZZZ2 ZZZ3

Intel
Ivy Bridge Single Channel
DDR2@
ELIPDA 8G
DDR2@
ELIPDA 8G
DDR2@
ELIPDA 8G
DDR2@
ELIPDA 8G
X76E4G@
ELPIDA_4G
X76H4G@
HYNIX_4G
X76S4G@
SAMSUNG_4G DDR3-1333(1.5V)
DDR3 Chip x8
SA000058U20 SA000058U20 SA000058U20 SA000058U20 X7639839L07 X7639839L08 X7639839L09
BGA P. 10~11
R5049 R267 R1944 R5066 ZZZ4 ZZZ5

P. 04~09
DDR2@ DDR2@ DDR2@ DDR2@ X76E2G@ X76H2G@
10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% ELPIDA_2G HYNIX_2G
SD028100280 SD028100280 SD028100280 SD028100280 X7639839L10 X7639839L11
FDI DMI USB 2.0
LVDS USB3.0 USB 3.0 Conn. - L
2 LVDS Conn. P. 23 P. 26 2

HDMI PWR/B
mHDMI Conn. P. 24
DP Intel USB2.0 USB 3.0 Conn. - R ALS (PWR/B Conn.)
mDP Conn. P. 25 P. 27 CM3218
HDA Panther Point P. 37

2-Ch. SPK Conn. P. 28


DMIC Audio Codec PCI-E SATA Sensor Hub Accelerometer & eCompass
ALC3202 SPI STM32F103CBU6TR LSM303DLHCTR
P. 21
P. 28 P. 21
P. 12~20
Combo Jack Conn.P. 29
LPC Gyro
1X BIOS ROM TPM L3GD20TR
P. 21
Card Reader (8M+4M) P. 12 P. 36
Touch Panel (LVDS Conn.)P. 23
RTS5229 P. 22
EC
3
LAN 1X ENE KB9012 3

RTL8111F P. 30
P. 34 Camera & DMIC
DMIC (LVDS Conn.)
P. 23

RJ45 Conn. P. 31 APS Int.KBD


P. 35
LIS34ALTR
P. 33

mini PCI-E (WLAN) 1X


Click Pad
P. 35 (WWAN) mini PCI-E
Half Card Conn.
WLAN & BT
USB(BT) Thermal Sensor Full Card Conn. SIM Conn.
(mSATA)
P. 32 Fintek 75303M
P. 33
Track Point
P. 35
WWAN/mSATA
P. 32
P. 32

HDD BTB Conn. P-Sensor1 Conn.


PCH_GPIO
P. 36
4
HDD/B 4

PCH_GPIO
P-Sensor2 Conn.
AMY WEN P-Sensor2/B (Left) Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/08/25 Deciphered Date 2012/08/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
TN-Note Block Diagram
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-8671P_SDV 1A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 04, 2012 Sheet 2 of 50
A B C D E
A B C D E

Voltage Rails BOARD ID Table


SIGNAL
STATE SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Board ID PCB Revision
Full ON H H H ON ON ON
0 0.1
1
+5VS
1 0.2 1

S3 (Suspend to RAM) L H H ON ON OFF 2 0.3


Power plane +3VS
+1.8VS S4 (Suspend to Disk) L L H ON OFF OFF
3 0.4
+5VALW +3VM +1.5VS
4 0.5
S5 (Soft OFF) L L L ON OFF OFF 5
+B +3VALW +1.5V +1.05VM +1.05VS
+VCC_GFXCORE_AXG
6
+CPU_CORE
7
State +VCCSA
+0.75VS

S0
O O O O O EC SM Bus1 address EC SM Bus2 address
S3 Device Address HEX Device Address HEX
O O O O X Smart Battery 0001-011xb 16H Thermal sensor 1001-101x b 9AH
M3 Charger 0001-0010b 12H PCH (SML1DATA / GPIO75) 1001-0110 b 96H
O O O O X
2 2

S4/S5 - AC O O X X X
S4/S5 - BATT ONLY
SM Bus Controller
O X X X X Device Address HEX
S4/S5 - NO AC & BATT Security Rom 1010-100x b A8 H
X X X X X DDR DIMM0 1010-000x b A0 H

USB3.0 USB2.0 NOTE


BOM Structure
1 0
SDV FVT SIT SVT SOVP SM Bus Controller 0 2 1* USB3.0/2.0 Conn
Device Address HEX
@ : No Stuff No-use No-use No-use
3 2 USB3.0/2.0 Conn

3
4 3 3
ME@ : ME components
4 Sensor Hub
CPUx@ : CPU SKU V V V V V Sensor HUB 5 USB Camera

DDRx@ : RAM SKU V V V V V Device Address HEX 6 X


ALS 0100-100x b 48h
7 X
SBA@ : SBA APS 0011-001x b 32h
V V V V V
Gyroscope 0110-101xb 6Ah 8 Touch Panel
NOSBA@ : NO SBA e-Compass 0011-110x b 3Ch
9* WWAN

ID4@ : Intel Deep S4 V 10 WLAN

11 Finger Printer**
AOAC@ : AOAC V V V V V
12
TPM@ : TPM V V V V 13 Bluetooth**

4 4
Short@ : 0ohm short pad * Debug Port
** Not Use

Security Classification Compal Secret Data Compal Electronics, Inc.


AMY WEN Issued Date 2011/05/16 Deciphered Date 2013/05/16 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Sheet
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-8671P 1A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 04, 2012 Sheet 3 of 50
A B C D E
A B C D E

+1.05VS

PEG_ICOMPI and RCOMPO signals should be shorted and routed

1
with - max length = 500 mils - typical impedance = 43 mohms
1 R6 1
PEG_ICOMPO signals should be routed with - max length = 500 mils
24.9_0402_1% UCPU1I
- typical impedance = 14.5 mohms

2
UCPU1A
G3 PEG_COMP BG17 M4
PEG_ICOMPI G1 BG21 VSS[181] VSS[250] M58
M2 PEG_ICOMPO G4 BG24 VSS[182] VSS[251] M6
[14] DMI_CRX_PTX_N0 DMI_RX#[0] PEG_RCOMPO VSS[183] VSS[252]
[14] DMI_CRX_PTX_N1 P6 BG28 N1
P1 DMI_RX#[1] BG37 VSS[184] VSS[253] N17
[14] DMI_CRX_PTX_N2 DMI_RX#[2] VSS[185] VSS[254]
[14] DMI_CRX_PTX_N3 P10 H22 BG41 N21
DMI_RX#[3] PEG_RX#[0] J21 BG45 VSS[186] VSS[255] N25
N3 PEG_RX#[1] B22 BG49 VSS[187] VSS[256] N28
[14] DMI_CRX_PTX_P0 DMI_RX[0] PEG_RX#[2] VSS[188] VSS[257]
[14] DMI_CRX_PTX_P1 P7 D21 PEG Static Lane Reversal - CFG2 is for the 16x BG53 N33
DMI_RX[1] PEG_RX#[3] VSS[189] VSS[258]

DMI
[14] DMI_CRX_PTX_P2 P3 A19 BG9 N36
P11 DMI_RX[2] PEG_RX#[4] D17 C29 VSS[190] VSS[259] N40
[14] DMI_CRX_PTX_P3 DMI_RX[3] PEG_RX#[5] VSS[191] VSS[260]
B14 1: Normal Operation; Lane # definition matches C35 N43
[14]
[14]
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
K1
M8 DMI_TX#[0]
DMI_TX#[1]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
D13
A11
CFG2 * socket pin map definition C40
D10
VSS[192]
VSS[193]
VSS[194]
VSS[261]
VSS[262]
VSS[263]
N47
N48
N4 B10 D14 N51
[14] DMI_CTX_PRX_N2 DMI_TX#[2] PEG_RX#[9] VSS[195] VSS[264]
R2 G8 0:Lane Reversed D18 N52
[14] DMI_CTX_PRX_N3 DMI_TX#[3] PEG_RX#[10] VSS[196] VSS[265]
A8 D22 N56
K3 PEG_RX#[11] B6 D26 VSS[197] VSS[266] N61
[14] DMI_CTX_PRX_P0 DMI_TX[0] PEG_RX#[12] VSS[198] VSS[267]
M7 H8 D29 P14
[14] DMI_CTX_PRX_P1 DMI_TX[1] PEG_RX#[13] VSS[199] VSS[268]
P4 E5 D35 P16
[14] DMI_CTX_PRX_P2 DMI_TX[2] PEG_RX#[14] VSS[200] VSS[269]
T3 K7 D4 P18
[14] DMI_CTX_PRX_P3 DMI_TX[3] PEG_RX#[15] VSS[201] VSS[270]
D40 P21
K22 D43 VSS[202] VSS[271] P58
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
K19
C21
D46
D50
VSS[203]
VSS[204]
VSS[205]
VSS VSS[272]
VSS[273]
VSS[274]
P59
P9
FDI_CTX_PRX_N0 U7 D19 D54 R17
[14] FDI_CTX_PRX_N0 FDI0_TX#[0] PEG_RX[3] VSS[206] VSS[275]
FDI_CTX_PRX_N1 W11 C19 D58 R20
2 [14] FDI_CTX_PRX_N1 FDI0_TX#[1] PEG_RX[4] VSS[207] VSS[276] 2
FDI_CTX_PRX_N2 W1 D16 D6 R4
[14] FDI_CTX_PRX_N2 FDI0_TX#[2] PEG_RX[5] VSS[208] VSS[277]
FDI_CTX_PRX_N3 AA6 C13 E25 R46
[14] FDI_CTX_PRX_N3 FDI0_TX#[3] PEG_RX[6] VSS[209] VSS[278]
FDI_CTX_PRX_N4 W6 D12 E29 T1
[14] FDI_CTX_PRX_N4 FDI1_TX#[0] PEG_RX[7] VSS[210] VSS[279]
FDI_CTX_PRX_N5 V4 C11 E3 T47
PCI EXPRESS -- GRAPHICS

[14] FDI_CTX_PRX_N5 FDI1_TX#[1] PEG_RX[8] VSS[211] VSS[280]


FDI_CTX_PRX_N6 Y2 C9 E35 T50
[14] FDI_CTX_PRX_N6 FDI1_TX#[2] PEG_RX[9] VSS[212] VSS[281]
FDI_CTX_PRX_N7 AC9 F8 E40 T51
[14] FDI_CTX_PRX_N7 FDI1_TX#[3] PEG_RX[10] VSS[213] VSS[282]
Intel(R) FDI

C8 F13 T52
PEG_RX[11] C5 F15 VSS[214] VSS[283] T53
FDI_CTX_PRX_P0 U6 PEG_RX[12] H6 F19 VSS[215] VSS[284] T55
[14] FDI_CTX_PRX_P0 FDI0_TX[0] PEG_RX[13] VSS[216] VSS[285]
FDI_CTX_PRX_P1 W10 F6 F29 T56
[14] FDI_CTX_PRX_P1 FDI0_TX[1] PEG_RX[14] VSS[217] VSS[286]
FDI_CTX_PRX_P2 W3 K6 F35 U13
[14] FDI_CTX_PRX_P2 FDI0_TX[2] PEG_RX[15] VSS[218] VSS[287]
FDI_CTX_PRX_P3 AA7 F40 U8
[14] FDI_CTX_PRX_P3 FDI0_TX[3] VSS[219] VSS[288]
FDI_CTX_PRX_P4 W7 G22 F55 V20
[14] FDI_CTX_PRX_P4 FDI1_TX[0] PEG_TX#[0] VSS[220] VSS[289]
FDI_CTX_PRX_P5 T4 C23 G51 V61
[14] FDI_CTX_PRX_P5 FDI1_TX[1] PEG_TX#[1] VSS[221] VSS[290]
FDI_CTX_PRX_P6 AA3 D23 G6 W13
[14] FDI_CTX_PRX_P6 FDI1_TX[2] PEG_TX#[2] VSS[222] VSS[291]
FDI_CTX_PRX_P7 AC8 F21 G61 W15
[14] FDI_CTX_PRX_P7 FDI1_TX[3] PEG_TX#[3] VSS[223] VSS[292]
H19 H10 W18
FDI_FSYNC0 AA11 PEG_TX#[4] C17 H14 VSS[224] VSS[293] W21
[14] FDI_FSYNC0 FDI0_FSYNC PEG_TX#[5] VSS[225] VSS[294]
[14] FDI_FSYNC1 FDI_FSYNC1 AC12 K15 H17 W46
FDI1_FSYNC PEG_TX#[6] F17 H21 VSS[226] VSS[295] W8
FDI_INT U11 PEG_TX#[7] F14 H4 VSS[227] VSS[296] Y4
[14] FDI_INT FDI_INT PEG_TX#[8] VSS[228] VSS[297]
A15 H53 Y47
FDI_LSYNC0 AA10 PEG_TX#[9] J14 H58 VSS[229] VSS[298] Y58
[14] FDI_LSYNC0 FDI0_LSYNC PEG_TX#[10] VSS[230] VSS[299]
[14] FDI_LSYNC1 FDI_LSYNC1 AG8 H13 J1 Y59
FDI1_LSYNC PEG_TX#[11] M10 J49 VSS[231] VSS[300] G48
PEG_TX#[12] F10 J55 VSS[232] VSS[301]
+1.05VS PEG_TX#[13] D9 K11 VSS[233]
PEG_TX#[14] J4 K21 VSS[234]
1 2 +EDP_COM AF3 PEG_TX#[15] K51 VSS[235]
R7 24.9_0402_1% AD2 eDP_COMPIO F22 K8 VSS[236] A5 T90 PAD @
AG11 eDP_ICOMPO PEG_TX[0] A23 L16 VSS[237] VSS_NCTF_1 A57 T91 PAD @
eDP_HPD# PEG_TX[1] D24 L20 VSS[238] VSS_NCTF_2 BC61
3 PEG_TX[2] E21 L22 VSS[239] VSS_NCTF_3 BD3 3
AG4 PEG_TX[3] G19 L26 VSS[240] VSS_NCTF_4 BD59
AF4 eDP_AUX# PEG_TX[4] B18 L30 VSS[241] VSS_NCTF_5 BE4

NCTF
eDP_AUX PEG_TX[5] K17 L34 VSS[242] VSS_NCTF_6 BE58
PEG_TX[6] VSS[243] VSS_NCTF_7
eDP

G17 L38 BG5 T95 PAD @


AC3 PEG_TX[7] E14 L43 VSS[244] VSS_NCTF_8 BG57 T96 PAD @
AC4 eDP_TX#[0] PEG_TX[8] C15 L48 VSS[245] VSS_NCTF_9 C3 T97 PAD @
AE11 eDP_TX#[1] PEG_TX[9] K13 L61 VSS[246] VSS_NCTF_10 C58
AE7 eDP_TX#[2] PEG_TX[10] G13 M11 VSS[247] VSS_NCTF_11 D59
eDP_TX#[3] PEG_TX[11] K10 M15 VSS[248] VSS_NCTF_12 E1 T103PAD @
AC1 PEG_TX[12] G10 VSS[249] VSS_NCTF_13 E61 T98 PAD @
AA4 eDP_TX[0] PEG_TX[13] D8 VSS_NCTF_14
AE10 eDP_TX[1] PEG_TX[14] K4
AE6 eDP_TX[2] PEG_TX[15]
eDP_TX[3]

IVY-BRIDGE_BGA1023 IVY-BRIDGE_BGA1023
CPU1@ CPU1@

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/05/16 Deciphered Date 2013/05/16 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PROCESSOR(1/6) DMI,FDI,PEG
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
LA-8671P_SDV
AMY WEN A B C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D
Date: Thursday, October 04, 2012
E
Sheet 4 of 50
5 4 3 2 1

UCPU1B

J3 CLK_CPU_DMI_R 33_0402_5% R8 1 2
BCLK H2 CLK_CPU_DMI [13]
PROC_DETECT (Processor Detect): pulled to CLK_CPU_DMI#_R 33_0402_5% R12 1 2
BCLK# CLK_CPU_DMI# [13]

MISC
ground on the processor package. There is no

CLOCKS
D D
connection to the processor silicon for this F49
signal. System board designers may use this [17] H_SNB_IVB# PROC_SELECT# AG3 2 1 1K_0402_5%
R9
signal to determine if the processor is DPLL_REF_CLK AG1 R10 2 1 1K_0402_5%
present DPLL_REF_CLK# +1.05VS
2 1 C57
R11 @ 10K_0402_5% PROC_DETECT#
+1.05VS

PAD~D T1 @ H_CATERR# C49


CATERR#

THERMAL
R13
62_0402_5% A48 AT30 H_DRAMRST#
[17,34] H_PECI PECI SM_DRAMRST# H_DRAMRST# [6]

1
R15 BF44 SM_RCOMP0 140_0402_1% 1 2 R16 @ C82
SM_RCOMP[0]

DDR3
MISC
[34] H_PROCHOT#
1 2 H_PROCHOT#_R C45 BE43 SM_RCOMP1 25.5_0402_1%1 2 R17
56_0402_5% PROCHOT# SM_RCOMP[1] BG43 SM_RCOMP2 200_0402_1% 1 2 R18 100P_0402_50V8J
SM_RCOMP[2] 2
DDR3 Compensation Signals
H_THERMTRIP# D45
[17] H_THERMTRIP# THERMTRIP#
PU/PD for JTAG signals +1.05VS
N53 XDP_PRDY#
PRDY# N55 XDP_PREQ#
PREQ# ESD XDP_TMS R20 2 1 51_0402_5%
TCK
L56
L55
XDP_TCK
XDP_TMS
C Reserve XDP_TDI
XDP_TDO
R21 2
2
1 51_0402_5%
1 51_0402_5%
R22
TMS

PWR MANAGEMENT
J58 XDP_TRST#
TRST# +3VS XDP_TCK R24 2 1 51_0402_5%

JTAG & BPM


[14] H_PM_SYNC
C48 M60 XDP_TDI XDP_TRST# R25 2 1 51_0402_5%
PM_SYNC TDI

1
L59 XDP_TDO
R14 TDO R27
0_0402_5% 1K_0402_5%
[17] H_CPUPWRGD
1 2 H_CPUPWRGD_R B46
C short@ UNCOREPWRGOOD K58 XDP_DBRESET# C
XDP_DBRESET# [12,14]

2
DBR#
2

1 R29
C5236 R28 1 2 VDDPWRGOOD_R BE45 G58 XDP_BPM#0
@ 130_0402_1% SM_DRAMPWROK BPM#[0] E55 XDP_BPM#1
10K_0402_5% BPM#[1]
100P_0402_50V8J E59 XDP_BPM#2 JDB1
2 BPM#[2] G55 XDP_BPM#3 XDP_PREQ# 1
1

BPM#[3] G59 XDP_BPM#4 XDP_PRDY# 2 1


BUF_CPU_RST# D44 BPM#[4] H60 XDP_BPM#5 3 2
RESET# BPM#[5] J59 XDP_BPM#6 4 3
BPM#[6] J61 XDP_BPM#7 5 4
BPM#[7] 6 5
ESD 7 6
7
C Reserve 8
9 8
H_CPUPWRGD R52 1 @ 2 1K_0402_1% 10 9
R531 1 @ 2 0_0402_5% 11 10
[12,14,34] PBTN_OUT# 1 @ 2 12 11
IVY-BRIDGE_BGA1023 R54 1K_0402_1%
+1.05VS [7] XDP_CFG0 12
CPU1@ R397 1 @ 2 0_0402_5% 13
[14] SYS_PWROK @ 13
[13] CLK_XDP_CLK R389 1 2 0_0402_5% CLK_XDP_CLK_R 14
R400 1 @ 2 0_0402_5% CLK_XDP_CLK#_R 15 14
[13] CLK_XDP_CLK# 15
+1.05VS 16
PCH_PLTRST# R55 1 @ 2 1K_0402_1% 17 16
XDP_DBRESET# 18 17
19 18
XDP_TDO 20 19
20

1
+3VALW C5237 XDP_TRST# 21
Buffered reset to CPU 0.1U_0402_16V4Z XDP_TDI 22 21
@ XDP_TMS 23 22

2
@ +1.5V_CPU_VDDQ 24 23
24
1

C33 +3VS 25
25
1

0.1U_0402_16V4Z XDP_TCK 26
R30 27 26
2

+3VS 200_0402_5% 28 G1
@ U1 +1.05VS ESD G2

1
B R31 @ C34 R532, ACES_88717-2601 B
2
5

10K_0402_5% 0.1U_0402_16V4Z ME@


C39 Reserve
1

1 2 1
P

2
B 4PM_SYS_PWRGD_BUF R32
2 O 75_0402_5%
[14] PM_DRAM_PWRGD A
G

5
74AHC1G09GW_TSSOP5 R34 U3
3

43_0402_5% 1

P
@ R33 BUF_CPU_RST# 1 2 BUFO_CPU_RST# 4 NC
39_0402_5% Y 2PCH_PLTRST#
A PCH_PLTRST# [16,36]

G
1 2 SN74LVC1G07DCKR_SC70-5
1 2

R532 0_0402_5% C38

3
0.1U_0402_16V4Z
D @
2

[9] RUN_ON_CPU1.5VS3# RUN_ON_CPU1.5VS3# 2


G
Q4 S
2N7002K_SOT23-3
3

A A

AMY WEN Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/05/16 Deciphered Date 2013/05/16 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PROCESSOR(2/6) PM,XDP,CLK
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8671P_SDV
Date: Thursday, October 04, 2012 Sheet 5 of 50
5 4 3 2 1
5 4 3 2 1

UCPU1C
D D
[10,11] DDR_A_D[0..63]
UCPU1D
DDR_A_D0 AG6
DDR_A_D1 AJ6 SA_DQ[0] AU36 M_CLK_DDR0
SA_DQ[1] SA_CK[0] M_CLK_DDR0 [10]
DDR_A_D2 AP11 AV36 M_CLK_DDR#0 AL4
SA_DQ[2] SA_CK#[0] M_CLK_DDR#0 [10] SB_DQ[0]
DDR_A_D3 AL6 AY26 DDR_CKE0_DIMMA AL1 BA34
SA_DQ[3] SA_CKE[0] DDR_CKE0_DIMMA [10] SB_DQ[1] SB_CK[0]
DDR_A_D4 AJ10 AN3 AY34
DDR_A_D5 AJ8 SA_DQ[4] AR4 SB_DQ[2] SB_CK#[0] AR22
DDR_A_D6 AL8 SA_DQ[5] AK4 SB_DQ[3] SB_CKE[0]
DDR_A_D7 AL7 SA_DQ[6] AK3 SB_DQ[4]
DDR_A_D8 AR11 SA_DQ[7] AN4 SB_DQ[5]
DDR_A_D9 AP6 SA_DQ[8] AT40 M_CLK_DDR1 AR1 SB_DQ[6]
SA_DQ[9] SA_CK[1] M_CLK_DDR1 [10,11] SB_DQ[7]
DDR_A_D10 AU6 AU40 M_CLK_DDR#1 AU4
SA_DQ[10] SA_CK#[1] M_CLK_DDR#1 [10,11] SB_DQ[8]
DDR_A_D11 AV9 BB26 DDR_CKE1_DIMMA AT2 BA36
SA_DQ[11] SA_CKE[1] DDR_CKE1_DIMMA [10,11] SB_DQ[9] SB_CK[1]
DDR_A_D12 AR6 AV4 BB36
DDR_A_D13 AP8 SA_DQ[12] BA4 SB_DQ[10] SB_CK#[1] BF27
DDR_A_D14 AT13 SA_DQ[13] AU3 SB_DQ[11] SB_CKE[1]
DDR_A_D15 AU13 SA_DQ[14] AR3 SB_DQ[12]
DDR_A_D16 BC7 SA_DQ[15] AY2 SB_DQ[13]
DDR_A_D17 BB7 SA_DQ[16] BB40 DDR_CS0_DIMMA# BA3 SB_DQ[14]
SA_DQ[17] SA_CS#[0] DDR_CS0_DIMMA# [10] SB_DQ[15]
DDR_A_D18 BA13 BC41 DDR_CS1_DIMMA# BE9
SA_DQ[18] SA_CS#[1] DDR_CS1_DIMMA# [10,11] SB_DQ[16]
DDR_A_D19 BB11 BD9 BE41
DDR_A_D20 BA7 SA_DQ[19] BD13 SB_DQ[17] SB_CS#[0] BE47
DDR_A_D21 BA9 SA_DQ[20] BF12 SB_DQ[18] SB_CS#[1]
DDR_A_D22 BB9 SA_DQ[21] BF8 SB_DQ[19]
DDR_A_D23 AY13 SA_DQ[22] BD10 SB_DQ[20]
DDR_A_D24 AV14 SA_DQ[23] AY40 M_ODT0 BD14 SB_DQ[21]
SA_DQ[24] SA_ODT[0] M_ODT0 [10] SB_DQ[22]
DDR_A_D25 AR14 BA41 M_ODT1 BE13
SA_DQ[25] SA_ODT[1] M_ODT1 [10,11] SB_DQ[23]
DDR_A_D26 AY17 BF16 AT43
DDR_A_D27 AR19 SA_DQ[26] BE17 SB_DQ[24] SB_ODT[0] BG47
DDR_A_D28 BA14 SA_DQ[27] BE18 SB_DQ[25] SB_ODT[1]
DDR_A_D29 AU14 SA_DQ[28] BE21 SB_DQ[26]
DDR_A_D30 BB14 SA_DQ[29] BE14 SB_DQ[27]
SA_DQ[30] DDR_A_DQS#[0..7] [10,11] SB_DQ[28]
DDR_A_D31 BB17 AL11 DDR_A_DQS#0 BG14
DDR_A_D32 BA45 SA_DQ[31] SA_DQS#[0] AR8 DDR_A_DQS#1 BG18 SB_DQ[29]
C
DDR_A_D33 AR43 SA_DQ[32] SA_DQS#[1] AV11 DDR_A_DQS#2 BF19 SB_DQ[30] AL3 C

DDR_A_D34 AW48 SA_DQ[33] SA_DQS#[2] AT17 DDR_A_DQS#3 BD50 SB_DQ[31] SB_DQS#[0] AV3
DDR_A_D35 BC48 SA_DQ[34] SA_DQS#[3] AV45 DDR_A_DQS#4 BF48 SB_DQ[32] SB_DQS#[1] BG11
DDR_A_D36 BC45 SA_DQ[35] SA_DQS#[4] AY51 DDR_A_DQS#5 BD53 SB_DQ[33] SB_DQS#[2] BD17
DDR_A_D37 AR45 SA_DQ[36] SA_DQS#[5] AT55 DDR_A_DQS#6 BF52 SB_DQ[34] SB_DQS#[3] BG51
SA_DQ[37] SA_DQS#[6] SB_DQ[35] SB_DQS#[4]
DDR SYSTEM MEMORY A

DDR_A_D38 AT48 AK55 DDR_A_DQS#7 BD49 BA59


DDR_A_D39 AY48 SA_DQ[38] SA_DQS#[7] BE49 SB_DQ[36] SB_DQS#[5] AT60
SA_DQ[39] SB_DQ[37] SB_DQS#[6]

DDR SYSTEM MEMORY B


DDR_A_D40 BA49 BD54 AK59
DDR_A_D41 AV49 SA_DQ[40] BE53 SB_DQ[38] SB_DQS#[7]
DDR_A_D42 BB51 SA_DQ[41] BF56 SB_DQ[39]
DDR_A_D43 AY53 SA_DQ[42] BE57 SB_DQ[40]
DDR_A_D44 BB49 SA_DQ[43] BC59 SB_DQ[41]
SA_DQ[44] DDR_A_DQS[0..7] [10,11] SB_DQ[42]
DDR_A_D45 AU49 AJ11 DDR_A_DQS0 AY60
DDR_A_D46 BA53 SA_DQ[45] SA_DQS[0] AR10 DDR_A_DQS1 BE54 SB_DQ[43]
DDR_A_D47 BB55 SA_DQ[46] SA_DQS[1] AY11 DDR_A_DQS2 BG54 SB_DQ[44]
DDR_A_D48 BA55 SA_DQ[47] SA_DQS[2] AU17 DDR_A_DQS3 BA58 SB_DQ[45] AM2
DDR_A_D49 AV56 SA_DQ[48] SA_DQS[3] AW45 DDR_A_DQS4 AW59 SB_DQ[46] SB_DQS[0] AV1
DDR_A_D50 AP50 SA_DQ[49] SA_DQS[4] AV51 DDR_A_DQS5 AW58 SB_DQ[47] SB_DQS[1] BE11
DDR_A_D51 AP53 SA_DQ[50] SA_DQS[5] AT56 DDR_A_DQS6 AU58 SB_DQ[48] SB_DQS[2] BD18
DDR_A_D52 AV54 SA_DQ[51] SA_DQS[6] AK54 DDR_A_DQS7 AN61 SB_DQ[49] SB_DQS[3] BE51
DDR_A_D53 AT54 SA_DQ[52] SA_DQS[7] AN59 SB_DQ[50] SB_DQS[4] BA61
DDR_A_D54 AP56 SA_DQ[53] AU59 SB_DQ[51] SB_DQS[5] AR59
DDR_A_D55 AP52 SA_DQ[54] AU61 SB_DQ[52] SB_DQS[6] AK61
DDR_A_D56 AN57 SA_DQ[55] AN58 SB_DQ[53] SB_DQS[7]
DDR_A_D57 AN53 SA_DQ[56] AR58 SB_DQ[54]
DDR_A_D58 AG56 SA_DQ[57] AK58 SB_DQ[55]
DDR_A_D59 AG53 SA_DQ[58] AL58 SB_DQ[56]
DDR_A_D60 AN55 SA_DQ[59] AG58 SB_DQ[57]
SA_DQ[60] DDR_A_MA[0..15] [10,11] SB_DQ[58]
DDR_A_D61 AN52 BG35 DDR_A_MA0 AG59
DDR_A_D62 AG55 SA_DQ[61] SA_MA[0] BB34 DDR_A_MA1 AM60 SB_DQ[59]
DDR_A_D63 AK56 SA_DQ[62] SA_MA[1] BE35 DDR_A_MA2 AL59 SB_DQ[60] BF32
SA_DQ[63] SA_MA[2] BD35 DDR_A_MA3 AF61 SB_DQ[61] SB_MA[0] BE33
SA_MA[3] AT34 DDR_A_MA4 AH60 SB_DQ[62] SB_MA[1] BD33
SA_MA[4] AU34 DDR_A_MA5 SB_DQ[63] SB_MA[2] AU30
SA_MA[5] BB32 DDR_A_MA6 SB_MA[3] BD30
B B
BD37 SA_MA[6] AT32 DDR_A_MA7 SB_MA[4] AV30
[10,11] DDR_A_BS0 SA_BS[0] SA_MA[7] SB_MA[5]
BF36 AY32 DDR_A_MA8 BG30
[10,11] DDR_A_BS1 SA_BS[1] SA_MA[8] SB_MA[6]
BA28 AV32 DDR_A_MA9 BG39 BD29
[10,11] DDR_A_BS2 SA_BS[2] SA_MA[9] SB_BS[0] SB_MA[7]
BE37 DDR_A_MA10 BD42 BE30
SA_MA[10] BA30 DDR_A_MA11 AT22 SB_BS[1] SB_MA[8] BE28
SA_MA[11] BC30 DDR_A_MA12 SB_BS[2] SB_MA[9] BD43
BE39 SA_MA[12] AW41 DDR_A_MA13 SB_MA[10] AT28
[10,11] DDR_A_CAS# SA_CAS# SA_MA[13] SB_MA[11]
BD39 AY28 DDR_A_MA14 AV28
[10,11] DDR_A_RAS# SA_RAS# SA_MA[14] SB_MA[12]
AT41 AU26 DDR_A_MA15 AV43 BD46
[10,11] DDR_A_WE# SA_WE# SA_MA[15] SB_CAS# SB_MA[13]
BF40 AT26
BD45 SB_RAS# SB_MA[14] AU22
SB_WE# SB_MA[15]

IVY-BRIDGE_BGA1023
CPU1@ IVY-BRIDGE_BGA1023
+1.5V CPU1@

@ R36
1

0_0402_5%
1 2 R37
1K_0402_5%

R38
2

1K_0402_5%
S

[5] H_DRAMRST# H_DRAMRST# 3 1 DDR3_DRAMRST#_R 1 2


DDR3_DRAMRST# [10,11]
2

Q5
R39 BSS138_NL_SOT23-3
G
2

4.99K_0402_1%
1

A A

[13,9] DRAMRST_CNTRL_PCH DRAMRST_CNTRL_PCH


1

AMY WEN C35


0.047U_0402_16V4Z
Security Classification Compal Secret Data Compal Electronics, Inc.
2

Issued Date 2011/05/16 Deciphered Date 2013/05/16 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PROCESSOR(3/6) DDRIII
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8671P_SDV
Date: Thursday, October 04, 2012 Sheet 6 of 50
5 4 3 2 1
5 4 3 2 1

CFG Straps for Processor

CFG2

UCPU1E

1
D D
@ R41
1K_0402_1%~D
XDP_CFG0 B50 N59
[5] XDP_CFG0 CFG[0] BCLK_ITP
C51 N58

2
CFG2 B54 CFG[1] BCLK_ITP#
D53 CFG[2]
CFG4 A51 CFG[3] N42
CFG5 C53 CFG[4] RSVD30 L42
CFG6 C55 CFG[5] RSVD31 L45
CFG7 H49 CFG[6] RSVD32 L47
CFG[7] RSVD33
PEG Static Lane Reversal - CFG2 is for the 16x
A55
H51 CFG[8]
K49 CFG[9] M13
K53 CFG[10] RSVD34 M14 CFG2
* 1:(Default) Normal Operation; Lane #
+CPU_CORE R43 F53 CFG[11] RSVD35 U14 definition matches socket pin map
49.9_0402_1% G53 CFG[12] RSVD36 W14 definition
2 1 L51 CFG[13] RSVD37 P13
CFG[14] RSVD38 0:Lane Reversed
F51
CFG[15]
2

D52
R91 L53 CFG[16] AT49 CFG4
100_0402_1%~D CFG[17] RSVD39 K24
RSVD40
@

1
VCC_VAL_SENSE H43

RESERVED
1

2 R44 1 VSS_VAL_SENSE K43 VCC_VAL_SENSE AH2 @ R42


VSS_VAL_SENSE RSVD41 AG13 1K_0402_1%~D
49.9_0402_1% RSVD42 AM14
VCC_AXG_VAL_SENSE H45 RSVD43 AM15

2
VSS_AXG_VAL_SENSE K45 VAXG_VAL_SENSE RSVD44
VSSAXG_VAL_SENSE
N50
T20 @ F48 RSVD45
PAD~D VCC_DIE_SENSE
+VCC_GFXCORE_AXG Display Port Presence Strap
H48
C
R45 K48 RSVD6 C
2 1
49.9_0402_1% RSVD7 A4
DC_TEST_A4 C4 CFG4
* 1 : Disabled; No Physical Display Port
DC_TEST_C4 attached to Embedded Display Port
2

BA19 D3
R89 AV19 RSVD8 DC_TEST_D3 D1
AT21 RSVD9 DC_TEST_D1 A58
100_0402_1%~D RSVD10 DC_TEST_A58 0 : Enabled; An external Display Port device is
@ BB21 A59
BB19 RSVD11 DC_TEST_A59 C59 connected to the Embedded Display Port
1

2 R46 1 AY21 RSVD12 DC_TEST_C59 A61


BA22 RSVD13 DC_TEST_A61 C61
49.9_0402_1% AY22 RSVD14 DC_TEST_C61 D61
AU19 RSVD15 DC_TEST_D61 BD61 CFG6
AU21 RSVD16 DC_TEST_BD61 BE61
BD21 RSVD17 DC_TEST_BE61 BE59 CFG5
BD22 RSVD18 DC_TEST_BE59 BG61
RSVD19 DC_TEST_BG61

1
BD25 BG59
BD26 RSVD20 DC_TEST_BG59 BG58 @ R49 @ R50
BG22 RSVD21 DC_TEST_BG58 BG4 1K_0402_1%~D 1K_0402_1%~D
BE22 RSVD22 DC_TEST_BG4 BG3
BG26 RSVD23 DC_TEST_BG3 BE3

2
BE26 RSVD24 DC_TEST_BE3 BG1
BF23 RSVD25 DC_TEST_BG1 BE1
BE24 RSVD26 DC_TEST_BE1 BD1
RSVD27 DC_TEST_BD1

IVY-BRIDGE_BGA1023
CPU1@ PCIE Port Bifurcation Straps

* 11: (Default) x16 - Device 1 functions 1 and 2 disabled


CFG[6:5] 10: x8, x8 - Device 1 function 1 enabled ; function 2
B B
disabled
01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

CFG7

1
@ R51
1K_0402_1%~D

2
PEG DEFER TRAINING

CFG7
* 1: (Default) PEG Train immediately
following xxRESETB de assertion

0: PEG Wait for BIOS for training

A A

AMY WEN Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/05/16 Deciphered Date 2013/05/16 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PROCESSOR(4/6) RSVD,CFG
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8671P_SDV
Date: Thursday, October 04, 2012 Sheet 7 of 50
5 4 3 2 1
5 4 3 2 1

UCPU1F POWER +1.05VS

+CPU_CORE AF46
VCCIO[1] AG48
VCCIO[3] AG50
A26 VCCIO[4] AG51
D A29 VCC[1] VCCIO[5] AJ17 D
A31 VCC[2] VCCIO[6] AJ21
A34 VCC[3] VCCIO[7] AJ25
A35 VCC[4] VCCIO[8] AJ43
CPU_CORE A38 VCC[5]
VCC[6]
VCCIO[9]
VCCIO[10]
AJ47
A39 AK50
GFX_CORE A42
C26
VCC[7]
VCC[8]
VCCIO[11]
VCCIO[12]
AK51
AL14
VCCP1.05 C27
C32
VCC[9]
VCC[10]
VCCIO[13]
VCCIO[14]
AL15
AL16
C34 VCC[11] VCCIO[15] AL20
C37 VCC[12] VCCIO[16] AL22
C39 VCC[13] VCCIO[17] AL26
VGA_CORE C42 VCC[14]
VCC[15]
VCCIO[18]
VCCIO[19]
AL45
D27 AL48
D32 VCC[16] VCCIO[20] AM16
All Capacitor place on Power side. D34 VCC[17]
VCC[18]
VCCIO[21]
VCCIO[22]
AM17
D37 AM21
D39 VCC[19] VCCIO[23] AM43

PEG IO AND DDR IO


D42 VCC[20] VCCIO[24] AM47
E26 VCC[21] VCCIO[25] AN20
E28 VCC[22] VCCIO[26] AN42
E32 VCC[23] VCCIO[27] AN45
E34 VCC[24] VCCIO[28] AN48
E37 VCC[25] VCCIO[29]
E38 VCC[26]
VCC[27]

CORE SUPPLY
F25
F26 VCC[28]
F28 VCC[29]
F32 VCC[30]
F34 VCC[31]
F37 VCC[32] AA14
F38 VCC[33] VCCIO[30] AA15
F42 VCC[34] VCCIO[31] AB17
G42 VCC[35] VCCIO[32] AB20
C
H25 VCC[36] VCCIO[33] AC13 C
H26 VCC[37] VCCIO[34] AD16
H28 VCC[38] VCCIO[35] AD18
H29 VCC[39] VCCIO[36] AD21
H32 VCC[40] VCCIO[37] AE14
H34 VCC[41] VCCIO[38] AE15
H35 VCC[42] VCCIO[39] AF16
H37 VCC[43] VCCIO[40] AF18
H38 VCC[44] VCCIO[41] AF20
H40 VCC[45] VCCIO[42] AG15
J25 VCC[46] VCCIO[43] AG16
J26 VCC[47] VCCIO[44] AG17
J28 VCC[48] VCCIO[45] AG20
J29 VCC[49] VCCIO[46] AG21
J32 VCC[50] VCCIO[47] AJ14
J34 VCC[51] VCCIO[48] AJ15 Chief river VCCIO_SEL pull-H
J35 VCC[52] VCCIO[49]
J37 VCC[53]
J38 VCC[54]
J40 VCC[55] +1.05VS +3VS
J42 VCC[56]
K26 VCC[57] W16
VCC[58] VCCIO50

1
K27 W17
K29 VCC[59] VCCIO51 R5157
K32 VCC[60]
10K_0402_5%
K34 VCC[61]
K35 VCC[62]

2
K37 VCC[63]
K39 VCC[64]
K42 VCC[66] BC22 H_VCCP_SEL
L25 VCC[67] VCCIO_SEL
L28 VCC[68]
L33 VCC[69]
L36 VCC[70] +1.05VS
L40 VCC[71] +1.05VS
B B
N26 VCC[72]
N30 VCC[73] AM25

QUIET
RAILS
N34 VCC[74] VCCPQE[1] AN22
N38 VCC[75] VCCPQE[2]
VCC[76]

1
1 2
C106 R56 R57 Place the PU
1U_0402_6.3V6K 75_0402_5%
130_0402_1%~D resistors
R58 close to CPU

2
43_0402_5%
A44 H_CPU_SVIDALRT# 1 2
VIDALERT# VR_SVID_ALRT# [47]
B43 H_CPU_SVIDCLK R59 2 1 0_0402_5%
VIDSCLK VR_SVID_CLK [47]
SVID
C44 H_CPU_SVIDDAT R60 2 short@ 1 0_0402_5%
VIDSOUT short@
VR_SVID_DAT [47]
+CPU_CORE

1
Place the PU
1 R79 2 R61
100_0402_1%~D
resistors
100_0402_1%~D close to CPU
@

2
F43 VCCSENSE_R R62 2 1 0_0402_5%
VCC_SENSE VCCSENSE [47]
SENSE LINES

G43 VSSSENSE_R R63 2 short@ 1 0_0402_5%


VSS_SENSE short@ VSSSENSE [47]
1 2 +1.05VS

1
R617 10_0402_1% R64 Place the PU
AN16 100_0402_1%~D
VCCIO_SENSE AN17
VCCIO_SENSE [46] resistors
VSS_SENSE_VCCIO VSS_SENSE_VCCIO [46]
close to VR

2
VSS_SENSE_VCCIO 1 2
A A
R618 10_0402_1%
IVY-BRIDGE_BGA1023

CPU1@

AMY WEN Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/05/16 Deciphered Date 2013/05/16 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PROCESSOR(5/6) PWR,BYPASS
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8671P_SDV
Date: Thursday, October 04, 2012 Sheet 8 of 50
5 4 3 2 1
5 4 3 2 1

+1.5V +1.5V_CPU_VDDQ M3 Support


@ J1 R86 1 @ 2 0_0402_5%
1 2
Q2204 +VREF0
PAD-OPEN 4x4m BSS138_NL_SOT23-3

1
1 2 3

D
R66 @ C107 +V_DDR_REFA_R 1
[39,46] SUSP 0_0402_5% R65 220_0402_5% 0.1U_0402_10V6K

G
2

2
+3VALW +VSB U7 DRAMRST_CNTRL_PCH
DRAMRST_CNTRL_PCH [13,6]

1
8 1
7 D S 2 D
D S

1
6 3 2 RUN_ON_CPU1.5VS3#
D S

1
R68 5 4 Q7 G
R67 D G 2N7002K_SOT23-3
D 82K_0402_5% S D
100K_0402_5% @ AO4430L_SO8

3
R175

2
15K_0402_1%

2
RUN_ON_CPU1.5VS3 1 2
RUN_ON_CPU1.5VS3#

1
1

1
1
@ D R69 C108
R71 2 1 0_0402_5% 2 D 330K_0402_5% 0.047U_0603_25V7K

2
[34] CPU1.5V_S3_GATE 2
G @

2
Q6 S G Q8
1 @ 2 2N7002K_SOT23-3 S 2N7002K_SOT23-3

3
[34,39,42,44,46] SUSP#
0_0402_5% R70 @

3
Follw G-Series +1.5V_CPU_VDDQ
RUN_ON_CPU1.5VS3# [5] +1.5V
+V_SM_VREF should
have 20 mil trace
POWER

1
R72 2 @ 1 0_0402_5%
width
UCPU1G R98 @ R73
+VCC_GFXCORE_AXG 1K_0402_1%~D 1K_0402_1%~D

2
AY43 3

D
+V_SM_VREF_CNT 1 +V_SM_VREF
AA46 SM_VREF Q11 UCPU1H

VREF
VAXG[1]

1
AB47 AO3414_SOT23-3
VAXG[2]

1
AB50 BE7 +V_DDR_REFA_R C115 @ @ R75

G
2
VAXG[3] SA_DIMM_VREFDQ

1
AB51 BG7 +V_DDR_REFB_R 0.1U_0402_16V4Z 1K_0402_1%~D
AB52 VAXG[4] SB_DIMM_VREFDQ R92

2
AB53 VAXG[5] 1K_0402_1%~D RUN_ON_CPU1.5VS3 A13 AM38

2
AB55 VAXG[6] A17 VSS[1] VSS[91] AM4
AB56 VAXG[7] A21 VSS[2] VSS[92] AM42

2
VAXG[8] VSS[3] VSS[93]

1
AB58 A25 AM45
AB59 VAXG[9] @ R173 @ R129 A28 VSS[4] VSS[94] AM48
AC61 VAXG[10] 1K_0402_1%~D 1K_0402_1%~D A33 VSS[5] VSS[95] AM58
AD47 VAXG[11] A37 VSS[6] VSS[96] AN1
AD48 VAXG[12] A40 VSS[7] VSS[97] AN21

2
AD50 VAXG[13] A45 VSS[8] VSS[98] AN25
AD51 VAXG[14] AJ28 A49 VSS[9] VSS[99] AN28

- 1.5V RAILS
C AD52 VAXG[15] VDDQ[1] AJ33 A53 VSS[10] VSS[100] AN33 C
AD53 VAXG[16] VDDQ[2] AJ36 A9 VSS[11] VSS[101] AN36
AD55 VAXG[17] VDDQ[3] AJ40 AA1 VSS[12] VSS[102] AN40
AD56 VAXG[18] VDDQ[4] AL30 AA13 VSS[13] VSS[103] AN43
AD58 VAXG[19] VDDQ[5] AL34 AA50 VSS[14] VSS[104] AN47
AD59 VAXG[20] VDDQ[6] AL38 AA51 VSS[15] VSS[105] AN50
AE46 VAXG[21] VDDQ[7] AL42 AA52 VSS[16] VSS[106] AN54
N45 VAXG[22] VDDQ[8] AM33 AA53 VSS[17] VSS[107] AP10
P47 VAXG[23] VDDQ[9] AM36 AA55 VSS[18] VSS[108] AP51
P48 VAXG[24] VDDQ[10] AM40 AA56 VSS[19] VSS[109] AP55
P50 VAXG[25] VDDQ[11] AN30 +1.5V_CPU_VDDQ AA8 VSS[20] VSS[110] AP7
P51 VAXG[26] VDDQ[12] AN34 AB16 VSS[21] VSS[111] AR13
P52 VAXG[27] VDDQ[13] AN38 AB18 VSS[22] VSS[112] AR17
P53 VAXG[28] VDDQ[14] AR26 AB21 VSS[23] VSS[113] AR21
DDR3

P55 VAXG[29] VDDQ[15] AR28 AB48 VSS[24] VSS[114] AR41


GRAPHICS

VAXG[30] VDDQ[16] VSS[25] VSS[115]

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M
P56 AR30 AB61 AR48
VAXG[31] VDDQ[17] VSS[26] VSS[116]

1
C129

C130

C131

C135

C134

C133

C137

C136
P61 AR32 AC10 AR61
T48 VAXG[32] VDDQ[18] AR34 + C132 AC14 VSS[27] VSS[117] AR7
VAXG[33] VDDQ[19] VSS[28] VSS[118]

1
T58 AR36 330U_D2_2VM_R9M AC46 AT14
T59 VAXG[34] VDDQ[20] AR40 AC6 VSS[29] VSS[119] AT19

2
T61 VAXG[35] VDDQ[21] AV41 AD17 VSS[30] VSS[120] AT36

2
U46 VAXG[36] VDDQ[22] AW26 AD20 VSS[31] VSS[121] AT4
V47 VAXG[37] VDDQ[23] BA40 AD4 VSS[32] VSS[122] AT45
V48
V50
VAXG[38]
VAXG[39]
VAXG[40]
VDDQ[24]
VDDQ[25]
VDDQ[26]
BB28
BG33
AD61
AE13
VSS[33]
VSS[34]
VSS[35]
VSS VSS[123]
VSS[124]
VSS[125]
AT52
AT58
V51 AE8 AU1
V52 VAXG[41] AF1 VSS[36] VSS[126] AU11
V53 VAXG[42] AF17 VSS[37] VSS[127] AU28
V55 VAXG[43] AF21 VSS[38] VSS[128] AU32
V56 VAXG[44] AF47 VSS[39] VSS[129] AU51
VAXG[45] VSS[40] VSS[130]
C139
1U_0402_6.3V6K

C140
1U_0402_6.3V6K

C141
1U_0402_6.3V6K

C142
1U_0402_6.3V6K

C143
1U_0402_6.3V6K

C144
1U_0402_6.3V6K

C146
1U_0402_6.3V6K

C147
1U_0402_6.3V6K

C148
1U_0402_6.3V6K

C145
1U_0402_6.3V6K
V58 AF48 AU7
V59 VAXG[46] AF50 VSS[41] VSS[131] AV17
VAXG[47] VSS[42] VSS[132]
1

1
W50 AF51 AV21
W51 VAXG[48] AF52 VSS[43] VSS[133] AV22
W52 VAXG[49] AF53 VSS[44] VSS[134] AV34
2

2
W53 VAXG[50] AF55 VSS[45] VSS[135] AV40
+VCC_GFXCORE_AXG W55 VAXG[51]
VAXG[52]
AF56 VSS[46]
VSS[47]
VSS[136]
VSS[137]
AV48
W56 AF58 AV55
W61 VAXG[53] AF59 VSS[48] VSS[138] AW13
Y48 VAXG[54] AG10 VSS[49] VSS[139] AW43
Y61 VAXG[55] AG14 VSS[50] VSS[140] AW61
B
R620 VAXG[56] AG18 VSS[51] VSS[141] AW7 B
100_0402_1%~D AG47 VSS[52] VSS[142] AY14
1 2 1 R88 2 +1.5V_CPU_VDDQ AG52 VSS[53] VSS[143] AY19
AG61 VSS[54] VSS[144] AY30
100_0402_1%~D +1.5V_CPU_VDDQ +1.5V AG7 VSS[55] VSS[145] AY36
VSS[56] VSS[146]
QUIET RAILS

AM28 AH4 AY4


SENSE
LINES

@ VCCDQ[1] VSS[57] VSS[147]


VCC_AXG_SENSE F45 AN26 AH58 AY41
[47] VCC_AXG_SENSE VSS_AXG_SENSE G45 VAXG_SENSE VCCDQ[2] 2 1 0.1U_0402_10V7K~D AJ13 VSS[58] VSS[148] AY45
C150
[47] VSS_AXG_SENSE VSSAXG_SENSE AJ16 VSS[59] VSS[149] AY49
1 2 AJ20 VSS[60] VSS[150] AY55
1 2 C151 2 1 0.1U_0402_10V7K~D AJ22 VSS[61] VSS[151] AY58
+1.8VS AJ26 VSS[62] VSS[152] AY9
C149 VSS[63] VSS[153]
R619 100_0402_1%~D 1U_0402_6.3V6K AJ30 BA1
1.8V RAIL

C152 2 1 0.1U_0402_10V7K~D AJ34 VSS[64] VSS[154] BA11


BB3 AJ38 VSS[65] VSS[155] BA17
BC1 VCCPLL[1] AJ42 VSS[66] VSS[156] BA21
VCCPLL[2] VSS[67] VSS[157]
10U_0603_6.3V6M~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

BC4 C157 2 1 0.1U_0402_10V7K~D AJ45 BA26


VCCPLL[3] VSS[68] VSS[158]
1

1
22U_0805_6.3V6M

C633

AJ48 BA32
VSS[69] VSS[159]
C153

C154

C155

@ AJ7 BA48
AK1 VSS[70] VSS[160] BA51
2

BC43 AK52 VSS[71] VSS[161] BB53


VDDQ_SENSE BA43 AL10 VSS[72] VSS[162] BC13
VSS_SENSE_VDDQ VSS[73] VSS[163]
SENSE LINES

AL13 BC5
L17 AL17 VSS[74] VSS[164] BC57
+VCCSA L21 VCCSA[1] AL21 VSS[75] VSS[165] BD12
N16 VCCSA[2] AL25 VSS[76] VSS[166] BD16
N20 VCCSA[3] AL28 VSS[77] VSS[167] BD19
VCCSA[4] VSS[78] VSS[168]
10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

N22 AL33 BD23


SA RAIL

P17 VCCSA[5] AL36 VSS[79] VSS[169] BD27


VCCSA[6] VSS[80] VSS[170]
1

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

C158 P20 U10 AL40 BD32


VCCSA[7] VCCSA_SENSE +VCCSA_SENSE [45] VSS[81] VSS[171]
1

330U_D2_2VM_R9M~D + R16 AL43 BD36


VCCSA[8] VSS[82] VSS[172]
C162

C161

C159

C160

C163

R18 AL47 BD40


VCCSA[9] VSS[83] VSS[173]
1

R21 AL61 BD44


2

U15 VCCSA[10] @ R78 AM13 VSS[84] VSS[174] BD48


VCCSA VID

V16 VCCSA[11] AM20 VSS[85] VSS[175] BD52


VCCSA[12] 0_0402_5%~D VSS[86] VSS[176]
V17 D48 VCCSA_VID0 AM22 BD56
VCCSA[13] VCCSA_VID[0] VSS[87] VSS[177]
lines

V18 D49 VCCSA_VID1 VID[0] VID[1] ULV 2011 2012 AM26 BD8
2

V21 VCCSA[14] VCCSA_VID[1] 0 0 0.90 V Yes Yes AM30 VSS[88] VSS[178] BE5
W20 VCCSA[15] 0 1 0.85 V Yes Yes AM34 VSS[89] VSS[179] BG13
VCCSA[16] 1 0 0.775 V No Yes VSS[90] VSS[180]
1 1 0.75 V No Yes
A A
R99 0_0402_5%
1 2
H_VCCSA_VID0 [45]
C164

1U_0402_6.3V6K

C165
1U_0402_6.3V6K

C166
1U_0402_6.3V6K

C167
1U_0402_6.3V6K

C168
1U_0402_6.3V6K

IVY-BRIDGE_BGA1023 1 short@ 2
short@ H_VCCSA_VID1 [45]
IVY-BRIDGE_BGA1023
1

R100 0_0402_5%
CPU1@
CPU1@
2

AMY WEN
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/05/16 Deciphered Date 2013/05/16 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PROCESSOR(6/6) PWR,VSS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size
R&D Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8671P_SDV
Date: Thursday, October 04, 2012 Sheet 9 of 50
5 4 3 2 1
5 4 3 2 1

DDR_A_MA[0..15]
[11,6] DDR_A_MA[0..15]
DDR_A_DQS#[0..7]
[11,6] DDR_A_DQS#[0..7]
DDR_A_DQS[0..7]
[11,6] DDR_A_DQS[0..7]
DDR_A_D[0..63]
[11,6] DDR_A_D[0..63]

D D

+VREF0 +VREF1
+VREF0 +VREF1 +VREF0 +VREF1 +VREF0 +VREF1

U5009
U5006 U5008 U5007
M9 E4 DDR_A_D23
M9 E4 DDR_A_D6 H2 VREFCA DQL0 F8 DDR_A_D16 M9 E4 DDR_A_D38 M9 E4 DDR_A_D51
H2 VREFCA DQL0 F8 DDR_A_D1 VREFDQ DQL1 F3 DDR_A_D18 H2 VREFCA DQL0 F8 DDR_A_D32 H2 VREFCA DQL0 F8 DDR_A_D49
VREFDQ DQL1 F3 DDR_A_D2 DDR_A_MA0 N4 DQL2 F9 DDR_A_D17 VREFDQ DQL1 F3 DDR_A_D34 VREFDQ DQL1 F3 DDR_A_D50
DDR_A_MA0 N4 DQL2 F9 DDR_A_D5 DDR_A_MA1 P8 A0 DQL3 H4 DDR_A_D19 DDR_A_MA0 N4 DQL2 F9 DDR_A_D37 DDR_A_MA0 N4 DQL2 F9 DDR_A_D53
A0 DQL3 1 1 A1 DQL4 A0 DQL3 A0 DQL3
1 1 DDR_A_MA1 P8 H4 DDR_A_D3 C5242 C5243 DDR_A_MA2 P4 H9 DDR_A_D20 1 1 DDR_A_MA1 P8 H4 DDR_A_D35 1 1 DDR_A_MA1 P8 H4 DDR_A_D55
C5239 C5241 DDR_A_MA2 P4 A1 DQL4 H9 DDR_A_D4 DDR_A_MA3 N3 A2 DQL5 G3 DDR_A_D22 C5244 C5240 DDR_A_MA2 P4 A1 DQL4 H9 DDR_A_D36 C5245 C5246 DDR_A_MA2 P4 A1 DQL4 H9 DDR_A_D48

0.1U_0402_16V4Z
DDR_A_MA3 N3 A2 DQL5 G3 DDR_A_D7 DDR_A_MA4 P9 A3 DQL6 H8 DDR_A_D21 DDR_A_MA3 N3 A2 DQL5 G3 DDR_A_D39 DDR_A_MA3 N3 A2 DQL5 G3 DDR_A_D54
0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
DDR_A_MA4 P9 A3 DQL6 H8 DDR_A_D0 2 2 DDR_A_MA5 P3 A4 DQL7 DDR_A_MA4 P9 A3 DQL6 H8 DDR_A_D33 DDR_A_MA4 P9 A3 DQL6 H8 DDR_A_D52
0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
2 2 DDR_A_MA5 P3 A4 DQL7 DDR_A_MA6 R9 A5 2 2 DDR_A_MA5 P3 A4 DQL7 2 2 DDR_A_MA5 P3 A4 DQL7
DDR_A_MA6 R9 A5 DDR_A_MA7 R3 A6 D8 DDR_A_D25 DDR_A_MA6 R9 A5 DDR_A_MA6 R9 A5
DDR_A_MA7 R3 A6 D8 DDR_A_D12 DDR_A_MA8 T9 A7 DQU0 C4 DDR_A_D31 DDR_A_MA7 R3 A6 D8 DDR_A_D41 DDR_A_MA7 R3 A6 D8 DDR_A_D56
DDR_A_MA8 T9 A7 DQU0 C4 DDR_A_D15 DDR_A_MA9 R4 A8 DQU1 C9 DDR_A_D28 DDR_A_MA8 T9 A7 DQU0 C4 DDR_A_D43 DDR_A_MA8 T9 A7 DQU0 C4 DDR_A_D63
DDR_A_MA9 R4 A8 DQU1 C9 DDR_A_D13 DDR_A_MA10 L8 A9 DQU2 C3 DDR_A_D26 DDR_A_MA9 R4 A8 DQU1 C9 DDR_A_D40 DDR_A_MA9 R4 A8 DQU1 C9 DDR_A_D60
DDR_A_MA10 L8 A9 DQU2 C3 DDR_A_D10 DDR_A_MA11 R8 A10/AP DQU3 A8 DDR_A_D29 DDR_A_MA10 L8 A9 DQU2 C3 DDR_A_D47 DDR_A_MA10 L8 A9 DQU2 C3 DDR_A_D58
DDR_A_MA11 R8 A10/AP DQU3 A8 DDR_A_D9 DDR_A_MA12 N8 A11 DQU4 A3 DDR_A_D27 DDR_A_MA11 R8 A10/AP DQU3 A8 DDR_A_D45 DDR_A_MA11 R8 A10/AP DQU3 A8 DDR_A_D61
DDR_A_MA12 N8 A11 DQU4 A3 DDR_A_D11 DDR_A_MA13 T4 A12/BC DQU5 B9 DDR_A_D24 DDR_A_MA12 N8 A11 DQU4 A3 DDR_A_D46 DDR_A_MA12 N8 A11 DQU4 A3 DDR_A_D59
DDR_A_MA13 T4 A12/BC DQU5 B9 DDR_A_D8 DDR_A_MA14 T8 A13 DQU6 A4 DDR_A_D30 DDR_A_MA13 T4 A12/BC DQU5 B9 DDR_A_D44 DDR_A_MA13 T4 A12/BC DQU5 B9 DDR_A_D57
DDR_A_MA14 T8 A13 DQU6 A4 DDR_A_D14 A14 DQU7 DDR_A_MA14 T8 A13 DQU6 A4 DDR_A_D42 DDR_A_MA14 T8 A13 DQU6 A4 DDR_A_D62
A14 DQU7 A14 DQU7 A14 DQU7

DDR_A_BS0 M3 B3
BA0 VDD +1.5V
DDR_A_BS0 M3 B3 DDR_A_BS1 N9 D10 DDR_A_BS0 M3 B3 DDR_A_BS0 M3 B3
[11,6] DDR_A_BS0 BA0 VDD +1.5V BA1 VDD BA0 VDD +1.5V BA0 VDD +1.5V
DDR_A_BS1 N9 D10 DDR_A_BS2 M4 G8 DDR_A_BS1 N9 D10 DDR_A_BS1 N9 D10
[11,6] DDR_A_BS1 BA1 VDD BA2 VDD BA1 VDD BA1 VDD
DDR_A_BS2 M4 G8 K3 DDR_A_BS2 M4 G8 DDR_A_BS2 M4 G8
[11,6] DDR_A_BS2 BA2 VDD K3 VDD K9 BA2 VDD K3 BA2 VDD K3
VDD K9 VDD N2 VDD K9 VDD K9
VDD N2 M_CLK_DDR0 J8 VDD N10 VDD N2 VDD N2
M_CLK_DDR0 J8 VDD N10 M_CLK_DDR#0 K8 CK VDD R2 M_CLK_DDR0 J8 VDD N10 M_CLK_DDR0 J8 VDD N10
[6] M_CLK_DDR0 CK VDD CK VDD CK VDD CK VDD
M_CLK_DDR#0 K8 R2 DDR_CKE0_DIMMA K10 R10 M_CLK_DDR#0 K8 R2 M_CLK_DDR#0 K8 R2
[6] M_CLK_DDR#0 K10 CK VDD R10 CKE VDD CK VDD CK VDD
DDR_CKE0_DIMMA DDR_CKE0_DIMMA K10 R10 DDR_CKE0_DIMMA K10 R10
[6] DDR_CKE0_DIMMA CKE VDD CKE VDD CKE VDD
M_ODT0 K2 A2
M_ODT0 K2 A2 DDR_CS0_DIMMA# L3 ODT VDDQ A9 M_ODT0 K2 A2 M_ODT0 K2 A2
[6] M_ODT0 ODT VDDQ CS VDDQ ODT VDDQ ODT VDDQ
DDR_CS0_DIMMA# L3 A9 DDR_A_RAS# J4 C2 DDR_CS0_DIMMA# L3 A9 DDR_CS0_DIMMA# L3 A9
[6] DDR_CS0_DIMMA# J4 CS VDDQ C2 K4 RAS VDDQ C10 J4 CS VDDQ C2 J4 CS VDDQ C2
DDR_A_RAS# DDR_A_CAS# DDR_A_RAS# DDR_A_RAS#
[11,6] DDR_A_RAS# RAS VDDQ CAS VDDQ RAS VDDQ RAS VDDQ
DDR_A_CAS# K4 C10 DDR_A_WE# L4 D3 DDR_A_CAS# K4 C10 DDR_A_CAS# K4 C10
[11,6] DDR_A_CAS# L4 CAS VDDQ D3 WE VDDQ E10 L4 CAS VDDQ D3 L4 CAS VDDQ D3
DDR_A_WE# DDR_A_WE# DDR_A_WE#
[11,6] DDR_A_WE# WE VDDQ E10 VDDQ F2 WE VDDQ E10 WE VDDQ E10
C VDDQ F2 DDR_A_DQS2 F4 VDDQ H3 VDDQ F2 VDDQ F2 C
DDR_A_DQS0 F4 VDDQ H3 DDR_A_DQS3 C8 DQSL VDDQ H10 DDR_A_DQS4 F4 VDDQ H3 DDR_A_DQS6 F4 VDDQ H3
DDR_A_DQS1 C8 DQSL VDDQ H10 DQSU VDDQ DDR_A_DQS5 C8 DQSL VDDQ H10 DDR_A_DQS7 C8 DQSL VDDQ H10
DQSU VDDQ DQSU VDDQ DQSU VDDQ
E8 A10
E8 A10 D4 DML VSS B4 E8 A10 E8 A10
D4 DML VSS B4 DMU VSS E2 D4 DML VSS B4 D4 DML VSS B4
DMU VSS E2 VSS G9 DMU VSS E2 DMU VSS E2
VSS G9 DDR_A_DQS#2 G4 VSS J3 VSS G9 VSS G9
DDR_A_DQS#0 G4 VSS J3 DDR_A_DQS#3 B8 DQSL VSS J9 DDR_A_DQS#4 G4 VSS J3 DDR_A_DQS#6 G4 VSS J3
DDR_A_DQS#1 B8 DQSL VSS J9 DQSU VSS M2 DDR_A_DQS#5 B8 DQSL VSS J9 DDR_A_DQS#7 B8 DQSL VSS J9
DQSU VSS M2 VSS M10 DQSU VSS M2 DQSU VSS M2
VSS M10 VSS P2 VSS M10 VSS M10
VSS P2 DDR3_DRAMRST# T3 VSS P10 VSS P2 VSS P2
DDR3_DRAMRST# T3 VSS P10 RESET VSS T2 DDR3_DRAMRST# T3 VSS P10 DDR3_DRAMRST# T3 VSS P10
[11,6] DDR3_DRAMRST# RESET VSS VSS RESET VSS RESET VSS
T2 1 2 R5196 L9 T10 T2 T2
240_0402_1%
240_0402_1%1 2 R5197 L9 VSS T10 240_0402_1% ZQ VSS 1 2 R5198 L9 VSS T10 1 2 R5199 L9 VSS T10
ZQ VSS 240_0402_1% ZQ VSS 240_0402_1% ZQ VSS
J2 B2
J2 B2 L2 NC VSSQ B10 J2 B2 J2 B2
L2 NC VSSQ B10 J10 NC VSSQ D2 L2 NC VSSQ B10 L2 NC VSSQ B10
J10 NC VSSQ D2 L10 NC VSSQ D9 J10 NC VSSQ D2 J10 NC VSSQ D2
L10 NC VSSQ D9 NC VSSQ E3 L10 NC VSSQ D9 L10 NC VSSQ D9
NC VSSQ E3 DDR_A_MA15 M8 VSSQ E9 NC VSSQ E3 NC VSSQ E3
DDR_A_MA15 M8 VSSQ E9 NC VSSQ F10 DDR_A_MA15 M8 VSSQ E9 DDR_A_MA15 M8 VSSQ E9
NC VSSQ F10 VSSQ G2 NC VSSQ F10 NC VSSQ F10
VSSQ G2 VSSQ G10 VSSQ G2 VSSQ G2
VSSQ G10 VSSQ VSSQ G10 VSSQ G10
VSSQ 96-BALL VSSQ VSSQ
96-BALL SDRAM DDR3L 96-BALL 96-BALL
SDRAM DDR3L H5TC4G63MFR-PBA_FBGA96 SDRAM DDR3L SDRAM DDR3L
H5TC4G63MFR-PBA_FBGA96 DDR1@ H5TC4G63MFR-PBA_FBGA96 H5TC4G63MFR-PBA_FBGA96
DDR1@ DDR1@ DDR1@

B B

SA00001LV10
+3VS @
C5247
@ 1 2
U5010 +0.75VS
1 8 0.1U_0402_16V4Z~D
2 A0 VCC 7
3 A1 WP 6 SMB_CLK_S3
A2 SCL SMB_CLK_S3 [13,21,32,35]
1

1
1K_0402_5%~D

1K_0402_5%~D

4 5 SMB_DATA_S3
VSS SDA SMB_DATA_S3 [13,21,32,35]
R5201

M_ODT1 R5214 1 2 36_0402_5%


[11,6] M_ODT1
R5200

1U_0402_6.3V6K
C5248

1U_0402_6.3V6K
C5249

1U_0402_6.3V6K
C5250

1U_0402_6.3V6K
C5251
@ @ CAT24C02WI-GT3A_SO8 M_ODT0 R5215 1 2 36_0402_5%
DDR_A_RAS# R5216 1 2 36_0402_5% 1 1 1 1
DDR_CKE0_DIMMA R5217 1 2 36_0402_5%
2

DDR_CS0_DIMMA# R5218 1 2 36_0402_5%


DDR_A_WE# R5219 1 2 36_0402_5% 2 2 2 2
DDR_CS1_DIMMA# R5220 1 2 36_0402_5%
[11,6] DDR_CS1_DIMMA# 1 2
DDR_A_CAS# R5221 36_0402_5%

DDR_A_MA12 R5222 1 2 36_0402_5%


DDR_A_BS0 R5227 1 2 36_0402_5%
DDR_A_MA10 R5228 1 2 36_0402_5% M_CLK_DDR0 M_CLK_DDR1
1 2 [11,6] M_CLK_DDR1 +1.5V +1.5V
DDR_CKE1_DIMMA R5231 36_0402_5%
[11,6] DDR_CKE1_DIMMA
1 1
DDR_A_MA11 R5232 1 2 36_0402_5%
DDR_A_MA13 R5233 1 2 36_0402_5% C5252 C5288

1
DDR_A_MA9 R5234 1 2 36_0402_5% 2P_0402_50V8C 2P_0402_50V8C
+1.5V DDR_A_MA14 R5235 1 2 36_0402_5% M_CLK_DDR#0 2 M_CLK_DDR#1 2 R5207 R5208
[11,6] M_CLK_DDR#1
1K_0402_1% 1K_0402_1%
DDR_A_MA3 R5236 1 2 36_0402_5% +VREF0 +VREF1

1
DDR_A_MA1 R5237 1 2 36_0402_5%

2
1

1
10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

1 DDR_A_BS2 R5238 1 2 36_0402_5%


C5253

C5254

C5255

C5258

C5256

C5259

C5260

C5261

C5262

C5263

1 1 1 1 1 1 1 1 1 1 @ DDR_A_MA15 R5239 1 2 36_0402_5% R5209 R5230 +VREF0 +VREF1


+ C5257 R5210 R5229

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K
220U_D2_2VY_R15M DDR_A_MA7 R5240 1 2 36_0402_5%

1
C5271
0.1U_0402_16V4Z

C5272

C5273
0.1U_0402_16V4Z

C5274
DDR_A_MA4 1 2
SGA00004L00 R5242 36_0402_5% 30.1_0402_1% 30.1_0402_1% 30.1_0402_1% 30.1_0402_1%

2
2 2 2 2 2 2 2 2 2 2 2 DDR_A_MA8 R5243 1 2 36_0402_5% R5212 R5213
1 1 1 1
DDR_A_MA6 R5244 1 2 36_0402_5% 1K_0402_1% 1K_0402_1%

DDR_A_MA0 R5245 1 2 36_0402_5%

2
DDR_A_BS1 R5246 1 2 36_0402_5% 2 2 2 2
1 1
DDR_A_MA5 R5247 1 2 36_0402_5%
DDR_A_MA2 R5248 1 2 36_0402_5% C5275 C5311
0.1U_0402_16V4Z 0.1U_0402_16V4Z
A 2 2 A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/05/16 Deciphered Date 2013/05/16 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDRIII A Chip 2Gbit X16-I
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
D 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-8671P_SDV
Date: Thursday, October 04, 2012 Sheet 10 of 50
5 4 3 2 1

AMY WEN
5 4 3 2 1

DDR_A_MA[0..15]
[10,6] DDR_A_MA[0..15]
DDR_A_DQS#[0..7]
[10,6] DDR_A_DQS#[0..7]
DDR_A_DQS[0..7]
[10,6] DDR_A_DQS[0..7]
DDR_A_D[0..63]
[10,6] DDR_A_D[0..63]

D D

+VREF0 +VREF1
+VREF0 +VREF1 +VREF0 +VREF1 +VREF0 +VREF1

UD2
UD1 UD3 UD4
M9 E4 DDR_A_D16
M9 E4 DDR_A_D1 H2 VREFCA DQL0 F8 DDR_A_D23 M9 E4 DDR_A_D32 M9 E4 DDR_A_D49
H2 VREFCA DQL0 F8 DDR_A_D6 VREFDQ DQL1 F3 DDR_A_D17 H2 VREFCA DQL0 F8 DDR_A_D38 H2 VREFCA DQL0 F8 DDR_A_D51
VREFDQ DQL1 F3 DDR_A_D5 DDR_A_MA0 N4 DQL2 F9 DDR_A_D18 VREFDQ DQL1 F3 DDR_A_D37 VREFDQ DQL1 F3 DDR_A_D53
DDR_A_MA0 N4 DQL2 F9 DDR_A_D2 DDR_A_MA1 P8 A0 DQL3 H4 DDR_A_D21 DDR_A_MA0 N4 DQL2 F9 DDR_A_D34 DDR_A_MA0 N4 DQL2 F9 DDR_A_D50
A0 DQL3 1 1 A1 DQL4 A0 DQL3 A0 DQL3
1 1 DDR_A_MA1 P8 H4 DDR_A_D0 C5277 C5281 DDR_A_MA2 P4 H9 DDR_A_D22 1 1 DDR_A_MA1 P8 H4 DDR_A_D33 1 1 DDR_A_MA1 P8 H4 DDR_A_D52
C5280 C5276 DDR_A_MA2 P4 A1 DQL4 H9 DDR_A_D7 DDR_A_MA3 N3 A2 DQL5 G3 DDR_A_D20 C5278 C5279 DDR_A_MA2 P4 A1 DQL4 H9 DDR_A_D39 C5282 C5283 DDR_A_MA2 P4 A1 DQL4 H9 DDR_A_D54

0.1U_0402_16V4Z
DDR_A_MA3 N3 A2 DQL5 G3 DDR_A_D4 DDR_A_MA4 P9 A3 DQL6 H8 DDR_A_D19 DDR_A_MA3 N3 A2 DQL5 G3 DDR_A_D36 DDR_A_MA3 N3 A2 DQL5 G3 DDR_A_D48
0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
DDR_A_MA4 P9 A3 DQL6 H8 DDR_A_D3 2 2 DDR_A_MA5 P3 A4 DQL7 DDR_A_MA4 P9 A3 DQL6 H8 DDR_A_D35 DDR_A_MA4 P9 A3 DQL6 H8 DDR_A_D55
0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
2 2 DDR_A_MA5 P3 A4 DQL7 DDR_A_MA6 R9 A5 2 2 DDR_A_MA5 P3 A4 DQL7 2 2 DDR_A_MA5 P3 A4 DQL7
DDR_A_MA6 R9 A5 DDR_A_MA7 R3 A6 D8 DDR_A_D31 DDR_A_MA6 R9 A5 DDR_A_MA6 R9 A5
DDR_A_MA7 R3 A6 D8 DDR_A_D15 DDR_A_MA8 T9 A7 DQU0 C4 DDR_A_D25 DDR_A_MA7 R3 A6 D8 DDR_A_D43 DDR_A_MA7 R3 A6 D8 DDR_A_D63
DDR_A_MA8 T9 A7 DQU0 C4 DDR_A_D12 DDR_A_MA9 R4 A8 DQU1 C9 DDR_A_D26 DDR_A_MA8 T9 A7 DQU0 C4 DDR_A_D41 DDR_A_MA8 T9 A7 DQU0 C4 DDR_A_D56
DDR_A_MA9 R4 A8 DQU1 C9 DDR_A_D10 DDR_A_MA10 L8 A9 DQU2 C3 DDR_A_D28 DDR_A_MA9 R4 A8 DQU1 C9 DDR_A_D47 DDR_A_MA9 R4 A8 DQU1 C9 DDR_A_D58
DDR_A_MA10 L8 A9 DQU2 C3 DDR_A_D13 DDR_A_MA11 R8 A10/AP DQU3 A8 DDR_A_D30 DDR_A_MA10 L8 A9 DQU2 C3 DDR_A_D40 DDR_A_MA10 L8 A9 DQU2 C3 DDR_A_D60
DDR_A_MA11 R8 A10/AP DQU3 A8 DDR_A_D14 DDR_A_MA12 N8 A11 DQU4 A3 DDR_A_D24 DDR_A_MA11 R8 A10/AP DQU3 A8 DDR_A_D42 DDR_A_MA11 R8 A10/AP DQU3 A8 DDR_A_D62
DDR_A_MA12 N8 A11 DQU4 A3 DDR_A_D8 DDR_A_MA13 T4 A12/BC DQU5 B9 DDR_A_D27 DDR_A_MA12 N8 A11 DQU4 A3 DDR_A_D44 DDR_A_MA12 N8 A11 DQU4 A3 DDR_A_D57
DDR_A_MA13 T4 A12/BC DQU5 B9 DDR_A_D11 DDR_A_MA14 T8 A13 DQU6 A4 DDR_A_D29 DDR_A_MA13 T4 A12/BC DQU5 B9 DDR_A_D46 DDR_A_MA13 T4 A12/BC DQU5 B9 DDR_A_D59
DDR_A_MA14 T8 A13 DQU6 A4 DDR_A_D9 A14 DQU7 DDR_A_MA14 T8 A13 DQU6 A4 DDR_A_D45 DDR_A_MA14 T8 A13 DQU6 A4 DDR_A_D61
A14 DQU7 A14 DQU7 A14 DQU7

DDR_A_BS0 M3 B3
BA0 VDD +1.5V
DDR_A_BS0 M3 B3 DDR_A_BS1 N9 D10 DDR_A_BS0 M3 B3 DDR_A_BS0 M3 B3
[10,6] DDR_A_BS0 BA0 VDD +1.5V BA1 VDD BA0 VDD +1.5V BA0 VDD +1.5V
DDR_A_BS1 N9 D10 DDR_A_BS2 M4 G8 DDR_A_BS1 N9 D10 DDR_A_BS1 N9 D10
[10,6] DDR_A_BS1 BA1 VDD BA2 VDD BA1 VDD BA1 VDD
DDR_A_BS2 M4 G8 K3 DDR_A_BS2 M4 G8 DDR_A_BS2 M4 G8
[10,6] DDR_A_BS2 BA2 VDD K3 VDD K9 BA2 VDD K3 BA2 VDD K3
VDD K9 VDD N2 VDD K9 VDD K9
VDD N2 M_CLK_DDR1 J8 VDD N10 VDD N2 VDD N2
M_CLK_DDR1 J8 VDD N10 M_CLK_DDR#1 K8 CK VDD R2 M_CLK_DDR1 J8 VDD N10 M_CLK_DDR1 J8 VDD N10
[10,6] M_CLK_DDR1 CK VDD CK VDD CK VDD CK VDD
M_CLK_DDR#1 K8 R2 DDR_CKE1_DIMMA K10 R10 M_CLK_DDR#1 K8 R2 M_CLK_DDR#1 K8 R2
[10,6] M_CLK_DDR#1 K10 CK VDD R10 CKE VDD CK VDD CK VDD
DDR_CKE1_DIMMA DDR_CKE1_DIMMA K10 R10 DDR_CKE1_DIMMA K10 R10
[10,6] DDR_CKE1_DIMMA CKE VDD CKE VDD CKE VDD
M_ODT1 K2 A2
M_ODT1 K2 A2 DDR_CS1_DIMMA# L3 ODT VDDQ A9 M_ODT1 K2 A2 M_ODT1 K2 A2
[10,6] M_ODT1 ODT VDDQ CS VDDQ ODT VDDQ ODT VDDQ
DDR_CS1_DIMMA# L3 A9 DDR_A_RAS# J4 C2 DDR_CS1_DIMMA# L3 A9 DDR_CS1_DIMMA# L3 A9
[10,6] DDR_CS1_DIMMA# J4 CS VDDQ C2 K4 RAS VDDQ C10 J4 CS VDDQ C2 J4 CS VDDQ C2
DDR_A_RAS# DDR_A_CAS# DDR_A_RAS# DDR_A_RAS#
[10,6] DDR_A_RAS# RAS VDDQ CAS VDDQ RAS VDDQ RAS VDDQ
DDR_A_CAS# K4 C10 DDR_A_WE# L4 D3 DDR_A_CAS# K4 C10 DDR_A_CAS# K4 C10
[10,6] DDR_A_CAS# L4 CAS VDDQ D3 WE VDDQ E10 L4 CAS VDDQ D3 L4 CAS VDDQ D3
DDR_A_WE# DDR_A_WE# DDR_A_WE#
[10,6] DDR_A_WE# WE VDDQ E10 VDDQ F2 WE VDDQ E10 WE VDDQ E10
C VDDQ F2 DDR_A_DQS2 F4 VDDQ H3 VDDQ F2 VDDQ F2 C
DDR_A_DQS0 F4 VDDQ H3 DDR_A_DQS3 C8 DQSL VDDQ H10 DDR_A_DQS4 F4 VDDQ H3 DDR_A_DQS6 F4 VDDQ H3
DDR_A_DQS1 C8 DQSL VDDQ H10 DQSU VDDQ DDR_A_DQS5 C8 DQSL VDDQ H10 DDR_A_DQS7 C8 DQSL VDDQ H10
DQSU VDDQ DQSU VDDQ DQSU VDDQ
E8 A10
E8 A10 D4 DML VSS B4 E8 A10 E8 A10
D4 DML VSS B4 DMU VSS E2 D4 DML VSS B4 D4 DML VSS B4
DMU VSS E2 VSS G9 DMU VSS E2 DMU VSS E2
VSS G9 DDR_A_DQS#2 G4 VSS J3 VSS G9 VSS G9
DDR_A_DQS#0 G4 VSS J3 DDR_A_DQS#3 B8 DQSL VSS J9 DDR_A_DQS#4 G4 VSS J3 DDR_A_DQS#6 G4 VSS J3
DDR_A_DQS#1 B8 DQSL VSS J9 DQSU VSS M2 DDR_A_DQS#5 B8 DQSL VSS J9 DDR_A_DQS#7 B8 DQSL VSS J9
DQSU VSS M2 VSS M10 DQSU VSS M2 DQSU VSS M2
VSS M10 VSS P2 VSS M10 VSS M10
VSS P2 DDR3_DRAMRST# T3 VSS P10 VSS P2 VSS P2
DDR3_DRAMRST# T3 VSS P10 RESET VSS T2 DDR3_DRAMRST# T3 VSS P10 DDR3_DRAMRST# T3 VSS P10
[10,6] DDR3_DRAMRST# RESET VSS VSS RESET VSS RESET VSS
T2 1 2 R5223 L9 T10 T2 T2
240_0402_1%
240_0402_1%1 2 R5224 L9 VSS T10 240_0402_1% ZQ VSS 1 2 R5225 L9 VSS T10 1 2 R5226 L9 VSS T10
ZQ VSS 240_0402_1% ZQ VSS 240_0402_1% ZQ VSS
J2 B2
J2 B2 L2 NC VSSQ B10 J2 B2 J2 B2
L2 NC VSSQ B10 J10 NC VSSQ D2 L2 NC VSSQ B10 L2 NC VSSQ B10
J10 NC VSSQ D2 L10 NC VSSQ D9 J10 NC VSSQ D2 J10 NC VSSQ D2
L10 NC VSSQ D9 NC VSSQ E3 L10 NC VSSQ D9 L10 NC VSSQ D9
NC VSSQ E3 DDR_A_MA15 M8 VSSQ E9 NC VSSQ E3 NC VSSQ E3
DDR_A_MA15 M8 VSSQ E9 NC VSSQ F10 DDR_A_MA15 M8 VSSQ E9 DDR_A_MA15 M8 VSSQ E9
NC VSSQ F10 VSSQ G2 NC VSSQ F10 NC VSSQ F10
VSSQ G2 VSSQ G10 VSSQ G2 VSSQ G2
VSSQ G10 VSSQ VSSQ G10 VSSQ G10
VSSQ 96-BALL VSSQ VSSQ
96-BALL SDRAM DDR3L 96-BALL 96-BALL
SDRAM DDR3L H5TC4G63MFR-PBA_FBGA96 SDRAM DDR3L SDRAM DDR3L
H5TC4G63MFR-PBA_FBGA96 DDR1@ H5TC4G63MFR-PBA_FBGA96 H5TC4G63MFR-PBA_FBGA96
DDR1@ DDR1@ DDR1@

B B

CLIP1 CLIP2
1 1
P1 P1

EMIST_SUL-12A2M EMIST_SUL-12A2M
CLIP5
1
ME@ ME@ P1

EMIST_SUL-12A2M

CLIP3 CLIP4 ME@


1 1
P1 P1

EMIST_SUL-12A2M EMIST_SUL-12A2M

ME@ ME@

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2011/05/16 Deciphered Date 2013/05/16 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDRIII A Chip 2Gbit X16-II
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
D 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-8671P_SDV
Date: Thursday, October 04, 2012 Sheet 11 of 50
5 4 3 2 1

AMY WEN
5 4 3 2 1

PCH_RTCX1
W=20mils W=20mils UH1A
1 2 PCH_RTCX2
+RTCVCC +RTCBATT

SHORT PADS
CLRP2
R109 10M_0402_5%
+RTCVCC PCH_RTCX1 A20 C38 LPC_AD0
RTCX1 FWH0 / LAD0 LPC_AD0 [34,36,37]

1
R111 32.768KHZ_12.5PF_CM31532768DZFT A38 LPC_AD1
FWH1 / LAD1 LPC_AD1 [34,36,37]

LPC
1K_0402_5% 1 2 C217 PCH_RTCX2 C20 B37 LPC_AD2 EC and Mini card debug port
RTCX2 FWH2 / LAD2 LPC_AD2 [34,36,37]
1 2 Y1 1U_0603_10V4Z C37 LPC_AD3
LPC_AD3 [34,36,37]

2
1 2 PCH_RTCRST# D20 FWH3 / LAD3
1 1 RTCRST#

1
C214 C215 R114 20K_0402_5% D36 LPC_FRAME#
FWH4 / LFRAME# LPC_FRAME# [34,36,37]
1

C216 CLRP1 18P_0402_50V8J 18P_0402_50V8J 1 2 PCH_SRTCRST# G22


1U_0603_10V4Z SHORT PADS R115 20K_0402_5% SRTCRST# E36 +3VS
2 LDRQ0#

1
2 2

SHORT PADS
CLRP3
K22 K36 2 R116 1 10K_0402_5%

RTC
SM_INTRUDER#
2

12/27 C218 INTRUDER# LDRQ1# / GPIO23


D 1U_0603_10V4Z PCH_INTVRMEN C17 V5 SERIRQ SERIRQ SERIRQ [34,36] D

2
INTVRMEN SERIRQ

AM3 SATA_DTX_C_IRX_N0 SATA_DTX_C_IRX_N0 [36]


HDA_BIT_CLK N34 SATA0RXN AM1 SATA_DTX_C_IRX_P0
HDA_BCLK SATA0RXP SATA_DTX_C_IRX_P0 [36]
CMOS AP7 SATA_ITX_C_DRX_N0 0.01U_0402_16V7K 2 1 C219 SATA_ITX_DRX_N0 HDD

SATA 6G
SATA0TXN SATA_ITX_DRX_N0 [36]
HDA_SYNC L34 AP5 SATA_ITX_C_DRX_P0 0.01U_0402_16V7K 2 1 C220 SATA_ITX_DRX_P0 SATA_ITX_DRX_P0 [36]
HDA_SYNC SATA0TXP
+RTCVCC HDA_SPKR T10 AM10
[28] HDA_SPKR SPKR SATA1RXN AM8
R112 1 2 1M_0402_5% SM_INTRUDER# HDA_RST# K34 SATA1RXP AP11
HDA_RST# SATA1TXN AP10
R113 1 2 330K_0402_5% PCH_INTVRMEN SATA1TXP
[28] HDA_SDIN0 HDA_SDIN0 E34 AD7 SATA_DTX_C_IRX_N2 SATA_DTX_C_IRX_N2 [32]
HDA_SDIN0 SATA2RXN AD5 SATA_DTX_C_IRX_P2
INTVRMEN(DCP_SUS) SATA2RXP SATA_DTX_C_IRX_P2 [32] mSATA
* LHIntegrated
R119 G34 AH5 SATA_ITX_C_DRX_N2 0.01U_0402_16V7K 2 1 C223 SATA_ITX_DRX_N2_CONN
HDA_SDIN1 SATA2TXN SATA_ITX_DRX_N2_CONN [32]
Integrated VRM enable ME_FLASH 1 2 AH4 SATA_ITX_C_DRX_P2 0.01U_0402_16V7K 2 1 C224 SATA_ITX_DRX_P2_CONN SATA_ITX_DRX_P2_CONN [32]
[34] ME_FLASH SATA2TXP
VRM disable 0_0402_5% C34
HDA_SDIN2 AB8

IHDA
A34 SATA3RXN AB10
(INTVRMEN should always be pull high.) HDA_SDIN3 SATA3RXP AF3
SATA3TXN AF1
[32] PCH_WLBT_OFF_5# SATA3TXP
HDA_SDOUT A36
HDA_SDO Y7

SATA
+3VS @ SATA4RXN Y5
R121 2 1 10K_0402_5% PCH_WLBT_OFF_5# C36 SATA4RXP AD3
+3VS HDA_DOCK_EN# / GPIO33 SATA4TXN
R117 1 @ 2 1K_0402_5% HDA_SPKR AD1
R5018 1 2 1K_0402_5% PCH_GPIO13 N32 SATA4TXP
+3V_PCH HDA_DOCK_RST# / GPIO13
HIGH= Enable ( No Reboot ) @ Y3
SATA5RXN Y1
LOW= Disable (Default)
* SATA5RXP
SATA5TXN
AB3 Boot BIOS Strap bit1 BBS1
PCH_JTAG_TCK J3 AB1
JTAG_TCK SATA5TXP
C
GPIO51 GPIO19 Boot BIOS C
PCH_JTAG_TMS H7 Y11 R123
JTAG_TMS SATAICOMPO 37.4_0402_1% +1.05VS_VCC_SATA Bit11 Bit10 Destination

JTAG
PCH_JTAG_TDI K5 Y10 SATA_COMP 1 2
+3V_PCH JTAG_TDI SATAICOMPI
+5VS
0 1 Reserved
PCH_JTAG_TDO H1
R118 2 @ 1 1K_0402_5% HDA_SDOUT JTAG_TDO AB12 R125 +1.05VS_SATA3
SATA3RCOMPO 1 0 Reserved
49.9_0402_1%
Low = Disabled (Default) AB13 SATA3_COMP 1 2 1 1 SPI (Default)
* High = Enabled [Flash
SATA3COMPI *
Descriptor Security 0 0 LPC
SPI_CLK_PCH_R T3 AH1 RBIAS_SATA3 1 2
SPI_CLK SATA3RBIAS
2

Overide]
G

Q9 R127
BSS138_NL_SOT23-3 SPI_SB_CS0# Y14 750_0402_1%
HDA_SYNC_R 3 1 HDA_SYNC SPI_CS0#
SPI_SB_CS1# T1
S

SPI_CS1#

SPI
P3 PCH_SATALED# 2 R130 1 +3VS
SATALED# 10K_0402_5%
1

+3V_PCH SPI_SI V4 V14 PCH_GPIO21 2 R132 1


SPI_MOSI SATA0GP / GPIO21 +3VS
R5017 10K_0402_5%
R120 2 1 1K_0402_5% HDA_SYNC 1M_0402_5% SPI_SO_R U3 P1 ODD_DET# 2 R133 1 +3VS
SPI_MISO SATA1GP / GPIO19 10K_0402_5%
This signal has a weak internal pull-down
2

PANTHER-POINT_FCBGA989
On Die PLL VR Select is supplied by
* 1.5V when smapled high
1.8V when sampled low
SA00004NQ70
Needs to be pulled High for Huron River
platfrom
@ C81 1 2 22P_0402_50V8J HDA_BITCLK_AUDIO
8M 1'S : SA000039A20
SPI ROM Winbond
For SBA SBA: 8M +4 M
@ C83 1 2 22P_0402_50V8J HDA_SDOUT_AUDIO
+3VSPI +3VS +3VM NOSBA: 8M
B 8M 2'S : SA000046400 E-ON Check BOM
B

NOSBA@
8M 2'S : SA000039A10 WINBOND R5182 1 2 0_0402_5%
R124
33_0402_5%
Reserve for RF R5183 1 2 0_0402_5%
1 2 HDA_BIT_CLK JDB2
4M 1'S : SA00003K800 Winbond SBA@
[28] HDA_BITCLK_AUDIO
R126 1
33_0402_5% 2 1 4M 2'S : SA00004LI00 E-ON
1 2 HDA_SYNC_R 3 2 +3VSPI
[28] HDA_SYNC_AUDIO 3
R128 4 C225 1 2 0.1U_0402_16V4Z SBA@
33_0402_5% 5 4 8M SPI_WP#1 R104 1 2 3.3K_0402_5%
[14,34] EC_RSMRST# 5
1 2 HDA_RST# 6 U5
[28] HDA_RST_AUDIO# 6
R131 7 SPI_SB_CS0# R5168 1 2 0_0402_5% CS0# 1 8 SPI_HOLD#1 R106 1 SBA@ 2 3.3K_0402_5%
33_0402_5% 8 7 SPI_SO_R R5169 1 2 33_0402_5% SPI_SO_L 2 CS# VCC 7 SPI_HOLD# R5170 0_0402_5%
1 2 HDA_SDOUT 9 8 SPI_WP# 3 SO HOLD# 6 SPI_CLK_PCH 1 2 SPI_CLK_PCH_R SPI_WP# R5171 1 2 3.3K_0402_5%
[28] HDA_SDOUT_AUDIO [14,34,5] PBTN_OUT# 9 WP# SCLK
R85 1 @ 2 1K_0402_1% 10 4 5 SPI_SI_R 1 2 SPI_SI
R761 1 2 0_0402_5% 11 10 GND SI R5172 33_0402_5% SPI_HOLD# R5173 1 2 3.3K_0402_5%
11 2
+1.05VS @ 12 W25Q64FVSSIG_SO8
13 12 C85 SPI_CLK_PCH_R
+3V_PCH R290 1 @ 2 0_0402_5% +1.05VS_DB2 14 13
14
22P_0402_50V8J RF Request

2
15 1
15 @
16 R143
EC_RSMRST# R84 1 @ 2 1K_0402_1% 17 16 +3VSPI
17 33_0402_5%
XDP_DBRESET# 18
[14,5] XDP_DBRESET#
19 18 4M @

1
+3V_PCH +3V_PCH +3V_PCH PCH_JTAG_TDO 20 19 SBA@ U2202
20 2
21 SPI_SB_CS1# R5174 1 2 0_0402_5% CS1# 1 8
PCH_JTAG_TDI 22 21 SPI_SO_R R5191 1 2 33_0402_5% SPI_SO1 2 CS# VCC 7 SPI_HOLD#1 SBA@ R5175 C80
22 SO HOLD# 6
1

PCH_JTAG_TMS 23 SPI_WP#1 3 SPI_CLK1 1 2 0_0402_5% SPI_CLK_PCH_R 22P_0402_50V8J


R134 R135 R136 24 23 SBA@ 4 WP# SCLK 5 SPI_SI1 1 2 SPI_SI 1
24 GND SI @
@ 200_0402_5% @ 200_0402_5% @ 200_0402_5% 25 2 R5176
26 25 W25Q32BVSSIG_SO8 SBA@ 33_0402_5%
PCH_JTAG_TCK
26
Reserve for EMI please close to UH1
A 27 SBA@ C86 A
2

PCH_JTAG_TDO PCH_JTAG_TMS PCH_JTAG_TDI PCH_JTAG_TCK 28 G1


G2 1
22P_0402_50V8J RF Request
@
1

ACES_88717-2601
R138 R139 R140 R122 ME@
@ 100_0402_1% @ 100_0402_1% @ 100_0402_1% 51_0402_5%

Security Classification Compal Secret Data Compal Electronics, Inc.


2

Issued Date 2010/08/25 Deciphered Date 2012/08/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (1/8) SATA,HDA,SPI, LPC, XDP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-8671P_SDV
AMY WEN 5 4 3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2
Date: Thursday, October 04, 2012
1
Sheet 12 of 50
5 4 3 2 1

UH1B SMB_ALERT# [21] Q2A


2N7002DW-T/R7_SOT363-6
PCIE_PRX_DTX_N1 BG34 10K_0402_5% 6 1 SMB_CLK_S3
[22] PCIE_PRX_DTX_N1 PERN1 SMB_CLK_S3 [10,21,32,35]
PCIE_PRX_DTX_P1 BJ34 E12 SMB_ALERT# 2 1
[22] PCIE_PRX_DTX_P1 PERP1 SMBALERT# / GPIO11 +3V_PCH
Card reader C230 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_N1 AV32 2.2K_0402_5% 2.2K_0402_5%
[22] PCIE_PTX_C_DRX_N1
[22] PCIE_PTX_C_DRX_P1
C234 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_P1 AU32 PETN1 H14 PCH_SMBCLK R148 1 R149 2 1 2 R150 On-board Ch.A RAM

2
PETP1 SMBCLK

[32] PCIE_PRX_DTX_N2
PCIE_PRX_DTX_N2 BE34
PERN2 SMBDATA
C9 PCH_SMBDATA
+3V_PCH
1 2
+3VS
1 2 MINI CARD

5
PCIE_PRX_DTX_P2 BF34 R151 R147
WLAN
[32] PCIE_PRX_DTX_P2
[32] PCIE_PTX_C_DRX_N2
C233 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_N2 BB32 PERP2
PETN2
2.2K_0402_5% 2.2K_0402_5% Security ROM
C229 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_P2 AY32 3 4 SMB_DATA_S3
[32] PCIE_PTX_C_DRX_P2 PETP2 A12 SMB_DATA_S3 [10,21,32,35]

SMBUS
DRAMRST_CNTRL_PCH
BG36 SML0ALERT# / GPIO60 DRAMRST_CNTRL_PCH [6,9]
2N7002DW-T/R7_SOT363-6
BJ36 PERN3 C8 PCH_SML0CLK 2 R152 1
PERP3 SML0CLK +3V_PCH Q2B
D AV34 1K_0402_5% D
AU34 PETN3 G12 PCH_SML0DATA
PETP3 SML0DATA R153 10K_0402_5% Q10A
PCIE_PRX_DTX_N4 BF36 2 1 2N7002DW-T/R7_SOT363-6
[30] PCIE_PRX_DTX_N4 PERN4 +3V_PCH
LAN PCIE_PRX_DTX_P4 BE36 6 1 EC_SMB_CK2
[30] PCIE_PRX_DTX_P4 PERP4 EC_SMB_CK2 [33,34]
C231 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_N4 AY34 C13 PCH_HOT#
[30] PCIE_PTX_C_DRX_N4 1 2 0.1U_0402_10V7K PCIE_PTX_DRX_P4 BB34 PETN4 SML1ALERT# / PCHHOT# / GPIO74
C232 2.2K_0402_5%
[30] PCIE_PTX_C_DRX_P4 PETP4 E14 1
PCH_SML1CLK R154 2
EC

2
BG37 SML1CLK / GPIO58

PCI-E*
PERN5 +3V_PCH +3VS
BH37 M16 PCH_SML1DATA 1 2
PERP5 SML1DATA / GPIO75 Thermal Sensor

5
AY36 R155
BB36 PETN5 2.2K_0402_5%
PETP5 3 4 EC_SMB_DA2
BJ38 EC_SMB_DA2 [33,34]
BG38 PERN6 2N7002DW-T/R7_SOT363-6
AU36 PERP6 M7

Controller
PETN6 CL_CLK1 Q10B
AV36 +3V_PCH 2.2K_0402_5%
PETP6 PCH_SML0CLK 2 R206 1
+3V_PCH

Link
BG40 T11
PERN7 CL_DATA1

2
BJ40 2.2K_0402_5%
AY40 PERP7 R156 PCH_SML0DATA 2 R250 1
PETN7 +3V_PCH
BB40 P10 10K_0402_5%
PETP7 CL_RST1#
BE38

1
BC38 PERN8
AW38 PERP8
AY38 PETN8
PETP8
M10 PEG_CLKREQ#_R
R217 1 2 0_0402_5% CLK_PCIE_CR#_R Y40 PEG_A_CLKRQ# / GPIO47
[22] CLK_PCIE_CR# short@ CLKOUT_PCIE0N
R265 1 2 0_0402_5% CLK_PCIE_CR_R Y39
[22] CLK_PCIE_CR short@ CLKOUT_PCIE0P AB37
C
Card reader CLKOUT_PEG_A_N C
R160 2 1 10K_0402_5% CARD_CLKREQ#_R J2 AB38

CLOCKS
+3V_PCH PCIECLKRQ0# / GPIO73 CLKOUT_PEG_A_P
R381 1 2 0_0402_5%
[22] CARD_CLKREQ1# short@
R208 1 2 0_0402_5% CLK_PCIE_WLAN1#_R AB49 AV22 CLK_CPU_DMI#
[32] CLK_PCIE_WLAN1# CLKOUT_PCIE1N CLKOUT_DMI_N CLK_CPU_DMI# [5] +3VS
R212 1 short@ 2 0_0402_5% CLK_PCIE_WLAN1_R AB47 AU22 CLK_CPU_DMI
[32] CLK_PCIE_WLAN1 short@ CLKOUT_PCIE1P CLKOUT_DMI_P CLK_CPU_DMI [5]
WLAN
[32] WLAN_CLKREQ# R215 1 2 0_0402_5% WLAN_CLKREQ1# M1
R167 2 short@ 1 10K_0402_5% PCIECLKRQ1# / GPIO18 AM12
+3VS CLKOUT_DP_N

1
AM13 @
AA48 CLKOUT_DP_P R5019
AA47 CLKOUT_PCIE2N 10K_0402_5% +3VS
CLKOUT_PCIE2P BF18 CLK_BUF_CPU_DMI# R168 1 2 10K_0402_5%
R169 2 1 10K_0402_5% PCH_GPIO20 V10 CLKIN_DMI_N BE18 CLK_BUF_CPU_DMI R170 1 2 10K_0402_5% U32
+3VS

2
PCIECLKRQ2# / GPIO20 CLKIN_DMI_P 1 8
NC VCC 1
2 7 C696
R369 1 2 0_0402_5% CLK_PCIE_LAN#_R Y37 BJ30 CLKIN_DMI2# R172 1 2 10K_0402_5% 3 NC WP 6 SMB_CLK_S3 0.1U_0402_16V4Z
[30] CLK_PCIE_LAN# short@ CLKOUT_PCIE3N CLKIN_GND1_N [16,21,22,30,32,34,37] PLT_RST# PROT# SCL
R370 1 2 0_0402_5% CLK_PCIE_LAN_R Y36 BG30 CLKIN_DMI2 R174 1 2 10K_0402_5% 4 5 SMB_DATA_S3
[30] CLK_PCIE_LAN short@ CLKOUT_PCIE3P CLKIN_GND1_P GND SDA 2
LAN
R176 2 1 10K_0402_5% LAN_CLKREQ# A8 PCA24S08D_SO8
+3V_PCH PCIECLKRQ3# / GPIO25
R371 1 2 0_0402_5% G24 CLK_BUF_DREF_96M# R177 1 2 10K_0402_5% EEPROM SA00004MK00
[30] CLKREQ_LAN# short@ CLKIN_DOT_96N E24 CLK_BUF_DREF_96M R178 1 2 10K_0402_5% EEPROM SA00004ML00
Y43 CLKIN_DOT_96P
Y45 CLKOUT_PCIE4N
CLKOUT_PCIE4P AK7 CLK_BUF_PCIE_SATA# R181 1 2 10K_0402_5%
R184 2 1 10K_0402_5% PCH_GPIO26 L12 CLKIN_SATA_N AK5 CLK_BUF_PCIE_SATA R183 1 2 10K_0402_5%
+3V_PCH PCIECLKRQ4# / GPIO26 CLKIN_SATA_P

V45 K45 CLK_BUF_ICH_14M R185 1 2 10K_0402_5%


V46 CLKOUT_PCIE5N REFCLK14IN
CLKOUT_PCIE5P
R186 2 1 10K_0402_5% PCH_GPIO44 L14 H45 CLK_PCI_LPBACK
+3V_PCH PCIECLKRQ5# / GPIO44 CLKIN_PCILOOPBACK CLK_PCI_LPBACK [16]
B B
AB42 V47 XTAL25_IN
AB40 CLKOUT_PEG_B_N XTAL25_IN V49 XTAL25_OUT
CLKOUT_PEG_B_P XTAL25_OUT
R188 2 1 10K_0402_5% PCH_GPIO56 E6 R189 +1.05VS_VCCDIFFCLKN
+3V_PCH PEG_B_CLKRQ# / GPIO56 90.9_0402_1%
Y47 XCLK_RCOMP 1 2
V40 XCLK_RCOMP XTAL25_IN
V42 CLKOUT_PCIE6N
CLKOUT_PCIE6P XTAL25_OUT 1 2
R190 2 1 10K_0402_5% PCH_GPIO45 T13 R187 1M_0402_5%
+3V_PCH PCIECLKRQ6# / GPIO45 Y3
V38 K43 4 3
V37 CLKOUT_PCIE7N CLKOUTFLEX0 / GPIO64 NC OSC
FLEX CLOCKS

CLKOUT_PCIE7P F47 1 2
R193 2 1 10K_0402_5% ON_ODD_DET K12 CLKOUTFLEX1 / GPIO65 OSC NC
+3V_PCH PCIECLKRQ7# / GPIO46 H47
CLK_XDP_CLK# AK14 CLKOUTFLEX2 / GPIO66 25MHZ_12PF_X3G025000DC1H~D 1
[5] CLK_XDP_CLK# CLKOUT_ITPXDP_N 1
CLK_XDP_CLK AK13 K49 DGPU_PRSNT# C236
[5] CLK_XDP_CLK CLKOUT_ITPXDP_P CLKOUTFLEX3 / GPIO67 DGPU_PRSNT# [17]
C235 15P_0402_50V8J
15P_0402_50V8J
PANTHER-POINT_FCBGA989 2 2

@ R196 @ C238
33_0402_5% 22P_0402_50V8J
CLK_PCI_LPBACK 2 1 1 2
A A

Reserve for EMI please close to PCH

AMY WEN Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/08/25 Deciphered Date 2012/08/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (2/8) PCIE, SMBUS, CLK
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8671P_SDV
Date: Thursday, October 04, 2012 Sheet 13 of 50
5 4 3 2 1
5 4 3 2 1

D D

UH1C

DMI_CTX_PRX_N0 BC24 BJ14 FDI_CTX_PRX_N0


[4] DMI_CTX_PRX_N0 DMI0RXN FDI_RXN0 FDI_CTX_PRX_N0 [4]
DMI_CTX_PRX_N1 BE20 AY14 FDI_CTX_PRX_N1
[4] DMI_CTX_PRX_N1 DMI1RXN FDI_RXN1 FDI_CTX_PRX_N1 [4]
DMI_CTX_PRX_N2 BG18 BE14 FDI_CTX_PRX_N2
[4] DMI_CTX_PRX_N2 DMI2RXN FDI_RXN2 FDI_CTX_PRX_N2 [4]
DMI_CTX_PRX_N3 BG20 BH13 FDI_CTX_PRX_N3
[4] DMI_CTX_PRX_N3 DMI3RXN FDI_RXN3 FDI_CTX_PRX_N3 [4]
BC12 FDI_CTX_PRX_N4
FDI_RXN4 FDI_CTX_PRX_N4 [4]
DMI_CTX_PRX_P0 BE24 BJ12 FDI_CTX_PRX_N5
[4] DMI_CTX_PRX_P0 DMI0RXP FDI_RXN5 FDI_CTX_PRX_N5 [4]
DMI_CTX_PRX_P1 BC20 BG10 FDI_CTX_PRX_N6
[4] DMI_CTX_PRX_P1 DMI1RXP FDI_RXN6 FDI_CTX_PRX_N6 [4]
DMI_CTX_PRX_P2 BJ18 BG9 FDI_CTX_PRX_N7
[4] DMI_CTX_PRX_P2 DMI2RXP FDI_RXN7 FDI_CTX_PRX_N7 [4]
DMI_CTX_PRX_P3 BJ20
+3VS [4] DMI_CTX_PRX_P3 DMI3RXP BG14 FDI_CTX_PRX_P0
FDI_RXP0 FDI_CTX_PRX_P0 [4]
DMI_CRX_PTX_N0 AW24 BB14 FDI_CTX_PRX_P1
[4] DMI_CRX_PTX_N0 DMI0TXN FDI_RXP1 FDI_CTX_PRX_P1 [4]
DMI_CRX_PTX_N1 AW20 BF14 FDI_CTX_PRX_P2
[4] DMI_CRX_PTX_N1 DMI1TXN FDI_RXP2 FDI_CTX_PRX_P2 [4]
DMI_CRX_PTX_N2 BB18 BG13 FDI_CTX_PRX_P3
[4] DMI_CRX_PTX_N2 DMI2TXN FDI_RXP3 FDI_CTX_PRX_P3 [4]
DMI_CRX_PTX_N3 AV18 BE12 FDI_CTX_PRX_P4
[4] DMI_CRX_PTX_N3 DMI3TXN FDI_RXP4 FDI_CTX_PRX_P4 [4]
5

DMI
FDI
U2 BG12 FDI_CTX_PRX_P5
FDI_RXP5 FDI_CTX_PRX_P5 [4]
DMI_CRX_PTX_P0 AY24 BJ10 FDI_CTX_PRX_P6
VCC

[4] DMI_CRX_PTX_P0 DMI0TXP FDI_RXP6 FDI_CTX_PRX_P6 [4]


1 DMI_CRX_PTX_P1 AY20 BH9 FDI_CTX_PRX_P7
[47] VGATE IN1 [4] DMI_CRX_PTX_P1 DMI1TXP FDI_RXP7 FDI_CTX_PRX_P7 [4]
4 SYS_PWROK DMI_CRX_PTX_P2 AY18
2 OUT SYS_PWROK [5] [4] DMI_CRX_PTX_P2 DMI_CRX_PTX_P3 AU18 DMI2TXP
GND

[34] PCH_PWROK IN2 [4] DMI_CRX_PTX_P3 DMI3TXP AW16 FDI_INT


FDI_INT FDI_INT [4] +RTCVCC
MC74VHC1G08DFT2G_SC70-5 +1.05VS_PCH BJ24 AV12 FDI_FSYNC0
FDI_FSYNC0 [4]
3

DMI_ZCOMP FDI_FSYNC0

1
1 2 DMI_IRCOMP BG25 BC10 FDI_FSYNC1
DMI_IRCOMP FDI_FSYNC1 FDI_FSYNC1 [4]
R197 49.9_0402_1% R198
1 2 RBIAS_CPY BH21 AV14 FDI_LSYNC0 330K_0402_5%
C DMI2RBIAS FDI_LSYNC0 FDI_LSYNC0 [4] C
R199 750_0402_1%
R200 4mil width and place BB10 FDI_LSYNC1


FDI_LSYNC1 [4]

2
2 1 100K_0402_1% SYS_PWROK FDI_LSYNC1
within 500mil of the DSWODVREN - On Die DSW VR Enable
PCH * H Enable
L Disable
SUSACK# is only used on platform A18 DSWODVREN
DSWVRMEN R210
that support the Deep Sx state.

1
T763PAD 0_0402_5%

System Power Management


SUSACK# C12 E22 PCH_DPWROK 2 1 PCH_RSMRST#_R R202
SUSACK# DPWROK short@
330K_0402_5%
@
K3 B9 PCIE_WAKE#
[12,5] XDP_DBRESET# PCIE_WAKE# [30]

2
SYS_RESET# WAKE# 1 2 R205 +3V_PCH
10K_0402_5%
SYS_PWROK P12 N3 1
PM_CLKRUN#_R 2 R207
SYS_PWROK CLKRUN# / GPIO32 +3VS
8.2K_0402_5%

PCH_PWROK L22 G8 SUS_STAT# PAD T767


NOSBA@ PWROK SUS_STAT# / GPIO61
R5070 0_0402_5% 2 1
2 1 R209 APWROK L10 N14 SUSCLK
[34] PCH_APWROK APWROK SUSCLK / GPIO62 SUSCLK [34]
+3V_PCH SBA@ 0_0402_5% Can be left NC
when IAMT is not
PM_DRAM_PWRGD B13 D10 PM_SLP_S5# support on the
[5] PM_DRAM_PWRGD DRAMPWROK SLP_S5# / GPIO63 PM_SLP_S5# [34]
R279
0_0402_5%
platfrom
R213 2 1 PCH_RSMRST#_R C21 H4 PM_SLP_S4#
2 1 10K_0402_5% [12,34] EC_RSMRST# short@ RSMRST# SLP_S4# PM_SLP_S4# [34]
SUSWARN#

2 1 R214 AC_PRESENT_R SUSWARN# K16 F4 PM_SLP_S3#


SUSWARN#/SUSPWRDNACK/GPIO30 SLP_S3# PM_SLP_S3# [34]
200K_0402_1% R382
0_0402_5%
B R216 2 1 PCH_RSMRST#_R 2 1 PBTN_OUT#_R E20 G10 SLP_A# 2 1 B
[12,34,5] PBTN_OUT# short@ PWRBTN# SLP_A# PCH_SLPA# [34]
10K_0402_5% R221
0_0402_5%
1 2 D1 AC_PRESENT_R H20 G16 PM_SLP_SUS# PAD T766
[34,37,40] ACIN ACPRESENT / GPIO31 SLP_SUS# SBA@
RB751V_SOD323

2 1 PCH_GPIO72 E10 AP14 H_PM_SYNC


BATLOW# / GPIO72 PMSYNCH H_PM_SYNC [5]
R219
+3V_PCH 10K_0402_5% Can be left NC if no use
2 1 RI# A10 K14 PCH_GPIO29 PAD T771 integrated LAN.
+3V_PCH RI# SLP_LAN# / GPIO29
@
R256 2 1 PM_DRAM_PWRGD R220
200_0402_5% 10K_0402_5% PANTHER-POINT_FCBGA989

+3VS

@
R268 2 1
200_0402_5%

A A

AMY WEN Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/08/25 Deciphered Date 2012/08/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (3/8) DMI,FDI,PM,
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8671P_SDV
Date: Thursday, October 04, 2012 Sheet 14 of 50
5 4 3 2 1
5 4 3 2 1

PORT STRAP

LVDS L_DDC_DATA

PORT B SDVO_CTRLDATA

D
PORT C DDPC_CTRLDATA D
+3VS
[34] ENBKL
PORT D DDPD_CTRLDATA

2
R494
1

100K_0402_1%
R5020 R5021
2.2K_0402_5% 2.2K_0402_5%

1
UH1D
ENBKL J47 AP43 +3VS
2

PCH_ENVDD M45 L_BKLTEN SDVO_TVCLKINN AP45


EDID_CLK [23] PCH_ENVDD L_VDD_EN SDVO_TVCLKINP
EDID_DATA PCH_PWM P45 AM42
[23] PCH_PWM L_BKLTCTL SDVO_STALLN

1
1 1 AM40
@ @ EDID_CLK T40 SDVO_STALLP R5060 R5059
[23] EDID_CLK K47 L_DDC_CLK AP39
C88 C87 EDID_DATA 2.2K_0402_5% 2.2K_0402_5%
[23] EDID_DATA L_DDC_DATA SDVO_INTN AP40
22P_0402_50V8J 22P_0402_50V8J
2 2 R5022 1 2 2.2K_0402_5% CTRL_CLK T45 SDVO_INTP
+3VS

2
R5023 1 2 2.2K_0402_5% CTRL_DATA P39 L_CTRL_CLK
L_CTRL_DATA
RF Request R227 2 1 LVDS_IBG AF37 P38 HDMICLK_NB
LVD_IBG SDVO_CTRLCLK HDMICLK_NB [24]
2.37K_0402_1% AF36 M39 HDMIDAT_NB
LVD_VBG SDVO_CTRLDATA HDMIDAT_NB [24]
AE48
AE47 LVD_VREFH AT49
LVD_VREFL DDPB_AUXN AT47
DDPB_AUXP AT40 TMDS_B_HPD
Near Conn.
AK39 DDPB_HPD TMDS_B_HPD [24]
[23] LVDS_ACLK# LVDSA_CLK#

LVDS
AK40 AV42 TMDS_B_DATA2#_PCH C295 1 2 0.1U_0402_10V6K
[23] LVDS_ACLK LVDSA_CLK DDPB_0N AV40 TMDS_B_DATA2_PCH 1 2 HDMI_TX2-_CK [24]
C294 0.1U_0402_10V6K
AN48 DDPB_0P AV45 TMDS_B_DATA1#_PCH 1 2 HDMI_TX2+_CK [24] +3VS
C539 0.1U_0402_10V6K
[23] LVDS_A0# AM47 LVDSA_DATA#0 DDPB_1N AV46 TMDS_B_DATA1_PCH 1 2 HDMI_TX1-_CK [24]
[23] LVDS_A1# LVDSA_DATA#1 DDPB_1P
C538 0.1U_0402_10V6K
HDMI_TX1+_CK [24] HDMI

Digital Display Interface


C AK47 AU48 TMDS_B_DATA0#_PCH C535 1 2 0.1U_0402_10V6K C
[23] LVDS_A2# AJ48 LVDSA_DATA#2 DDPB_2N AU47 TMDS_B_DATA0_PCH 1 2 HDMI_TX0-_CK [24]
C534 0.1U_0402_10V6K
LVDSA_DATA#3 DDPB_2P HDMI_TX0+_CK [24]

2
AV47 TMDS_B_CLK#_PCH C537 1 2 0.1U_0402_10V6K
AN47 DDPB_3N AV49 TMDS_B_CLK_PCH 1 2 HDMI_CLK-_CK [24]
C536 0.1U_0402_10V6K R5115 R5147
[23] LVDS_A0 AM49 LVDSA_DATA0 DDPB_3P HDMI_CLK+_CK [24]
[23] LVDS_A1 LVDSA_DATA1 2.2K_0402_5% 2.2K_0402_5%
AK49
[23] LVDS_A2 AJ47 LVDSA_DATA2 P46 PCH_DPC_CLK PCH_DPC_CLK [25]

1
LVDSA_DATA3 DDPC_CTRLCLK P42 PCH_DPC_DAT
DDPC_CTRLDATA PCH_DPC_DAT [25]
AF40
Near Q2208 PCH_DPC_CLK
AF39 LVDSB_CLK# AP47 PCH_DPC_AUXN C245 1 2 0.1U_0402_10V6K
LVDSB_CLK DDPC_AUXN PCH_DPC_AUXN_C [25]
AP49 PCH_DPC_AUXP C244 1 2 0.1U_0402_10V6K PCH_DPC_DAT
DDPC_AUXP PCH_DPC_AUXP_C [25]
AH45 AT38 DPC_HPD
AH47 LVDSB_DATA#0 DDPC_HPD DPC_HPD [25]
AF49 LVDSB_DATA#1 AY47 PCH_DPC_N0_C C243 1 2 0.1U_0402_10V6K
AF45 LVDSB_DATA#2 DDPC_0N AY49 PCH_DPC_P0_C 1 2 PCH_DPC_DP_N0 [25]
C242 0.1U_0402_10V6K
LVDSB_DATA#3 DDPC_0P AY43 1 2 PCH_DPC_DP_P0 [25]
PCH_DPC_N1_C C545 0.1U_0402_10V6K
AH43 DDPC_1N AY45 1 2 PCH_DPC_DP_N1 [25]
PCH_DPC_P1_C C544 0.1U_0402_10V6K
AH49 LVDSB_DATA0 DDPC_1P BA47 1 2 PCH_DPC_DP_P1 [25]
PCH_DPC_N2_C C541 0.1U_0402_10V6K DP
AF47 LVDSB_DATA1 DDPC_2N BA48 PCH_DPC_P2_C 1 2 PCH_DPC_DP_N2 [25]
C540 0.1U_0402_10V6K
AF43 LVDSB_DATA2 DDPC_2P BB47 PCH_DPC_N3_C 1 2 PCH_DPC_DP_P2 [25]
C543 0.1U_0402_10V6K
LVDSB_DATA3 DDPC_3N BB49 1 2 PCH_DPC_DP_N3 [25]
PCH_DPC_P3_C C542 0.1U_0402_10V6K
DDPC_3P PCH_DPC_DP_P3 [25]

N48 M43
P49 CRT_BLUE DDPD_CTRLCLK M36
Near Conn.
T49 CRT_GREEN DDPD_CTRLDATA
CRT_RED
AT45
DDPD_AUXN
CRT

T39 AT43
M40 CRT_DDC_CLK DDPD_AUXP BH41
CRT_DDC_DATA DDPD_HPD
B BB43 B
M47 DDPD_0N BB45
M49 CRT_HSYNC DDPD_0P BF44
CRT_VSYNC DDPD_1N BE44
DDPD_1P BF42
CRT_IREF T43 DDPD_2N BE42
T42 DAC_IREF DDPD_2P BJ42
CRT_IRTN DDPD_3N BG42
DDPD_3P
1

PANTHER-POINT_FCBGA989
R5029
1K_0402_1%
2

A A

AMY WEN Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/08/25 Deciphered Date 2012/08/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (4/9) LVDS,CRT,DP,HDMI
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8671P_SDV
Date: Thursday, October 04, 2012 Sheet 15 of 50
5 4 3 2 1
5 4 3 2 1

UH1E
+3VS AY7
RSVD1 AV7
BG26 RSVD2 AU3
R236 1 2 8.2K_0402_5% PCI_PIRQA# BJ26 TP1 RSVD3 BG4
R237 1 2 8.2K_0402_5% PCI_PIRQD# BH25 TP2 RSVD4
R238 1 2 8.2K_0402_5% PCI_PIRQC# BJ16 TP3 AT10
R239 1 2 8.2K_0402_5% PCI_PIRQB# BG16 TP4 RSVD5 BC8
AH38 TP5 RSVD6
AH37 TP6 AU2
AK43 TP7 RSVD7 AT4
D AK45 TP8 RSVD8 AT3 D
C18 TP9 RSVD9 AT1
R240 1 2 8.2K_0402_5% DGPU_PWR_EN_R N30 TP10 RSVD10 AY3
R242 1 2 8.2K_0402_5% POUT2# H3 TP11 RSVD11 AT5
R243 1 2 8.2K_0402_5% ODD_DA# AH12 TP12 RSVD12 AV3
R244 1 2 8.2K_0402_5% POUT1# AM4 TP13 RSVD13 AV1
AM5 TP14 RSVD14 BB1
Y13 TP15 RSVD15 BA3
K24 TP16 RSVD16 BB5
R235 1 2 8.2K_0402_5% WL_OFF# L24 TP17 RSVD17 BB3
AB46 TP18 RSVD18 BB7
AB45 TP19 RSVD19 BE8
1 2 8.2K_0402_5% TP20 RSVD20 BD4

RSVD
R5030 DGPU_PWR_EN1
RSVD21 BF6
RSVD22 USB3.0 USB2.0 NOTE
R5067 1 2 8.2K_0402_5% TB_Force_PWR
B21 AV5
R5031 1 2 8.2K_0402_5% DGPU_HOLD_RST#_R M20 TP21 RSVD23 AV10
AY16 TP22 RSVD24
TP23 1 0
R5064 1 2 8.2K_0402_5% PCH_GPIO51 BG46 AT8
TP24 RSVD25
R5072 1 2 8.2K_0402_5% PCH_GPIO53 AY5 2 1* USB3.0/2.0 Conn
RSVD26 BA2
R5032 1 2 8.2K_0402_5% DGPU_HOLD_RST#_R BE28 RSVD27
BC30 USB3Rn1 AT12
[26] USB3_RX2_N USB3Rn2 RSVD28 3 2 USB3.0/2.0 Conn
@ BE32 BF3
[27] USB3_RX3_N USB3Rn3 RSVD29
BJ32 USB DEBUG=PORT1 AND PORT9
BC28 USB3Rn4
USB3Rp1 4 3
BE30
[26] USB3_RX2_P USB3Rp2
BF32
[27] USB3_RX3_P USB3Rp3
WL_OFF# R5033 1 @ 2 1K_0402_5% BG32 C24 4 Sensor Hub
AV26 USB3Rp4 USBP0N A24
BB26 USB3Tn1 USBP0P C25 USB20_N1
C [26] USB3_TX2_N AU28 USB3Tn2 USBP1N B25 USB20_P1 USB20_N1 [26] C
[27] USB3_TX3_N AY30 USB3Tn3 USBP1P C26 USB20_N2 USB20_P1 [26] USB2 (USB3 COMBO) 5 USB Camera
A16 swap overide Strap/Top-Block USB3Tn4 USBP2N USB20_N2 [27]
Swap Override jumper AU26 A26 USB20_P2 USB2 (USB3 COMBO)
AY26 USB3Tp1 USBP2P K28 USB20_P2 [27]
[26] USB3_TX2_P USB3Tp2 USBP3N 6 X
Low=A16 swap AV28 H28
[27] USB3_TX3_P AW30 USB3Tp3 USBP3P E28 USB20_N4
override/Top-Block USB3Tp4 USBP4N USB20_N4 [21]
PCI_GNT3# Swap Override enabled D28 USB20_P4 Sensor Hub 7
High=Default * USBP4P C28 USB20_N5
USB20_P4 [21] X
USBP5N A28 USB20_P5 USB20_N5 [23]
USBP5P C29 USB20_P5 [23] Camera
USBP6N 8 Touch Panel
B29
PCI_PIRQA# K40 USBP6P N28
PIRQA# USBP7N
Port6, Port7 HM76 doesn't support
PCI_PIRQB# K38 M28 9* WWAN
PIRQB# USBP7P

PCI
PCI_PIRQC# H38 L30 USB20_N8
PCI_PIRQD# G38 PIRQC# USBP8N K30 USB20_P8 USB20_N8 [23]
PIRQD# USBP8P G30 USB20_P8 [23] Touch Panel
USBP9N USB20_N9 [32] 10 WLAN
DGPU_HOLD_RST#_R C46 E30 WWAN
REQ1# / GPIO50 USBP9P USB20_P9 [32]

USB
DGPU_PWR_EN1 C44 C30 USB20_N10
E40 REQ2# / GPIO52 USBP10N A30 USB20_N10 [32]
DGPU_PWR_EN_R USB20_P10 WLAN 11 Finger Printer**
REQ3# / GPIO54 USBP10P L32 USB20_P10 [32]
PCH_GPIO51 D47 USBP11N K32
PCH_GPIO53 E42 GNT1# / GPIO51 USBP11P G32
GNT2# / GPIO53 USBP12N 12
WL_OFF# F46 E32
GNT3# / GPIO55 USBP12P C32
USBP13N A32
USBP13P 13 Bluetooth**
POUT1# G42
[36] POUT1# PIRQE# / GPIO2
ODD_DA# G40
Default: Active Low POUT2# C42 PIRQF# / GPIO3 C33 USBRBIAS 1 2
[37] POUT2# PIRQG# / GPIO4 USBRBIAS# * Debug Port
TB_Force_PWR D44 R5034 22.6_0402_1%
PIRQH# / GPIO5
** Not Use
B33
K10 USBRBIAS
B [34] PCI_PME# PME# B
PCH_PLTRST# C6 A14 USB_OC0#
[36,5] PCH_PLTRST# PLTRST# OC0# / GPIO59 K20 USB_OC1# USB_OC0# [26]
OC1# / GPIO40 B17 USB_OC2# USB_OC1# [27]
R5035 1 2 22_0402_5% CLK_PCI_LPBACK_R H49 OC2# / GPIO41 C16 USB_OC3#
[13] CLK_PCI_LPBACK 1 2 CLK_PCI_EC_R H43 CLKOUT_PCI0 OC3# / GPIO42 L16 USB_OC4#
R5036 22_0402_5%
[34] CLK_PCI_EC 2 1 J48 CLKOUT_PCI1 OC4# / GPIO43 A16
R384 22_0402_5% CLK_PCI_DB_R USB_OC5#
[37] CLK_PCI_DB 2 1 CLK_PCI_TPM_R K42 CLKOUT_PCI2 OC5# / GPIO9 D14 USB_OC6#
R390 22_0402_5%
[36] CLK_PCI_TPM H40 CLKOUT_PCI3 OC6# / GPIO10 C14 PCH_GPIO14
CLKOUT_PCI4 OC7# / GPIO14 +3V_PCH

PANTHER-POINT_FCBGA989
USB_OC5# R35 1 2 10K_0402_5%
USB_OC2# R40 1 2 10K_0402_5%
PCH_GPIO14 R47 1 2 10K_0402_5%
1 2 USB_OC0# R48 1 2 10K_0402_5%
R5038
RF Request 0_0402_5%

+3VS

CLK_PCI_EC CLK_PCI_LPBACK
5

U8 USB_OC6# R74 1 2 10K_0402_5%


2 PCH_PLTRST# USB_OC1# R76 1 2 10K_0402_5%
P

4 B USB_OC3# R77 1 2 10K_0402_5%


[13,21,22,30,32,34,37] PLT_RST# Y 1 1 2
@ @ USB_OC4# R80 10K_0402_5%
A
G

C5115 C5116
1

12P_0402_50V8J 12P_0402_50V8J @
3
1

C5037 R5039
1U_0402_6.3V4Z 100K_0402_5%
2

@ MC74VHC1G08DFT2G SC70 5P
2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


AMY WEN Issued Date 2010/08/25 Deciphered Date 2012/08/25 Title
PCH (5/9) PCI, USB
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8671P_SDV
Date: Thursday, October 04, 2012 Sheet 16 of 50

5 4 3 2 1
5 4 3 2 1

+3VS

FOR PROCESSOR SELECT


@ R1943 R1944 R5066

10K_0402_5%

10K_0402_5%

10K_0402_5%
R259 1 2 1K_0402_5% EC_SMI#

2
+3VS +1.8VS

Weak internal pull-high

2
R4914

1
2.2K_0402_5%
KB_RST# R266 1 2 10K_0402_5% @ DDR1@ DDR1@
R241 PCH_GPIO69
GPIO28

1
On-Die PLL Voltage Regulator NV_CLE 1 2
D H_SNB_IVB# [5] D
This signal has a weak internal pull up ODD_EN# 2 1 1K_0402_5% RAM_ID1

* H
L
On-Die voltage regulator enable
On-Die PLL Voltage Regulator disable
R1942 10K_0402_5%
CLOSE TO THE BRANCHING POINT RAM_ID0

R5042 1 @ 2 1K_0402_5% PCH_GPIO28 UH1F

R253 1 2 10K_0402_5% PCH_GPIO0 T7 C40 ODD_EN#


+3VS BMBUSY# / GPIO0 TACH4 / GPIO68 R1945 R1947 R5040

10K_0402_5%
10K_0402_5%

10K_0402_5%
R257 1 2 10K_0402_5% PCH_GPIO1 A42 B41 PCH_GPIO69
TACH1 / GPIO1 TACH5 / GPIO69

2
R258 1 2 10K_0402_5% PA0_WAKEUP H36 C41 RAM_ID1 +3VS
TACH2 / GPIO6 TACH6 / GPIO70
EC_SCI# E38 A40 RAM_ID0
[34] EC_SCI# TACH3 / GPIO7 TACH7 / GPIO71

1
EC_SMI# C10 R260 DDR1@ DDR1@
+3VS +3VS [34] EC_SMI# GPIO8
10K_0402_5%
R261 1 2 10K_0402_5% PCH_GPIO12 C4
+3V_PCH LAN_PHY_PWR_CTRL / GPIO12

1
1

R262 1 2 1K_0402_5% EC_LID_OUT# G2 P4


GPIO15 A20GATE GATEA20 [34]
R5046 R264 @
10K_0402_5% 10K_0402_5% AU16 PCH_PECI_R 1 @ 2
RAM_ID2 U2 PECI H_PECI [34,5]
0_0402_5% R263
DDR1@ DDR1@ SATA4GP / GPIO16 P5 KB_RST#
KB_RST# [34]
2

RAM_ID3 RAM_ID2 RCIN#

GPIO
R404 1 2 10K_0402_5% DGPU_PWROK D40 AY11
+3VS TACH0 / GPIO17 PROCPWRGD H_CPUPWRGD [5]
1

CPU/MISC
R5049 R267 R5041 1 2 10K_0402_5% PCH_GPIO22 T5 AY10 PCH_THRMTRIP#_R 1 2 H_THERMTRIP#
+3VS SCLOCK / GPIO22 THRMTRIP# H_THERMTRIP# [5]
10K_0402_5% 10K_0402_5% R269 390_0402_5%
R5073 1 2 10K_0402_5% PCH_GPIO24 E8 T14
+3V_PCH GPIO24 INIT3_3V#
DDR1@ DDR1@ INIT3_3V
2

R5074 1 @ 2 10K_0402_5% mSATA_PCH E16 AY1 NV_CLE


C +3V_PCH GPIO27 DF_TVS C
This signal has weak internal
1 R5043 2 10K_0402_5% PCH_GPIO28 P8 PU, can't pull low
+3V_PCH GPIO28 AH8
1 R5044 2 10K_0402_5% PCH_BT_ON# K1 TS_VSS1
+3VS STP_PCI# / GPIO34 AK11
1 R273 2 10K_0402_5% 3G_DET# K4 TS_VSS2
EC_LID_OUT# GPIO35 AH10
[34] EC_LID_OUT# 1R5048 @ 2 10K_0402_5% V8 TS_VSS3
PCH_WLBT_OFF_51#
SATA2GP / GPIO36 AK10
TS_VSS4
Intel schematic reviwe recommand.
PA0_WAKEUP R5045 1 2 10K_0402_5% PCH_GPIO37 M5
[21] PA0_WAKEUP +3VS SATA3GP / GPIO37
@
PCH_GPIO38 N2 P37
SLOAD / GPIO38 NC_1
3G_OFF# R277 1 2 10K_0402_5% 3G_OFF# M3
[32] 3G_OFF# SDATAOUT0 / GPIO39
RAM_ID3 V13 BG2
SDATAOUT1 / GPIO48 VSS_NCTF_15 RAM_ID3 RAM_ID2 RAM_ID1 RAM_ID0
R5047 1 2 10K_0402_5% PCH_GPIO49 V3 BG48
RAM
SATA5GP / GPIO49 / TEMP_ALERT# VSS_NCTF_16
GPIO48 GPIO16 GPIO70 GPIO71
R281 1 2 10K_0402_5% PCH_GPIO57 D6 BH3
+3V_PCH GPIO57 VSS_NCTF_17
@
BH47
R5050 VSS_NCTF_18 0 0 0 0 ELPIDA 4GB
10K_0402_5% T81 PAD A4 BJ4 PAD T64
1 2 mSATA_PCH VSS_NCTF_1 VSS_NCTF_19
[34] mSATA_DETEC# A44 BJ44 0 0 0 1 SAMSUNG 4GB
VSS_NCTF_2 VSS_NCTF_20
R5051 T78 PAD A45 BJ45 PAD T62
0_0402_5% VSS_NCTF_3 VSS_NCTF_21 0 0 1 0 HYNIX 4GB
1 2 A46 BJ46

NCTF
mSATA_PCH T79 PAD PAD T63
[32] mSATA_DET# short@ VSS_NCTF_4 VSS_NCTF_22
T84 PAD A5 BJ5 PAD T68 0 0 1 1 ELPIDA 8GB
B VSS_NCTF_5 VSS_NCTF_23 B
A6 BJ6
PCH_WLBT_OFF_51# VSS_NCTF_6 VSS_NCTF_24 0 1 0 0 SAMSUNG 8GB
[32] PCH_WLBT_OFF_51# B3 C2
VSS_NCTF_7 VSS_NCTF_25
3G_DET# B47 C48 0 1 0 1 HYNIX 8GB
[32] 3G_DET# VSS_NCTF_8 VSS_NCTF_26
BD1 D1 PAD T72
VSS_NCTF_9 VSS_NCTF_27 0 1 1 0 ELPIDA 2GB
BD49 D49 PAD T73
VSS_NCTF_10 VSS_NCTF_28
R5063 T86 PAD BE1 E1 PAD T70 0 1 1 1 SAMSUNG 2GB
10K_0402_5% VSS_NCTF_11 VSS_NCTF_29
1 2 PCH_GPIO37 T116 PAD BE49 E49 PAD T71
VSS_NCTF_12 VSS_NCTF_30 1 0 0 0 HYNIX 2GB
T76 PAD BF1 F1
VSS_NCTF_13 VSS_NCTF_31
T77 PAD BF49 F49 1 0 0 1 TBD
VSS_NCTF_14 VSS_NCTF_32

PANTHER-POINT_FCBGA989 1 0 1 0 TBD
+3VS
1 0 1 1 TBD

1 1 0 0 TBD
PCH_GPIO69 PCH_GPIO38 PCH_GPIO67 Function GPU_ID
1

R5167 R5179 1 1 0 1 TBD


10K_0402_5% 10K_0402_5%
A 0 0 0 PX4.0 0 1 1 1 0 TBD A
2

PCH_GPIO38
0 0 1 Reserved 1 DGPU_PRSNT# 1 1 1 1 TBD
DGPU_PRSNT# [13]
1

0 1 0 DIS 2 R5180 R5181


10K_0402_5% 10K_0402_5%
0AMY WEN
1 1 UMA 3 @ @ Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/08/25 Deciphered Date 2012/08/25 Title
2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (6/9) GPIO, CPU, MISC
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8671P_SDV
Date: Thursday, October 04, 2012 Sheet 17 of 50
5 4 3 2 1
5 4 3 2 1

PCH Power Rail Table


+1.05VS UH1G POWER +3VS S0 Iccmax
+1.05VS_PCH Voltage Rail Voltage Current
1300mA (A)
+1.05VS_PCH AA23 U48 +VCCADAC
VCCCORE[1] 1mA VCCADAC

0.01U_0402_16V7K
AC23 V_PROC_IO 1.05 0.001
VCCCORE[2]

1
1U_0402_6.3V6K

C5039

1U_0402_6.3V6K

C5040

1U_0402_6.3V6K

C5044

C5041

0.1U_0402_10V7K
C5042

10U_0603_6.3V6M
C5043
AD21

CRT
VCCCORE[3]

1
10U_0603_6.3V6M

C5038
AD23 U47
AF21 VCCCORE[4] VSSADAC
V5REF 5 0.001

VCC CORE

2
AF23 VCCCORE[5] @ @ @

2
D AG21 VCCCORE[6] +3VS D
AG23 VCCCORE[7]
VCCCORE[8]
V5REF_Sus 5 0.001
AG24 AK36 +VCCA_LVDS
AG26 VCCCORE[9] 1mA VCCALVDS
AG27 VCCCORE[10] AK37 Vcc3_3 3.3 0.266
AG29 VCCCORE[11] VSSALVDS
AJ23 VCCCORE[12]
AJ26 VCCCORE[13] AM37

LVDS
VccADAC 3.3 0.001
AJ27 VCCCORE[14] VCCTX_LVDS[1] +1.8VS
AJ29 VCCCORE[15] AM38
AJ31 VCCCORE[16] VCCTX_LVDS[2] VccADPLLA 1.05 0.08
+1.05VS_PCH VCCCORE[17] AP36
60mA VCCTX_LVDS[3]

1
22U_0805_6.3V6M
C5047
AP37 VccADPLLB 1.05 0.08
+1.05VS_VCCDPLLEXP AN19 VCCTX_LVDS[4] C5045 C5046
VCCIO[28] 0.01U_0402_16V7K 0.01U_0402_16V7K

2
VccCore 1.05 1.3
PAD T87 @ +VCCAPLLEXP BJ22 +3VS
VCCAPLLEXP
This pin can be left as no connect in V33 +3VS_VCC3_3_6 VccDMI 1.05 0.042
AN16 VCC3_3[6]

HVCMOS
On-Die VR enabled mode (default). VCCIO[15]

1
AN17 VccIO 1.05 2.925
VCCIO[16] V34 C5048
VCC3_3[7]
0.1U_0402_10V7K

2
AN21 VccASW 1.05 1.01
VCCIO[17]
AN26
VCCIO[18]
VccSPI 3.3 0.02
AN27 2925mA AT16 +VCCAFDI_VRM
VCCIO[19] VCCVRM[3]
+1.05VS_PCH AP21 +VCCP_VCCDMI +1.05VS_PCH VccDSW 3.3 0.003
C VCCIO[20] C
+1.05VS_VCC_EXP AP23 AT20 +VCCP_VCCDMI
VCCIO[21] VCCDMI[1]
VccpNAND 1.8 0.19

1
+1.05VS_PCH
1U_0402_6.3V6K

C5050

1U_0402_6.3V6K

C5051

1U_0402_6.3V6K

C5052

1U_0402_6.3V6K

C5054

DMI
AP24
VCCIO[22]
1

1
10U_0603_6.3V6M

C5049

VCCIO
C5053
AP26 20mA VCCCLKDMI AB36 +1.05VS_VCC_DMI_CCI 1U_0402_6.3V6K VccRTC 3.3 6 uA

2
VCCIO[23]
2

1
AT24 1/3
VCCIO[24] C5055 VccSus3_3 3.3 0.119
1U_0402_6.3V6K

2
AN33
VCCIO[25]
VccSusHDA 3.3 / 1.5 0.01
AN34 AG16
+3VS VCCIO[26] VCCDFTERM[1] +1.8VS
VccVRM 1.8 / 1.5 0.16
+3VS_VCCA3GBG BH29 AG17
VCC3_3[3] 190mAVCCDFTERM[2]

DFT / SPI
1

C5056 VccCLKDMI 1.05 0.02


0.1U_0402_10V7K AJ16
VCCDFTERM[3]

1
C5057
2

+VCCAFDI_VRM AP16 0.1U_0402_10V7K VccSSC 1.05 0.095


VCCVRM[2] AJ17

2
T768PAD VCCDFTERM[4] SBA@
+1.05VS_VCCAPLL_FDI BG6 2 1 VccDIFFCLKN 1.05 0.055
VccAFDIPLL +3VM
R393
+1.05VS_PCH 0_0402_5%
+1.05VS_VCCDPLL_FDI AP17 VccALVDS 3.3 0.001
VCCIO[27] V1 +3V_VCCPSPI 2 1
FDI

20mA VCCSPI +3VS


R386
AU20 0_0402_5% VccTX_LVDS 1.8 0.06
+VCCP_VCCDMI VCCDMI[2]

1
NOSBA@
C5059
B PANTHER-POINT_FCBGA989 1U_0402_6.3V6K B

+VCCAFDI_VRM 2
+1.5VS
R5053 0_0603_5%

2 1 +VCCAFDI_VRM

short@

VCCVRM==>1.5V FOR MOBILE


VCCVRM = 160mA detal waiting for newest spec

A A

AMY WEN Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/08/25 Deciphered Date 2012/08/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (7/9) PWR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8671P_SDV
Date: Thursday, October 04, 2012 Sheet 18 of 50
5 4 3 2 1
5 4 3 2 1

Have internal VRM


+3VS +1.05VS_PCH

2 @ 1 R5055 +VCCACLK
0_0402_5%
L3
10UH_LBR2012T100M_20%
1 2 +3VS_VCC_CLKF33 +3V_PCH
UH1J POWER +1.05VS_PCH

1
10U_0603_6.3V6M

C5060

1U_0402_6.3V6K

C5061
AD49 N26 +1.05VS_VCCUSBCORE
VCCACLK VCCIO[29]

1
2

1
C5063 P26 +3VALW +3V_PCH
0.1U_0402_10V7K T16 VCCIO[30] C5064 @
VCCDSW3_3 3mA

2
C5062 P28 1U_0402_6.3V6K

2
D
0.1U_0402_10V7K VCCIO[31] 2 1 D

2 1 +PCH_VCCDSW V12 T27


DCPSUSBYP VCCIO[32] 2MM J20
@ T29
T38 VCCIO[33] +3V_PCH 3 1

S
+3VS_VCC_CLKF33 Q120

D
VCC3_3[5]
T764PAD T23 SI2301BDS-T1-E3_SOT23-3
119mA VCCSUS3_3[7]

0.1U_0402_10V7K
+VCCAPLL_CPY_PCH BH23 ID4@ ID4@ ID4@

G
2
VCCAPLLDMI2

1
+3V_PCH

C5066

10U_0603_6.3V6M

C5264

1U_0402_6.3V6K
C5265
C
T24

5265
VCCSUS3_3[8]

1
+VCCDPLL_CPY AL29
+1.05VS_PCH VCCIO[14] V23

2
VCCSUS3_3[9]

USB

1
+VCCSUS1 AL24 V24 C5067
DCPSUS[3] VCCSUS3_3[10] 0.1U_0402_10V7K 2 R713 1
[34] PCH_PWR_EN#

0.1U_0402_10V7K
C5068 P24

2
+1.05VS_PCH 1U_0402_6.3V6K VCCSUS3_3[6] +1.05VS_PCH 0_0402_5% 1

C5104
@ AA19 ID4@

2
+1.05VM VCCASW[1] T26 +1.05VS_VCCAUPLL
NOSBA@ AA21 1010mA VCCIO[34]
1 2 VCCASW[2] 2 ID4@
R1132 1 20_0603_5% AA24
1mA V5REF_SUS M26 +PCH_V5REF_SUS C5072
VCCASW[3]

22U_0805_6.3V6M

22U_0805_6.3V6M
R1133 0_0603_5% 1U_0402_6.3V6K

1
C5070

C5071
NOSBA@ AA26 @
VCCASW[4]

Clock and Miscellaneous


AN23 +VCCA_USBSUS 1 2
AA27 DCPSUS[4]

2
VCCASW[5] AN24 +5VALW +5V_PCH
VCCSUS3_3[1] +3V_PCH
AA29 @
VCCASW[6]
AA31 2 1
VCCASW[7]
AC26 P34 +PCH_V5REF_RUN +3V_PCH 2MM J21
VCCASW[8] 1mA V5REF

1
1U_0402_6.3V6K

C5073

1U_0402_6.3V6K

C5074

1U_0402_6.3V6K

C5075
AC27 3

S
Q121 1

D
C
VCCASW[9] N20 C
VCCSUS3_3[2]

1
AC29

PCI/GPIO/LPC
C5076 SI2301BDS-T1-E3_SOT23-3
2

2
VCCASW[10] N22 1U_0402_6.3V6K ID4@ ID4@ ID4@

G
2
VCCSUS3_3[3]

1
+1.05VS_PCH

10U_0603_6.3V6M

C5266

1U_0402_6.3V6K
C5267
AC31

2
L5 VCCASW[11] P20 +3VS
10UH_LB2012T100MR_20% AD29 VCCSUS3_3[4] PCH_PWR_EN# 2 R711 1

2
VCCASW[12]

0.1U_0402_10V7K
+VCCA_DPLL_L 1 2 +1.05VS_VCCA_A_DPL P22
AD31 VCCSUS3_3[5] 0_0402_5%
VCCASW[13] 1

C5103
C5078 ID4@
1 2 +1.05VS_VCCA_B_DPL W21 AA16 +3VS_VCCPCORE 0.1U_0402_10V7K
L6 VCCASW[14] VCC3_3[1]

2
+3VS 2 ID4@
220U_B2_2.5VM_R35

C5079
1U_0402_6.3V6K

C5080

220U_B2_2.5VM_R35

C5081
1U_0402_6.3V6K

C5082

10UH_LB2012T100MR_20% W23 W16


VCCASW[15] VCC3_3[8]
1

1
1

+ + W24 T34 +3VS_VCCPPCI


VCCASW[16] VCC3_3[4]

1
W26 C5083
2

VCCASW[17] 0.1U_0402_10V7K
W29 +3VS

2
VCCASW[18]
W31 AJ2 +VCC3_3_2 +5V_PCH +3V_PCH +5VS +3VS
VCCASW[19] VCC3_3[2] +1.05VS_SATA3 +1.05VS_PCH

1
W33
VCCASW[20]

2
+1.05VS_PCH +VCCDIFFCLK AF13 C5084
VCCIO[5] 0.1U_0402_10V7K R5056 D4602 R5057 D3

1
+VCCRTCEXT N16 100_0402_5% CH751H-40PT_SOD323-2 100_0402_5% CH751H-40PT_SOD323-2
DCPRTC
1

C5085 AH13 C296


VCCIO[12]
1

1U_0402_6.3V6K C297 1U_0402_6.3V6K

1
0.1U_0402_10V7K +VCCAFDI_VRM Y49 AH14 +1.05VS_SATA3 +PCH_V5REF_SUS +PCH_V5REF_RUN
2

VCCVRM[4] VCCIO[13]
2

1
+1.05VS_VCCDIFFCLKN
+1.05VS_VCCDIFFCLKN AF14 C5069 C5077
+1.05VS_PCH VCCIO[6]
+1.05VS_VCCA_A_DPL BD47 PAD T765 0.1U_0603_25V7K 1U_0603_10V6K

2
VCCADPLLA 80mA
1

SATA
AK1 +VCCSATAPLL
C298 +1.05VS_VCCA_B_DPL BF47 VCCAPLLSATA +VCCAFDI_VRM
B
1U_0402_6.3V6K VCCADPLLB 80mA B
2

AF11 +VCCAFDI_VRM
+VCCDIFFCLK AF17 VCCVRM[1] +1.05VS_VCC_SATA +1.05VS_PCH
AF33 VCCIO[7]
+1.05VS_SSCVCC AF34 VCCDIFFCLKN[1]
55mA AC16 +1.05VS_VCC_SATA
+1.05VS_PCH VCCDIFFCLKN[2] VCCIO[2]
+1.05VS_VCCDIFFCLKN AG34
VCCDIFFCLKN[3] FOR SBA
1

AC17
VCCIO[3] +3VALW TO +3VM

1
C301 C300
1U_0402_6.3V6K +1.05VS_SSCVCC AG33 AD17 1U_0402_6.3V6K
2

R5058 VCCSSC 95mA VCCIO[4]

2
0_0402_5% +3VALW
@ +VCCSST V16 @ +3VM
2 1 +1.05VM_VCCSUS DCPSST +1.05VM SBA@ SBA@
+1.05VS_PCH
1

2 1 10U_0805_10V4Z 1U_0603_10V4Z
C5111 C5086 +1.05VM_VCCSUS T17 T21
DCPSUS[1] VCCASW[22]
1

1
1U_0402_6.3V6K 0.1U_0402_10V7K V19 2MM J17 1 1
2

@ DCPSUS[2] C5235 C5233 R5143


MISC

+1.05VS_PCH V21 VL 3 1 470_0603_5%


2

VCCASW[23] @
2 2
CPU

+V_CPU_IO BJ8
V_PROC_IO 1mA

2
T19 +5VALW Q119
VCCASW[21] @ AP2301GN-HF_SOT23-3

2
1

1
+RTCVCC +3V_PCH D
4.7U_0603_6.3V6K

C5087
0.1U_0402_10V7K

C5088
0.1U_0402_10V7K

C5089

R387 R5141 20K_0402_5% SBA@


0_0402_5% 2N7002H_SOT23-3 2
A22 P32 +VCCSUSHDA 2 1 Q17 G
RTC

10mA VCCSUSHDA
2

VCCRTC
HDA

short@ R5140 20K_0402_5% SLP_A R5102 @ S

3
1U_0402_6.3V6K

C5090
0.1U_0402_10V7K

C5091
0.1U_0402_10V7K

C5092
1

PANTHER-POINT_FCBGA989 C5093 SBA@ 20K_0402_5%


0.1U_0402_16V4Z SBA@
1
2

1
C5234
D 0.1U_0603_25V7K SLP_A
2 SBA@
[34,44] M_PWR_ON 2
A G Q118 A
S
SBA@ 2N7002K_SOT23-3

3
Security Classification Compal Secret Data Compal Electronics, Inc.
2010/08/25 2012/08/25 Title
Issued Date Deciphered Date PCH (8/9) PWR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-8671P_SDV
AMY WEN 5 4 3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2
Date: Thursday, October 04, 2012
1
Sheet 19 of 50
5 4 3 2 1

UH1I

AY4 H46
AY42 VSS[159] VSS[259] K18
AY46 VSS[160] VSS[260] K26
AY8 VSS[161] VSS[261] K39
B11 VSS[162] VSS[262] K46
D UH1H B15 VSS[163] VSS[263] K7 D
H5 B19 VSS[164] VSS[264] L18
VSS[0] B23 VSS[165] VSS[265] L2
AA17 AK38 B27 VSS[166] VSS[266] L20
AA2 VSS[1] VSS[80] AK4 B31 VSS[167] VSS[267] L26
AA3 VSS[2] VSS[81] AK42 B35 VSS[168] VSS[268] L28
AA33 VSS[3] VSS[82] AK46 B39 VSS[169] VSS[269] L36
AA34 VSS[4] VSS[83] AK8 B7 VSS[170] VSS[270] L48
AB11 VSS[5] VSS[84] AL16 F45 VSS[171] VSS[271] M12
AB14 VSS[6] VSS[85] AL17 BB12 VSS[172] VSS[272] P16
AB39 VSS[7] VSS[86] AL19 BB16 VSS[173] VSS[273] M18
AB4 VSS[8] VSS[87] AL2 BB20 VSS[174] VSS[274] M22
AB43 VSS[9] VSS[88] AL21 BB22 VSS[175] VSS[275] M24
AB5 VSS[10] VSS[89] AL23 BB24 VSS[176] VSS[276] M30
AB7 VSS[11] VSS[90] AL26 BB28 VSS[177] VSS[277] M32
AC19 VSS[12] VSS[91] AL27 BB30 VSS[178] VSS[278] M34
AC2 VSS[13] VSS[92] AL31 BB38 VSS[179] VSS[279] M38
AC21 VSS[14] VSS[93] AL33 BB4 VSS[180] VSS[280] M4
AC24 VSS[15] VSS[94] AL34 BB46 VSS[181] VSS[281] M42
AC33 VSS[16] VSS[95] AL48 BC14 VSS[182] VSS[282] M46
AC34 VSS[17] VSS[96] AM11 BC18 VSS[183] VSS[283] M8
AC48 VSS[18] VSS[97] AM14 BC2 VSS[184] VSS[284] N18
AD10 VSS[19] VSS[98] AM36 BC22 VSS[185] VSS[285] P30
AD11 VSS[20] VSS[99] AM39 BC26 VSS[186] VSS[286] N47
AD12 VSS[21] VSS[100] AM43 BC32 VSS[187] VSS[287] P11
AD13 VSS[22] VSS[101] AM45 BC34 VSS[188] VSS[288] P18
AD19 VSS[23] VSS[102] AM46 BC36 VSS[189] VSS[289] T33
AD24 VSS[24] VSS[103] AM7 BC40 VSS[190] VSS[290] P40
AD26 VSS[25] VSS[104] AN2 BC42 VSS[191] VSS[291] P43
AD27 VSS[26] VSS[105] AN29 BC48 VSS[192] VSS[292] P47
AD33 VSS[27] VSS[106] AN3 BD46 VSS[193] VSS[293] P7
AD34 VSS[28] VSS[107] AN31 BD5 VSS[194] VSS[294] R2
C AD36 VSS[29] VSS[108] AP12 BE22 VSS[195] VSS[295] R48 C
AD37 VSS[30] VSS[109] AP19 BE26 VSS[196] VSS[296] T12
AD38 VSS[31] VSS[110] AP28 BE40 VSS[197] VSS[297] T31
AD39 VSS[32] VSS[111] AP30 BF10 VSS[198] VSS[298] T37
AD4 VSS[33] VSS[112] AP32 BF12 VSS[199] VSS[299] T4
AD40 VSS[34] VSS[113] AP38 BF16 VSS[200] VSS[300] W34
AD42 VSS[35] VSS[114] AP4 BF20 VSS[201] VSS[301] T46
AD43 VSS[36] VSS[115] AP42 BF22 VSS[202] VSS[302] T47
AD45 VSS[37] VSS[116] AP46 BF24 VSS[203] VSS[303] T8
AD46 VSS[38] VSS[117] AP8 BF26 VSS[204] VSS[304] V11
AD8 VSS[39] VSS[118] AR2 BF28 VSS[205] VSS[305] V17
AE2 VSS[40] VSS[119] AR48 BD3 VSS[206] VSS[306] V26
AE3 VSS[41] VSS[120] AT11 BF30 VSS[207] VSS[307] V27
AF10 VSS[42] VSS[121] AT13 BF38 VSS[208] VSS[308] V29
AF12 VSS[43] VSS[122] AT18 BF40 VSS[209] VSS[309] V31
AD14 VSS[44] VSS[123] AT22 BF8 VSS[210] VSS[310] V36
AD16 VSS[45] VSS[124] AT26 BG17 VSS[211] VSS[311] V39
AF16 VSS[46] VSS[125] AT28 BG21 VSS[212] VSS[312] V43
AF19 VSS[47] VSS[126] AT30 BG33 VSS[213] VSS[313] V7
AF24 VSS[48] VSS[127] AT32 BG44 VSS[214] VSS[314] W17
AF26 VSS[49] VSS[128] AT34 BG8 VSS[215] VSS[315] W19
AF27 VSS[50] VSS[129] AT39 BH11 VSS[216] VSS[316] W2
AF29 VSS[51] VSS[130] AT42 BH15 VSS[217] VSS[317] W27
AF31 VSS[52] VSS[131] AT46 BH17 VSS[218] VSS[318] W48
AF38 VSS[53] VSS[132] AT7 BH19 VSS[219] VSS[319] Y12
AF4 VSS[54] VSS[133] AU24 H10 VSS[220] VSS[320] Y38
AF42 VSS[55] VSS[134] AU30 BH27 VSS[221] VSS[321] Y4
AF46 VSS[56] VSS[135] AV16 BH31 VSS[222] VSS[322] Y42
AF5 VSS[57] VSS[136] AV20 BH33 VSS[223] VSS[323] Y46
AF7 VSS[58] VSS[137] AV24 BH35 VSS[224] VSS[324] Y8
AF8 VSS[59] VSS[138] AV30 BH39 VSS[225] VSS[325] BG29
AG19 VSS[60] VSS[139] AV38 BH43 VSS[226] VSS[328] N24
B AG2 VSS[61] VSS[140] AV4 BH7 VSS[227] VSS[329] AJ3 B
AG31 VSS[62] VSS[141] AV43 D3 VSS[228] VSS[330] AD47
AG48 VSS[63] VSS[142] AV8 D12 VSS[229] VSS[331] B43
AH11 VSS[64] VSS[143] AW14 D16 VSS[230] VSS[333] BE10
AH3 VSS[65] VSS[144] AW18 D18 VSS[231] VSS[334] BG41
AH36 VSS[66] VSS[145] AW2 D22 VSS[232] VSS[335] G14
AH39 VSS[67] VSS[146] AW22 D24 VSS[233] VSS[337] H16
AH40 VSS[68] VSS[147] AW26 D26 VSS[234] VSS[338] T36
AH42 VSS[69] VSS[148] AW28 D30 VSS[235] VSS[340] BG22
AH46 VSS[70] VSS[149] AW32 D32 VSS[236] VSS[342] BG24
AH7 VSS[71] VSS[150] AW34 D34 VSS[237] VSS[343] C22
AJ19 VSS[72] VSS[151] AW36 D38 VSS[238] VSS[344] AP13
AJ21 VSS[73] VSS[152] AW40 D42 VSS[239] VSS[345] M14
AJ24 VSS[74] VSS[153] AW48 D8 VSS[240] VSS[346] AP3
AJ33 VSS[75] VSS[154] AV11 E18 VSS[241] VSS[347] AP1
AJ34 VSS[76] VSS[155] AY12 E26 VSS[242] VSS[348] BE16
AK12 VSS[77] VSS[156] AY22 G18 VSS[243] VSS[349] BC16
AK3 VSS[78] VSS[157] AY28 G20 VSS[244] VSS[350] BG28
VSS[79] VSS[158] G26 VSS[245] VSS[351] BJ28
PANTHER-POINT_FCBGA989 G28 VSS[246] VSS[352]
G36 VSS[247]
G48 VSS[248]
H12 VSS[249]
H18 VSS[250]
H22 VSS[251]
H24 VSS[252]
H26 VSS[253]
H30 VSS[254]
H32 VSS[255]
H34 VSS[256]
F3 VSS[257]
VSS[258]
A A

PANTHER-POINT_FCBGA989

AMY WEN Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/08/25 Deciphered Date 2012/08/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (9/9) VSS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8671P_SDV
Date: Thursday, October 04, 2012 Sheet 20 of 50
5 4 3 2 1
A B C D E

Sensor Hub
Accelerometer + eCompass

1 +3VS +3VS 1

1
+3VS R5284 R5283
0_0402_5% 0_0603_5%

1
+3VS

2
R2226 SENSOR_VDDA
0_0402_5%

1
U5004 C51 C54 C53 C52
2

+3VS_ACC 1 14 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K 0.1U_0402_10V6K

2
Vdd_IO Vdd

24

36

48
1

1
6 3 SENSE_SDA C138 C36 U5003 +3VS
C1 SDA
PCH GPIO

VBAT
VDDA

VDD_1

VDD_2

VDD_3
1

C694 ACC_SETP 12 2 SENSE_SCL 10U_0603_6.3V6M 0.1U_0402_10V6K 0_0402_5%

2
4.7U_0603_6.3V6K 1 2 ACC_SETC 13 SETP SCL 1 2 PA0_WAKEUP_R 10 18 ACC_INT1
SETC [17] PA0_WAKEUP PA0-WKUP PB0

1
C5154 5 ACC_INT1 R2235 19 ACC_INT2
2

0.22U_0402_6.3V6K 8 INT1 @ PA1 11 PB1 20 GYRO_INT1


DRDY 9 Reserved 4 ACC_INT2 PA2 12 PA1 PB2 39 GYRO_INT2 R226 R228
10 Reserved INT2 PA3 13 PA2 PB3 40 2.2K_0402_5%
2.2K_0402_5%
11 Reserved PA4 14 PA3 PB4 41

2
Reserved PA5 15 PA4 PB5 42 SENSE_SCL
PA5 PB6/I2C1_SCL SENSE_SCL [37]
7 PA6 16 43 SENSE_SDA
GND PA6 PB7/I2C1_SDA SENSE_SDA [37]
45 HUB_PB8 @ T772 PAD~D
17 PB8 46 HUB_PB9 @ T773 PAD~D
LSM303DLHCTR_LGA14_3X5 R5241 29 PA7 PB9 21 SMB_HUB_CLK R2241 2 @ 1 0_0402_5%
PA8 PB10/I2C2_SCL SMB_CLK_S3 [10,13,32,35]
1.5K_0402_5% 30 22 SMB_HUB_DATA R2242 2 @ 1 0_0402_5%
PA9 PB11/I2C2_SDA SMB_DATA_S3 [10,13,32,35]
1 2 HUB_PA10 31 25 SMB_HUB_ALERT# R2244 2 @ 1 0_0402_5%
PA10 PB12/I2C2_SMBAL SMB_ALERT# [13]
R2245 1 2 0_0402_5% USB20_N4_R 32 26 TABLET#_R
[16] USB20_N4 PA11/USB_DM PB13
R2246 1 2 0_0402_5% USB20_P4_R 33 27 DRDY
[16] USB20_P4 PA12/USB_DP PB14
HUB_PA13 34 28 ALS_INT
PA13/SWDIO PB15 ALS_INT [37]
PAD~D T769 @ HUB_PA14 37
PAD~D T770 @ 38 PA14/SWCLK
2 PA15 2

SENSOR_32K_IN 5
SENSOR_32K_OUT 6 OSC_IN
OSC_OUT 2
Y2202 SENSOR_RST#_R 7 PC13 3
NRST PC14 4
3 1 PC15
4 2 44 SENSOR_BOOT0
BOOT0
1 1
12MHZ_12PF_X3S012000DC1H-X

VSS_1

VSS_2

VSS_3
VSSA
C5113 C5112

PAD

1
15P_0402_50V8J 15P_0402_50V8J
2 2 R225
20K_0402_5%

23

35

47

49
STM32F103CBU6TRC18_VFQFPN48_7X7

2
Change symbol

Gyro +3VS +3VS

1
+3VS R480 R481
@ 100K_0402_5% 100K_0402_5%
R2238 R2250
1

3 0_0402_5% 0_0402_5% 3

2
R2231 2 1 SENSOR_RST#_R TABLET#_R 1 2
[13,16,22,30,32,34,37] PLT_RST# TABLET# [34]
0_0402_5%
+3VS
U5005

1
C57
2

9 1 +3VS_GYRO
RES_1 VDD_IO 0.1U_0402_10V6K

2
10 2 SENSE_SCL
RES_2 SCL/SPC
11 3 SENSE_SDA
RES_3 SDA/SDI/SDO
12 4 GYRO_SA0 1 2
RES_4 SDO/SA0 R2232 0_0402_5%
13 5
+3VS GND CS
PLLFILT 14 6 GYRO_INT2
RES_5 DRDY/INT2
15 7 GYRO_INT1
RES_6 INT1 +3VS +3VS +3VS +3VS +3VS +3VS
16 8
VDD RES_0
1

C37 C156 L3GD20TR_LGA16_4X4

1
@ @
0.1U_0402_10V6K 10U_0603_6.3V6M R575 R577 R579 R581 R583 R585
2

10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%

2
1 PA1 PA2 PA3 PA4 PA5 PA6

1
@ @ @ @
R576 R578 R580 R582 R584 R586
C226 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
0.01U_0402_16V7K
2

2
1 2 PLLFILT
4 4

@ @
1 2 PLLFILT_C 1 2

R223 C5238
10K_0402_5% 0.47U_0402_10V4
SE083474Z80
AMY WEN Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/08/25 Deciphered Date 2012/08/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Sensor Fusion
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8671P_SDV
Date: Thursday, October 04, 2012 Sheet 21 of 50
A B C D E
A B C D E

+ODR_PWR

JREAD1

SD_CMD_R 3
4 CMD
5 VSS
SD_CLK_R 6 VDD
7 CLK
VSS
1 1
SD_D0_R 8
DAT0

1
SD_D1_R 9
SD_D2_R 1 DAT1
R1322 DAT2
@ SD_D3_R 2
0_0402_5% CD/DAT3

2
SD_WP 10
SD_CD 11 WP SW
1 CD SW
C1318 12 14
13 GND SW GND 15
0.1U_0402_16V7K @ GND SW GND
2
T-SOL_156-1000302601_NR
EMI Solution ME@

SD_CD SD_WP
CARD UNINSERTION Close(Low) Close(Low)
CARD HALF INSERTION Close(Low) Open(High)
CARD INSERTION Open(High) Close(Low)

2 2

+ODR_PWR
No 41, for measurement

+3VS +3VS_CARD
10U_0603_6.3V6M
0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K
1 2 1 1 1 1
C1300

C1302

C1303
C1301
R1300 0_0805_5%
40 mils short@ 40 mils
2 2 2 2

+3VS_CARD +3VS_CARD +3VS_CARD +3VS_CARD


Close to JREAD1

1
1
R1321

1
R1325
1K_0402_5% R1320 1K_0402_5% R1324
@ 100K_0402_5% 100K_0402_5%

2
SD_CD# SP15_SDWP_XDD7 1 R1326 2

2
0_0402_5%

1
D @
3 D 3
Q1301 2 SD_CD 2 SD_WP
Q1302
2N7002K_SOT23-3 G 2N7002K_SOT23-3 G
+ODR_PWR S S
+3VS_CARD

3
10U_0603_6.3V6M

0.1U_0402_16V7K

1 1
C1312
C1311

2 2

U1301
40 mils 9
3V3_IN
C1313 1 2 1U_0402_6.3V6K 20 mils DV33_18 15
DV33_18
C1308 2 1 0.1U_0402_16V7K 20 mils DV12 7
AV12
C1309 2 1 4.7U_0603_6.3V6K 20 mils DV12_S 11
DV12_S
C1314 2 1 4.7U_0603_6.3V6K
C1316 2 1 0.1U_0402_16V7K 40 mils 10
Card_3V3 25
R1302 1 2 6.2K_0603_1% 12 mils RREF 8 GND
RREF
Close to U1301
[13] PCIE_PTX_C_DRX_P1 1 12 SD_D1 R1327 1 short@ 2 0_0402_5% SD_D1_R
2 HSIP SP1 13 SD_D0 R1328 1 short@ 2 0_0402_5% SD_D0_R
[13] PCIE_PTX_C_DRX_N1 HSIN SP2
[13] PCIE_PRX_DTX_P1 C1306 1 2 0.1U_0402_16V7K PCIE_PRX_C_DTX_P1 5 14 SD_CLK R1323 1 2 0_0402_5% SD_CLK_R
C1307 1 2 0.1U_0402_16V7K PCIE_PRX_C_DTX_N1 6 HSOP SP3 16 SD_CMD R1329 1 short@ 2 0_0402_5% SD_CMD_R
[13] PCIE_PRX_DTX_N1 HSON SP4 17 1 2
SD_D3 R1330 short@ 0_0402_5% SD_D3_R
SP5 18 SD_D2 R1331 1 short@ 2 0_0402_5% SD_D2_R
3 SP6
[13] CLK_PCIE_CR REFCLKP
4
[13] CLK_PCIE_CR# REFCLKN
1
[13,16,21,30,32,34,37] PLT_RST# PLT_RST# 23 20 SP15_SDWP_XDD7 @
PERST# SD_WP C1315
CARD_CLKREQ1# 24 21 SD_CD# 5PF_0402_50V8
[13] CARD_CLKREQ1# CLK_REQ# SD_CD# 2
R1317 Close to U1301
4 +3VS_CARD 2 1 CR_GPIO 19 22 4
GPIO MS_INS#
10K_0402_5% vendor suggest
RTS5229-GR_QFN24_4X4
for EMI

AMY WEN Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/05/16 Deciphered Date 2013/05/16 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Card Reader
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-8671P_SDV
Date: Thursday, October 04, 2012 Sheet 22 of 50
A B C D E
5 4 3 2 1

INVPWM

SP040004W00

470P_0402_50V7K

470P_0402_50V7K
DISPOFF# PN:SP01000XE00 2A
C635
@ @ B+

1
C636 (60 MIL) F4
B+_JLCD 1 2
ME@

1
JLCD1 2A_32V_0438001.WR
40 @ C846 Change Symbol
D 40 39 4.7U_0805_25V6-K D
For EMI C845

2
39 38 680P_0402_50V7K
38 37 R675 1 2 0_0402_5%
37 36 DISPOFF#
W=60mils 36 35 INVPWM
35 34
34 33 LVDS_ACLK
33 32 LVDS_ACLK# LVDS_ACLK [15]
32 31 LVDS_ACLK# [15]
LCD POWER CIRCUIT 31
30
30
29
LVDS_A2
LVDS_A2# LVDS_A2 [15]
29 28 LVDS_A1 LVDS_A2# [15]
+LCDVDD 28 27 LVDS_A1# LVDS_A1 [15]
+5VALW 27 26 LVDS_A1# [15]
LVDS_A0
+3VS 26 25 LVDS_A0# LVDS_A0 [15]
25 24 LVDS_A0# [15]
24 23 EDID_DATA
23 EDID_DATA [15] 9/25
R475 22 EDID_CLK
22 EDID_CLK [15]

1
150_0603_1% R476 21
100K_0402_5% 21 20
20 +3VS_F7

1
C637 19
19 +LCDVDD_CONN
4.7U_0805_10V4Z 18 9/25
18
1

17 +3VS_F7 1 2
+3VS
2

2
17

3
S
D R478 220K_0402_5% 16
2 1 2 2
G 16 15 DMIC_CLK
15 DMIC_CLK [28] F7 9/25 DMIC
Q28 G 14 DMIC_DATA DMIC_DATA [28] 1A_32V_0438001.WR
2N7002K_SOT23-3 SI2301BDS-T1-E3_SOT23-3 14 13
S D
SP040003600

1
13
1

1
DTC124EK C639 Q32 12
3

12
W=60mils 11 USB20_P5 USB20_P5 [16] F8 1A
OUT

11 10 USB20_N5
0.1U_0402_16V4Z 9/25 USB20_N5 [16] 1A_32V_0438001.WR CMOS

2
+LCDVDD +LCDVDD_CONN 10 9 +3VS_CMOS_F8 1 2
9 +3VS_CMOS
[15] PCH_ENVDD 2 F6 8
C IN 1 2 +LCDVDD_L 1 2 46 8 7 C
GND

45 G6 7 6

4.7U_0805_10V4Z

0.1U_0402_16V4Z
@
Q33 L15 2A_32V_0438001.WR 44 G5 6 5 +TS 1 2
G4 5 +3VS
1

DTC124EKAT146_SC59-3 FBMA-L11-201209-221 43 4 R670 0_0402_5% Touch Panel


USB20_N8 [16]
3

G3 4

1
42 3 1 2
R482 @
SP040004W00 41 G2 3 2 USB20_P8 [16]
F5
+5VS
G1 2
2A

C640

C641
100K_0402_5% 1

2
1 1A_32V_0438001.WR
2

Change Symbol STARC_107K40-000001-G2 9/25


SP040003600
1A
+3VS

R490 +3VS
0_0402_5%
1

1 2 @
680P_0402_50V7K

1
R484
10K_0402_5% C847
D9 @

2
@
2

2 1 INVPWM
[15] PCH_PWM
CH751H-40PT_SOD323-2 For GMCH DPST
1

R496 R495
10K_0402_5% 10K_0402_5%
@
2

B B

+3VS

R488
CMOS Camera Conn
1

0_0402_5% (20 MIL)


1 2 R489
@ CMOS SUSPEND 2.4mA
4.7K_0402_5%
D6
@ +3VS_CMOS
2

BKOFF# 2 1 DISPOFF# (20 MIL)


[34] BKOFF# 3 1

D
+3VS
CH751H-40PT_SOD323-2
1

1
@
R492 R493 Q35 C642 C643

G
2
10K_0402_5% 10K_0402_5% SI2301BDS-T1-E3_SOT23-3 0.1U_0402_16V4Z 10U_0805_10V4Z

2
@
4.7V
[34] CMOS_ON#
2

1
R491
150K_0402_5% C644
0.1U_0402_16V4Z

2
A A

AMY WEN Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/08/25 Deciphered Date 2012/08/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LVDS/CAMERA
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1A
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8671P_SDV
Date: Thursday, October 04, 2012 Sheet 23 of 50
5 4 3 2 1
5 4 3 2 1

PN:SM070001S00x 4
L38
HDMI_CLK+_CK 1 2 HDMI_CLK+_CONN
[15] HDMI_CLK+_CK 1 2 HDMI_TX0+_CONN R5275 1 2 680_0402_5%
HDMI_TX0-_CONN R5276 1 2 680_0402_5%
HDMI_CLK-_CK 4 3 HDMI_CLK-_CONN HDMI_CLK+_CONN R5277 1 2 680_0402_5%
[15] HDMI_CLK-_CK 4 3 HDMI_CLK-_CONN R5278 1 2 680_0402_5%
WCM-2012HS-900T_4P

D L36 D
HDMI_TX0+_CK 1 2 HDMI_TX0+_CONN HDMI_TX2+_CONN R5279 1 2 680_0402_5%
[15] HDMI_TX0+_CK 1 2 HDMI_TX2-_CONN R5280 1 2 680_0402_5%
HDMI_TX1+_CONN R5281 1 2 680_0402_5%
HDMI_TX0-_CK 4 3 HDMI_TX0-_CONN HDMI_TX1-_CONN R5282 1 2 680_0402_5%
[15] HDMI_TX0-_CK 4 3
WCM-2012HS-900T_4P

L37 +3VS

1
HDMI_TX1+_CK 1 2 HDMI_TX1+_CONN D
[15] HDMI_TX1+_CK 1 2 Q40 2
2N7002KW 1N SOT323-3 G
HDMI_TX1-_CK 4 3 HDMI_TX1-_CONN S
[15] HDMI_TX1-_CK

3
4 3
WCM-2012HS-900T_4P

L35 Need to change symbol


HDMI_TX2+_CK 1 2 HDMI_TX2+_CONN
[15] HDMI_TX2+_CK 1 2

HDMI_TX2-_CK 4 3 HDMI_TX2-_CONN
[15] HDMI_TX2-_CK 4 3
WCM-2012HS-900T_4P

C +5VS C
+3VS +HDMI_VCC
F2
D15
1.1A_6V_SMD1812P110TF
2 1 1 2
Pull up R for PCH SIDE
RB491D_SC59-3
2

1 6 HDMICLK_R
[15] HDMICLK_NB
+5VS_HDMI
5

2N7002DW-T/R7_SOT363-6 +3VS
Q21A C708

1
4 3 HDMIDAT_R 0.1U_0402_16V4Z
[15] HDMIDAT_NB

2
2
Q21B 2N7002DW-T/R7_SOT363-6 Type-C

2
R524 R525 R523
1M_0402_5% 2.2K_0402_5% 2.2K_0402_5%
mHDMI PN:SP060005H00

1
2
G
1
TMDS_B_HPD 3 1
D35 [15] TMDS_B_HPD ACON_HMR4E-CK3201

D
HDMICLK_R 1 1 10 9 HDMICLK_R
HDMI_DET 19 23
HDMIDAT_R 2 2 Q37 HP_DET GND
9 8 HDMIDAT_R 18 22
2N7002KW 1N SOT323-3 17 +V5 GND 21
+5VS_HDMI 4 4 RESERVEDGND
7 7 +5VS_HDMI HDMIDAT_R 16 20
HDMICLK_R 15 SDA GND
SCL

2
B 5 5 B
HDMI_DET 6 6 HDMI_DET 14
CEC
Need to change symbol R527 13
3 3 HDMI_CLK-_CONN 12 DDC/CEC_GND
20K_0402_5% CK-
HDMI_CLK+_CONN 11
8 10 CK+

1
HDMI_TX0-_CONN 9 CK_SHIELD
YSCLAMP0524P_SLP2510P8-10-9 HDMI_TX0+_CONN 8 D0-
7 D0+
HDMI_TX1-_CONN 6 D0_SHIELD
HDMI_TX1+_CONN 5 D1-
D39 4 D1+
HDMI_TX0+_CONN 1 1 D1_SHIELD
10 9 HDMI_TX0+_CONN HDMI_TX2-_CONN 3
D2-
HDMI_TX2+_CONN 2
HDMI_TX0-_CONN 2 2 D2+
9 8 HDMI_TX0-_CONN 1
D2_SHIELD
HDMI_CLK+_CONN 4 4 7 7 HDMI_CLK+_CONN JHDMI1
HDMI_CLK-_CONN 5 5 6 6 HDMI_CLK-_CONN ME@

3 3 SWAP
8

YSCLAMP0524P_SLP2510P8-10-9
D33
HDMI_TX2+_CONN 1 1 10 9 HDMI_TX2+_CONN

A
HDMI_TX2-_CONN 2 2 9 8 HDMI_TX2-_CONN A

HDMI_TX1+_CONN 4 4 7 7 HDMI_TX1+_CONN

HDMI_TX1-_CONN 5 5 6 6 HDMI_TX1-_CONN

3 3

8
Security Classification Compal Secret Data Compal Electronics, Inc.
2010/08/25 2012/08/25 Title

YSCLAMP0524P_SLP2510P8-10-9
1'SPN: SC300001Y00 Issued Date Deciphered Date
Mini-HDMI
2'SPN: SC300002800 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number
Custom
Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8671P_SDV
Date: Thursday, October 04, 2012 Sheet 24 of 50
5 4 3 2 1

AMY WEN
5 4 3 2 1

HDMI_CLKDAT_EN

Q2206A
2N7002DW-T/R7_SOT363-6

2
[15] PCH_DPC_DAT 1 6

5
[15] PCH_DPC_CLK 3 4

2N7002DW-T/R7_SOT363-6
Q2206B

DP_AUX_EN +3VS
D D

1
Q2208A R5137
Close to JmDP1 2N7002DW-T/R7_SOT363-6 100K_0402_5%

2
1 6 DP_AUX_N
[15] PCH_DPC_AUXN_C

5
1 2 4 3 DP_AUX_P
[15] PCH_DPC_AUXP_C
R180 0_0402_5%
2N7002DW-T/R7_SOT363-6

1
@ Q2208B
U4910 R5158
PCH_DPC_DP_P2 1 2 PCH_DPC_DP_L_P2 100K_0402_5%
[15] PCH_DPC_DP_P2 1 2
LANE2

2
PCH_DPC_DP_N2 4 3 PCH_DPC_DP_L_N2
[15] PCH_DPC_DP_N2 4 3
WCM-2012HS-900T_4P +5VS

1
1 2
R182 0_0402_5% R5146 +5VS
10K_0402_5%

1
2
HDMI_CLKDAT_EN R5162
1 2 Q2207B 10K_0402_5%

3
R191 0_0402_5% 2N7002DW-T/R7_SOT363-6

2
@
U4911 5 DP_AUX_EN
PCH_DPC_DP_P0 1 2 PCH_DPC_DP_L_P0
[15] PCH_DPC_DP_P0 1 2 Q2207A

6
LANE0 2N7002DW-T/R7_SOT363-6
PCH_DPC_DP_N0 4 3 PCH_DPC_DP_L_N0
[15] PCH_DPC_DP_N0 4 3
WCM-2012HS-900T_4P 2 DP_CFG1_R 1
R179
2 DP_CFG1
TBT, HDMI, DP mode table
short@

C
0_0402_5% HPD CFG1 CFG2 LSRX Mode C

1
1 2
R192 0_0402_5%

1 0 0 X DP
1 2
R194 0_0402_5% 1 1 X X HDMI
@
U4912 0 0 1 1 TBT
PCH_DPC_DP_N3 1 2 PCH_DPC_DP_L_N3
[15] PCH_DPC_DP_N3 1 2
LANE3
PCH_DPC_DP_P3 4 3 PCH_DPC_DP_L_P3
[15] PCH_DPC_DP_P3 4 3
WCM-2012HS-900T_4P

DP_CFG1 DP_CFG2
1 2
R195 0_0402_5%

1
R5118 R5117
1M_0402_5% 1M_0402_5%
1 2
R201 0_0402_5%

2
@
U4913
PCH_DPC_DP_P1 1 2 PCH_DPC_DP_L_P1
[15] PCH_DPC_DP_P1 1 2
LANE1
PCH_DPC_DP_N1 4 3 PCH_DPC_DP_L_N1
[15] PCH_DPC_DP_N1 4 3
WCM-2012HS-900T_4P
mini DP type
ME@

1 2 JAE_DP3R020SU32JQ
R203 0_0402_5%
+3VS 24

GROUND
23
D4607 22
RB491D_SC59-3 21
B
F3 B
2 1 +DP_PWR 1 2 +DP_PWR_F 20 DP_PWR
19 RETURN

1
DP_AUX_N 18 AUXCH_N
1.1A_6V_SMD1812P110TF C5204 PCH_DPC_DP_L_N2 17 LANE2_N
0.1U_0402_16V4Z DP_AUX_P 16
W=40mils AUXCH_P

2
PCH_DPC_DP_L_P2 15 LANE2_P
14 GND
13 GND
+3VS PCH_DPC_DP_L_N3 12 LANE3_N
PCH_DPC_DP_L_N1 11 LANE1_N
PCH_DPC_DP_L_P3 10 LANE3_P
PCH_DPC_DP_L_P1 9 LANE1_P

1
8 GND
R5116 7 GND
D43 1M_0402_5% DP_CFG2 6 CONFIG2
DP_AUX_N 1 1 10 9 DP_AUX_N PCH_DPC_DP_L_N0 5 LANE0_N

2
G
R171 DP_CFG1 4 CONFIG1

2
DP_AUX_P 2 2 9 8 DP_AUX_P 0_0402_5% PCH_DPC_DP_L_P0 3 LANE0_P
2 1 3 1 mDP_HPD 2 HPD
[15] DPC_HPD short@
PCH_DPC_DP_L_N3 4 4 7 7 PCH_DPC_DP_L_N3 1

D
GND

1
PCH_DPC_DP_L_P3 5 5 6 6 PCH_DPC_DP_L_P3 2N7002KW 1N SOT323-3

1
Q108 R5139
3 3 100K_0402_5% C5349
330P_0402_50V7K JmDP1

2
8 Need to change symbol

2
YSCLAMP0524P_SLP2510P8-10-9

D44
DP_CFG2 1 1 10 9 DP_CFG2

DP_CFG1 2 2 9 8 DP_CFG1

PCH_DPC_DP_L_N2 4 4 7 7 PCH_DPC_DP_L_N2

PCH_DPC_DP_L_P2 5 5 6 6 PCH_DPC_DP_L_P2

3 3

8
A A
YSCLAMP0524P_SLP2510P8-10-9

D42
PCH_DPC_DP_L_N1 1 1 10 9 PCH_DPC_DP_L_N1

PCH_DPC_DP_L_P1 2 2 9 8 PCH_DPC_DP_L_P1

PCH_DPC_DP_L_N0 4 4 7 7 PCH_DPC_DP_L_N0

PCH_DPC_DP_L_P0 5 5 6 6 PCH_DPC_DP_L_P0

AMY WEN 3 3

8 Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2010/08/25 Deciphered Date 2012/08/25 Title
YSCLAMP0524P_SLP2510P8-10-9
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
mDP Connector
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8671P_SDV
Date: Thursday, October 04, 2012 Sheet 25 of 50
5 4 3 2 1
5 4 3 2 1

1'SPN: SC300001Y00 JUSB1USB3.0/USB2.0


2'SPN: SC300002800
[16] USB3_TX2_N C4606 1 2 0.1U_0402_16V7K USB3TXDN2 USB3TXDN2_C

D2410 L4603
USB3RXDN2_C 1 1 10 9 USB3RXDN2_C 1 2
1 2
D USB3RXDP2_C 2 2 9 8 USB3RXDP2_C D
4 3
4 4 4 3
USB3TXDN2_C 7 7 USB3TXDN2_C
W CM-2012HS-900T_4P
USB3TXDP2_C 5 5 6 6 USB3TXDP2_C [16] USB3_TX2_P C4605 1 2 0.1U_0402_16V7K USB3TXDP2 USB3TXDP2_C

3 3
USB3_RX2_N USB3RXDN2_C
8 [16] USB3_RX2_N
L4604
YSCLAMP0524P_SLP2510P8-10-9 1 2
1 2

4 3
4 3
W CM-2012HS-900T_4P
USB3_RX2_P USB3RXDP2_C
[16] USB3_RX2_P

D2405
1 4 USB20_N1_C
I/O1 I/O3

W CM-2012-900T_4P
2 5 +USB_VCCA USB20_N1 4 3 USB20_N1_C
GND VDD [16] USB20_N1 4 3

USB20_P1 1 2 USB20_P1_C
[16] USB20_P1 1 2
3 6 USB20_P1_C
C I/O2 I/O4 L4606 C
AZC099-04S.R7G_SOT23-6

1'S PN: SC300001G00


2'S PN: SC300002E00

DC23300A410
+5VALW
+USB_VCCA
U34 80mils JUSB1
1 8 +USB_VCCA 1 9 USB3TXDP2_C
C771 0.1U_0402_16V4Z 2 GND VOUT 7 USB20_N1_C 2 VCC SSTX+ 8 USB3TXDN2_C
2 1 3 VIN VOUT 6 USB20_P1_C 3 D- SSTX- 7
USB_ON# 4 VIN VOUT 5 USB_OC0# 4 D+ GND_DRAIN 6 USB3RXDP2_C
B EN FLG USB_OC0# [16] GND SSRX+ B
5 USB3RXDN2_C
G547I2P81U_MSOP8 SSRX-
1

C2435

1000P_0402_50V7K
C770 USB30_A_GND2 10 12 USB30_A_GND2
@ 1000P_0402_50V7K USB30_A_GND2 11 GND1 GND3 13
1 GND2 GND4
Low Active
2

1
C2434 + ACON_TAR24-9Y1391
150U_D2_6.3VY_R15M ME@ 1
[27,34] USB_ON#

2
2
2 R4611 C4612
0_0603_5% 0.1U_0402_16V4Z
2
short@

1
A A

Security Classification Compal Secret Data Compal Electronics, Inc.


AMY WEN Issued Date 2011/05/16 Deciphered Date 2013/05/16 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
USB3.0/2.0 CONN-L
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8671P_SDV
Date: Thursday, October 04, 2012 Sheet 26 of 50
5 4 3 2 1
5 4 3 2 1

1'SPN: SC300001Y00 JUSB1USB3.0/USB2.0


2'SPN: SC300002800
[16] USB3_TX3_N C5329 1 2 0.1U_0402_16V7K USB3TXDN3 USB3TXDN3_C

D4610 L4910
USB3RXDN3_C 1 1 10 9 USB3RXDN3_C 1 2
1 2
D USB3RXDP3_C 2 2 9 8 USB3RXDP3_C D
4 3
4 4 4 3
USB3TXDN3_C 7 7 USB3TXDN3_C
W CM-2012HS-900T_4P
USB3TXDP3_C 5 5 6 6 USB3TXDP3_C [16] USB3_TX3_P C5330 1 2 0.1U_0402_16V7K USB3TXDP3 USB3TXDP3_C

3 3
USB3_RX3_N USB3RXDN3_C
8 [16] USB3_RX3_N
L4911
YSCLAMP0524P_SLP2510P8-10-9 1 2
1 2

4 3
4 3
W CM-2012HS-900T_4P
USB3_RX3_P USB3RXDP3_C
[16] USB3_RX3_P

D4611
1 4 USB20_P2_C
I/O1 I/O3

W CM-2012-900T_4P
2 5 +USB_VCCB USB20_N2 4 3 USB20_N2_C
GND VDD [16] USB20_N2 4 3

USB20_P2 1 2 USB20_P2_C
[16] USB20_P2 1 2
3 6 USB20_N2_C
C I/O2 I/O4 L4912 C
AZC099-04S.R7G_SOT23-6

1'S PN: SC300001G00


2'S PN: SC300002E00

+5VALW
+USB_VCCB
U5013
1
GND VOUT
8 DC23300A410
C5331 0.1U_0402_16V4Z 2 7
2 1 3 VIN VOUT 6
USB_ON# 4 VIN VOUT 5 USB_OC1#
B EN FLG USB_OC1# [16] B
G547I2P81U_MSOP8
80mils
1

C5332 JUSB2
@ 1000P_0402_50V7K +USB_VCCB 1 9 USB3TXDP3_C
USB20_N2_C 2 VCC SSTX+ 8 USB3TXDN3_C
Low Active
2

USB20_P2_C 3 D- SSTX- 7
4 D+ GND_DRAIN 6 USB3RXDP3_C
[26,34] USB_ON# GND SSRX+ 5 USB3RXDN3_C
SSRX-

C5334

1000P_0402_50V7K
USB30_B_GND2 10 12 USB30_B_GND2
USB30_B_GND2 11 GND1 GND3 13
1 GND2 GND4

1
C5333 + ACON_TAR24-9Y1391
150U_D2_6.3VY_R15M ME@ 1

2
2
2 R5261 C5335
0_0603_5% 0.1U_0402_16V4Z
2
short@

1
A A

Security Classification Compal Secret Data Compal Electronics, Inc.


AMY WEN Issued Date 2011/05/16 Deciphered Date 2013/05/16 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
USB3.0/2.0 CONN-R
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8671P_SDV
Date: Thursday, October 04, 2012 Sheet 27 of 50
5 4 3 2 1
5 4 3 2 1

+5VS +5VDDA_CODEC +5VDDA_CODEC


HDA_RST_AUDIO#

1
R943
2 HDA_SYNC_AUDIO
EMI
CHB1608U301_0603 +3VS +3VDD_CODEC +IOVDD_CODEC +3VDD_CODEC
R1355 R927 HDA_SDOUT_AUDIO

0.1U_0402_16V4Z

0.1U_0402_16V4Z
4.7U_0603_6.3V6K

4.7U_0603_6.3V6K
2 1 1 2 0_0603_5% 0_0402_5%

C646

C648
HDA_BITCLK_AUDIO

C5094

C5095
1 2 1 2

1U_0603_10V4Z

10U_0805_10V4Z
0.1U_0402_16V4Z

0.1U_0402_16V4Z
1 2 2 1 short@ short@
1 1 1 1 1 1 1 1

C5110

C693

C654

C655

C650

C651

C652

C653
22P_0402_50V8J

22P_0402_50V8J

22P_0402_50V8J

22P_0402_50V8J
@ @
2 2 2 2 2 2 2 2
Place near Pin25 Place near Pin38
R929 @ @ @ @
1 2 +5VS_PVDD
D
+5VS D
CHB1608U301_0603 Place near Pin1 Place near Pin9

4.7U_0603_6.3V6K

0.1U_0402_16V4Z

0.1U_0402_16V4Z
2 1 1

C657

C656
C5096
Vendor Recommand add 10UF
1 2 2
Power down (PD#) power stage for save power
0V: Power down power stage +3VDD_CODEC +MIC1_VREFO_L
3.3V: Power up power stage
+IOVDD_CODEC

2
U9 Vendor recommend. 2.2K

39

46

25

38

9
R930
2.2K_0402_5%

PVDD1

PVDD2

AVDD1

AVDD2

DVDD-IO
DVDD
Vendor recommend. 2.2u

1
+3VS
MIC_JD R941 1 2 0_0402_5% COMBOJACK 47 24
external MIC
short@ EC_MUTE# 4 EAPD/COMB-JACK LINE1-R(PORT-C-R) 23 C5097 2.2U_0603_6.3V6K
[34] EC_MUTE# PD# LINE1-L(PORT-C-L)
2

HDA_SDOUT_AUDIO 5 22 MIC_EXTL_C 2 1 2 1 EXT_MIC


[12] HDA_SDOUT_AUDIO 6 SDATA-OUT MIC1-R(PORT-B-R) 21 2 1 EXT_MIC [29]
R5071 HDA_BITCLK_AUDIO MIC_EXTR_C R933 1K_0402_5%
[12] HDA_BITCLK_AUDIO 2 1 8 BIT-CLK MIC1-L(PORT-B-L) 17
4.7K_0402_5% HDA_SDIN0 SDATA_IN
[12] HDA_SDIN0 SDATA-IN MIC2-R(PORT-F-R) 16
@ R938 33_0402_5% C5098 2.2U_0603_6.3V6K
MIC2-L(PORT-F-L)

2
15
1

10 LINE2-R(PORT-E-R) 14 R931
[12] HDA_SYNC_AUDIO 11 SYNC LINE2-L(PORT-E-L)
HDA_RST_AUDIO# 470K_0402_5%
[12] HDA_RST_AUDIO# 12 RESET#
PC_BEEP
PCBEEP 40 SPK_L2+

1
SPK-OUT-L+
1

41 SPK_L1-
R5065 2 1 JDREF 19 SPK-OUT-L- 44 SPK_R1-
20 JDREF SPK-OUT-R- 45 SPK_R2+
Internal Speaker
4.7K_0402_5% 20K_0402_1% R942
PLUG_IN 2 1 SENSEA 13 MONO-OUT(PORT-H) SPK-OUT-R+
@ [29] PLUG_IN SENSE A
MIC Sense 39.2K_0402_1% R940 18
2

CBN 35 SENSE B 33 HPOUT_R 2 1 HP_OUTR


R940 place near pin13 2 1 CBP 36 CBN
CBP
HPOUT-R(PORT-A-R)
HPOUT-L(PORT-A-L)
32 HPOUT_L 75_0402_5%2 1 R936 HP_OUTL HP_OUTR [29]
Headphone
2.2U_0603_6.3V6K 2 1 C666 34 48 75_0402_5% R934 HP_OUTL [29]
C 2.2U_0603_6.3V6K 2 1 C5099 28 CPVEE SPDIF-OUT C
4.7U_0603_6.3V6K C5100 LDO-CAP
GNDA 3 DMIC_CLK_R 2 1
29 GPIO1/DMIC-CLK DMIC_CLK [23]
0_0402_5% R937
30 MIC2-VREFO 2 DMIC_DATA
MIC1-VREFO-R GPIO0/DMIC-DATA DMIC_DATA [23]
31
+MIC1_VREFO_L MIC1-VREFO-L

27 Place next to pin 27


42 VREF 26

1U_0603_10V4Z

0.1U_0402_16V4Z
PVSS1 AVSS1 37
AVSS2 1 1

C659
43
PVSS2

C5101
7 49
DVSS THERMAL PAD 2 2

ALC3202-GR_MQFN48_6X6

SA000058310
Change symbol
EMI
R949
1 2
@ 0_0402_5%
VENDOR recommend R948
1 2

R947
@ 0_0402_5% Combo Jack detect (normal open)
1 2
PC Beep C1138 0.1U_0402_16V4Z @ 0_0402_5%

1 2 PC_BEEP_C_R 1 R1124 2 PC_BEEP_C 1 2 PC_BEEP


[34] BEEP#
R1123 47K_0402_5%
1000P_0402_50V7K

B 1 2 B
EC Beep 33_0402_5%
C5102 1U_0603_10V4Z
J11
MIC_JD EXT_MIC
Pin Assignment Location Function
1 2

4.7U_0603_6.3V6K
C1141
1

1 2 2
[12] HDA_SPKR
SPK-OUT (Pin40/41/44/45) Internal Int Speaker SHORT PADS

C1134
ICH Beep C1140 0.1U_0402_16V4Z R1131 @
2

10K_0402_5% GND GNDA


@ 1
Capless HP-OUT (Pin32/33) External Headphone out
2

MIC1(Pin21/22) External Mic in


HP_GNDA

Vendor Recommand connect to GNDA

Rdc < 0.05 ohms


PN :SCA00000G00 Rated Current >
2A
wide 25MIL 6
JSPK1
GND Reserve for RF
5
GND
SPK_R1-_CONN SPK_L1-_CONN SPK_R1- L1101 1 2 FBMA-L11-160808-121LMA30T SPK_R1-_CONN 4
4
SPK_R2+_CONN SPK_L2+_CONN SPK_R2+ L1102 1 2 FBMA-L11-160808-121LMA30T SPK_R2+_CONN 3
3 DMIC_CLK
SPK_L1- L1103 1 2 FBMA-L11-160808-121LMA30T SPK_L1-_CONN 2
2
3

SPK_L2+ L1104 1 2 FBMA-L11-160808-121LMA30T SPK_L2+_CONN 1


1000P_0402_50V7K

1000P_0402_50V7K

1000P_0402_50V7K

1000P_0402_50V7K

1
1
ACES_87302-0401-003
D59 D60 Width 20 mil ME@ @ C84
C1135

C1136

C1137
1

1
C1139

PACDN042Y3R_SOT23-3 PACDN042Y3R_SOT23-3 22P_0402_50V8J


1

2
@ @ EMI
2

A Internal Speaker A

Speaker PN:DC030008W00
Reserve for ESD request.

AMY WEN
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/05/16 Deciphered Date 2013/05/16 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Audio Codec ALC3202
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-8671P_SDV
Date: Thursday, October 04, 2012 Sheet 28 of 50
5 4 3 2 1
A B C D E

1 1

PN:DC230008E00
Choose normal-open type!

JHP1 Ref Apple


[28] EXT_MIC
20 mils 7
5 7:MIC
5:GND
[28] HP_OUTL
20 mils 4 4:L
3:normal close
3
[28] HP_OUTR
20 mils 1
2 1:R

1000P_0402_50V7K

1000P_0402_50V7K

1000P_0402_50V7K
[28] PLUG_IN
C353 1 C354 C355
2:Detect

1
6 6:Normal open
@ @ @ SINGA_2SJ3005-007211
2

2
ME@

HP_GNDA HP_GNDA
2 2
HP_GNDA HP_GNDA HP_GNDA

@
C356 1 2 0.1U_0402_16V7K
HP_OUTL HP_OUTR
@
3 C357 1 2 0.1U_0402_16V7K 3

2
@ D302
C358 1 2 0.1U_0402_16V7K AZ5125-02S.R7G_SOT23-3

J311
1 2

1
SHORT PADS HP_GNDA
GND
HP_GNDA

GND PN: SCA00001I00

EXT_MIC
3

D303
L30ESDL5V0C3-2 C/A SOT23
1

Change symbol
HP_GNDA

PN: SCA00001L00
4 4

AMY WEN Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/05/16 Deciphered Date 2013/05/16 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Combo Jack
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-8671P_SDV
Date: Thursday, October 04, 2012 Sheet 29 of 50
A B C D E
5 4 3 2 1

D D
+LAN_VDD10 Layout Notice : Place as close
L32 chip as possible.
+LAN_REGOUT 1 2
2.2UH +-5% NLC252018T-2R2J-N
+3VALW +3V_LAN

2
Layout Note: LL1 must be
within 200mil to Pin36, C670 C671
CL13,CL9 must be within 4.7U_0603_6.3V6K 0.1U_0402_16V4Z
J3

1
200mil to LL1 X5R
+LAN_REGOUT: Width 1 2
=60mil 1 2
U26
JUMP_43X79

@
[13] PCIE_PRX_DTX_P4 C672 1 2 0.1U_0402_16V7K PCIE_PRX_C_DTX_P4 22 31
HSOP LED3/EEDO 37 LAN_SK_LINK#
LED1/EESK LAN_SK_LINK# [31]
[13] PCIE_PRX_DTX_N4 C673 1 2 0.1U_0402_16V7K PCIE_PRX_C_DTX_N4 23 40 LAN_ACTIVITY#
LAN_ACTIVITY# [31] Rising time (10%~90%)1mS <Rising time <100mS
HSON LED0
17 30 R563 2 1 10K_0402_5% +LAN_VDD10 +LAN_EVDD10
[13] PCIE_PTX_C_DRX_P4 18 HSIP EECS 32 R564 2 1 10K_0402_5%
[13] PCIE_PTX_C_DRX_N4 HSIN EEDI 2 1 Close to Pin 12,27,39,42,47,48
0_0603_5% L33

2
16 1 LAN_MDI0+
[13] CLKREQ_LAN# CLKREQB MDIP0 2 LAN_MDI0- LAN_MDI0+ [31]
C674 C675
25 MDIN0 4 LAN_MDI0- [31] +3V_LAN
LAN_MDI1+ 1U_0402_6.3V4Z 0.1U_0402_16V4Z
[13,16,21,22,32,34,37] PLT_RST# LAN_MDI1+ [31]

1
PERSTB MDIP1 5 LAN_MDI1-
19 MDIN1 7 LAN_MDI2+ LAN_MDI1- [31]
[13] CLK_PCIE_LAN 20 REFCLK_P NC/MDIP2 8 LAN_MDI2+ [31] 1 2
LAN_MDI2- Close to Pin 21
[13] CLK_PCIE_LAN# REFCLK_N NC/MDIN2 10 LAN_MDI2- [31]
LAN_MDI3+ 0.1U_0402_16V4Z C676
NC/MDIP3 11 LAN_MDI3- LAN_MDI3+ [31] 1 2
LAN_X1 43 NC/MDIN3 LAN_MDI3- [31]
0.1U_0402_16V4Z C677
C CKXTAL1 1 2 C
LAN_X2 44 13 0.1U_0402_16V4Z C678
CKXTAL2 DVDD10 +LAN_VDD10
29 1 2
DVDD10 41 0.1U_0402_16V4Z C679
28 DVDD10 +3V_LAN +LAN_VDDREG 1 2
[34] LAN_WAKE# LANWAKEB
1 R567 2 0_0402_5% 0.1U_0402_16V4Z C680
[14] PCIE_WAKE#
@ ISOLATEB 26 27
+3V_LAN
2 1 1 2
ISOLATEB DVDD33 39 0_0603_5% L34 0.1U_0402_16V4Z C681
DVDD33

2
14 12 C682 C683
NC/SMBCLK AVDD33 +3V_LAN
R568 2 1 10K_0402_5% 15 42 4.7U_0603_6.3V6K 0.1U_0402_16V4Z

1
R569 1 2 1K_0402_5% 38 NC/SMBDATA AVDD33 47
+3V_LAN GPO/SMBALERT AVDD33 X5R
48
AVDD33
ENSWREG 33
ENSWREG 21
EVDD10 +LAN_EVDD10
34 Close to Pin 3,6,9,13,29,41,45
+LAN_VDDREG VDDREG
35 3
VDDREG AVDD10 +LAN_VDD10 +LAN_VDD10
6
AVDD10 9
1 2 46 AVDD10 45 +3VS +3V_LAN 1 2
R570 2.49K_0402_1% RSET AVDD10 0.1U_0402_16V4Z C684
24 36 +LAN_REGOUT 1 2
GND REGOUT

1
49 0.1U_0402_16V4Z C685
PGND R571 R572 1 2
1K_0402_1% 0_0402_5% 0.1U_0402_16V4Z C686
RTL8111F-CGT_QFN48_6x6 1 2
0.1U_0402_16V4Z C687

2
ISOLATEB ENSWREG 1 2
0.1U_0402_16V4Z C688
SA00004Y700 1 2
R574 0.1U_0402_16V4Z C689
B R573 1 2 B
0_0402_5%
15K_0402_5% @ 0.1U_0402_16V4Z C690

Y4
4 3 LAN_X2
NC OSC
LAN_X1 1 2 H: Enable internal Regular
OSC NC
1 L: Disable
C692
1 25MHZ_12PF_X3G025000DC1H~D 15P_0402_50V8J

C691 2
15P_0402_50V8J
2 SJ10000B700

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


AMY WEN Issued Date 2010/08/25 Deciphered Date 2012/08/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LAN-RTL8111F
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-8671P_SDV 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 04, 2012 Sheet 30 of 50
5 4 3 2 1
5 4 3 2 1

UL1
LAN_MDI3- 1 24 RJ45_MIDI3-
[30] LAN_MDI3- TD1+ TX1+
LAN_MDI3+ 2 23 RJ45_MIDI3+
[30] LAN_MDI3+ TD1- TX1- CL1 1000P_0402_50V7K
3 22 2 1 1 2
TDCT1 TXCT1 CL2 1000P_0402_50V7K RL1 75_0402_1%
4 21 2 1 1 2
D TDCT2 TXCT2 RL2 75_0402_1% D
LAN_MDI2- 5 20 RJ45_MIDI2-
[30] LAN_MDI2- TD2+ TX2+
LAN_MDI2+ 6 19 RJ45_MIDI2+
[30] LAN_MDI2+ TD2- TX2-
LAN_MDI1- 7 18 RJ45_MIDI1-
[30] LAN_MDI1- TD3+ TX3+

[30] LAN_MDI1+ LAN_MDI1+ 8 17 RJ45_MIDI1+


TD3- TX3- CL3 1000P_0402_50V7K
9 16 2 1 1 2
TDCT3 TXCT3 CL4 1000P_0402_50V7K RL3 75_0402_1%
10 15 2 1 1 2
TDCT4 TXCT4 RL4 75_0402_1%
LAN_MDI0- 11 14 RJ45_MIDI0-
[30] LAN_MDI0- TD4+ TX4+ RJ45_GND1 2
LAN_MDI0+ 12 13 RJ45_MIDI0+
[30] LAN_MDI0+ TD4- TX4- CL8

1
1000P_1206_2KV7K
CL5 350UH_NA0069RLF
Place CL5 colse 0.01U_0402_16V7K

2
to LAN chip

C C

D20
DC234005300
RL5,RL7 Vendor recommand 510 ohm
LAN_MDI1-
AZC099-04S.R7G_SOT23-6
1 4 LAN_MDI0-
LAN Conn.
I/O1 I/O3
JLAN1
RJ45_MIDI0+ 1
2 5 PR1+ 9 LAN_ACTIVITY#_R 1 2 LAN_ACTIVITY#
GND VDD 2 LED_YELLOW_A1 LAN_ACTIVITY# [30]
RJ45_MIDI0- RL5 330_0402_5%
PR1- 10 2 1
RJ45_MIDI1+ 3 LED_YELLOW_A2 RL8 short@ 0_0402_5% +3V_LAN
LAN_MDI0+ 3 6 LAN_MDI1+ PR2+
I/O2 I/O4 RJ45_MIDI2+ 4
PR3+ 11 LAN_SK_LINK#_R 1 2 LAN_SK_LINK#
5 LED_GREEN_B1 LAN_SK_LINK# [30]
RJ45_MIDI2- RL7 330_0402_5%
D23 PR3- 12 2 1
AZC099-04S.R7G_SOT23-6 RJ45_MIDI1- 6 LED_GREEN_B2 RL6 short@ 0_0402_5% +3V_LAN
LAN_MDI2- 1 4 LAN_MDI3- PR2-
I/O1 I/O3 RJ45_MIDI3+ 7 13
PR4+ GND 14
RJ45_MIDI3- 8 GND
B PR4- B
2 5
GND VDD SANTA_130451-F
ME@

LAN_MDI3+ 3 6 LAN_MDI2+
I/O2 I/O4

D20/D23
1'S PN:SC300001G00
2'S PN:SC300002E00

For EMI's request

A A
LAN_ACTIVITY#_R LAN_SK_LINK#_R
1

CL6 CL7 Security Classification Compal Secret Data Compal Electronics, Inc.
68P_0402_50V8J 68P_0402_50V8J Issued Date 2010/08/25 Deciphered Date 2012/08/25 Title
2

AMY WEN THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LAN_Transformer
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-8671P_SDV 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 04, 2012 Sheet 31 of 50
5 4 3 2 1
A B C D E

Mini-Express Card for WLAN/BT Combo(Half) +3VS AOAC


Mini-Express Card(WLAN/BT Combo) +1.5VS

2
JUMP_43X79
J4 +3VALW R5267 +3V_AOAC_WLAN

2
+3V_AOAC_WLAN +3V_AOAC_WLAN 0_0805_5%
@
PN:DC041111301 @

1
R2240 100K_0402_5% 1 2
1 2

1
JMIN1

D
WLAN_WAKE# 1 2 6

S
[34] WLAN_WAKE# 1 2
1 WLAN_ACT R528 1 @ 2 0_0402_5% WLAN_ACT_R 3 4 5 4 1
3 4

1
[12] PCH_WLBT_OFF_5# R540 1 2 0_0402_5% BT_OFF#_R 5 6 +VSB 2
short@ WLAN_CLKREQ# 7 5 6 8 C5344 1 Q2209
[13] WLAN_CLKREQ# 7 8
9 10 1U_0402_6.3V6K SI3456DDV-T1-GE3_TSOP6

G
2
11 9 10 12 AOAC@ AOAC@
[13] CLK_PCIE_WLAN1#

3
11 12

1
13 14
[13] CLK_PCIE_WLAN1 13 14
15 16
15 16 R5268
470K_0402_5%
17 18 AOAC@ R5269

2
19 17 18 20 RF_OFF# 0_0402_5%
21 19 20 22 PLT_RST# AOAC@
21 22 PLT_RST# [13,16,21,22,30,34,37]
23 24 AOAC_WLAN_EN 1 2 AOAC_WLAN_EN_R
[13] PCIE_PRX_DTX_N2 23 24
25 26
[13] PCIE_PRX_DTX_P2 25 26

1
27 28
27 28

1
29 30 SMB_CLK_S3 D
29 30 SMB_CLK_S3 [10,13,21,35]

1
31 32 SMB_DATA_S3 2
[13] PCIE_PTX_C_DRX_N2 31 32 SMB_DATA_S3 [10,13,21,35] [34] AOAC_WLAN_EN# R5270
33 34 G C5345
[13] PCIE_PTX_C_DRX_P2 33 34
35 36 S 1.5M_0402_5% 0.1U_0603_25V7K
USB20_N10 [16]

2
+3V_AOAC_WLAN 37 35 36 38 Q2210 AOAC@ AOAC@
USB20_P10 [16]
BT

2
39 37 38 40 2N7002K_SOT23-3
41 39 40 42 AOAC@
43 41 42 44
100_0402_1% 45 43 44 46
R542 47 45 46 48
EC_TX_P80_DATA 1 2 49 47 48 50
[34,37] EC_TX_P80_DATA 49 50
[34,37] EC_RX_P80_CLK EC_RX_P80_CLK 1 2 51 52
R543 53 51 52 54
100_0402_1% G1 G2 +3VALW R5271 +3V_AOAC_WWAN
[17] PCH_WLBT_OFF_51# 2 1 0_0805_5%
BELLW_80019-1021 @
R383 ME@ 1 2

2
1K_0402_5% For EC to detect
R544
debug card

D
100K_0402_5% 6

S
2 2
insert. 5 4

1
+VSB 2

1
C5346 1 Q2211
1U_0402_6.3V6K SI3456DDV-T1-GE3_TSOP6

G
2
@ @

3
1
Mini-Express Card for WWAN/mSATA(Full) R5272
470K_0402_5%
@ R5273

2
0_0402_5%
@
Mini-Express Card(WWAN 3G) AOAC_WWAN_EN 1 2 AOAC_WWAN_EN_R

1
D

1
+3VS 2
[34] AOAC_WWAN_EN# R5274
G C5347
S 1.5M_0402_5% 0.1U_0603_25V7K

2
Q2212 @ @

2
2

JUMP_43X79 2N7002K_SOT23-3
J6 @
2

@ +3V_AOAC_WWAN
1

+3V_AOAC_WWAN
PN:DC041111301
1

JMIN2
1 2 +1.5VS
1 2
1

1
3 4 @
5 3 4 6 C702 C700 @ C42 D17 @
7 5 6 8 +UIM_PWR 10U_0805_10V4Z 10U_0805_10V4Z 47P_0402_50V8J CM1293-04SO_SOT23-6
2

2
9 7 8 10 UIM_DATA @
11 9 10 12 UIM_CLK 1 4 UIM_DATA 2 1 +UIM_PWR
13 11 12 14 UIM_RST CH1 CH4 R546
3 3
15 13 14 16 UIM_VPP R388 10K_0402_5%
15 16 1 2 0_0402_5% +3VS
3G_OFF# [17]
short@ 2 5
17 18 R385 Vn Vp
C698 19 17 18 20 WWAN_OFF# 1 2 0_0402_5%
19 20 RF_OFF# [34]
0.01U_0402_16V7K 21 22 @ PLT_RST#
2 1 SATA_DTX_IRX_P2 23 21 22 24 3 6
[12] SATA_DTX_C_IRX_P2 2 1 SATA_DTX_IRX_N2 25 23 24 26 CH2 CH3 +3VS
[12] SATA_DTX_C_IRX_N2 C707 0.01U_0402_16V7K 27 25 26 28 DAN217T146_SC59-3
29 27 28 30 SMB_CLK_S3 JSIM1 3
SATA_ITX_DRX_N2_CONN 31 29 30 32 SMB_DATA_S3 4 1 +UIM_PWR
40mil 1
[12] SATA_ITX_DRX_N2_CONN 31 32 GND VCC
[12] SATA_ITX_DRX_P2_CONN SATA_ITX_DRX_P2_CONN 33 34 UIM_VPP 5 2 UIM_RST 2
35 33 34 36 UIM_DATA 6 VPP RST 3 UIM_CLK

4.7U_0805_10V4Z
35 36 USB20_N9 [16] I/O CLK @ D18
37 38 7
+3V_AOAC_WWAN 37 38 USB20_P9 [16] DET
39 40
41 39 40 42

C703
41 42

1
[17] 3G_DET# 43 44
45 43 44 46 8 C705
47 45 46 48 GND 9 0.1U_0402_16V4Z

2
49 47 48 50 +1.5VS GND
mSATA_DET# 51 49 50 52
[17] mSATA_DET# 51 52
53 54
G1 G2
1

BELLW_80019-1021 C701 C704 @ C45 TAITW_PMPAT6-06GLBS7N14H0


ME@ 0.1U_0402_16V4Z 0.1U_0402_16V4Z 47P_0402_50V8J ME@
2

9/5 C47 47P_0402_50V8J


UIM_RST 1 2
RF Request C48 @ 47P_0402_50V8J
UIM_CLK 1 2

+3V_AOAC_WWAN PN:SP07000LM00 C49 @ 47P_0402_50V8J


UIM_DATA 1 2
4 4
@
C221 1 2 0.1U_0402_16V4Z
C706 1 2 68P_0402_50V8J RF
C709 1 2 0.1U_0805_25V7K
C5348 1 2 2200P_0402_50V7K

AMY WEN Security Classification Compal Secret Data Compal Electronics, Inc.
Close to JMIN2 on the same side Issued Date 2010/08/25 Deciphered Date 2012/08/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
WLAN/BT/WWAN/m-SATA
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8671P_SDV
Date: Thursday, October 04, 2012 Sheet 32 of 50
A B C D E
5 4 3 2 1

+3VS REMOTE1+
BOT CPU PWR
Close U30 Fintek thermal sensor 1

1
C

1
1
REMOTE1+
+3VS placed near by BOT DRAM R642
C759
2200P_0402_50V7K
2
B
Q46
MMST3904-7-F_SOT323-3
@ 2 E
10K_0402_5%

3
C760 @ REMOTE1-
2200P_0402_50V7K U30

2
2 REMOTE1-

1 10 EC_SMB_CK2
D VDD SMCLK EC_SMB_CK2 [13,34] D
REMOTE1+ 2 9 EC_SMB_DA2
REMOTE2+ DP1 SMDATA EC_SMB_DA2 [13,34] REMOTE2+
TOP WWAN

2
1 REMOTE1- 3 8 1
DN1 ALERT#

1
C763 R649 C
C761 0.1U_0402_16V4Z REMOTE2+ 4 7 1 2 C762 2 Q47
MAINPWON [34,40,41,43]

1
2200P_0402_50V7K DP2 THERM# 2200P_0402_50V7K B MMST3904-7-F_SOT323-3
2 REMOTE2- REMOTE2- 5 6 0_0402_5% @ 2 E

3
DN2 GND REMOTE2-
@

F75303M MSOP10
REMOTE1,2+/-:
Address 1001_101xb Trace width/space:10/10 mil
Trace length:<8"

FAN +5VS DROOP


+5VS

+5VS

1
C764 D7
1 2 10U_0805_10V4Z 1SS355TE-17_SOD323-2
C @ C

U4 D8

2
1 8 1 2 @
VEN GND 2 7 BAS16_SOT23-3
+VCC_FAN1 VIN GND 3 6
1 2 EN_DFAN1_R VO GND 4 5 C59 1 2 1U_0603_10V4Z
[34] EN_DFAN1 VSET GND
R53 1
100_0402_5% G996P11U_SO8 C46 1 2 0.1U_0402_16V4Z
C56
2200P_0402_50V7K +3VS
2
SP040004W00

1
2A Change Symbol
09/27
JFAN1
R632 6
10K_0402_5% F10 5 GND2
40mil GND1
+3VS 2A_32V_0438001.WR

2
+VCC_FAN1 1 2 +VCC_FAN1_F10 4
3 4
[34] EC_TACH 2 3
1 [34] EC_FAN_ID 2
1
1
1

C58
1000P_0402_50V7K ACES_50271-0040N-001
R616 2 ME@
10K_0402_5%
@
2

EC_FAN_ID

B
SP02000TS00 B

APS G-Sensor
+3VS
1

R479
Q39 SI2301BDS-T1-E3_SOT23-3 100K_0402_5%

3 1
S

+3VS_APS
U28 R5062
2

56K_0402_5%
1

@ 2 12 VOUTX 2 1
G

0.1U_0402_16V7K

0.1U_0402_16V7K
[34] GS_SELFTEST GS_VOUTX [34]
2

ST Xout
1

R607 @ C732 R601 10 VOUTY 2 1


+3VS +3VS_GS Yout GS_VOUTY [34]
150K_0402_5% C739 0.1U_0402_16V4Z 0_0603_5% 8 VOUTZ
2

Zout

0.1U_0402_16V7K

0.1U_0402_16V7K
0.01U_0402_16V7K short@ R606 R5061
2

1
1 2 14 @ T10 56K_0402_5% C734 C735
2

Vs
1

1
0_0603_5% 15 PAD~D
Vs
10U_0603_6.3V6M

0.1U_0402_16V7K

@ R621

2
1

C737 C736 1 C777 C774


+3VS_GS

2
NC
1

10K_0402_5%

4
R605 C733 3 NC 9
2

COM NC
10U_0603_6.3V6M

GS_ON# 2 1 1 2 @ 5 11
[34] GS_ON# COM NC
1

C738 6 13
7 COM NC 16
2

150K_0402_5% 0.01U_0402_16V7K @ COM NC @


2

A APS_GND A
2 1
LIS34ALTR_LGA16_4X4
APS_GND 4/8 update footprint for U22 2MM J12
APS_GND

Security Classification Compal Secret Data Compal Electronics,Ltd.


AMY WEN Issued Date 2010/08/25 Deciphered Date 2012/08/25 Title
FintekF57303_Thermal sensor/FAN
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8671P_SDV
Date: Thursday, October 04, 2012 Sheet 33 of 50
5 4 3 2 1
+3VALW @ +3VEC @ +3VLP +3VLPP GPIO check with R16
J18 : Open
1121 modify EC pin define. Vcc 3.3V +/- 5%
J19 : Close 2 1 2 1

2MM J18 2MM J19 R2215


R2210 100K +/- 1%
Logo_LED# [37]
L2201 1 2 0_0603_5% 1 2 0_0402_5% Board ID
+3VEC +EC_AVCC
R2216
R2213 VAD_BID min V AD_BID typ VAD_BID max

C2203

0.1U_0402_16V4Z

C2204

0.1U_0402_16V4Z

C2205

0.1U_0402_16V4Z

C2206

0.1U_0402_16V4Z

C2208

1000P_0402_50V7K

C2207

1000P_0402_50V7K
EC_111 1 @ 2 0_0402_5%
C2201
1 1
C2202
0 0K +/- 5% 0 V 0 V 0 V SDV
1 1 1 1 1 1
0.1U_0402_16V4Z 1000P_0402_50V7K +EC_AVCC
1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V FVT

1
2 2
L2202 1 2 0_0603_5% ECAGND 2 2 2 2 2 2 D 2 18K +/- 5% 0.436 V 0.503 V 0.538 V SIT
Logo_LED 2 Q30
G 2N7002K_SOT23-3
3 33K +/- 5% 0.712 V 0.819 V 0.875 V SIT-R

111
125
4 56K +/- 5% 1.036 V 1.185 V 1.264 V SVT

22
33
96

67
S

9
U2201

3
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC

EC_VDD/VCC

EC_VDD/AVCC
EC_VDD0
+3VALW

1 21 EC_MUTE# R2202 1 2 10K_0402_5%


[17] GATEA20 GATEA20/GPIO00 GPIO0F +3VEC
KB_RST# 2 23 BEEP#
[17] KB_RST# KBRST#/GPIO01 BEEP#/GPIO10 BEEP# [28]
3 26 WLAN_WAKE# HDD_DETECT# R2204 1 2 100K_0402_5%
[12,36] SERIRQ SERIRQ GPIO12 WLAN_WAKE# [32]
4 27 ACOFF
[12,36,37] LPC_FRAME# LPC_FRAME# ACOFF/GPIO13 ACOFF [40,42] +3VLP
LPC_AD3 5
[12,36,37] LPC_AD3 LPC_AD3
LPC_AD2 7 PWM Output
[12,36,37] LPC_AD2 LPC_AD2
LPC_AD1 8 63 BATT_TEMP LID_SW# R2203 1 2 100K_0402_5%
+3VEC [12,36,37] LPC_AD1 LPC_AD1 BATT_TEMP/GPIO38 BATT_TEMP [41]
LPC_AD0 10 64
C2209 @1 2 22P_0402_50V8J R2201 1 @
[12,36,37]
2 10_0402_5%
LPC_AD0 LPC_AD0LPC & MISC GPIO39 65
GS_VOUTX [33]
ADP_I/GPIO3A ADP_I [41,42]
CLK_PCI_EC 12 AD Input 66
[16] CLK_PCI_EC CLK_PCI_EC GPIO3B GS_VOUTY [33]
PLT_RST# 13 75 BRDID
[13,16,21,22,30,32,37] PLT_RST# PCIRST#/GPIO05 GPIO42
R2205 1 2 330K_0402_5% EC_RST# 37 76 Turbo_V R2206 1 2 47K_0402_5%
EC_RST# IMON/GPIO43 IMVP_IMON [47]
EC_SCI# 20 +3VALW
[17] EC_SCI# EC_SCII#/GPIO0E
1 38
[41] ADP_PROTECT GPIO1D 68 TAB_SW#
DAC_BRIG/GPIO3C TAB_SW# [37]

1
C2210 70 EN_DFAN1 +5VALW
EN_DFAN1/GPIO3D EN_DFAN1 [33]
0.1U_0402_10V6K DA Output 71 AOAC_WWAN_EN# R2210
2 IREF/GPIO3E AOAC_WWAN_EN# [32]
KSI0 55 72 ROT_BTN# USB_ON# R2209 1 2 10K_0402_5% 100K_0402_1%
KSI0/GPIO30 CHGVADJ/GPIO3F ROT_BTN# [37]
KSI1 56
KSI2 57 KSI1/GPIO31

2
KSI3 58 KSI2/GPIO32 83 EC_MUTE# +5VS BRDID
KSI3/GPIO33 EC_MUTE#/GPIO4A EC_MUTE# [28]
KSI4 59 84 USB_ON#
KSI4/GPIO34 USB_EN#/GPIO4B USB_ON# [26,27]

1
KSI5 60 85 AOAC_WLAN_EN# TP_CLK R2211 1 2 4.7K_0402_5%
KSI5/GPIO35 CAP_INT#/GPIO4C AOAC_WLAN_EN# [32]
KSI6 61 PS2 Interface 86 HOME_BTN# R2213
KSI6/GPIO36 EAPD/GPIO4D HOME_BTN# [37]
KSI7 62 87 TP_CLK TP_DATA R2212 1 2 4.7K_0402_5% 56K_0402_5%
KSI7/GPIO37 TP_CLK/GPIO4E TP_CLK [35]
KSO0 39 88 TP_DATA
KSO[0..15] KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA [35]
KSO1 40 BATT_TEMP C2211 1 2 100P_0402_50V8J
[35] KSO[0..15]

2
KSO2 41 KSO1/GPIO21
KSI[0..7] KSO3 42 KSO2/GPIO22 97 ACIN C2212 1 2 100P_0402_50V8J
[35] KSI[0..7] KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00 CPU1.5V_S3_GATE [9]
KSO4 43 98 VOL_UP#
KSO4/GPIO24 WOL_EN/GPXIOA01 VOL_UP# [37]
KSO5 44 99 SA_PGOOD C2510 1 2 0.1U_0402_10V6K
KSO6 45 KSO5/GPIO25 Int. K/B HDA_SDO/GPXIOA02 109 NTC_V
ME_FLASH [12]
KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00 NTC_V [41]
KSO7/GPIO27 SPI Device Interface
KSO8 47
KSO9 48 KSO8/GPIO28 119
KSO9/GPIO29 SPIDI/GPIO5B M_PWR_ON [19,44]
@ KSO10 49 120
KSO10/GPIO2A SPIDO/GPIO5C PCH_SLPA# [14]
KSO11 50 SPI Flash ROM 126 TABLET#
KSO11/GPIO2B SPICLK/GPIO58 TABLET# [21]
1 2 PLT_RST# KSO12 51 128 RF_OFF# VR_HOT# R2214 1 2 0_0402_5%
KSO12/GPIO2C SPICS#/GPIO5A RF_OFF# [32] [41,47] VR_HOT# H_PROCHOT# [5]
KSO13 52
C109 1U_0402_6.3V6K KSO14 53 KSO13/GPIO2D
@ KSO15 54 KSO14/GPIO2E 73
KSO15/GPIO2F ENBKL/GPIO40 ENBKL [15]
@ R2233 1 2 0_0402_5% KSO16 81 74
[42] BM# KSO16/GPIO48 PECI_KB930/GPIO41 ADP_ID [40]
R2234 1 2 0_0402_5% KSO17 82 89
[43] V_ALW# KSO17/GPIO49 FSTCHG/GPIO50 FSTCHG [42]

1
1 2 SUSP# short@ 90 PCH_PWR_EN#
BATT_CHG_LED#/GPIO52 PCH_PWR_EN# [19]
91 D
CAPS_LED#/GPIO53 mSATA_DETEC# [17]
EC_SMB_CK1 77 GPIO 92 H_PROCHOT#_EC 2 Q2202
[41,42] EC_SMB_CK1 EC_SMB_CK1/GPIO44 PWR_LED#/GPIO54 HDD_DETECT# [36]
C2222 100P_0402_50V8J EC_SMB_DA1 78 93 G 2N7002K_SOT23-3
[41,42] EC_SMB_DA1 EC_SMB_DA1/GPIO45 BATT_LOW_LED#/GPIO55 CP_RESET# [35]
EC_SMB_CK2 79 SM Bus 95 SYSON S
[13,33] EC_SMB_CK2 EC_SMB_CK2/GPIO46 SYSON/GPIO56 SYSON [39,44]
EC_SMB_DA2 80 121
[13,33] EC_SMB_DA2 VR_ON [47]

3
EC_SMB_DA2/GPIO47 VR_ON/GPIO57 127
PM_SLP_S4#/GPIO59 PM_SLP_S4# [14]

6 100
ESD Reserve Close to EC [14] PM_SLP_S3#
14 PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 101 EC_LID_OUT#
EC_RSMRST# [12,14]
[14] PM_SLP_S5# PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04 EC_LID_OUT# [17]
EC_SMI# 15 102
[17] EC_SMI# EC_SMI#/GPIO08 PROCHOT_IN/GPXIOA05 Turbo_V [41]
16 103 H_PROCHOT#_EC R2243 1 @ 2 0_0402_5%
[23] CMOS_ON# GPIO0A H_PROCHOT#_EC/GPXIOA06 PROCHOT [41]
17 104 MAINPWON_R R2247 1 2 0_0402_5%
[35] TP_RESET GPIO0B VCOUT0_PH/GPXIOA07 MAINPWON [33,40,41,43]
18 GPO 105 BKOFF#
[33] GS_ON# GPIO0C BKOFF#/GPXIOA08 BKOFF# [23]
PAD~D T5 @ EC_ODD_DA# 19 GPIO 106 PBTN_OUT#
GPIO0D PBTN_OUT#/GPXIOA09 PBTN_OUT# [12,14,5]
VSB_EN 25 107
[41] VSB_EN EC_INVT_PWM/GPIO11 PCH_APWROK/GPXIOA10 PCH_APWROK [14]
EC_TACH 28 108 SA_PGOOD
[33] EC_TACH FAN_SPEED1/GPIO14 SA_PGOOD/GPXIOA11 SA_PGOOD [45]
EC_PME# 29
EC_TX_P80_DATA 30 EC_PME#/GPIO15
[32,37] EC_TX_P80_DATA EC_TX/GPIO16
EC_RX_P80_CLK 31 110 ACIN
[32,37] EC_RX_P80_CLK EC_RX/GPIO17 AC_IN/GPXIOD01 ACIN [14,37,40]
PCH_PWROK 32 112 EC_ON
[14] PCH_PWROK PCH_PWROK/GPIO18 EC_ON/GPXIOD02 EC_ON [37,43]
34 114 ON/OFF
[33] EC_FAN_ID SUSP_LED#/GPIO19 ON/OFF/GPXIOD03 ON/OFF [37]
36 GPI 115 LID_SW#
[33] GS_SELFTEST NUM_LED#/GPIO1A LID_SW#/GPXIOD04 LID_SW# [37]
116 SUSP#
+3VLP SUSP#/GPXIOD05 SUSP# [39,42,44,46,9]
117 VOL_DOWN#
GPXIOD06 VOL_DOWN# [37]
118 PECI_KB9012
PECI_KB9012/GPXIOD07
AGND/AGND

EC_RTCX1 122 R87


R2221 1 2 0_0402_5% SUSCLK_R 123 XCLKI/GPIO5D 124 +V18R 43_0402_5% +3VALW
GND/GND
GND/GND
GND/GND
GND/GND

[14] SUSCLK XCLKO/GPIO5E V18R 1 2


H_PECI [17,5]
GND0

R2248 1 @ 2 2.2K_0402_5% EC_SMB_CK1

1
R2249 1 @ 2 2.2K_0402_5% EC_SMB_DA1 R2220
1

KB9012QF A3 LQFP 128P_14X14 1 10K_0402_5%


11
24
35
94
113

69

1 C2214
R2223 C2213 4.7U_0805_10V4Z

2
ECAGND

+3VALW 100K_0402_5% 20P_0402_50V8


2 R2222 1 2 0_0402_5%
LAN_WAKE# [30]
2

2
R2225 1 2 47K_0402_5% KSO1
R2224 1 @ 2 0_0402_5%
R2227 1 2 47K_0402_5% KSO2

R2228 1 2 2.2K_0402_5% EC_SMB_CK1 EC_PME# 1 3

S
PCI_PME# [16]
EC_RTCX1
R2230 1 2 2.2K_0402_5% EC_SMB_DA1 @ Q2203
R2229 1 @ 2 10M_0402_5% SUSCLK_R 2N7002K_SOT23-3

G
+3VALW

2
+3VS
Y2201 @
1 2

32.768KHZ_12.5PF_CM31532768DZFT
R2236 1 2 2.2K_0402_5% EC_SMB_CK2
1 1
R2237 1 2 2.2K_0402_5% EC_SMB_DA2 C2218 C2219
18P_0402_50V8J 18P_0402_50V8J
C2220 @
@1 2 100P_0402_50V8J EC_SMB_CK2 @ @
2 2
C2221 @
@1 2 100P_0402_50V8J EC_SMB_DA2

R2239 1 2 10K_0402_5% PCH_PWROK


Security Classification Compal Secret Data Compal Electronics, Inc.
2010/08/25 2012/08/25 Title
AMY WEN Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
EC KB9012
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8671P_SDV
Date: Thursday, October 04, 2012 Sheet 34 of 50
5 4 3 2 1

INT_KBD Conn.
INT_KBD Conn. IPD_LEFT C814 1 2 @ 100P_0402_50V8J PN:SP01000YH00
KSI[0..7]
KSI[0..7] [34]
IPD_MIDDLE C819 1 2 @ 100P_0402_50V8J JKB1
KSO[0..15] KSI1 1
KSO[0..15] [34] 1
IPD_RIGHT C805 1 2 @ 100P_0402_50V8J KSI7 2
KSI6 3 2
KSO9 4 3
KSO2 C778 1 2 @ 100P_0402_50V8J KSI4 5 4
KSI5 6 5
D
KSO15 C780 1 2 @ 100P_0402_50V8J KSO1 C779 1 2 @ 100P_0402_50V8J KSO0 7 6 D
KSI2 8 7
KSO6 C782 1 2 @ 100P_0402_50V8J KSO7 C781 1 2 @ 100P_0402_50V8J KSI3 9 8
KSO5 10 9
KSO8 C784 1 2 @ 100P_0402_50V8J KSI2 C783 1 2 @ 100P_0402_50V8J KSO1 11 10
KSI0 12 11
KSO13 C786 1 2 @ 100P_0402_50V8J KSO5 C785 1 2 @ 100P_0402_50V8J KSO2 13 12
KSO4 14 13
KSO12 C788 1 2 @ 100P_0402_50V8J KSI3 C787 1 2 @ 100P_0402_50V8J KSO7 15 14
KSO8 16 15
KSO11 C790 1 2 @ 100P_0402_50V8J KSO14 C789 1 2 @ 100P_0402_50V8J KSO6 17 16
KSO3 18 17
KSO10 C792 1 2 @ 100P_0402_50V8J KSI7 C791 1 2 @ 100P_0402_50V8J KSO12 19 18
KSO13 20 19
KSO3 C794 1 2 @ 100P_0402_50V8J KSI6 C793 1 2 @ 100P_0402_50V8J KSO14 21 20
KSO11 22 21
KSO4 C796 1 2 @ 100P_0402_50V8J KSI5 C795 1 2 @ 100P_0402_50V8J KSO10 23 22
KSO15 24 23
KSI0 C798 1 2 @ 100P_0402_50V8J KSI4 C797 1 2 @ 100P_0402_50V8J 25 24
M1(Left BUTTON) IPD_LEFT 26 25
KSO0 C800 1 2 @ 100P_0402_50V8J KSO9 C799 1 2 @ 100P_0402_50V8J M2(Center BUTTON) IPD_MIDDLE 27 26
M3(Right BUTTON) IPD_RIGHT 28 27
KSI1 C801 1 2 @ 100P_0402_50V8J 29 28
30 29
CONN PIN define need double check 30
Reserve for ESD. 31
32 GND1
GND2
JAE_FL4S030HA3R3000A-DT
C ME@ C

Track point Click pad 10PIN


SP01001AL00
PN:SP01001CH00 09/27
SP040003600 09/27 +5VS_F9
1A JTP2
F9 1
1A_32V_0438001.WR 2 1 JTP1
1 2 +5VS_F9 3 2 TP_DATA 1
+5VS 3 [34] TP_DATA 1
4 TP_CLK 2
4 [34] TP_CLK 2
TP_CLK2 5 CP_RESET# 3
5 [34] CP_RESET# 3
IPD_LEFT 6 4
IPD_RIGHT 7 6 SMB_DATA_S3 1 2 CP_DATA 5 4
100P_0402_50V8J

100P_0402_50V8J

7 [10,13,21,32] SMB_DATA_S3 5
IPD_MIDDLE 8 R673 0_0402_5% TP_CLK2 6
8 6
1

B B
TP_RESET 9 TP_DATA2 7
[34] TP_RESET 9 7
TP_DATA2 10 @ @ TP_DETECT 8
11 10 C849 C850 SMB_CLK_S3 1 2 CP_CLK 9 8 11
[10,13,21,32] SMB_CLK_S3
2

12 GND R674 0_0402_5% 10 9 GND 12


GND 10 GND
ACES_50524-0100N-001
ME@ ACES_51522-01001-001
ME@

+5VS

TP_CLK TP_DATA2
TP_CLK2 R660 1 @ 2 4.7K_0402_5%
TP_DATA TP_CLK2
TP_DATA2 R668 1 2 4.7K_0402_5%
@
3

TP_RESET R672 1 2 4.7K_0402_5% 2


@ D37
R211 PJDLC05_SOT23-3 D38
CP_RESET# 2 1 100K_0402_1% PJDLC05_SOT23-3
@
R671 @
0_0402_5%
TP_DETECT 2 1
1

A A

PN: SCA00000U10 X 2

Security Classification Compal Secret Data Compal Electronics, Inc.


AMY WEN Issued Date 2010/08/25 Deciphered Date 2012/08/25 Title
KB /SW .
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8671P_SDV
Date: Thursday, October 04, 2012 Sheet 35 of 50
5 4 3 2 1
A B C D E F G H

+3VS
+3VS

TPM

0.01U_0402_16V7K
0.1U_0402_16V7K
1
1 +3VS

1
1 1

C5336

C5337
@ R5262
10K_0402_5%

2
U5014 2 TPM@

2
HDD_RD_EN 7 6 VDD_NC_6 R392 1 2 0_0402_5% C589 1 2 10U_0603_6.3V6M
EN VDD 16 VDD_NC_16 R394 1 2 0_0402_5% U5002
1 VDD 1 24 C645 1 2 0.1U_0402_16V4Z
[12] SATA_ITX_DRX_P0 A_INp NC VPS
2 10 NC_VDD_10 R395 1 2 0_0402_5% 2 10 TPM@ +3VS
[12] SATA_ITX_DRX_N0 A_INn NC NC VPS
20 REXT_VDD_20 R396 1 2 0_0402_5% 3
C5338 1 2 0.01U_0402_16V7K SATA_DTX_IRX_P0 5 REXT @ 7 NC 28 2 @ 1 R680 0_0402_5%
[12] SATA_DTX_C_IRX_P0 B_OUTp PP LPCPD#
[12] SATA_DTX_C_IRX_N0 C5339 1 2 0.01U_0402_16V7K SATA_DTX_IRX_N0 4 9 A_PRE0 27 SERIRQ
B_OUTn A_PRE0 8 B_PRE0 6 SERIRQ 26 LPC_AD0 SERIRQ [12,34]
B_PRE1 17 B_PRE0 9 NC LAD0 23 LPC_AD1 LPC_AD0 [12,34,37]
19 B_PRE1 15 VNC LAD1 LPC_AD1 [12,34,37]
A_PRE1 SATA_ITX_DRX_P0_C C5340 2 1 0.01U_0402_16V7K SATA_ITX_DRX_P0_R 22 LPC_FRAME#
A_PRE1 A_OUTp 14 LFRAME# LPC_FRAME# [12,34,37]
SATA_ITX_DRX_N0_C C5341 2 1 0.01U_0402_16V7K SATA_ITX_DRX_N0_R 4 20 LPC_AD2
A_OUTn GND LAD2 LPC_AD2 [12,34,37]
SATA_TEST 18 11 17 LPC_AD3
3 TEST 11 GND LAD3 LPC_AD3 [12,34,37]
SATA_DTX_IRX_P0_C C5342 2 1 0.01U_0402_16V7K SATA_DTX_IRX_P0_R 18
13 GND B_INp 12 SATA_DTX_IRX_N0_C C5343 2 1 0.01U_0402_16V7K SATA_DTX_IRX_N0_R GND 25
21 GND B_INn 5 NC 21
EPAD 8 NC LCLK 19 CLK_PCI_TPM [16]
12 VNC NC 15
PS8520BTQFN20GTR2_TQFN20_4X4 NC NC
13
14 NC 16
NC LRESET# PCH_PLTRST# [16,5]
+3VS
ST33ZP24AR28PVSH_TSSOP28
TPM@
1

TEST REXT_VDD_20

R5264 @ (Internal Low)


10K_0402_5% SA00005C020 Need to update symbol

1
2 2
2

SATA_TEST Normal Mode R5263


LOW 4.99K_0402_1%
1

(Default) @

2
R398
0_0402_5%
Test Mode HIGH
2

+3VS +3VS +3VS +3VS


1

+5VS +3VS
R712 R717 R710 R715 09/27
10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%

1
2

J312 F11

1
A_PRE1 B_PRE1 A_PRE0 B_PRE0 JUMP_43X79 1A_32V_0438001.WR
@

2
3 3

2
JBTB1
SP040003600
SATA_ITX_DRX_P0_R
1
3 1 2
2
4
+5VS_HDD 1A
Remove pull-low SATA_ITX_DRX_N0_R 5 3
5
4
6
6
7 8
SATA_DTX_IRX_N0_R 9 7 8 10
SATA_DTX_IRX_P0_R 11 9 10 12
13 11 12 14
HDD_DETECT# 15 13 14 16 +3VS_BTB
[34] HDD_DETECT# POUT1# 17 15 16 18
[16] POUT1# 19 17 18 20
21 19 20 22
23 21 22 24
25 23 24 26
27 GND1 GND2 28
GND3 GND4
A_PRE1/B_PRE1 A_PRE0/B_PRE0 ACES_88664-2441
ME@
(Internal (Internal
pull Low) pull Low)
0dB, no pre-emphasis Low Low
1.5dB pre-emphasis Low
is selected
High
2.5dB pre-emphasis
4
High Low 4
is selected
3.5dB pre-emphasis
High High
is selected

AMY WEN Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/08/25 Deciphered Date 2012/08/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDD BTB Connector/TPM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8671P_SDV
Date: Thursday, October 04, 2012 Sheet 36 of 50
A B C D E F G H
+3VS +3VS +3VS +3VS

1
R724 R723 R722 R721
100K_0402_5% 100K_0402_5% 100K_0402_5% 100K_0402_5%

2
VOL_DOWN# VOL_UP# HOME_BTN# ROT_BTN#

SP010016L00

JPWR1
24
+3VS +3VEC 23 G4
22 G3
21 G2
AC-IN LED (Color : Green) G1

1
20
+3VLP R720 19 20
100K_0402_5% 18 19
17 18
17

2
+3VALW +3VALW 16

2
15 16
R714 [34] LID_SW# TAB_SW# 14 15 ON/OFFBTN#
100K_0402_5% [34] TAB_SW# ROT_BTN# 13 14
D27 9/25 [34] ROT_BTN# 13

1
ON/OFFBTN# 12

1
12

2
3 ON/OFF R614 HOME_BTN# 11
1 ON/OFF [34] +3VS_F7 [34] HOME_BTN# 10 11
ON/OFFBTN# 1.5K_0402_5% VOL_UP# D41
[34] VOL_UP# 10
1

2 51_ON# VOL_DOWN# 9 PJDLC05_SOT23-3


51_ON# [40] [34] VOL_DOWN# 8 9
R5265 ALS_INT

2
330_0402_5% DAN202UT106_SC70-3 [21] ALS_INT 7 8
A_LOGO 6 7
LOGO_LED# 5 6
A-Logo LED
2

1
4 @
D 3 4

1
EC_ON 2 SENSE_SCL 2 3
[34,43] EC_ON [21] SENSE_SCL 2
3
1

G SENSE_SDA 1
[21] SENSE_SDA 1
LED1 S Q53
G

2
HT-121UYG_YELLOW-GREEN 2N7002K_SOT23-3 ACES_50406-02071-001

3
ME@
PN:SCA00000U10
YG

R733
100K_0402_5%
2

1
ACIN#
1

D +3VS
2
[14,34,40] ACIN
G 9/27
S Q68
Power Board connector
1

2N7002K_SOT23-3
3

F12
SP040003600 1A_32V_0438001.WR
1A
2

JPSEN2
+3VS_F12 1
POUT2# 2 1 5
[16] POUT2# 2 G1
3 6
4 3 G2
4
E-T_4260K-Q04N-03L
ME@

R5266
1.5K_0402_5% JLOGO1
1 2 C _LED_3.3VALW 1
+3VALW 1
Logo_LED# 2
JDB3 [34] LOGO_LED# 3 2 BOTTOM SIDE
1 4 G1
+3VALW 1 G2
2
+3VS
3 2 ACES_85204-02001
SN111005800 by ME drawing
4 3 ME@
[12,34,36] LPC_FRAME# 5 4
[12,34,36] LPC_AD3 5
6 2 SW4 1
[12,34,36] LPC_AD2 7 6
[12,34,36] LPC_AD1 8 7
[12,34,36] LPC_AD0
[13,16,21,22,30,32,34] PLT_RST#
PLT_RST# 9
10
8
9 C-logo Conn.
[16] CLK_PCI_DB 10
[32,34] EC_TX_P80_DATA 11 13 PRECHG 4 3
12 11 GND 14 [40,42,43] PRECHG SKRBAAE010_4P
[32,34] EC_RX_P80_CLK 12 GND

CLK_PCI_DB ACES_85201-1205N

ME@ GND

C5109
12P_0402_50V8J
Debug Conn. @
For Power Reset

AMY WEN Security Classification


Issued Date 2010/08/25
Compal Secret Data
Deciphered Date 2012/08/25 Title
Compal Electronics,Ltd.
other IO connector
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1A
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8671P_SDV
Date: Thursday, October 04, 2012 Sheet 37 of 50
PT-H 20 SCREW HOLE
FD1 FD2 FD3 FD4
1 1 1 1

H_2P3

H1 H4 H19 H22 H3 H6 H24 H25


HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
1

1
H10 H26 H27
NON-PT-H 1 SCREW HOLE
HOLEA HOLEA HOLEA
1

H_2P4N

H23
HOLEA
H_3P3

1
H7 H9
HOLEA HOLEA
1

H11 H14 H15 H16


@ HOLEA @ HOLEA @ HOLEA @ HOLEA
1

H_6P0

H12
HOLEA
1

Security Classification Compal Secret Data Compal Electronics, Inc.


Issued Date 2010/08/25 Deciphered Date 2012/08/25 Title
AMY WEN THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCREW HOLE
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8671P_SDV
Date: Thursday, October 04, 2012 Sheet 38 of 50
A B C D E

+1.5V to +1.5VS
+5VALW TO +5VS +3VALW TO +3VS
+1.5V +1.5VS

+5VALW 3 1

S
+5VS +3VALW +3VS

D
U37 U38

1
8 1 8 1 Q54
7 D S 2 7 D S 2 C824 C825 C826

G
2
6 D S 3 6 D S 3
1

1
10U_0805_10V4Z 10U_0805_10V4Z 1U_0603_10V4Z R694

2
C827 5 D S 4 C828 C829 C830 5 D S 4 C831 C832 470_0603_5%
10U_0805_10V4Z D G 10U_0805_10V4Z 1U_0603_10V4Z R695 10U_0805_10V4Z D G 10U_0805_10V4Z 1U_0603_10V4Z R696 SI2301BDS-T1-E3_SOT23-3 @
2

2
DMN3030LSS-13_SOP8L-8 470_0603_5% DMN3030LSS-13_SOP8L-8 470_0603_5%
@ @

1 2

1 2

1
1 +3VALW 1
+VSB +VSB D
D D @ 2 SUSP
1

1
@ 2 SUSP @ 2 SUSP G
R697 G R698 G Q57 S
150K_0402_5% Q55 S 470K_0402_5% Q56 S 100K_0402_5% 2N7002K_SOT23-3

3
2N7002K_SOT23-3 2N7002K_SOT23-3 R699

3
2

2
5VS_GATE2 R700 15VS_GATE_R 2 R702 1 2 R701 1 1.5VS_GATE

0.01U_0402_25V7K

0.01U_0402_25V7K
1 0_0402_5% 1
1

1
82K_0402_5%
0_0402_5%

1
D D D C836

C833

C834
SUSP 2 SUSP 2 SUSP# 2 0.1U_0603_25V7K C837

2
G 2 G 2 G 0.1U_0603_25V7K

2
S Q58 S Q59 S Q60
2N7002K_SOT23-3 2N7002K_SOT23-3 2N7002K_SOT23-3
3

3
+RTCVCC +5VALW
+5VALW
+0.75VS

1
+1.8VS +1.5V +1.05VS @

1
R703 R704 @
100K_0402_5% 100K_0402_5% R705
1

1 R709 100K_0402_5%

2
2 22_0603_5% SUSP 2
[46,9] SUSP

2
R706 R707 R708 SYSON#

1 2
470_0603_5% 470_0603_5% 470_0603_5% Q67 Q62

1
@ @ @ DTC124EKAT146_SC59-3 DTC124EKAT146_SC59-3
1 2

1 2

1 2

D @

OUT

OUT
2 SUSP
D D D G
@ 2 SUSP @ 2 SYSON# @ 2 SUSP Q65 S 2 SYSON 2
[34,42,44,46,9] SUSP# IN [34,44] SYSON IN
G G G 2N7002K_SOT23-3

GND

GND
3
Q63 S Q61 S Q64 S
2N7002K_SOT23-3 2N7002K_SOT23-3 2N7002K_SOT23-3
3

3
For Intel S3 Power Reduction.

3 3

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.


AMY WEN Issued Date 2010/08/25 Deciphered Date 2012/08/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DC Interface
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-8671P_SDV
Date: Thursday, October 04, 2012 Sheet 39 of 50
A B C D E
5 4 3 2 1

ADP_ID
PR102 Precharge detector
10K_0402_1% AC Adapter 90W 65W
1 2 15.97V/14.84V FOR
R(K ohm) open 10

680P_0603_50V7K
+3VALW ADP_ID [34]
ADAPTOR

0.1U_0402_16V7K
A/D ADP_ID(V) 3.3 1.65

1
PC102

PC103
Detection voltage >2.64 1.32~1.98

2
PQ102
TP0610K-T1-E3_SOT23-3
PR103
D JDCIN1 PR104 1K_1206_5% PD102 D

1 1
0_0402_5%
2
VIN VS
1 2 2 1 3 1
1 2 APDIN short@ PR105 LL4148_LL34-2
2 3 1 2 APDIN1 1 2 1K_1206_5%
3 4 1 2
4 5 PF101 PL101

100K_0402_1%
5

1
7A_24VDC_429007.WRML SMB3025500YA_2P PR106

100K_0402_1%
PR107

PR108
1K_1206_5%

1000P_0402_50V7K

1000P_0402_50V7K
100P_0402_50V8J

100P_0402_50V8J
ACES_88299-0510

2
1 2

2
@

2
PC104

PC105

PC106

PC107

100K_0402_1%
1

PR109
PQ103

DDTC115EUA-7-F_SOT323-3
1

1 2
PR110
1M_0402_1% 2
1 2 [34,42] ACOFF PQ104
VINDE-2 VIN DDTC115EUA-7-F_SOT323-3
VS
VIN 2

3
0.01U_0402_25V7K

10K_0805_5%
1
1

PC108

PR112

3
PR111 PR113
C C
84.5K_0402_1% 10K_0402_1%
2

1 2
ACIN [14,34,37]
2

PR114
2

22K_0402_1%
VINDE-1 1 2 3
P

+ 1 PACIN
B+
0.068U_0603_16V7K

O PACIN [40,42]
VINDE-3 2
-
G
1

PU102A
20K_0402_1%

10K_0402_5%
0.1U_0402_16V7K
1

LM393DG_SO8 PR117
4
PC109

PR115

PC110

PR116

2.2M_0402_5%
PD103 Vin Detector 2 1
2

LLZ4V3B_LL34-2
Min. typ. Max.
2

PR118
2

10K_0402_5% VL
2 1 L-->H 17.430V 17.901V 18.384V VS

499K_0402_1%
3.3V

0.01U_0402_25V7K
RTCVREF

1
H-->L 16.976V 17.262V 17.728V

PR101
100K_0402_1%
1

1
PR119

PC111

2
VIN

2
PD104 PU102B

8
RB715F_SOT323-3 LM393DG_SO8
2 5

P
+

2
[33,34,41,43] MAINPWON 1 7
PD105 3 O 6

205K_0402_1%

499K_0402_1%

0.01U_0402_25V7K
G
-

1
LL4148_LL34-2 [42] ACON

0.01U_0603_25V7K

1
PR120

PR121

PC113
1000P_0402_50V7K
4
1

1
PD106 PR122
1

51ON-1

PC112

PC101
LL4148_LL34-2 200K_0402_1%

2
BATT+ 2 1 [37,42,43] PRECHG 2 1

PRG++ 2

2
1

B PR123 PR124 B
PQ101 68_1206_5% 68_1206_5%
TP0610K-T1-E3_SOT23-3
PR125
2

200_0603_5% PR126 PR127

1
CHGRTCP 1 2 51ON-2 3 1 10K_0402_5% D 47K_0402_5%
VS 2 1 2 2 1
0.22U_0603_25V7K

G PACIN [40,42]
RTCVREF
1

1
PQ105 S

3
2

1
PC114

PR128 PC115 PQ106


100K_0402_1% 0.1U_0603_25V7K SSM3K7002FU_SC70-3 DDTC115EUA-7-F_SOT323-3
1

PR129 2
2

22K_0402_1%
1 2 51ON-3 +5VALW
[37] 51_ON#

3
1

RTCVREF
PR130
+CHGRTC 200_0603_5%
ACIN BATT ONLY
PR131 PR132 PU101
PD101 3.3V Precharge detector Precharge detector
2

560_0603_5% 560_0603_5%
1 2 1 2 1 2 3 2 CHGRTCIN
+RTCBATT VOUT VIN Min. typ. Max. Min. typ. Max.
1

PC116
RB751V-40_SOD323-2 L-->H 14.991V 15.381V 15.782V L-->H 7.196V 7.349V 7.505V
1

GND 1U_0805_25V6K
PC117
H-->L 13.860V 14.247V 14.621V H-->L 6.138V 6.214V 6.056V
2

10U_0603_6.3V6M 1
2

PD107 JRTC1
A A
1 2 1 2 1
2 1
RB751V-40_SOD323-2 1K_0402_5% 3 2 BIT3021A-ST9_SOT89-3
PR133 4 G1
G2
ACES_85204-02001

AMY WEN
@ Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/01/25 Deciphered Date 2010/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR DCIN / Vin Detector /Pre-charge
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.4
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C38 Chief River Schematic
Date: Thursday, October 04, 2012 Sheet 40 of 50
5 4 3 2 1
5 4 3 2 1

VMB2 VMB
PF201 PL201
ACES_88299-0710

JBATT1 12A_65V_451012MRL SMB3025500YA_2P


1 1 2 1 2
1 2 BATT+
2 3 EC_SMCA
3 4 EC_SMDA
D 4 5 D
5 6

1
6 7
1

1
PC202 PC203
7

100_0402_1%

100_0402_1%
1000P_0402_50V7K 0.01U_0402_25V7K

2
PR202

PR203
@
2

For KB930 --> Keep PU201 circuit


PH1 under CPU botten side :
(Vth = 1.25V)
EC_SMB_CK1 [34,42] CPU thermal protection at 93 +-3 degree C
For KB9012 (Red square) --> Remove PU201 circuit, but keep PR206
Recovery at 56 +-3 degree C
EC_SMB_DA1 [34,42] PH201, PR205, PR211,PQ201,PR208,PR212
1 2
+3VALW
VL
PR204
6.49K_0402_1% 1 2
+3VLP
[34,42] ADP_I

18.2K_0402_1%
PR201

1
4.42K_0402_1%

12.7K_0402_1%
2.1K_0402_1%

1
D

PR208
1 2
BATT_TEMP [34] A/D 90W:4.42K

PR206

@ PR207
PR205 2

1
10K_0402_5% 65W:1.42K PQ202 G ADP_PROTECT [34]
PC204 +3VS S SSM3K7002FU_SC70-3

2
0.1U_0603_16V7K PU201

2
1 8 NTC_V_1
C VCC TMSNS1 C

100K_0402_1%
2 7 OTP_N_002 2 1
GND RHYST1

PR209
PR210
3 6 Turbo_V_1 10K_0402_1%
[34,47] VR_HOT# OT1 TMSNS2

@ 0_0402_5%
PR211
4 5 ADP_OCP_2 1 2

1
OT2 RHYST2

1
PR220
PQ203 @

2
D

@ 0_0402_5%

10K_0402_1%
G718TM1U_SOT23-8 27.4K_0402_1% PH201

PR212
2 ADP_OCP_1

2
OTP_N_003

PR219
G 100K_0402_1%_TSM0B104F4251RZ
S SSM3K7002FU_SC70-3

2
ADP_I protection

1
PR213 PR214
@ 0_0402_5% 0_0402_5%
[34] PROCHOT 1 2 2 1
short@ MAINPWON [33,34,40,43] PR222
PR221 PH1 protection value
1 2 1 2
+3VLP
@ 0_0402_5% 47K_0402_1%

PR223
1 2
+3VALW
@ 47K_0402_1%

Turbo_V

[34]

NTC_V

[34]
B B

PQ201
TP0610K-T1-E3_SOT23-3

3 1
B+ +VSBP

100K_0402_1%

0.22U_0603_25V7K
1

1
PR215

PC205
VL PC201
0.1U_0603_25V7K

2
2

2
2

PR216
PR217 22K_0402_1%
@ 100K_0402_1% 1 2

PR218
1

@ 1K_0402_5%
1 2
[43] SPOK
PR224
1

0_0402_5% D PJ201
2 1 2 PQ204 @ JUMP_43X39
[34] VSB_EN short@ 1 2
G SSM3K7002FU_SC70-3 +VSBP 1 2 +VSB
1U_0402_6.3V6K

S
3
1

PC206
2

A A

AMY WEN Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/01/25 Deciphered Date 2010/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-BATTERY CONN/OTP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom C38 Chief River Schematic 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 04, 2012 Sheet 41 of 50
5 4 3 2 1
5 4 3 2 1

P3
B+ PQ302
AO4407A_SO8
PQ303
AO4407A_SO8
P2 Need EC write ChargeOption() bit[8]=1 1 8 8 1
PQ304
2
3
7
6
7
6
2
3
BATT+
PQ305
AO4407A_SO8 SI4483ADY-T1-GE3_SO8 5 5
8 1 1 8 PR302
VIN 7 2 2 7 0.01_1206_1% B+
SH00000AA00

4
D 6 3 3 6 D

49.9K_0402_1%
5 5 1 2 1 4 1 2

VIN

1
PR304
PL301 2 3 PR303

4
1UH_PCMB061H-1R0MS_7A_20% PR305 499K_0402_1%

@ 10U_0805_25V6K

@ 10U_0805_25V6K
200K_0402_1%
change to SD028470280_47K_0402_5%

2200P_0402_50V7K
4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K
PQ301 1 2
47K_0402_5%

1 2

2
1

2
200K_0402_1%
0.1U_0603_25V7K
PQ306

PC308
1
PR306

PC303

PC304

PC305

PC306

PC307
DTA144EUA_SC70-3 PC302
3

2
47K_0402_1%

DTA144EUA_SC70-3
PC309

PR307
5600P_0402_25V7K
SD028200380_200K +-5% 0402

3
2

PR308
2

2
ACN 2
2011_0731 PR301 form

1 DISCHG_G-1
1

2
1SS355_SOD323-2
2011_0731 PC302 form

2 ACOFF
SE074222K80_2200P 50V K X7R 0402 PR309
1

change to ACP 200K_0402_1%


SE075562K80_5600P_0402_25V7K
1

PD302

1
0.1U_0402_25V6
P2-1
2

1
PQ307 D
+3VALW PC310 PC311 2
PRECHG [37,40,43]

1
DDTC115EUA-7-F_SOT323-3 2 1 2 G
1 2 2 1 S

3
2011_0728 numount PD303 PQ309
PR315,PR316, HW PU 0.1U_0402_25V6 1SS355_SOD323-2 SSM3K7002FU_SC70-3
6

0.1U_0603_25V7K
3
1

150K_0402_1%

PC313

1
D
PR310

PC312
PQ310A PQ308
2 2N7002KDW-2N_SOT363-6 0.1U_0402_25V6 BQ24727VCC 2 PACIN
C DDTC115EUA-7-F_SOT323-3 G C

2
@ @ 2 1 S
1

3
VIN PQ311

10K_0402_5%

10K_0402_5%
SSM3K7002FU_SC70-3

5
432K_0603_1%
2N7002KDW-2N_SOT363-6

1
P2-2

10_1206_5%
PR316

PR317

2
PR315

PQ312

PR318
SIS412DN-T1-GE3_POWERPAK8-5
3
PQ310B

PR319

CMPOUT
ACOK

ACP
CMPIN

ACN
1

PR320 64.9K_0603_1% 1 [34,41] ADP_I 4


2

47K_0402_1% 21

1
PACIN 1 2 5 1 2 6 TP
[40] PACIN ACDET PC315
PC301 0.1U_0603_25V7K PC314 20 BQ24727VCC-1 1 2 SH00000JW00 PR321
4

3
2
1
1 2 1 2 7 VCC PL302 0.01_1206_1%
[40] ACON IOUT
PR331
1U_0603_25V6
4.7UH_VMPI1004AR-4R7M-Z01_10A_20% BA+
1

0_0402_5% 100P_0603_50V8 19 LX_CHG 1 2 CHG 1 4


[34,41] EC_SMB_DA1 2 1 8 PU301 PHASE
short@ SDA 2 3
BQ24737RGRR_VQFN20_3P5X3P5
change to SD014649280_64.9K_0603_1%

PR322 18 DH_CHG
HIDRV

1
[34,41] EC_SMB_CK1

4.7_1206_5%
1 2 ACOFF-12 2 1 9
[34,40] ACOFF SCL SA000051W00

PR323
10K_0402_5% short@ PR301
PR332 PR324 0_0603_5%

10U_0805_25V6K

10U_0805_25V6K
0_0402_5% 1 2 10 17 BST_CHG 1 2 2 1 SRP SRN
ILIM BTST
1

PQ313 316K_0402_1%
SD00000Z480_66.5K_0603_0.1%

+3VALW PD301
3

2
DDTC115EUA-7-F_SOT323-3 PC316 PQ314

LODRV

1
PC317

PC318
PR325 16 2 1 0.047U_0603_25V7M 4 SI7716ADN-T1-GE3_POWERPAK8-5

GND

24727_SN
SRN

SRP
REGN
BM

100K_0402_1%
2

2
RB751V-40_SOD323-2

680P_0603_50V7K
2011_0731 PR319 form

11

1 12

13

14

15
1

1
10_0402_5%
6.8_0402_5%

3
2
1
PR327 PC319

1
PR326

B B
1U_0603_25V6

2
PR333

PC320
@ 0_0402_5%
2

2
[34] BM# 1 2
2

PC321 DL_CHG
0.1U_0402_25V6
2

2 1

CHGVADJ=(Vcell-4)/0.10627 PR328
10K_0402_5%
1

Vcell CHGVADJ
1

2011_0728 add charger PC322


4V 0V turbo boost function 0.1U_0402_25V6 PC323
2

0.1U_0402_25V6
2

4.2V 1.882V +3VS


@
4.35V 3.2935V
PQ315 TP0610K-T1-E3_SOT23-3

3 1 BQ24727VCC
CC=0.25A~3A P2
1
100K_0402_1%

IREF=1.016*Icharge
PR329

IREF=0.254V~3.048V
VCHLIM need over 95mV PR330
2

2 1
1

100K_0402_1%
PQ316
DDTC115EUA-7-F_SOT323-3
A 2 FSTCHG A
2 1 FSTCHG[34]
3 SUSP#
SUSP# [34,39,44,46,9]
PD304
3

RB715F_SOT323-3
Security Classification Compal Secret Data Compal Electronics, Inc.
AMY WEN Issued Date 2010/01/13 Deciphered Date 2011/01/13 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
CHARGER 1.0

Thursday, OctoberC38
04, 2012Chief River
Sheet Schematic
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 42 of 50
5 4 3 2 1
5 4 3 2 1

Note:
Use TPS51125 IC can remove RTC refernece LDO
Use TPS51427 IC must keep RTC refernece LDO PQ408
FDV301N_NL_SOT23-3~D

2VREF_8205

D
3 1 PJ402
+3VLP +3VLPP 2 1
+3VALWP 2 1 +3VALW
@ JUMP_43X118

G
D D

1U_0603_10V6K
[37,40,42] PRECHG

0.1U_0402_25V

1
PC427
1

PC402
PJ401
+5VALWP 2 1 +5VALW

2
@ 2 1

2
@ JUMP_43X118

PR402 PR403
13.3K_0402_1% 30K_0402_1%
1 2 1 2

PR404 PR405
RT8205_B+ 20K_0402_1% 20K_0402_1% RT8205_B+
1 2 1 2
PJ403 Typ: 175mA
B+
68P_0402_50V8J
2 1 +3VLPP
2 1

ENTRIP2

ENTRIP1
2200P_0402_50V7K

2200P_0402_50V7K
PC424

68P_0402_50V8J
0.1U_0603_25V7K

0.1U_0603_25V7K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

4.7U_0805_25V6-K

0.1U_0603_25V7K
@ JUMP_43X118 1 PR406 PR407
130K_0402_1% 66.5K_0402_1%
PC403

PC404

PC411

PC425
1 2 1 2

4.7U_0805_10V6K

SIS412DN-T1-GE3_POWERPAK8-5
1

1
PC405

PC406

PC407

PC408

PC409

PC410
SIS412DN-T1-GE3_POWERPAK8-5
2

PQ401

5
C PU401 C
2

2
PC412
PQ402

ENTRIP2

FB2

TONSEL

REF

FB1

ENTRIP1
1
25
P PAD

2
4 4
7 24
VO2 VO1 SPOK [41]
8 23 PR409 PC414
PR408 VREG3 PGOOD 2.2_0603_5% 0.1U_0603_25V7K
1
2
3

3
2
1
1 2 1 2 BST_3V 9 22 BST_5V 1 2 1 2
2.2_0603_5% BOOT2 BOOT1
PL402 PC413 UG_3V 10
VFB=2.0V 21 UG_5V PL401
4.7UH +-20% PCMC063T-4R7MN 5.5A 0.1U_0603_25V7K UGATE2 UGATE1 4.7UH +-20% PCMC063T-4R7MN 5.5A
1 2 LX_3V 11 20 LX_5V 1 2 +5VALWP
+3VALWP PHASE2 PHASE1
SH00000H200 SH00000H200
1

1
4.7_1206_5%

4.7_1206_5%
LG_3V 12 19 LG_5V
LGATE2 LGATE1

5
PR410

PR401
PQ403

SKIPSEL
SI7716ADN-T1-GE3_POWERPAK8-5

VREG5
PR420 PQ404

GND

VIN
10U_0603_6.3V6M

10U_0603_6.3V6M
499K_0402_1%

NC
EN
1 1
2

2
4 1 2 SI7716ADN-T1-GE3_POWERPAK8-5
1

1
+ +
PC422

PC423
PC415 4 PC416
VS

13

14

15

16

17

18
1

1
680P_0603_50V7K

150U_B2_6.3VM_R45M PR411 RT8205EGQW_WQFN24_4X4 150U_B2_6.3VM_R45M

680P_0603_50V7K
@ 499K_0402_1%
2

2
2 2
PC417

PC418
1 2
2

1
2
3

2
B+

3
2
1
1
100K_0402_1%

1U_0603_10V6K
VL

1
B B

PC419

1
PR412

PC420
4.7U_0805_10V6K
Typ: 175mA

2
2

2
ENTRIP1 ENTRIP2
RT8205_B+
6

0.1U_0603_25V7K
PQ405B
PQ405A 2N7002KDW-2N_SOT363-6 2VREF_8205 +3.3VALWP OCP(min)=8.27A

2
PC401
2N7002KDW-2N_SOT363-6 2 5
+5VALWP OCP(min)=5.52A
1

PR413
100K_0402_1%
PR414 2 1
[33,34,40,41] MAINPWON 0_0402_5% VL
1 2
short@
PR417
47K_0402_1%
1

2 1
[34,37] EC_ON PQ406
PR418 DDTC115EUA-7-F_SOT323-3
A
100K_0402_1% A
1 2 1 2 2
+3VLP VS
@ 40.2K_0402_1%

1U_0603_10V6K

@ PR415
@PR415
1

PR419 100K_0402_1%
1
PR416

PC421

1 2
[34] V_ALW#
3
1

short@ D
0_0402_5% 2 PQ407 Security Classification Compal Secret Data Compal Electronics, Inc.
2

G
Issued Date 2010/01/25 Deciphered Date 2010/12/31 Title
2
1

PC426 S SSM3K7002FU_SC70-3
3VALWP/5VALWP
3

0.1U_0603_25V7K
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
2

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom C38 Chief River Schematic 1.0
AMY WEN MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 04, 2012 Sheet 43 of 50
5 4 3 2 1
A B C D

PJ502
1.5V_B+ 2
2 1
1 B+

2200P_0402_50V7K
68P_0402_50V8J

10U_0805_25V6K

10U_0805_25V6K

0.1U_0402_25V6
5
@ JUMP_43X118

1
PC523

PC502

PC503

PC504

PC505
PQ501

TPCA8065-H_PPAK56-8-5

2
4

3
2
1
1 1

PR502 PC506 PL502


35.7K_0402_1% PU502 2.2_0603_5% 0.22U_0603_16V7K 1UH_PCMB103T-1R0MS_13A_20%
PR503
1
PGOOD VBST
10 BST_1.5V 1 2BST_1.5V-1 1 2 1 2 +1.5VP
PR504 2 1 2 9 DH_1.5V
0_0402_5% TRIP DRVH PC508
1 2 3 8 LX_1.5V 220U_V_2.5VM_R9M

4.7_1206_5%
EN SW

1
[34,39] SYSON short@

10U_0603_6.3V6M
1

5
4 7
VFB V5IN +5VALW
2

1
@

PR507

PC516
47K_0402_5%

PQ502

.1U_0402_16V7K

1
PC509 @
1 PR5062 5 6 DL_1.5V TPCA8057-H_PPAK56-8-5 +1.5VP OCP(min)=12.6A
1 RF DRVL PC507

2
2
PR505

470K_0402_1% 11 1U_0603_10V6K

2
TP 4 PJ503

1000P_0603_50V7K
1

TPS51212DSCR_SON10_3X3 2 1
2 1

1
VFB=0.7V

PC510
@ JUMP_43X79

3
2
1

2
PJ501 +1.5V
+1.5VP 2 1
2 1
@ JUMP_43X79
PR508
1 2

11.5K_0402_1%
1

PR509
10K_0402_1%
2

2 2

2011_0801 JP504 form


43x118 change to 43x79
PU501 PL501

4
PJ504 1UH_PH041H-1R0MS_3.8A_20%
2 1 1.8VSP_VIN 10 2 1.8VSP_LX 1 2
+5VALW 2 1 PVIN PG LX +1.8VSP
@ JUMP_43X79 9 3 2011_0801 JP505 form

68P_0402_50V8J
PVIN LX

1
680P_0603_50V7K 4.7_1206_5%
43x118 change to 43x79
1

1
8

PC501
PC511
SVIN

PR510
22U_0805_6.3V6M PR511
6 20K_0402_1%
2

2
5 FB

22U_0805_6.3V6M

22U_0805_6.3V6M
1 2

2
EN

1
NC

NC

PJ505
TP

PC512

PC514
PR512 FB=0.6Volt +1.8VSP 2 1 +1.8VS
2 1
[34,39,42,46,9] SUSP#

PC513
0_0402_5%
11

2
1 2 EN_1.8VSP @ JUMP_43X79

2
short@
0.1U_0402_10V7K
2

SY8033BDBC_DFN10_3X3
1

PC515

PR501 1.8VSP max current=4A


1M_0402_5%
1.8VSP_FB
2
1

1
PR513
10K_0402_1%

2
3 3

2011_0801 JP504 form


43x118 change to 43x79
PU503 PL503
4

PJ507 1UH_PH041H-1R0MS_3.8A_20%
2 1 1.05VM_VIN 10 2 1.05VM_LX 1 2
+5VALW
PG

2 1 PVIN LX +1.05VMP
@ JUMP_43X79 9 3 2011_0801 JP505 form
68P_0402_50V8J
PVIN LX
1

1
680P_0603_50V7K 4.7_1206_5%

43x118 change to 43x79


1

8 1
PC519

PC518
SVIN
PR517

22U_0805_6.3V6M PR516
6 7.5K_0402_1%
2

5 FB

22U_0805_6.3V6M

22U_0805_6.3V6M
1 2

EN 1

1
NC

NC

PJ506
TP

PC517

PC520
PR515 FB=0.6Volt +1.05VMP 2 1 +1.05VM
2 1
PC521

0_0402_5%
11

2
1 2 EN_1.05VM @ JUMP_43X79
2

[19,34] M_PWR_ON short@


0.1U_0402_10V7K
2

SY8033BDBC_DFN10_3X3
1

PC522

PR514 1.05VMP max current=4A


1M_0402_5%
1.05VM_FB
2
1

4
PR518 4

10K_0402_1%
2

AMY WEN Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/01/25 Deciphered Date 2010/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-+1.5VP/+1.8VSP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C38 Chief River Schematic
Date: Thursday, October 04, 2012 Sheet 44 of 50
A B C D
5 4 3 2 1

+3VS PR602
@ 1K_0402_5%
2 1
VID [0] VID[1] VCCSA Vout PJ601
+VCC_SAP

100K_0402_5%
0 0 0.9V H_VCCSA_VID1 [9] +VCCSAP 2
2 1
1 +VCCSA

1
TDC 2.9A @ JUMP_43X118

PR603
0 1 0.85V Peak Current 4A
1 0 0.775V OCP current 5.4A

2 SA_PGOOD
H_VCCSA_VID0 [9]

D
1 1 0.75V D
PC621
[34] SA_PGOOD
@ 0.033U_0402_16V7
output voltage adjustable network 1 2
The 1k PD on the VCCSA VIDs are empty.
PR604 These should be stuffed to ensure that

H_VCCSA_VID0
H_VCCSA_VID1
+5VALW @ 1K_0402_5% VCCSA VID is 00 prior to VCCIO stability.

1U_0603_10V6K
2 1

PC602
PR605 PR606
10_0402_1% 0_0402_5%

1
2 1 +VCCSA_EN 1 2
short@ 1.05VS_VCCP_PWRGOOD [46]
PC603
2.2U_0603_10V7K
1 2

18

17

16

15

14

13
PU601
PR607 PC604

VID1

VID0
PGOOD

EN
V5FILT
V5DRV
0_0603_5% 0.22U_0603_16V7K
12 +VCCSA_BT 1 2+VCCSA_BT_1 1 2
19 BST PL601
PGND 0.47UH_PCMB063T-R47MS_18A_20%
SW
11 +VCCSA_PHASE 1 2 +VCCSAP
20
PGND

22U_0805_6.3V6M

22U_0805_6.3V6M

0.1U_0402_10V7K
1
10

68P_0402_50V8J

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
2200P_0402_50V7K
SW
2200P_0402_50V7K

21 PR608 @ @
0.1U_0603_25V7K

PGND

2
10U_0805_6.3V6M

10U_0805_6.3V6M
4.7_1206_5%

PC605

PC606

PC608

PC609

PC611

PC612
TPS51461RGER_QFN24_4X4 9

PC620

PC607

PC610
22 SW
1 2 2
PC614

1
VIN
2
PC613

PC601

PC615 8
SW

1
23 PC616
1

2 1 1 VIN 1000P_0603_50V7K
C PJ602 7 C
+3VALW

2
2 1 +VCCSA_PWR_SRC +VCCSA_PWR_SRC 24 SW
2 1 VIN
@ JUMP_43X118 25

COMP

MODE
TP

SLEW

VOUT
VREF
GND
1

6
2 1

PR609
PC617 100K_0402_1% PR601
2 1 100_0402_1%
2 1
0.22U_0402_10V6K

0.01U_0402_25V7K
2
2 1 2 1
PR611

PC619
PC618 PR610 0_0402_5%

1
3300P_0402_50V7K 5.1K_0402_1% 1 2
short@ +VCCSA_SENSE [9]

B B

2011_0801 del +V1.05S_VCCPP circuit

A A

AMY WEN Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2010/01/25 Deciphered Date 2010/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR +VCCSAP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C38 Chief River Schematic
Date: Thursday, October 04, 2012 Sheet 45 of 50
5 4 3 2 1
5 4 3 2 1

+1.5V

1
2011_0801 JP701 size form
PJ702 43x118 change to 43x39

1
JUMP_43X39
@

2
2
PU702
D 1
VIN NC
8 +3VALW PJ701 D
+0.75VSP 2 1 +0.75VS
PC702 2 7 2 1
GND NC

1
4.7U_0805_6.3V6K @ JUMP_43X118

1
3 6 PC703
PR702 VREF VCNTL

2
1K_0402_1% 4 5 1U_0603_10V6K
VOUT NC
9

2
TP PJ703
APL5336KAI-TRL_SOP8P8 2 1
2 1
PR703 @ JUMP_43X118

.1U_0402_16V7K
D
+0.75VSP

1
49.9K_0402_1% +1.05VS_VCCPP PJ704 +1.05VS

10U_0603_6.3V6M
[39,9] SUSP 1 2 2 PQ702 2 1

PC705
1K_0402_1%

10U_0603_6.3V6M
2 1

1
SSM3K7002FU_SC70-3

PC704

PC706
G

2
S PR701 @ JUMP_43X118

0.1U_0402_10V7K

2
1
PC707

2
2011_0801 del PJ705 and "+V1.05S_VCCP"

Ivy Bridge CPU ES2 Using


C C

+1.05VS_VCCPP OCP(min)=15.76A

PJ705

TPCA8065-H_PPAK56-8-5
1.05VS_B+ 2 1

68P_0402_50V8J

2200P_0402_50V7K

4.7U_0805_25V6-K

4.7U_0805_25V6-K
2 1
B+

0.1U_0402_25V6
+3VS @ JUMP_43X118

1
PQ703

PC709

PC710
5
2011_0801 mount

PC720

PC708

PC701
PR704, PR706

2
2

PR704
100K_0402_5%
4
PR706
1

0_0402_5%
2 1 PR707 PC712
[45] 1.05VS_VCCP_PWRGOOD +1.05VS_VCCPP
PU701 2.2_0603_5% 0.22U_0603_16V7K PL701

3
2
1
short@ 1 10 1
BST_1.05VS_VCCP 2 1 2 1UH_PCMB103T-1R0MS_13A_20%
PGOOD VBST 2 1
PR708 TRIP_1.05VS_VCCP 2 9 DH_1.05VS_VCCP
[34,39,42,44,9] SUSP# 60.4K_0402_1% TRIP DRVH

1
B 1 2 3 8 LX_1.05VS_VCCP B

1000P_0603_50V7K 4.7_1206_5%
EN SW

5
2011_0815 PC1166, PC1167
@ 10K_0402_1%

10U_0603_6.3V6M

330U_D2_2V_Y
2

4 7 PQ701

PR709
PC1168 change place
.1U_0402_16V7K

VFB V5IN +5VALW 1


1
PR710

form"+1.05VS"

1
5 6 DL_1.05VS_VCCP +
PC713

PC719

PC714
TPCA8057-H_PPAK56-8-5
to"+1.05VS_VCCPP"

2
RF DRVL
470K_0402_1%
54.9K_0402_1%
2

11 4
1

2
TP 2
PR711

PR712

TPS51212DSCR_SON10_3X3 @ PR717

1
VFB=0.7V 10_0402_5%
PC717 2 1 VSS_SENSE_VCCIO [8]
2

3
2
1
1U_0603_10V6K

PC718
2

2
0_0402_5%
+1.05VS

PR713
short@

330U_D2_2V_Y

@ 330U_D2_2V_Y
1 2 1 1
PR714 PR716 @ + +

PC715

PC716
1

4.99K_0402_1% 10_0402_5%
2 1 VCCIO_SENSE [8]
PR715 2 2
10K_0402_1%
2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.


AMY WEN Issued Date 2010/01/25 Deciphered Date 2010/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR +1.05VS_VCCPP/+0.75VSP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C38 Chief River Schematic
Date: Thursday, October 04, 2012 Sheet 46 of 50
5 4 3 2 1
5 4 3 2 1

806 ohm
PR902 PC903
10_0402_1% PC902 .1U_0402_16V7K

1200P_0402_50V7K

470P_0402_50V7K
0.033U_0402_16V7
1 2 FBA3 1 2 1 2

75K_0402_1%
PUT COLSE
PR903
TO GT

1
1 2 PR907 PC901

PC904

PC905

PR906
TRBSTA# 1 2 FBA1 1 2 PH902 Inductor 806_0402_1% 1000P_0402_50V7K
24.9K_0402_1%

1
2
D PR905 PR904 220K_0402_5%_ERTJ0EV224J CSCOMPA 1 2 DROOPA 1 2 CSREFA D
10K_0402_1% PC906 1K_0402_1% PR909 PC907 PC908

2
0.033U_0402_16V7 10_0402_1% 330P_0402_50V7K 10P_0402_50V8J 2 1 NTC_PH203

1
1 2 FBA2 1 2 1 2

CSSUMA
PR908
PC909 165K_0402_1%

CSCOMPA
1 2 2 1 COMPA1 1 2
1 2 SWN1A
PR910 PR911 2200P_0402_50V7K CSREFA
1K_0402_1% 6.04K_0402_1% PR912 PC910 TSENSEA

2
78.7K_0603_1% 0.047U_0402_16V7K

1
PR914 CSP1A 1 2
SWN1A [48]

2
15.8K_0402_1%
0_0402_5%
2 1 PC911 PR913
[9] VCC_AXG_SENSE

2
@ 8.25K_0402_1%
short@ 1000P_0402_50V7K 5.76K_0402_1%

1
PR917 PC912 PH901

PR915
0_0402_5% 1000P_0402_50V7K
CSREFA [48]

1
2 1 100K_0402_1%_TSM0B104F4251RZ
[9] VSS_AXG_SENSE +5VS

PR916
short@

1
+3VS 1 2

TRBSTA#

DROOPA

TSENSEA
COMPA
+1.05VS

CSP1A
IMONA
FBA
PC913

DIFFA

ILIMA
1
.1U_0402_16V7K
PR918 PR919
10K_0402_1% 25.5K_0402_1%
PR920 1 2 PUT COLSE
2_0603_5%

61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
TO V_GT
2
+5VS 1 2 PU901
VR_RDYA
HOT SPOT

VSNA
VSPA
DIFFA

FBA
COMPA
IOUTA
ILIMA
DROOPA
CSCOMPA
CSSUMA
CSREFA
CSP2A
CSP1A
TSNSA
PAD

TRBSTA#
PC914
1 2 6132_VCC PR921 PC915
.1U_0402_16V7K

.1U_0402_16V7K

1 45 0_0603_5% 0.22U_0603_25V7K
PC916 2.2U_0603_10V7K 2 VCC PWMA 44 BSTA1 1 2 BSTA1_11 2
C VDDBP BSTA C
130_0402_1%

54.9_0402_1%

PC917 VR_RDYA 3 43
VRDYA HGA HG1A [48]
1

PR924 1 2VR_ON_CPU 4 42
[34] VR_ON EN SWA SW1A [48]
PR922

PR923

0_0402_5% short@ VR_SVID_DAT1 5 41


SDIO LGA LG1A [48]
PR926 VR_SVID_ALRT# 6 40
2

PR928 10K_0402_1% VR_SVID_CLK 7 ALERT# BST2 39


95.3K_0402_1% 1 2 VBOOT 8 SCLK HG2 38 PC919
1

2 1VR_SVID_DAT1 1 2 ROSC_CPU 9 VBOOT NCP6132AMNR2G_QFN60_7X7 SW2 37 2.2U_0603_10V7K


[8] VR_SVID_DAT ROSC LG2
short@ CPU_B+ 1 2 VRMP 10 36 6132P_VCCP 1 2
[8] VR_SVID_ALRT# VRMP PVCC
VR_HOT# 11 35
[8] VR_SVID_CLK VRHOT# PGND
0.01U_0402_25V7K

PR929 VGATE 12 34 1 2
VRDY LG1 LG1 [48] +5VS
1

PR927 1K_0402_1% 13 33 PR931 0_0402_5% short@


+1.05VS VSN SW1 SW1 [48]
0_0402_5% 14 32
+3VS VSP HG1 HG1 [48]
PC920 DIFF_CPU 15 31 BST1 1 2 BST1_1 1 2

CSCOMP
2

DIFF BST1

TRBST#

DROOP

CSSUM

DRVEN
CSREF
1

COMP

TSNS
PR932 PC921

CSP3
CSP2
CSP1

PWM
IOUT
ILIM
1

PR933 0_0603_5% 0.22U_0603_25V7K

FB
75_0402_1% PR934
10K_0402_5%

16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
2

[34,41] VR_HOT#
2

PR937 PR935

FB_CPU
TRBST#
[14] VGATE

COMP_CPU
0_0402_5% 26.1K_0402_1%

DROOP

TSENSE
ILIM_CPU
2 1 VSN 1 2
[8] VSSSENSE
1

short@
PR938 PC922
0_0402_5% 1000P_0402_50V7K
2

2 1 VSP
[8] VCCSENSE

2
short@ 1 2 PC923
PC924 IMVP_IMON .1U_0402_16V7K

11.8K_0402_1%
PR940 10P_0402_50V8J
1K_0402_1% CSP1 TSENSE
1 2 2 1
+5VS
1
PR939

B PR942 PC926 B
10_0402_1% 680P_0402_50V7K
PR944 PC928 1 2FB_CPU1 1 2 2 1COMP_CPU1 2 1
10_0402_1% 0.033U_0402_16V7 PR901
CSREF [48]

@ 8.25K_0402_1%
1 2FB_CPU3 2 1 PR943 PC927 5.76K_0402_1%

2
6.04K_0402_1% 2200P_0402_50V7K CSP1 1 2
SWN1 [48]
CSCOMP

1
PH903

PR945
PC929 PC930
TRBST# 1 2 FB_CPU2 1 2 1000P_0402_50V7K 0.047U_0402_16V7K 100K_0402_1%_TSM0B104F4251RZ
1

2
CSREF

1
2

PR946 PR947
10K_0402_1% PC931 866_0402_1%
0.033U_0402_16V7 CSSUM
1

1 2 PC932
24.9K_0402_1%

.1U_0402_16V7K

1200P_0402_50V7K
PUT COLSE
2

TO VCORE
PC933

2 1 PC934 1 2 SWN1
560P_0402_50V7K
PR949

HOT SPOT
1

PR948
PR953 PC935 1 2NTC_PH201 1 2 107K_0603_1%
1

910_0402_1% 1000P_0402_50V7K
PR951 PR952
CSCOMP 1 2 DROOP 1 2 CSREF 75K_0402_1% 165K_0402_1%
PUT COLSE
2 1
TO VCORE PH904
Phase 1 220K_0402_5%_ERTJ0EV224J
Inductor

[34] IMVP_IMON
A A

AMY WEN Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/12/01 Deciphered Date 2010/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-CPU_CORE
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom C38 Chief River Schematic 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 04, 2012 Sheet 47 of 50
5 4 3 2 1
5 4 3 2 1

CPU_B+

10U_0805_25V6K

10U_0805_25V6K
68P_0402_50V8J

0.1U_0402_25V6

2200P_0402_25V7K
5

1
PC1017

PC1005

PC1002

PC1003

PC1004
2

2
4 B+
[47] HG1
PL1002
PQ1002 HCB4532KF-800T90_1812
1 2
CPU_B+
TPCA8065-H_PPAK56-8-5

3
2
1
D D
1 1 1 1 1 1

@ 33U_D_25VM_R60M

@ 33U_D_25VM_R60M

@ 33U_D_25VM_R60M
68U_25V_M_R0.36

68U_25V_M_R0.36

68U_25V_M_R0.36
Choke PN:SH00000JX00 +CPU_CORE + + + + + +
DCR=1.33~1.396m ohm

PC1010

PC1020

PC1021

PC1022

PC1023

PC1024
PL1001
0.36UH_PCMB103T-R36MS1R335_23A_20% 2 2 2 2 2 2

1 4
[47] SW1

1
2 3
5

5
PR1004
4.7_1206_5%

2
CSREF [47]

1SNUB_CPU1
4 4
[47] LG1
PQ1001 PQ1003

TPCA8057-H_PPAK56-8-5 TPCA8057-H_PPAK56-8-5
SWN1 [47] ULV 17W CPU
3
2
1

3
2
1
PC1001
@ VID1=0.9V
680P_0603_50V7K
IccMax=33A

2
Icc_Dyn=28A
Icc_TDC=16A
R_LL=2.9m ohm

C C

CPU_B+
10U_0805_25V6K

10U_0805_25V6K

68P_0402_50V8J
0.1U_0402_25V6

2200P_0402_25V7K
1

1
PC1012

PC1013

PC1014

PC1015

PC1019
2

2
5

B B

4
[47] HG1A
PQ1005
Choke PN:SH00000JX00
DCR=1.33~1.396m ohm
TPCA8065-H_PPAK56-8-5 PL1004 +VCC_GFXCORE_AXG
3
2
1

0.36UH_PCMB103T-R36MS1R335_23A_20%

1 4
[47] SW1A
1

2 3
5

PR1008
4.7_1206_5%
2

4
[47] LG1A
SNUB_GFX1

PQ1006
ULV GT2
TPCA8057-H_PPAK56-8-5 CSREFA [47] VID1=1.23V
3
2
1

IccMax=33A
1

PC1016 Icc_Dyn=20.2A
680P_0603_50V7K SWN1A [47]
Icc_TDC=21.5A
2

R_LL=3.9m ohm

A A

AMY WEN Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2009/12/01 Deciphered Date 2010/12/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-CPU_CORE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom C38 Chief River Schematic 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 04, 2012 Sheet 48 of 50
5 4 3 2 1
5 4 3 2 1

+CPU_CORE
+CPU_CORE +VCC_GFXCORE_AXG
1

1
D
PC1101 PC1102 PC1103 PC1104 PC1105 D
2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M +VCC_GFXCORE_AXG
2

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M
1 1 1 1 1 1 1

PC1112

PC1113

PC1114

PC1115

PC1116

PC1117

PC1118
1

1
PC1107 PC1108 PC1109
2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2.2U_0402_6.3V6M 2 2 2 2 2 2 2
2

2 2011_0808 place power name


@ @ change form +V1.05S_VCCP +1.05VS
to +1.05VS
+1.05VS

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M
1 1 1 1 1 1 1

1
PC1136

PC1137

PC1138

PC1139

PC1140

PC1131

PC1132

PC1133

PC1134
PC1127

PC1128

PC1129

PC1130
2

2
2 2 2 2 2 2 2
10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M
1

1
PC1143

PC1178

PC1183

PC1184

PC1185

PC1186

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

10U_0603_6.3V6M
1

1
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

PC1125

PC1149

PC1150

PC1151

PC1152

PC1153

PC1154

PC1155

PC1156
2

1
PC1212

PC1213

PC1214

PC1215

2
2

2
C C

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
1

1
PC1126

PC1194

PC1173

PC1174

PC1187

PC1191

PC1192

PC1193
1 1

330U_D2_2V_Y

330U_D2_2V_Y
+ +

PC1157

PC1158

2
+CPU_CORE
2 2
1 1 1 1 1 1
1
PC1120 PC1121 PC1122 PC1123 PC1124 PC1176

330U_V_2.5VM_R6M
22U_0805_6.3V6M +

PC1161
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M
2 2 2 2 2 2

1 1 1 1 1 1
PC1144 PC1145 PC1146 PC1147 PC1148 PC1180 2011_0815 PC714 change place
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M form "+1.05VS_VCCPP" to "+1.05VS"
@
2 2 2 2 2 2
10U_0603_6.3V6M

10U_0603_6.3V6M

1 1 1 1
1

1
PC1165

PC1179

B PC1160 PC1162 PC1163 PC1164 B


22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M
2

2 2 2 2

@ @
10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M
1

1
PC1166

PC1167

PC1168

PC1169
2

+CPU_CORE @ @

1 PC1170 1 1 PC1172
330U_X_2VM_R6M 330U_X_2VM_R6M
+ + +

PC1171
2 2 330U_X_2VM_R6M 2

A A

AMY WEN Security Classification


2008/09/15
Compal Secret Data
2009/09/15 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR - PROCESSOR DECOUPLING
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-8261P_SDV 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Thursday, October 04, 2012 Sheet 49 of 50
5 4 3 2 1
5 4 3 2 1

Version change list (P.I.R. List) Page 1 of 1


for PWR
Item Reason for change PG# Modify List Date Phase

1 NCP6132A update SPEC P47 Remove PR916, PR945 2012/06/05


D D

2 Thermal verfy PH1 setting point P41 Change PR208 value to 18.2K 2012/06/08

3 ME demand : Keyboard assembly issue P44 Change PL401, PL402 to High=2.4mm (SH00000H200) 2012/06/08

4 Noise is PASS, Don't need 33u CAP P48 Remove PC1023, PC1024 2012/06/08

C C
9

10

11

12

13

14

B B

15

16

17
A A

AMY WEN Security Classification


2009/01/06
Compal Secret Data
2009/01/06 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PIR (PWR)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C38 Chief River Schematic
Date: Thursday, October 04, 2012 Sheet 50 of 50
5 4 3 2 1

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