ECE 4104 Lab 4 A

ELECTRICAL AND ELECTRONICS ENGINEERING DEPARTMENT
COLLEGE OF ENGINEERING
CENTRAL PHILIPPINE UNIVERSITY
JARO, ILOILO CITY, PHILIPPINES
0063-33-3291971 TO 79 local 1086
ECE 4104
INTEGRATED CIRCUIT
LOGICS
LABORATORY MANUAL
Joshua P. Adorador
Rica Angela P. Mandap
Rodgie Ian P. Saloma
BSECE-4
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MULTIPLEXER/DEMULTIPLEXER
I. OBJECTIVES
1. To demonstrate a basic Multiplexer / Demultiplexer system and become familiar with different
types of multiplexer and demultiplexer.
2. To describe the action of logic gates and recognize its dynamic principles, operations and
functions.
II. COMPONENTS AND EQUIPMENTS REQUIRED

IC 74VHC153 , logic trainer kit, power supply, connecting wires and Breadboard etc.
III. BASIC THEORY

The Multiplexer
Multiplexing is the generic term used to describe

the operation of sending one or more analogue or digital
signals over a common transmission line at different times
or speeds and as such, the device we use to do just that is
called a Multiplexer.
The multiplexer, shortened to MUX or MPX, is a

combinational logic circuit designed to switch one of
several input lines through to a single common output line
by the application of a control signal. Multiplexers operate
like very fast acting multiple position rotary switches
Figure 1 Simple Multiplexer
connecting or controlling multiple input lines called
channels one at a time to the output.
Multiplexers, or MUXs, can be either digital circuits made from high speed logic gates used
to switch digital or binary data or they can be analogue types using transistors, MOSFETs or relays
to switch one of the voltage or current inputs through to a single output.
The most basic type of multiplexer device is that of a one-way rotary switch.
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Basic Multiplexing Switch
The rotary switch, also called a wafer

switch as each layer of the switch is known
as a wafer, is a mechanical device whose
input is selected by rotating a shaft. In other
words, the rotary switch is a manual switch
that you can use to select individual data or
signal lines simply by turning its inputs ON
or OFF. So how can we select each data
input automatically using a digital device.
In digital electronics, multiplexers
Figure 2 Basic Multiplexing Switch are also known as data selectors because
they can select each input line, are
constructed from individual Analogue Switches encased in a single IC package as opposed to the
mechanical type selectors such as normal conventional switches and relays.
They are used as one method of reducing the number of logic gates required in a circuit
design or when a single data line or data bus is required to carry two or more different digital signals.
Generally, the selection of each input line in a multiplexer is controlled by an additional set of
inputs called control lines and according to the binary condition of these control inputs, either HIGH
or LOW the appropriate data input is connected directly to the output. Normally, a multiplexer has
an even number of 2N data input lines and a number of control inputs that correspond with the
number of data inputs.
4-to-1 Channel Multiplexer
The Boolean expression for this 4-to-1 Multiplexer above with inputs A to D and data select
lines a, b is given as:
Q = abA + abB + abC + abD

In this example at any one instant in time only ONE of the four analogue switches is closed,
connecting only one of the input lines A to D to the single output at Q. As to which switch is closed
depends upon the addressing input code on lines a and b, so for this example to select input B to
the output at Q, the binary input address would need to be a = logic 1 and b = logic 0.
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Figure 3 4-to-1 Channel Multiplexer Figure 4 Logic Diagram for Dual 4-Input Multiplexer
Multiplexer Input Line Selection
Figure 5 Input Line Selection
Adding more control address lines will allow the multiplexer to control more inputs but each
control line configuration will connect only ONE input to the output.
Then the implementation of the Boolean expression above using individual logic gates would
require the use of seven individual gates consisting of AND, OR and NOT gates.
Multiplexers are not limited to just switching a number of different input lines or channels to
one common single output. There are also types that can switch their inputs to multiple outputs and
have arrangements or 4-to-2, 8-to-3 or even 16-to-4 etc.
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74VHC153: Dual 4-Input Multiplexer
The VHC153 is an advanced high-speed CMOS device fabricated with silicon gate CMOS
technology. It achieves the high-speed operation similar to equivalent Bipolar Schottky TTL while
maintaining the CMOS low power dissipation. The VHC153 is a high-speed Dual 4-Input Multiplexer
with common select inputs and individual enable inputs for each section. It can select two lines of
data from four sources. The two buffered outputs present data in the true (non-inverted) form. In
addition to multiplexer operation, the VHC153 can act as a function generator and generate any two
functions of three variables. An input protection circuit insures that 0V to 7V can be applied to the
input pins without regard to the supply voltage. This device can be used to interface 5V to 3V
systems and two supply systems such as battery backup. This circuit prevents device destruction due
to mismatched supply and input voltages.
Figure 7 Pin Description

Figure 6 Connection Diagram
Figure 8 Logic Symbol
Functional Description
The VHC153 is a dual 4-input multiplexer. It can select two bits of data from up to four sources
under the control of the common Select inputs (S0, S1). The two 4-input multiplexer circuits have
individual active-LOW Enables (Ea,Eb) which can be used to strobe the outputs independently. When
the Enables (Ea, Eb) are HIGH, the corresponding outputs (Za, Zb) are forced LOW. The VHC153 is
the logic implementation of a 2-pole, 4-position switch, where the position of the switch is
determined by the logic levels supplied to the Select inputs. The logic equations for the outputs are
shown.
Za = Ea (I0a S1 S0 + I1a S1 S0 + I2a S1 S0+ I3a S1 S0)
Zb = Eb (I0b S1 S0 + I1b S1 S0 + I2b S1 S0+ I3b S1 S0)
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The Demultiplexer
The data distributor, known more commonly as

a Demultiplexer or Demux for short, is the exact
opposite of the Multiplexer.
The demultiplexer takes one single input data line

and then switches it to any one of a number of individual
output lines one at a time. The demultiplexer converts a
serial data signal at the input to a parallel data at its
output lines
Figure 9 Simple Demultiplexer
Demultiplexer Output Line Selection
Figure 10 Output Line Selection
Like the multiplexer circuit, adding more address line inputs it is possible to switch more
outputs giving a 1-to-2n data line outputs.
Some standard demultiplexer ICs also have an additional enable output pin which
disables or prevents the input from being passed to the selected output. Also some have latches built
into their outputs to maintain the output logic level after the address inputs have been changed.
However, in standard decoder type circuits the address input will determine which single data output
will have the same value as the data input with all other data outputs having the value of logic 0.
The implementation of the Boolean expression above using individual logic gates would
require the use of six individual gates consisting of AND and NOT gates.
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Figure 12 Logic diagram (one

decoder/demultiplexer)
Figure 11 4 Channel Demultiplexer using
Logic Gates
Figure 13 Pin Configuration
Figure 14 Pin Description for Demultiplexer
74HCT139 Dual 2-to-4 Line Decoder/Demultiplexer
The 74HC139; 74HCT139 decodes two binary weighted address inputs (nA0, nA1) to four
mutually exclusive outputs (nY0 to nY3). Each decoder features an enable input (nE). When nE is
HIGH all outputs are forced HIGH. The enable input can be used as the data input for a 1-to-4
demultiplexer application. Inputs include clamp diodes. This enables the use of current limiting
resistors to interface inputs to voltages in excess of VCC.
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IV. PRELAB
Truth Table K-Map Using single gate
S0 I1 I0 Y 0 1
0 0 0 0 Y=S0I1 + S0I0
00
0 0 1 0 01 1 1 Using NAND gate
0 1 0 1
11 1
0 1 1 1
1 0 0 0
10 1 Y=(S0I1)(S0I0)
1 0 1 1
1 1 0 0
1 1 1 1
ACTUAL
000 001 010

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011 100 101
011 011
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V. SCHEMATIC DIAGRAM
A. MULTIPLEXER
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B. DEMULTIPLEXER
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VI. PROCEDURE
MULTIPLEXER
1. Make a circuit diagram that will constitute as true to the truth table of the Multiplexer.
(*The circuit diagram is represented at the RESULTS AND DISCUSSON.)
2. Evaluate the design. Use the truth table as guide for evaluation. (***note: HIGH = ON, LOW = OFF)
a. Setting So, S1, I0 I3 as Dont Care, and as High (logic 1/ ON), observe the response of the
output.
HIGH LOW
(***NOTE: For Procedures 2b 2i, the Enable is at LOW state.)
b. Turn OFF all the switches and record the output response.
HIGH LOW
c. Turn ON I0 with the remaining inputs still OFF. What happens to the LED indicator?
HIGH __ LOW
d. Turn OFF I1 then turn ON S0. Remaining switches are still at LOW state. Record the feedback
at the output.
HIGH LOW
e. Turn ON S0 and I1 and turn off S1. Observe what happens to the LED indicator.
HIGH __ LOW
f. Turn ON S1 While S0 and I2 are OFF. Record the response of the LED indicator.
HIGH LOW
g. Turn ON S1. Let the remaining inputs (S0, and I2) at LOW state. What is the feedback?
HIGH __ LOW
h. While turning OFF the input I3, set the remaining inputs (S0, and S1) at HIGH state. What is
response of the LED indicator?
HIGH LOW
i. Turn on all the Switches. Record the output response. (***note: The Enable is still at LOW state).
HIGH __ LOW
3. Analyze and compare the results to the truth table for the Multiplexer. Did your outputs agree
to the given Truth Table? If not, reanalyze your circuit and redo the procedures above.
(answer). Yes. The outputs agreed with the given truth table.
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DEMULTIPLEXER
1. Make a circuit diagram that will constitute as true to the truth table of the Demultiplexer.
(The circuit diagram is represented at the RESULTS AND DISCUSSON.)
2. Evaluate the design. Use the truth table as guide for evaluation. (***note: HIGH = ON, LOW = OFF)
a. Set the Enable at HIGH and the other inputs as Dont Care. Mark the indicators that
are/is at HIGH state (ON/Logic 1).
Y0__ Y1__ Y2__ Y3__
(***note: For procedures 2b- 2e, the Enable is at LOW state.)
b. Set all inputs at LOW. Mark the indicators that are/is at HIGH state (ON/Logic 1).
Y0__ Y1__ Y2__ Y3__
c. Turn OFF input A1 and Turn ON A2. Mark the indicators that are/is at HIGH state (ON/Logic
1).
Y0__ Y1__ Y2__ Y3__
d. Reverse the state of the inputs at Procedure 2c. Mark the indicators that are/is at HIGH
state (ON/Logic 1).
Y0__ Y1__ Y2__ Y3__
e. Turn ON both switches. Mark the indicators that are/is at HIGH state (ON/Logic 1).
Y0__ Y1__ Y2__ Y3__
3. Analyze and compare the results to the truth table for the Multiplexer. Did your outputs agree
to the given Truth Table? If not, reanalyze your circuit and redo the procedures above.
(answer). Yes. The outputs agreed with the given truth table for the demux.
(***note: The Legends for the Procedure can be found at RESULTS AND DISCUSSONS.)
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VII. RESULTS AND DISCUSSION
A. ACTUAL
Multiplexer
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LEGEND:
SW 1 = So
SW 2 = S1
SW 3 = Io , I1
SW 4 =
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
**Note: SW(1) SW(4) is labeled from top to bottom
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Demultiplexer
LEGEND:
SW 1 =
SW 2 = A1
SW 3 = A0
LIGHT 1 = 0
LIGHT 2 = 1
LIGHT 3 = 2
LIGHT 4 = 3
H = HIGH voltage level
L = LOW voltage level
X = dont care
**Note: SW(1) SW(4) is labeled from top to bottom
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B. SIMULATION
Multiplexer
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Demultiplexer
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Truth Table for Multiplexer
Truth Table for Demultiplexer
Results From the truth tables it can be concluded that the multiplexer will output the input
of the selected line that has been selected with the selection lines. To contrast this, the
demultiplexer outputs to the line selected by the selection lines. Circuits using minimal logic can be
created by finding the minimal realization of the inputs to the multiplexer and implementing this
design.
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OBSERVATION
In this chapter, the researchers are introduced to the properties of a Multiplexer and
Demultiplexer. It is known that a Multiplexer is a combinational circuit which can switch one of the
several input lines (2n) to a single output line. While a Demultiplexer (Demux) is the inverse of
Multiplexer (Mux) which transmits a several outputs into a single input line.
A digital multiplexer has 16 pins all together. Each side of the circuit can select two different
lines of data. The left side is called side A; the right side is called side B. Each side is given with 4
data inputs, 1 select input, 1 enable input, and 1 output. The IC is also provided with a VCC and
ground Pins.
Pin 16 is called the VCC, this is where we connect the input voltage. Pin 8 is the Ground; this
is where we connect to ground the circuit. In side A, pins 3-6 are the data inputs, pin 2 is the select
input (S0), pin 1 is the enable input, and pin 7 is the output pin of side A. At side B, pins 10-13 are
the data inputs, pin 14 is the select input, pin 15 is the enable input, and pin 9 is the output on side B.
A multiplexers truth table is much more complicated than the previous ICs that has been
encountered. It is due to advanced high-speed CMOS device fabricated with silicon gate CMOS
technology. Looking at its truth table, dont care conditions are used. Meaning, only one data input
line is used and will only receive an output if and only if this date input is in high state.
There are four ways to have an output in Multiplexers. This are; only when 2 select inputs are
low, enable input is low, input data I0 is high and the rest data inputs are in dont care state; when
select input S0 is in high, select input S1 is in low, Enable input is low, input data I1 is in high, and
the rest data inputs are dont care; when selects inputs S1 and input data I2 is in high, select inputs
S0 and enable input is low, and the rest leaving the rest input datas dont care; lastly when two
select inputs are high, low enable input, high input data I3, and the rest input datas are dont care.
In this truth table, one can see that four input data are switched simultaneously. Either one of
the data inputs could be used to gain an output data. Combining these with the select and enable
inputs which serves as the switch of the circuit.
De-multiplexers is a device that takes a single input line and routes it to one of several digital
output lines. It is basically the inverse of the multiplexer. A demuxs truth table is a random
combination of inputs that gives four outputs. These 3 inputs which is the basis of our outputs are
the enable inputs, and address inputs 1 and 2.
Switching the enable input to high and making the two address inputs in a dont care state
will make all outputs high. Considering all inputs are low will leave the output O0 and the rest high.
Only when the address input A0 is high and two inputs are low will make output O1 low and the rest
outputs high. Now the combinations enable input and address input A0 low, and address input A1
high will make output O2 low and the rest of the outputs high. Two address inputs at high and enable
input at low will make output O3 low and the rest high.
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CONCLUSION
In the large-scale-digital systems, a single line is required to carry on two or more digital
signals consequently, it sometimes need to have many outputs coming from a single output. This is
the work of the Multiplexer and Demuliplexer.
Multiplexer means many into one. A multiplexer is a circuit used to select and route any one
of the several input signals to a singlel output. In simple words, it is a device that has multiple inputs
and a single line output. The select lines determine which input is connected to the output, and also
to increase the amount of data that can be sent over a network within certain time. It is also called a
data selector. Multiplexers are capable of handling both analog and digital applications. In analog
applications, multiplexers are made up of relays and transistor switches, whereas in digital
applications, the multiplexers are built from standard logic gates. When the multiplexer is used for
digital applications, it is called a digital multiplexer. The digital multiplexer is a circuit with many
input but only one output. By applying control signals, we can steer any input to the output. Few
types of multiplexer are 2-to-1, 4-to-1, 8-to-1, 16-to-1 multiplexer by which 4-to-1 multiplexer is used
in this experiment.
Another type of device used in this experiment is the demultiplexer. Demultiplexer means one
to many. A demultiplexer is a circuit with one input and many output. By applying control signal, we
can steer any input to the output. Few types of demultiplexer are 1-to 2, 1-to-4, 1-to-8 and 1-to 16
demultiplexer. Again, we used the 1-to-4 DMUX for the other half duration of the experiment. As a
single input, multiple output device, DMUX is used to send a signal to one of the many devices. The
main difference between a multiplexer and a de-multiplexer is that a multiplexer takes two or more
signals and encodes them on a wire, whereas a de-multiplexer does reverse to what the multiplexer
does.
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SYNTHESIS
In this laboratory, we used two ICs namely the 74VHC153 (Dual 4-Input Multiplexer) and the
74HC/HCT139 Dual 2-to-4 line Decoder/Demultiplexer. A multiplexer is a combinational circuit that
selects binary information from one of many input lines and directs it to a single output line. The
selection of particular input line is controlled by a set of selection lines. Normally, there are 2 n input
lines and n selection lines whose bit combinations determine which input is selected. A multiplexor
can be used to implement minterms of Boolean function by the way of the multiplexer selection
inputs. The individual minterms can be selected by the data inputs, thereby providing a method of
implementing a Boolean function of n variables with a multiplexer that has n selection inputs and 2 n
data inputs, one for each minterms.
It is not necessary to use only discrete gates (AND, OR, NAND, NOR, EXOR, EXNOR) in the
design of the combinational logic circuit, with the availability of the medium scale integrated (MSI)
and large scale integrated (LSI), it is possible to design a very complicated circuits with a simple
procedure, for example it is waste of time in most cases to try to minimize combinational logic circuit
which has eight input using tabular method, while it will simpler if we used multiplexers. A
multiplexer is a network that has many inputs and one output, and the value of the output will be the
value of one of inputs which will be decided by some select lines.
Multiplexers are switching circuits that just switch or route signals through themselves, and
being a combinational circuit they are memoryless as there is no signal feedback path. The
multiplexer is a very useful electronic circuit that has uses in many different applications such as
signal routing, data communications and data bus control applications.
Multiplexers can also be used to switch either analogue, digital or video signals, with the
switching current in analogue power circuits limited to below 10mA to 20mA per channel in order to
reduce heat dissipation.
A demultiplexer basically reverses the multiplexing function. It takes data from one line and
distributes them to given number of output lines. In a one to four line demultiplexer circuit, the input
data line goes to all of the AND gates. The two select lines enable only one gate at a time and the
data appearing on the input line will pass through the selected gate to the associated output line
24

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ELECTRICAL AND ELECTRONICS ENGINEERING DEPARTMENT

II. COMPONENTS AND EQUIPMENTS REQUIRED

III. BASIC THEORY

Multiplexing is the generic term used to describe

The multiplexer, shortened to MUX or MPX, is a

Basic Multiplexing Switch

The rotary switch, also called a wafer

4-to-1 Channel Multiplexer

Q = abA + abB + abC + abD

Multiplexer Input Line Selection

Figure 5 Input Line Selection

74VHC153: Dual 4-Input Multiplexer

Figure 7 Pin Description

The data distributor, known more commonly as

The demultiplexer takes one single input data line

Figure 9 Simple Demultiplexer

Demultiplexer Output Line Selection

Figure 10 Output Line Selection

Figure 12 Logic diagram (one

Figure 14 Pin Description for Demultiplexer

74HCT139 Dual 2-to-4 Line Decoder/Demultiplexer

Truth Table K-Map Using single gate

000 001 010

011 100 101

(***NOTE: For Procedures 2b 2i, the Enable is at LOW state.)

(***note: For procedures 2b- 2e, the Enable is at LOW state.)

VII. RESULTS AND DISCUSSION

Truth Table for Multiplexer

Truth Table for Demultiplexer

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