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JFET Characteristics

Objective
i. To investigate the drain characteristics of JFET.
ii. To investigate the transfer characteristics of JFET.

Theory:
A transistor is a linear semiconductor device that controls current with the application of a
lower-power electrical signal. Transistors may be roughly grouped into two major
divisions: bipolar and field-effect. All field-effect transistors are unipolar rather
than bipolar devices. That is, the main current through them is comprised either of electrons
through an N-type semiconductor or holes through a P-type semiconductor.
JFET consists of a doped Si or GaAs bar. There are ohmic contacts, the two ends of the bar and
semiconductor junction on its two sides. If the semiconductor bar is n-type, the two sides of the
bar is heavily doped with p - type impurities and this is known as n - channel JFET.
On the other hand if the semiconductor bar is p- type, the two sides of the bar is heavily doped
with n - type impurities and this is known as p- channel JFET. When a voltage is applied
between the two ends, a current which is carried by the majority carriers of the bar flows along
the length of the bar. There are several terminals in JFET. The terminal through which the
majority carrier enter the bar and the terminal through which they leave are known as source (s)
and drain (D) respectively. The heavily doped region on the two sides is known as the gate (G).
In junction field effect transistor, the junction is a reverse biased. As a result, depletion regions
form, which extend to the bar. By changing gate to source voltage, the depletion width can be
controlled. So, the effective cross section area decreased with increasing reverse bias. So, the
drain current is a function of the gate to the source voltage.
N-channel JFET:

Current flows through the length of the n-type bar (channel) due to majority charge carries which
in this case are electrons. When a voltage is applied between the two ends, a current which is
carried by the majority carriers electrons flows along the length of a bar. The majority carriers
enter the bar through the source terminal and leave through the drain terminal. The heavily doped
regions of the n-type bar are known as the gates. The gate source junctions is reverse is biased as
a result depletion regions from which extend to the bar by changing gate to source voltage
effective cross sectional area decreases with the function of the gate to source voltage.

P-Channel JFET:

P-channel JFET consists of a p-type silicon or GaAs. Two sides of the bar is heavily doped with
n-type impurities. When a voltage is applied between the two ends, a current which is carried by
the majority carrier holes flow along the length of a bar. The gate source junction is reverse
biased as a result depletion regions form, which extend to the bar by changing gate to extend to
source voltage the depletion width can be controlled. The effective cross sectional area decreased
with increasing reverse bias, so the drain current is the function of the gate to source voltage.

Characteristics of JFETS:
There are two types of static characteristics viz
(1) Output or drain characteristic and
(2) Transfer characteristic.
1. Output or Drain Characteristic. The curve drawn between drain current Ip and drain-source
voltage VDS with gate-to source voltage VGS as the parameter is called the drain or output
characteristic. This characteristic is analogous to collector characteristic of a BJT:
(a) Drain Characteristic With Shorted-Gate. The circuit diagram for determining the drain
characteristic with shorted-gate for an N-channel JFET is given in figure. and the drain
characteristic with shorted-gate is shown in another figure.
Initially when drain-source voltage Vns is zero, there is no attracting potential at the drain, so no
current flows inspite of the fact that the channel is fully open. This gives drain current Ip = 0. For
small applied voltage Vna, the N-type bar acts as a simple semiconductor resistor, and the drain
current increases linearly with_the increase in Vds, upto the knee point. This region, (to the left
of the knee point) of the curve is called the channel ohmic region, because in this region the FET
behaves like an ordinary resistor.
With the increase in drain current ID, the ohmic voltage drop between the source and channel
region reverse-biases the gate junction. The reverse-biasing of the gate junction is not uniform
throughout., The reverse bias is more at the drain end than that at the source end of the channel,
so with the increase in Vds, the conducting portion of the channel begins to constrict more at the
drain end. Eventually a voltage Vds is reached at which the channel is pinched off. The drain
current ID no longer increases with the increase in Vds. It approaches a constant saturation value.
The value of voltage VDSat which the channel is pinched off (i.e. all the free charges from the
channel get removed), is called the pinch-off voltage Vp. The pinch-off voltage Vp, not too
sharply defined on the curve, where the drain current ID begins to level off and attains a constant
value. From point A (knee point) to the point B (pinch-off point) the drain current ID increases
with the increase In voltage Vds following a reverse square law. The region of the characteristic
in which drain current ID remains fairly constant is called the pinch-off region. It is also
sometimes called the saturation region or amplifier region. In this region the JFET operates as
a constant current device sincedrain current (or output current) remains almost constant. It is the
normal operating region of the JFET when used as an amplifier. The drain current in the pinch-
off region with VGS = 0 is referred to the drain-source saturation current, Idss).
It is to be noted that in the pinch-off (or saturation) region the channel resistance increases in
proportion to increase in VDS and so keeps the drain current almost constant and the reverse bias
required by the gate-channel junction is supplied entirely by the voltage drop across the channel
resistance due to flow of IDsg and not by the external bias because VGS = 0
Drain current in the pinch-of region is given by Shockleys equation
where ID is the drain current at a given gate-source voltage VGS, IDSS is the drain-current with
gate shorted to source and VGS (0FF) is the gate-source cut-off voltage.
If drain-source voltage, Vds is continuously increased, a stage comes when the gate-channel
junction breaksdown. At this point current increases very rapidly. and the JFET may be
destroyed. This happens because the charge carriers making up the saturation current at the gate
channel junction accelerate to a high velocity and produce an avalanche effect.

Drain Characteristics With External Bias:


The circuit diagram for determining the drain characteristics with different values of external
bias is shown in figure. and a family of drain characteristics for different values of gate-source
voltage VGS is given in next figure

External-Bias-Characteristic-of-JFET

It is observed that as the negative gate bias voltage is increased


(1) The maximum saturation drain current becomes smaller because the conducting channel now
becomes narrower.
(2) Pinch-off voltage is reached at a lower value of drain current ID than when VGS = 0. When
an external bias of, say 1 V is applied between the gate and the source, the gate-channel
junctions are reverse-biased even when drain current, ID is zero. Hence the depletion regions are
already penetrating the channel to a certain extent when drain-| source voltage, VDS is zero. Due
to this reason, a smaller voltage drop along the channel (i.e. smaller than that for VGS = 0) will
increase the depletion regions to the point where 1 they pinch-off the current. Consequently, the
pinch-off voltage VP is reached at a lower 1 drain current, ID when VGS = 0.
(3) The ohmic region portion decreases.
(4) Value of drain-source voltage VDS for the avalanche breakdown of the gate junction is
reduced.
Value of drain-source voltage, VDS for breakdown with the increase in negative bias voltage is
reduced simply due to the fact that gate-source voltage, VGS keeps adding to the I reverse bias at
the junction produced by current flow. Thus the maximum value of VDS I that can be applied to
a FET is the lowest voltage which causes avalanche breakdown. It is also observed that with
VGS = 0, ID saturates at IDSSand the characteristic shows VP = 4 V. When an external bias of
1 V is applied, the gate-channel junctions still require -4 V to achieve pinch-off. It means that a 3
V drop is now required along the channel instead of the previous 4.0 V. Obviously, this drop of 3
V can be achieved with a lowervalue of drain current, Similarly when VGS = 2 V and 3 V,
pinch-off is achieved with 2 V and 1 V respectively, along the channel. These drops of 2 V and 1
V are, of course, achieved with further reduced values of drain current, ID. It is further observed
that when the gate-source bias is numerically equal to pinch-off voltage, VP (-4 V in this case),
no channel drop is required and, therefore, drain current, ID is zero. The gate-source bias voltage
required to reduce drain current, ID to zero is designated the gate-source cut-off voltage,
VGS /0FF) and, as explained,
Hence for working of JFET in the pinch-off or active region it is necessary that the following
conditions be fulfilled.
VP < VDS < VDS (max)
VGS (OFF)< VGS < 0

0 < ID < IDSS

2. Transfer Characteristic of JFET


The transfer characteristic for a JFET can be determined experimentally, keeping drain-source
voltage, VDS constant and determining drain current, ID for various values of gate-source voltage,
VGS. The circuit diagram is shown in fig. . The curve is plotted between gate-source voltage,
VGS and drain current, ID, as illustrated in fig. It is similar to the transconductance
characteristic of a vacuum tube or a transistor. It is observed that
(i) Drain current decreases with the increase in negative gate-source bias
(ii) Drain current, ID = IDSS when VGS = 0
(iii) Drain current, ID = 0 when VGS = VD The transfer characteristic follows equation (9.1)
The transfer characteristic can also be derived from the drain characteristic by noting
values of drain current, IDcorresponding to various values of gate-source voltage, VGS for a
constant drain-source voltage and plotting them.
It may be noted that a P-channel JFET operates in the same way and have the similar
characteristics as an N-channel JFET except that channel carriers are holes instead of electrons
and the polarities of VGS and VDS are reversed.
Circuit diagram in proteus:

Audio power ampliflier:


An audio power amplifier (or power amp) is an electronic amplifier that strengthens low-power,
inaudible electronic audio signals such as the signal from radio receiver or electric
guitar pickup to a level that is strong enough for driving (or
powering) loudspeakers or headphones.

Gain of an ampliflier;
The gain of an amplifier is defined as the measure this ability of amplifying a signal. Gain is a
ratio so it does not have any unit. The ratio of output current to input current of an amplifier is
defined as current gain, the ratio of output voltage to input voltage is defined as voltage gain and
similarly the ratio of output power to input power of an amplifier is known as power gain of
amplifier.

Gain(Av)=Vout/Vin
Efficiency of an ampliflier:
Effieciency always refer to the ratio of power out by power in.
n=Pout/pin

Bandwidth of an amplifier:
The bandwidth represents the amount or "width" of frequencies, or the "band of frequencies,"
thatthe amplifier is MOST effective in amplifying. However, the bandwidth is NOT the same as
the band offrequencies that is amplified. The bandwidth (BW) of an amplifier is the difference
between thefrequency limits of the amplifier. For example, the band of frequencies for an
amplifier may be from 10kilohertz (10 kHz) to 30 kilohertz (30 kHz). In this case, the bandwidth
would be 20 kilohertz (20 kHz).As another example, if an amplifier is designed to amplify
frequencies between 15 hertz (15 Hz) and 20kilohertz (20 kHz), the bandwidth will be equal to
20 kilohertz minus 15 hertz or 19,985 hertz (19,985Hz).

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