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Training Manual

42PW350 Plasma
Pl Display
Di l

Advanced Single Scan Troubleshooting


42" Class HD 720p Plasma TV
(41.6" diagonally)

bli h d JJune 17th, 2011


Published
P
Updated September 06th, 2011
See last page for update information
TOPICS TO BE DISCUSSED
Preliminary:
Contact Information,, Preliminaryy Matters,, Specifications,
p ,
Plasma Overview, General Troubleshooting Steps,
Disassembly Instructions, Voltage and Signal Distribution
Troubleshooting:
Circuit Board Operation, Troubleshooting and Alignment of :
Switch Mode Power Supply Only RL_ON and M_On commands to SMPS
Y-SUS Board Delivers Y-Scan, Logic Signals and FG5V to Y-Drive board.
There is no VSC adjustment on this Y-SUS board.
The Y-SUS receives VS, M5V from the Z-SUS.
Y-Drive Board
Z-SUS
Z SUS Board Also uses one Z
Z-SUB
SUB board for bottom panel connector.
connector
Routes VA to the Z-SUB then to the bottom right X-Board.
Routes VS, M5V to the Y-SUS.
Control Board
2 X Drive Boards (Left and Right)
Main Board
Interconnect Diagram: 11X17 Foldout Section used as a quick reference sheet
sheet.

2 June 2011 42PW350 Plasma


Overview of Topics to be Discussed

42PW350 Plasma Display

The first section will cover Contact Information and Important Safety Precautions
for the Customers Safetyy as well as the Technician and the Equipment.
q p

Basic Troubleshooting Techniques which can save time and money sometimes
can be overlooked. These techniques will also be presented.

The next section will get the Technician familiar with the Disassembly, Identification
and Layout
y of the Plasma Displayy Panel.

At the end of this Section the Technician should be able to Identify the Circuit
Boards and have the ability and knowledge necessary to safely remove and
replace any Circuit Board or Assembly.

3 June 2011 42PW350 Plasma


LG Contact Information
Customer Service (and Part Sales) (800) 243-0000
Technical Support (and Part Sales) (800) 847-7597
USA Website (GSFS) http://gsfs-america.lge.com
Customer Service Website p g
http://www.us.lgservice.com
New: 2010/11 Wireless Ready
Knowledgebase Website http://lgtechassist.com Models Software Downloads

LG Web Training https://lge.webex.com Presentations with Audio/Video and


Screen Notations

http://136.166.4.200
LG CS Learning Academy http://ln.lge.com/ilearn Use http://LGLearn.com
User Name/Password required No User Name/Password

Training
T i i Manuals,
M l S
Schematics
h ti with
ith N
Navigational
i ti lBBookmarks,
k k StStart-Up
tU S Sequence, O
Owners
G
Guides,
id
Interconnect Diagrams, Dimensions, Connector IDs, Product Pictures and Features.
Also available on the Plasma Page:
PDP Panel Alignment Handbook,
Pl
Plasma Control
C t l Board
B d ROM Update
U d t (Jig
(Ji required)
i d)

Published June 2011 by LG Technical Support and Training


LG Electronics Alabama
Alabama, Inc
Inc.
201 James Record Road, Huntsville, AL, 35813.

4 June 2011 42PW350 Plasma


Preliminary Matters (The Fine Print) Page 1 of 2

IMPORTANT SAFETY NOTICE


The information in this training manual is intended for use by persons possessing an adequate
background in electrical equipment, electronic devices, and mechanical systems. In any attempt
to repair a major Product,
Product personal injury and property damage can result result. The manufacturer or
seller maintains no liability for the interpretation of this information, nor can it assume any
liability in conjunction with its use. When servicing this product, under no circumstances should
the original design be modified or altered without permission from LG Electronics. Unauthorized
modifications will not only void the warranty
warranty, but may lead to property damage or user injury
injury.
If wires, screws, clips, straps, nuts, or washers used to complete a ground path are removed for
service, they must be returned to their original positions and properly fastened.

CAUTION
To avoid personal injury, disconnect the power before servicing this product. If electrical power is
required for diagnosis or test purposes, disconnect the power immediately after performing the
necessary checks
checks. Also be aware that many household products present a weight hazard
hazard.
At least two people should be involved in the installation or servicing of such devices.
Failure to consider the weight of an product could result in physical injury.

5 June 2011 42PW350 Plasma


Preliminary Matters (The Fine Print) Page 2 of 2
ESD (Electrostatic Static Discharge)
Todays sophisticated electronics are electrostatic discharge (ESD) sensitive. ESD can weaken or damage
the electronics in a manner that renders them inoperative or reduces the time until their next failure.
Connect an ESD wrist strap to a ground connection point or unpainted metal in the product. Alternatively,
you can touch your finger repeatedly to a ground connection point or unpainted metal in the product. Before
removing a replacement part from its package, touch the anti
anti-static
static bag to a ground connection point or
unpainted metal in the product. Handle the electronic control assembly by its edges only. When
repackaging a failed electronic control assembly in an anti-static bag, observe these same precautions.

Regulatory
l Information
f
This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to
Part 15 of the FCC Rules. These limits are designed g to p
provide reasonable p
protection against
g harmful
interference when the equipment is operated in a residential installation. This equipment generates, uses,
and can radiate radio frequency energy, and, if not installed and used in accordance with the instruction
manual, may cause harmful interference to radio communications. However, there is no guarantee that
interference will not occur in a particular installation. If this equipment does cause harmful interference to
radio or television reception
reception, which can be determined by turning the equipment off and on on, the user is
encouraged to try to correct the interference by one or more of the following measures: Reorient or relocate
the receiving antenna; Increase the separation between the equipment and the receiver; Connect the
equipment to an outlet on a different circuit than that to which the receiver is connected; or consult the
dealer or an experienced radio/TV technician for help.

6 June 2011 42PW350 Plasma


Safety and Handling, Checking Points
Safety & Handling Regulations

1. Approximately 10 minute pre-run time is required before any adjustments are performed.
2. Refer to the Voltage Sticker inside the Panel when making adjustments on the Power Supply, Y-SUS and Z-SUS Boards.
3. Always adjust to the specified voltage level (+/- volt) unless otherwise specified.
4. Be cautious off electric shock from
f the PDP module since the PDP module uses high voltage, check that the Power Supply
S
and Drive Circuits are completely discharged because of residual current stored before Circuit Board removal.
4. C-MOS circuits are used extensively for processing the Drive Signals and should be protected from static electricity.
5. The PDP Module must be carried by two people. Always carry vertical NOT horizontal.
6. The Plasma television should be transported vertically NOT horizontally.
7. Exercise care when making voltage and waveform checks to prevent costly short circuits from damaging the unit.
8. Be cautious of lost screws and other metal objects to prevent a possible short in the circuitry.
9. New Panels and Frames are much thinner than p previous models. Be Careful with flexing
g these p
panels. Be careful
with lifting Panels from a horizontal position. Damage to the Frame mounts or panel can occur.
10. New Plasma models have much thinner cabinet assemblies and mounts.
Be extremely careful when moving the set around as damage can occur.

Checking Points to be Considered


1. Check the appearance of the Replacement Panel and Circuit Boards for both physical damage and part number accuracy.
2. Check the model label. Verify model names and board model matches.
3. Check details of defective condition and history. Example: Y-SUS or Y-Drive Board Failure, Mal-discharge on screen, etc.

7 June 2011 42PW350 Plasma


Basic Troubleshooting Steps

Define, Localize, Isolate and Correct

Define Look at the symptom carefully and determine what circuits could be causing the
failure. Use your senses Sight, Smell, Touch and Hearing. Look for burned parts and check
for p
possible overheated components.
p Capacitors
p will sometimes leak dielectric material and
give off a distinct odor. Frequency of power supplies will change with the load, or listen for
relay closing etc. Observation of the front Power LEDs may give some clues.

Localize After carefullyy checking g the symptom


y p and determining g the circuits to be checked
and after giving a thorough examination using your senses the first check should always be
the DC Supply Voltages to those circuits under test. Always confirm the supplies are not only
the proper level but be sure they are noise free. If the supplies are missing check the
resistance for p
possible short circuits.

Isolate To further isolate the failure, check for the proper waveforms with the
Oscilloscope to make a final determination of the failure. Look for correct Amplitude Phasing
and Timing g of the signals
g also check for the pproper
p Duty y Cycle
y of the signals.
g Sometimes
glitches or road bumps will be an indication of an imminent failure.

Correct The final step is to correct the problem. Be careful of ESD and make sure to
check the DC Supplies for proper levels. Make all necessaryy adjustments
j and lastly
y always
y
perform a Safety AC Leakage Test before returning the product back to the Customer.

8 June 2011 42PW350 Plasma


42PW350 PRODUCT INFORMATION SECTION

This section of the manual will discuss the specifications of the


42PW350 Advanced Single Scan Plasma Display Television.

9 June 2011 42PW350 Plasma


42PW350 Specifications

720P PLASMA HDTV


42" Class (41.6" diagonal)
3D Capable TV1
2D to 3D Conversion
TruSlim Frame
600Hz Max Sub Field Driving
For Full Specifications
High Definition Resolution
See the Specification Sheet
ENERGY STAR Qualified
Picture Wizard II
Intelligent Sensor
Smart
S tEEnergy S
Saving
i
ISFccc Ready

10 June 2011 42PW350 Plasma


42PW350 Logo Familiarization Page 1 of 3

HD RESOLUTION 720P HD R Resolution


l ti PiPixels:
l 1365 (H) 768 (V)
See and experience more. Pictures are sharper.
Colors are more vibrant. Entertainment is more real.
Everything looks better on an HDTV.

HDMI (1.3 Deep Color) Digital multi-connectivity


HDMI (1.3 Deep color) provides a wider bandwidth (340MHz,
10.2Gbps) than that of HDMI 1.2, delivering a broader range of colors,
y improves
and also drastically p the data-transmission speed.
p

Invisible Speaker
Personally tuned by Mr. Mark Levinson for LG
TAKE IT TO THE EDGE newly introduces Invisible
Invisible Speaker
Speaker system,
system
guaranteeing first class audio quality personally tuned by Mr. Mark
Levinson, world renowned as an audio authority. It provides Full Sweet
Spot and realistic sound equal to that of theaters with its Invisible
Speaker.
Dual XD Engine
Realizing optimal quality for all images
One XD Engine optimizes the images from RF signals as another XD
Engine optimizes them from External inputs. Dual XD Engine presents
images with optimal quality two times higher than those of previous
models.

11 June 2011 42PW350 Plasma


42PW350 Logo Familiarization Page 2 of 3

600Hz Sub Field Firing:


Capture every moment. Tired of streaky action or unclear plays during the
game? See sports, fast action and video games like never before. The 600Hz
refresh rate virtually eliminates motion blur.

3.000,000 : 1 Contrast Ratio


Stunning detail. No more worrying about dark scenes or dull colors.
The Mega Contrast ratio of 3,000,000:1 delivers more stunning colors and
deeper blacks than you can imagine.

TruSlim Design:
At less
l than
th 1" thick
thi k the
th new TruSlim
T Sli Frame
F trims
ti away distraction
di t ti without
ith t
compromising screen size.

USB 2.0:
View videos and photos and listen to music on your TV through USB 2.0.

12 June 2011 42PW350 Plasma


42PW350 Logo Familiarization Page 3 of 3

AV Mode "One click" Cinema,, Sports,


p , Game mode.
AV Mode is three preset picture and audio settings. It allows the viewer
to quickly switch between common settings. It includes Cinema, Sports,
and Game Modes.

Clear Voice Clearer dialogue sound


Automatically enhances and amplifies the sound of the human voice
frequency range to provide high-quality dialogue when background
noise swells
swells.

Save Energy, Save Money


It reduces the plasma displays power consumption.
The default factory setting complies with the Energy Star requirements
and is adjusted to the comfortable level to be viewed at home.
(Turns on Intelligent Sensor).

Save Energy,
S E Save
S Money
M
Home electronic products use energy when they're off to power features like clock
displays and remote controls. Those that have earned the ENERGY STAR use as much
as 60% less energy to perform these functions, while providing the same performance at
tthe
e same
sa e p
price
ce as less-efficient
ess e c e t models.
ode s Less
ess e
energy
e gy means
ea s you pay less
ess o
on you
your eenergy
e gy
bill. Draws less than 1 Watt in stand by.

13 June 2011 42PW350 Plasma


600Hz Sub Field Driving
(600 Hz Sub Field Driving)

600 Hz Sub Field Driving is achieved by using 10 sub-fields per frame process
(vs. Comp. 8 sub-field/frame)

No smeared images during fast motion scenes

Original Image 10 Sub Fields Per Frame

Sub Field firing occurs using wall charge and polarity differences between Y-SUS and Z-SUS signals.

14 June 2011 42PW350 Plasma


42PW350 Remote Control BOTTOM PORTION
p/n AKB72914273
TOP PORTION

15 June 2011 42PW350 Plasma


42PW350 Rear and Side Input Jacks
SIDE
INPUTS

USB for Music, Photos


and Software
AC In
Upgrades

REAR
INPUTS

USB

HDMI 3

Composite
Video/Audio

16 June 2011 42PW350 Plasma


Generic Plasma USB Automatic Software Download Instructions
1) Download the Software File.

Currently Installed Version

Software Version found on


the USB Flash Drive

File found on the USB


Flash Drive

2) Copy new software (xxx.bin) into the root of the


Jump Drive. Make sure you have the correct
software file
file.
3) With TV turned on, insert USB flash drive.
4) You can see the message
TV Software Upgrade (See figure on right)
5) Cursor left and highlight "START" Button and
Highlight Start Press Select
push Enter button using the remote control.
6) You can see the download progress Bar.
7) Do not unplug until unit has automatically
restarted.
8) When download is completed
completed, you will see
COMPLETE. * CAUTION:
9) Your TV will be restarted automatically. Do not remove AC power or the USB Flash Drive.
Do not turn off Power, during the upgrade
process.
Software Files (when available), can be
downloaded from GCSC or GSFS.com

17 June 2011 42PW350 Plasma


Accessing the Service Menu

To access the Service Menu.


1)) You must have either Service Remote.
p/n 105-201M or p/n MKJ39170828
2) Press In-Start
3) A Password screen appears.
4)) Enter the Password.

Note: A Password is required to enter the


Service
Se ce Menu.
e u Enter;
te ; 0000

Note: If 0000 does not work use 0413.

MKJ39170828
105-201M

18 June 2011 42PW350 Plasma


42PW350 Dimensions
There must be at least 4 inches of Clearance on all sides
39" 2"
990.6mm 50.8mm
19-1/2"
Center Center
495.3mm

4-11/16"
119mm
11-9/16" 15-3/4"
293.5mm 400mm
Center
12-1/8"
307.34mm
26.5/16"
668.02mm
15-3/4"
400mm
24-3/16" Model No.
614.68mm Serial No.
Label
Remove 4 screws
Center to remove stand
for wall mount

3-7/8"
98mm

2-1/8" 3-11/16"
53.34mm 93m
19-1/8" 9.1/8"
485mm 231.1mm

Max Watts 160W


Power Consumption: Typical: 125W 47.4 lbs with Stand
Weight:
41.1 lbs without Stand
0.2 Watts (Stand-By)

19 June 2011 42PW350 Plasma


SERVICE AND ADJUST MENU ITEMS
This section of the manual will discuss the Service Menu and the Adjust Menu
In the 42PW350 Advanced Single Scan Plasma Display Panel.

Upon completion of this section the Technician will have a better


understanding of the Service and Adjust Menus used in this model.

20 June 2011 42PW350 Plasma


42PW350 Service Menu First Page
Bring up the Service Menu using the Service Remote
by pressing In-Start enter password 0413 or 0000.

IN START Country Group Adjust Check


Software Version
Model Name: 42PW350-UA 1. Adjust Check 1. Country Group (Press OK to Save)
Serial Number: 010PTZK1F285 2. ADC Data Country Group Code 02
S/W Version: : 03.26.02.11 3. Power Off Status Country Group US
MICOM Version : 3.24.0 4. System 1 Country US
SPI Boot Version : 4.24.00 5. System 2 2. Tool Option
BOOT Version : 0.01.17 6. Model Number D/L Tool Option 1 32777
: 0.05 (0x00) Video Processor
Touch Version 7. Test Option Tool Option 2 65
Chip Type
EDID Version (RGB) : 0.01 8. External ADC Tool Option 3 7519
EDID Version (HDMI) : 0.01 9. Pattern Selection Tool Option 4 7560
Chip Type : SATURN 7 10. Panel Control Tool Option 5 14925
3D ASIC Version : 0.77 11. Spread Spectrum 3. Adjust White Balance: OK
Debug Status : RELEASE 12. Sync Level 4. Adjust ADC: OK
Module Rom Ver: : 42T3_4PV3A0 13. Stable Count 480i Component OK
RF Emitter Versioni : VB091 14. ODC Test 1080p Component OK
15. Power Error History
Control Board RGB OK
UTT : 12 Software Version 5. EDID(AC3): OK
APP History Ver.:53810 RGB OK (0x5E)
PQL DB:LGE_PG_LGT10_xxN42 HDMI1 Priority Audio OK (0x12,0xD2)
HDMI2 Mode OK (0x12,0xC2
Unit Total Time HDMI3 OK (0x12,0xB2

21 June 2011 42PW350 Plasma


42PW350 Power Off Status (IN START) Screen
Bring up the Service Menu using the Service Remote
by pressing In-Start enter password 0413 or 0000.
IN START Power Off Status
Model Name: 42PW350-UA 1. Adjust Check 0. POWER_OFF_BY_LOCAL_KEY Most Recent
Serial Number: 010PTZK1F285 2. ADC Data 1. POWER_OFF_BY_ACDET
Select Item 3
: 03.26.02.11
S/W Version: 3. Power Off Status 2. POWER_OFF_BY_REMOTE_KEY1
MICOM Version : 3.24.0 4. System 1 3. POWER_OFF_BY_LOCAL_KEY
SPI Boot Version : 4.24.00 5. System 2 4. POWER_OFF_BY_ACDET
BOOT Version : 0.01.17 6. Model Number D/L 5. POWER_OFF_BY_ACDET
Touch Version : 0.05 (0x00) 7. Test Option 6. POWER_OFF_BY_ACDET
EDID Version (RGB) : 0.01 8. External ADC 7. POWER_OFF_BY_SW_DL
EDID Version (HDMI) : 0.01 9. Pattern Selection 8. POWER_OFF_BY_ACDET
Chip Type : SATURN 7 10. Panel Control 9. POWER_OFF_BY_LOCAL_KEY
3D ASIC Version : 0.77 11. Spread Spectrum 10. POWER_OFF_BY_LOCAL_KEY
Debug Status : RELEASE 12. Sync Level 11. POWER_OFF_BY_REMOTE_KEY1
Module Rom Ver: : 42T3_4PV3A0 13. Stable Count 12. POWER_OFF_BY_REMOTE_KEY1
RF Emitter Versioni : VB091 14. ODC Test 13. POWER_OFF_BY_ACDET
15. Power Error History 14. POWER_OFF_BY_ACDET
UTT : 12 15. POWER_OFF_BY_LOCAL_KEY
APP History Ver.:53810 16. POWER_OFF_BY_LOCAL_KEY
PQL DB:LGE_PG_LGT10_xxN42 17. POWER_OFF_BY_LOCAL_KEY
18. POWER_OFF_BY_LOCAL_KEY
19. POWER_OFF_BY_REMOTE_KEY1
20. POWER_OFF_BY_REMOTE_KEY1
21. POWER_OFF_BY_ACDET
22. POWER_OFF_BY_SW_DL
23. POWER_OFF_BY_LOCAL_KEY

LOCAL_KEY (Key Board Power) INSTOP (Instop Button on Serv. Remote)


REMOTE_KEY1 (Remote Power) SW_DL (Software Download)
ACDET (Loss of AC Power) AUTO_OFF (No Signal Time Out)
SW_DL (Software Download Restart) OFF_TIMER (Auto Timer Off)

22 June 2011 42PW350 Plasma


42PW350 Power Off Status Details

CODE EXPLANATION
POWER_OFF_BY_CPUCMD Power off by CPU Command
POWER_OFF_BY_ABN Power off by abnormal status
POWER_OFF_BY_KEYTIMEOUT Power off when TV is not turned off during a certain time
POWER_OFF_BY_ACDET Power off by not detecting AC (abnormal case)
POWER_OFF_BY_RESET Power off by Micom Reset
POWER_OFF_BY_5VMNT Power off by not detecting 5V monitoring
POWER_OFF_BY_NO_POLLING Power off when receiving no acknowledge
POWER_OFF_BY_REMOTE_KEY Power off by remote key
POWER_OFF_BY_OFF_TIMER Power off by Off timer
POWER_OFF_BY_SLEEP_TIMER Power off by sleep timer
(Not Used) POWER_OFF_BY_FAN_CONTROL Power off by fan control (Not Used)
POWER_OFF_BY_INSTOP_KEY Power off by InStop Key
POWER_OFF_BY_AUTO_OFF Power off by auto off function
POWER_OFF_BY_ON_TIMER Power off by On timer
POWER_OFF_BY_RS232C Power off by RS232C command
POWER_OFF_BY_SWDOWN Power off by software download
POWER_OFF_BY_LOCAL_KEY Power off by local key
POWER_OFF_BY_CPU_ABNORMAL Power off by CPU Abnormal status
POWER_OFF_BY_INV_ERROR Power off by LCD module inverter error (LCD Only)
POWER_OFF_BY_SW_DL Power off by Soft Ware update
POWER_OFF_BY_UNKNOWN Power off by the other causes

23 June 2011 42PW350 Plasma


42PW350 Lip Sync Adjust (IN START) Screen
Bring up the Service Menu using the Service Remote
by pressing In-Start enter password 0413 or 0000.

IN START SYSTEM 1
Model Name: 42PW350-UA 1. Adjust Check 0. Baudrate 115200
Serial Number: 010PTZK1F285 2. ADC Data 1. 2 Hours Off (On Timer) On
S/W Version: : 03.26.02.11 3. Power Off Status 2. 2 Hours Off (Screen Mute) Off
MICOM Version : 3.24.0 Select 4. System 1 3. 15Min Force Off On
SPI Boot Version : 4.24.00Item 4 5. System 2 4. Audio EQ On
BOOT Version : 0.01.17 6. Model Number D/L 5. Dynamic EQ On
Touch Version : 0.05 (0x00) 7. Test Option 6. A2 Threshold 11
EDID Version (RGB) : 0.01 8. External ADC 7. HDMI Sound(Port1) HDMI Port1
EDID Version (HDMI) : 0.01 Select
9. Pattern Selection 8. Lip Sync Adjust(DTV) 0
: SATURN 7 Item 8
10. Panel Control
Chip Type 9. Dimming On
3D ASIC Version : 0.77 11. Spread Spectrum 10. Tuner Option -10 to 20 Enhanced Ghost
Debug Status : RELEASE 12. Sync Level 11. Atten RF Signal Off
Module Rom Ver: : 42T3_4PV3A0 13. Stable Count 12. UTT Reset Reset
RF Emitter Versioni : VB091 14. ODC Test 13. Channel Mute On
15. Power Error History 14. Debug Status RELEASE
UTT : 12 15. NVRAM Type EEPROM
APP History Ver.:53810 16. HDEV Off
PQL DB:LGE_PG_LGT10_xxN42 17. Blue back On
18. China Cable SO On
19. Booster On (VHF) 0
20. Booster Off (VHF) 0
21. Booster On (UHF) 0
22. Booster Off (UHF) 0

24 June 2011 42PW350 Plasma


42PW350 UTT Reset (IN START) Screen
Bring up the Service Menu using the Service Remote
by pressing In-Start enter password 0413 or 0000.

IN START SYSTEM 1
Model Name: 42PW350-UA 1. Adjust Check 0. Baudrate 115200
Serial Number: 010PTZK1F285 2. ADC Data 1. 2 Hours Off (On Timer) On
S/W Version: : 03.26.02.11 3. Power Off Status 2. 2 Hours Off (Screen Mute) Off
MICOM Version : 3.24.0 Select 4. System 1 3. 15Min Force Off On
Item 4
SPI Boot Version : 4.24.00 5. System 2 4. Audio EQ On
BOOT Version : 0.01.17 6. Model Number D/L 5. Dynamic EQ On
Touch Version : 0.05 (0x00) 7. Test Option 6. A2 Threshold 11
EDID Version (RGB) : 0.01 8. External ADC 7. HDMI Sound(Port1) HDMI Port1
EDID Version (HDMI) : 0.01 9. Pattern Selection 8. Lip Sync Adjust(DTV) 0
Chip Type : SATURN 7 10. Panel Control 9. Dimming On
3D ASIC Version : 0.77 11. Spread Spectrum 10. Tuner Option Enhanced Ghost
Debug Status : RELEASE 12. Sync Level 11. Atten RF Signal Off
: 42T3_4PV3A0 Select
13. Stable Count
Module Rom Ver: 12. UTT Reset Reset
: VB091 Item 12
RF Emitter Versioni 14. ODC Test 13. Channel Mute On
Units Total Time 15. Power Error History 14. Debug Status Changes RELEASE
UTT : 12 To Doing
15. NVRAM Type EEPROM
APP History Ver.:53810 16. HDEV Off
PQL DB:LGE_PG_LGT10_xxN42 17. Blue back On
18. China Cable SO On
19. Booster On (VHF) 0
20. Booster Off (VHF) 0
21. Booster On (UHF) 0
22. Booster Off (UHF) 0

Scroll to Scroll to After Reset (Doing) has


Note: After UTT is reset, the UTT time on the left will (System 1) (UTT Reset) completed, Reset returns.
not reset to 0 until the Service Menu is exited. then Press (Select) After Exit the UTT Timer is
Right Cursor Reset changes to Doing 0
then back to Reset
25 June 2011 42PW350 Plasma
42PW350 Service Menu: Panel Control Shows Control Board Information
Bring up the Service Menu using the Service Remote
by pressing In-Start enter password 0413 or 0000.

IN START Panel Control


Model Name: 42PW350-UA 1. Adjust Check 1. AV/PC AV
Serial Number: 010PTZK1F285 2. ADC Data 2. ISM Auto
S/W Version: : 03.26.02.11 3. Power Off Status 3. Gamma 0
MICOM Version : 3.24.0 4. System 1 4. Power Save Mode 0
SPI Boot Version : 4.24.00 5. System 2 5. APS Contrast 95
BOOT Version : 0.01.17 6. Model Number D/L 6. OrbitPixel 2
Touch Version : 0.05 (0x00) 7. Test Option 7. OrbitStep 2 step
EDID Version (RGB) : 0.01 8. External ADC 8. OrbitTime 120 sec.
EDID Version (HDMI) : 0.01 9. Pattern Selection 9. MRE(FMC) Off
Select
: SATURN 7 10. DPS2 Off
Chip Type 10. Panel Control
Item 10 11. GRP Off
3D ASIC Version : 0.77 11. Spread Spectrum
Debug Status : RELEASE 12. Sync Level 12. Module OSD 0
Module Rom Ver: : 42T3_4PV3A0 13. Stable Count 13. Module XDP On
RF Emitter Versioni : VB091 14. ODC Test 14. Formatter XDP On
15. Power Error History 15. Reset Use Time
Units Total Time
UTT : 12 Panel Model
APP History Ver.:53810 UTT Reset Module Name: Number 42T3
PQL DB:LGE_PG_LGT10_xxN42 Rom Ver. 42T3_4PV3A0
Cursor Right to activate. Temperature:
Yes or No will appear.
25.00 Celsius
UTT will not change until CTRL. Board
In Start key is pressed. ROM Version Panel
Temperature

At the bottom right you can see the Panel Model Number, Control board Software Version and the Panel Temperature.

26 June 2011 42PW350 Plasma


42PW350 Model Number Download Screen
Bring up the Service Menu using the Service Remote
When the Main Board is replaced, the Model Number and by pressing In-Start enter password 0413 or 0000.
Serial Number must be corrected. Follow these instructions
Scroll down to item 6. Model Number D/L to highlight.
Press ENTER or Cursor Right.

IN START
Model Number D/L
Model Name: 42PW350-UA 1. Adjust Check
Serial Number: 010PTZK1F285 2. ADC Data
S/W Version: : 03.26.02.11 3. Power Off Status 0. Model Name 42PW350-UA
MICOM Version : 3.24.0 4. System 1 1. Serial Num. 010PTZK1F285
SPI Boot Version : 4.24.00 5. System 2
Select
BOOT Version : 0.01.17 6. Model Number D/L
Item 6 Press OK to Save
Touch Version : 0.05 (0x00) 7. Test Option
EDID Version (RGB) : 0.01 8. External ADC
EDID Version (HDMI) : 0.01 9. Pattern Selection To Change the Model Number:
Chip Type : SATURN 7 10. Panel Control 1) Use the cursor right or left to select the area
3D ASIC Version : 0.77 11. Spread Spectrum to change.
Debug Status : RELEASE 12. Sync Level 2) Use the cursor up or down to change.
Module Rom Ver: : 42T3_4PV3A0 13. Stable Count 3) When Model Number is correct,
RF Emitter Versioni : VB091 14. ODC Test Press ENTER to Save
15. Power Error History 4) Cursor right until there is no text cursor blinking.
UTT : 12 5) Cursor down to highlight Serial Number
APP History Ver.:53810 6) Cursor Right to place blinking cursor under the first
PQL DB:LGE_PG_LGT10_xxN42 location and change (as in Item 2 above).
5) Press ENTER to Save
Note: To return to the Model Number, Cursor right
Note: The Model and/or Serial No. will not until there is no text cursor blinking and press the Up
change until you press the In-Start button Cursor on the Remote. Cursor Right to place blinking
after any change has been made. cursor under the first location

27 June 2011 42PW350 Plasma


42PW350 Power Error History (IN START) Screen
Bring up the Service Menu using the Service Remote
by pressing In-Start enter password 0413 or 0000.
IN START POWER ERROR HISTORY
Model Name: 42PW350-UA 1. Adjust Check
Serial Number: 010PTZK1F285 2. ADC Data 1. Last History: VA UVP
S/W Version: : 03.26.02.11 3. Power Off Status 2. Last History: VS OCP
MICOM Version : 3.24.0 4. System 1 3. Last History: NONE
SPI Boot Version : 4.24.00 5. System 2
BOOT Version : 0.01.17 6. Model Number D/L
Touch Version : 0.05 (0x00) 7. Test Option 4. Error Count
EDID Version (RGB) : 0.01 8. External ADC
1) PFC_DET Error ff
EDID Version (HDMI) : 0.01 9. Pattern Selection
Chip Type : SATURN 7 10. Panel Control 2) 5V OVP ff
3D ASIC Version : 0.77 11. Spread Spectrum 3) 5V UVP ff
Debug Status : RELEASE 12. Sync Level 4) 17V OVP ff
Module Rom Ver: : 42T3_4PV3A0 13. Stable Count
: VB091 5) 17V UVP ff
RF Emitter Versioni 14. ODC Test
15. Power Error History 6) M5V OVP ff
UTT : 12 7) M5V UVP ff
APP History Ver.:53810 8) Vs OCP 1
PQL DB:LGE_PG_LGT10_xxN42 Select
Item 15 9) Vs OVP ff
10) Vs UVP ff
11) Va OVP ff
12) Va UVP 1

5. Reset All

PFC_DET: Power Factor Control Detect


OVP: Over Voltage Protect
OCP: Over Current Protect
UVP: Under Voltage Protect

28 June 2011 42PW350 Plasma


Service Menu: Downloading EDID Data
When Item 10 was selected
1) Press ADJ key.
If Item 5 on Adjust Check in the 1st page of the Service Menu
Password required shows AC3, this shows NG.
To enter ADJ Menu
If Item 5 on Adjust Check in the 1st page of the Service
Menu shows EDID PCM this shows OK(PCM)
If NG was shown,, highlight
g g Start and p press Select on the
remote.
Writing appears, then OK/(PCM) shows here. Now Item 5 on
Adjust Check in the 1st page of the Service Menu shows
EDID PCM.

If Reset
R t iis selected,
l t d Erasing
E i will
ill appear and
d then
th this
thi shows
h
NG.

When Item 11 was selected

If Item 5 on Adjust Check in the 1st page of the Service Menu


shows PCM, this shows NG.
If Item 5 on Adjust Check in the 1st page of the Service
Menu shows EDID AC3 this shows OK(AC3)
If NG was shown,
h hi
highlight
hli ht St
Start
t and
d press S
Select
l t on the
th
remote.
Writing appears, then OK/(AC3) shows here. Now Item 5 on
Note: PCM is changed from NG to OK/(PCM) Adjust Check in the 1st page of the Service Menu shows
then AC3 will now be NG. EDID AC3 .

Note: AC3 is changed from NG to OK/(AC3) If Reset is selected, Erasing will appear and then this shows
then PCM will now be NG. NG.

29 June 2011 42PW350 Plasma


Accessing the Host Diagnostic Screen (Page 1 of 2)
Use the Host Diagnostic screen to investigate the signal quality of a problem channel.
1)) Place Television on the digital
g channel that
may be showing problems.
4) Press the (1) Key 5 times.
2) Bring up the Customers Menu. Highlight The Host Diagnostics screen appears.
CHANNEL. Press ENTER on the remote.

3) The CHANNEL Menu appears.


See next page for details.

30 June 2011 42PW350 Plasma


42PW350 Understanding the Host Diagnostic Screen (Page 2 of 2)

Model
Host Diagnostics Channel
Number Selected Current Channel (Main)
Host Information Blocked or
Model Name : 42PW350-UA (Plasma Display) Channel Info : Digital 19-1 Not Blocked
Memory Parental Control : Channel is not blocked
F = 9/5 (C+32)
FLASH : 131072 KB Current Temperature
DRAM : 262144 KB Panel MODULE Temperature: 34.5 Celsius
Temperature
NVM : 128 KB
DVI/HDMI Status
Host Release Version Cant display this information now
Firmware Version(MP) : 3.26.02.11(53810) Software
Version
Micom Version : V3.24.0
Compile Date & Time : 20110131 & 08:45:52
Compile User : sunbon.koo
FAT Status (Main) Channel
Center Frequency : 663.00 MHz Frequency
PCR lock : Locked Program Clock Reference (Locked or No)
Modulation mode : QAM 256 Channel Type (8VSB, QAM 64, 256)
Carrier lock status : Locked Channel (Locked or No)
SNR : 37 dB Channel Signal to Noise Ratio
8VSB (Above 20 is good)
Signal level : 100% QAM 64 (Above 24 is good)
Channel Signal Level (Above 80% good) QAM 256 (Above 30 is good)

Half Page CH Move Page Exit


Exit

31 June 2011 42PW350 Plasma


3D SECTION AND 3D TROUBLESHOOTING

This section will give you an


understanding of 3D as it relates to
Televisions.

This section also includes 3D


troubleshooting.

Note: The 3D Glasses must be mated


To the Television so that multiple TVs
Can operate in the same room with different glasses synchronized to the correct TV
TV.

HOW TO CONNECT THE 3D GLASSES

When initially switched on,


on the device will automatically be connected to the TV with the
strongest signal.

HOW TO RECONNECT THE 3D GLASSES

Press the power button for over eight seconds.

Release the button when the green LED light turns on. Then, you will see the green light blink
three times before the device is switched off. If you switch the power on again, the glasses will
be connected to the TV or PROJECTOR with the strongest signal.

32 June 2011 42PW350 Plasma


3D Fundamentals (What is 3D?) From the Human Perspective
Each eye looks at an image from slightly different angles. Therefore, the brain takes these two different
images and translates them into one image giving us depth perception. This is difficult to reproduce on a
2 dimensional screen.
screen We have
ha e to come upp with
ith a scheme that will
ill allo
allow us
s to see the same image from
two different angles giving us 3D effects.

If the two images


g were added together
g without the
brain doing the calculations to combine them, they
would appear out of focus.

Note: The Left and Right eye are actually seeing the same image but from a different angle, but for this
explanation one is shown inverted from the other for clarity purposes simply to show there is a difference
between the two images seen by each eye.

33 June 2011 42PW350 Plasma


3D Fundamentals (What is 3D?) From the Electronic Perspective
Each Camera looks at an image from slightly different angles. Each camera generates its own video,
well call Left Camera View and Right Camera View. The Frame packing adds both of these videos
together as described in the 3D Broadcasting page
page.

Original Image

Left Camera Right Camera


View View

The two videos are separated by the Frame rate


Both Videos are
converter in the Television and put on the screen.
Packed together The first horizontal line is the Left Camera view
For transmission. and the 2nd line is the Right camera view. 3rd line is
Left, 4th is Right and so on.
Note: The Left and Right Cameras are actually seeing the same image but from a different angle, but for
this explanation one is shown inverted from the other for clarity purposes simply to show there is a
difference between the two images seen by each camera.

34 June 2011 42PW350 Plasma


3D Formatter
3D Formatter
- All Formats of input are available and converted by 3D technology
- Full
u HD input
put aavailable
a ab e
- 3D Enhancement Input Capabilities Output Capabilities
HDMI 1.3 / HDMI 1.4 No glasses required
Regular 2D 2D
3D Formatter
2D 3D to 2D
3D Formats
F t (Frame
(F P
Packed)
k d)
or
R
1) Side by Side

L 2) Frame by Frame
2) Top and Bottom
Plasma (Active)

Synchronization required
3) Checkerboard between glasses and TV

R
4) Frame Sequential
(Full Resolution available) L

HDMI 1.4 (Only)


R L / R represents;
5) Over/Under Left Camera View
Right Camera View
L

35 June 2011 42PW350 Plasma


LG 3D TV 3D broadcasting
HD SD Online
3D for All types of broadcasting signals Broadcasting Broadcasting Video
1. Input of broadcasting signal
2. Press 3D button for mode change

Input

Input

Input
3. Select type of input source, (1)
4. Press ENTER.
5. In case 3D looks *abnormal, press 3D Settings
in the Quick MENU. HDMI Component
*Abnormality
Abnormality may be caused by reversed L/R USB
C
Component
t C
Compositeit
order of the input signal. If TV already in Port
Left/Right change to Right/Left or vice versa.
RF RF, S-Video

(2)

(3) (4)
(5) (5)
Top &
Bottom
2D to 3D Side by Side Checker Single frame
Board Sequential

Note: Picture behind the menu is showing a side by side format.


Note: HDMI 1.4 will automatically select 3D type for you.

36 June 2011 42PW350 Plasma


3D Active Glasses Type
Shutter glasses type 3D:
Separating left and right images by synchronizing the TV and the glasses

Fundamentals of Shutter glasses

< Shutter glasses 3D >


Between
Frames

Left Eye
viewing left
camera shot

Between
Frames

Right Eye
viewing right
The image is broadcast using two different camera shot
viewing angles every other frame.
The 3D Glasses are then synchronized with the
two different images to give the 3D effect.
They are blanked between scene changes.

37 June 2011 42PW350 Plasma


LG RF 3D Emitter & Glasses
Convenient 2.4GHz RF Transmitter built-in to TV
Wider viewing angle
2~7 Meter Viewing Distance (6.5 ft~ 22.9 ft)
Longer Viewing distance
Maximum 10 Meter (32.8 ft)
Longer battery life
(1.5h charging / 40h battery life)
Improved sync performance

7m 600
User friendly Glasses
600
1) L-frame for glasses users
2) UV coating to prevent scratch
3) LED indicator for user convenience
4) Easy to Recharge with USB port
(Note: Glasses will work while being charged) RF Transmitter
5) Adjustable Nose Piece for comfort Location

AG-S250

38 June 2011 42PW350 Plasma


Active RF glasses 3D TV components

B tt
Battery
USB Charge Port
AG-S250 1Hr. 50min
(8-pin mini USB)
0.80mA/h Charge Time
40Hr. Charge

RF Receiver

*TN LCD shutter Shutter Actuator


3D Sync signal RF Sync
circuit board
signal
Twisted State
light passes O State
On St t light
li ht blocked
bl k d

TV with built in *TN LCD


CD shutter
h
RF Transmitter
*TN = Twisted Nematic

39 June 2011 42PW350 Plasma


3D Settings Menu
3D settings may help with 3D view pleasure.
1
1. In case 3D looks *abnormal
abnormal, press 3D
3D Settings
Settings
in the Quick MENU.

3D Picture Size: Cuts off the outer edges of the picture


and stretch it to fit the full screen in 3D mode.

3D Depth: Adjusts the distance between the object and


the background in the picture to enhance the 3D effect
in 2D to 3D mode.

3D View Point: Brings the picture (including both the


object and background images) to the front or back to
enhance the 3D effect in 3D mode.

3D Picture Balance: Adjusts the color and brightness


difference between the right and left sides of the picture
(1) in 3D mode.

3D Picture Correction: Changes the order of images


in the right and left sides of the picture in 3D mode.

40 June 2011 42PW350 Plasma


3D Video viewing range and Compatible 3D Formats
VIEWING CONDITIONS Maximum Optimum
Viewing 7m 2 m - 10 m
Distance (22.9 ft) (6.5 ft - 32.8 ft)
Viewing
120 (When the viewing distance is 2 m (6.5 ft)
Angle
Accepted 3D Formats

Horizontal Vertical
Signal Resolution Playable 3D video format
Frequency kHz Frequency Hz
44 96 / 45
44.96 Top & Bottom
Bottom, Side by Side ((*Also
Also Component & DTV)
*720P 1280X720 59.94 / 60
89.9 / 90.0 HDMI (V1.4 with HDMI 3D Frame Packing
*1080i 1920X1080 33.72 / 33.75 59.94 / 60 Top & Bottom, Side by Side (*Also Component & DTV)
Top & Bottom, Side by Side
HDMI 67 432 / 67
67.432 67.5
5 59 94 / 60
59.94 Checker Board
Input Single Frame Sequential

1080p 1920X1080 27 24 Top & Bottom, Side by Side, Checker Board

53.95 / 54.00 23.98 / 24.00 HDMI (V1.4 with HDMI 3D Frame Packing

33.75 30 Top & Bottom, Side by Side, Checker Board


USB Top & Bottom, Side by Side
1080p 1920X1080 33.75 30
Input Checker Board, MPO (Photo)
Additional HDMI 1.4V Information.
1) 3D Auto Detection (LG Does Support 2) Ethernet Capabilities (LG Does Not Support)
3) Return Audio (LG Supported using SIMPLINK) 2011 Models only.

41 June 2011 42PW350 Plasma


42PW350 3D Troubleshooting Flow Chart Page 1 of 3
If you are having trouble seeing 3D, Try changing the 3D selection types if it is difficult to determine what format
the 3D movie is in. Example: Top/Bottom, Side by Side, Checker Board, Frame Sequential.
Make sure you are using at least version 1.3 HDMI cable. (1.4 HDMI will auto select).

Play a 3D Movie Red Power LED should stay on solid for about 3 sec. then go off.
Glass turn off in 1 Min.
When power button is pressed for Power Off, the LED will blink 3 times.
with no 3D sync.
Note 1: The Red LED will blink constantly for 1 minute if battery is discharged.
Glasses turn off in 10
Make sure the Note 2: Glasses can operate using the USB connector plugged in if batteries
Min with no movement.
3D Glasses are not charged.
No 3D
are charged Dont forget to try swapping the L/R selection by pressing the
Quick Menu button on the remote control.
Charged

A simple test is to hold the glasses about 1 ft. in front of you towards a white sheet of paper. No
The TV must be playing a 3D movie and be in the 3D mode. Change
If the glasses sync up the paper will appear as looking through normal sun glasses, Change the 3D Glasses
if not synced, the paper will appear amber in color. AG-S250

No glasses
sync
Check +3.3V for the Motion Remote board. Check +3.3V Replace
P1404 Connector 1 pin : 3.3V NG Regulator IC506 NG Main board

Note: Motion Remote/3D Tx EBT61267425


OK
board connector has no ID EBR72942901
EBR71638619
Check 3D/Motion Remote RF Transmitter 3.48V p/p
Cable Open
Board Connector pin 1 : (3.3V) NG 60 Hz
1.59VDC
OK

Check 3D Sync. It is output from IC1400 directly to


Check for 60Hz sync
the Front side of Board R1572 P1404 Pin 12 . Replace Main board
signal on pin 12 of P1404 NG Also Check ZD1408 NG

OK Note: R1572 and ZD1408 are


directly to the right of P1404.
Continued on next page.

42 June 2011 42PW350 Plasma


42PW350 3D Troubleshooting Flow Chart Page 2 of 3 Continued from previous page

Note: Motion Remote board Connector has no ID

Check for 60Hz sync to the 3D sync / Motion 3.48V p/p


Remote board. Connector pin 12 60 Hz
Should be
1.59VDC
OK
RF Freq GPIO 0 (9) GPIO 1 (10) GPIO 2 (11)
Check P1404 Connector pins 9, 10, 11 3D Disable 0 0 0
(See Chart) Pin 9 or 10 should be high Replace Main board
60Hz 1 0 0
NG
59.94Hz 0 1 0
OK
Note: If all are low, make sure you
are in 3D Mode on the Television
Check 3D / Motion Remote
Connector pins 9, 10, 11 Cable Open
NG

OK

Replace 3D / Motion Remote


p/n: EBR72499601

See next page for additional details

43 June 2011 42PW350 Plasma


42PW350 3D Sync Troubleshooting Flow Chart Page 3 of 3
Continued from Note: The 3D sync on the LVDS cable is not
previous page the same as the 3D_SYNC route shown on
the Main board. This is just a TP.

3.48V p/p Check 3D_SYNC Line Check 3D_SYNC Line


60 Hz Control P106 pin 79 Main P1402 pin 2
1.59VDC
3D_SYNC straight
from (IC3202) chip. 3.48V p/p
Control Board 60 Hz
To R1572 1.59VDC
3D_SYNC straight from
the MCM (IC702) chip.
E B

Q1400
IC701 CONTROL BOARD X1400
3 P/N: EBR71200701 24Mhz
2 2 P501
P2 IC1400
1
DDR 1.06V 4.94V 3D-Sync IC1404
Memory 3.27V Pin 50
L1 IC1407
3.3V 1.8V
IC703
3.48V p/p 60 Hz 3D Formatter L1402
IC101 VS_DA IC1406

P105
1.05V 1.05V
P106
P106 P1401 P1401 1 2 3
2 2
3

D1
IC22
1.8V On LVDS LVDS Q1402 1

Serial C E

C
B
E
IC1401
Flash B

Q1401 IC504
3 IC702 IC53
IC1202 IC502 2
1 2 MCM 1
3.31V Q501
IC11 X1 2 2 P902
S

25 MHz 3 G

Auto Gen
C
P1404 IC506 1
2
3
B E
L503 IC507
Q901 MAIN BOARD 3
2 2 D501
P107 P108 P22 n/c p/n: EBT61267425 AUSLLJR 1
3.3V from IC53 3.3V from IC53
Pins 41~43 Pins 8~10 IC501 D200 Other Main Boards +3.3V Regulator
12 IC101 L506
A2 A1

n/c Upgrades used


pin
L502 C

Micro/ p/n: EBR72942901 IC600


Video
NC
IC1201 AUSLLHR 3
IC103 Processor 2

SY
1

_ Pin 12 3D-Sync R1572


3D
IC700
Connector Front side of Board
X200 TUNER
Check 3D_SYNC Line GPI0 1 L703 L701 L700 TU1300
has no ID
18. IF p
17. IF n

(pin 9, 10, 11)


16. IF AGC
24Mhz
Pin 12
15. Reset
14. 3.3V
13. 1.26V
L702
Pin 9 or 10 12. GND
11. CVBS
10. NC

Motion Remote Board should be high


9. SIF

3.48V p/p 8. NC
7. SDA
6. SCL
5. NC

60 Hz P700
4. NC
3. 5V

1.59VDC
2. NC
1. NC

R-R+L-L+

44 June 2011 42PW350 Plasma


DISASSEMBLY SECTION
This section of the manual will discuss Disassembly, Layout and Circuit
Board Identification, of the 42PW350 Advanced Single Scan Plasma Display Panel.

Upon completion of this section the Technician will have a better


understanding of the disassembly procedures, the layout of the printed
circuit boards and be able to identify each board.

45 June 2011 42PW350 Plasma


Removing the Back Cover

To remove the back cover, remove the 29 screws


Indicated by the arrows.
(The Stand does not need to be removed).

PAY CLOSE ATTENTION TO THE TYPE,


TYPE SIZE AND LENGTH
Of the screws when replacing the back cover.
Improper type can damage the front.

46 June 2011 42PW350 Plasma


Circuit Board Layout Identifying the Circuit Boards

Panel Voltage and Panel ID Label


FPC
FPC

FPC

Power Supply
Y-SUS (SMPS) Z-SUS
Y-Drive
FPC

e Board

Z-SUB
FPC

Control
Main Board FPC
F
FPC

TCP
Heat Sink Side
FPC

Input
AC In (part of
Left X Right X main)

IR/LED Soft Touch Invisible Invisible


Board Keypad Motion Remote and
Speaker Speaker
3D Emitter (RF)

47 June 2011 42PW350 Plasma


42PW350 Connector Identification Diagram
PANEL
EAJ61527706 PDP42T30000.ASLGB
P201

EAJ61527743 PDP42T30000.ASLGM
p/n: EBR68342501
Y-DRIVE
Board Z-SUB Board

p/n: EBR68288401
SMPS P811
P202

POWER SUPPLY P2 Z-SUS P201

Board Board
P206 P7 P101
p/n: EAY62170901 P4

Top row Odd p/n: EBR68342001


P101 P213 Back row Even
P303

SC101 P3
P813 P103
L N P6
Y-SUS
Board p/n: EBR72942901 AUSLLJR P203
MAIN
P204

p/n: EBT61267425 AUSLLHR


BOARDS
p/n: EEBR68341901 p/n: EBR71638619 Interchangeable
P163
P102 P212 n/c
P2 P106 P501
P101 LVDS P202
P106 P211 CONTROL P1401
P205

P105 Board P22


n/c
P1404
p/n: EBR71200701
P107 P108 P902 MAIN
Board
AC P700
In
P206

RIGHT X Board
LEFT X Board p/n: EBR68019901 p/n: EBR68020001
P211 P232 P331 P311 P312
P201 P202 P203 P204 P205 P206 P301 P302 P303 P304 P305 P306

P100

FRONT IR Speaker p/n: EAB62028901 p/n: EAB62028901 Speaker


p/n: EBR72650101 (Front Right) (Front Left) MOTION REMOTE/
Front Soft Switch Key Pad p/n: EBR72499601 3D EMITTER

48 June 2011 42PW350 Plasma


Disassembly Procedure for Circuit Board Removal
Note: 1) Remember to be cautious of ESD as some semiconductors are CMOS and prone to static failure.

S it h Mode
Switch M d Power
P Supply
S l Board
B d Removal
R l
Disconnect the following connectors: P811, P813 and SC101.
Remove the 6 screws holding the SMPS in place.
Remove the board. When replacing, be sure to readjust the Va/Vs voltages in accordance with the Panel
Label Also
Label. Also, re-confirm
re confirm VSC
VSC, -Vy
Vy and Z
Z-Bias
Bias as well.
well
Y-SUS Board Removal
Disconnect the following connectors: P206, and Ribbon Cable P101.
To remove P101, lift up on the locking mechanism and pull the ribbon cable out.
Remove the 8 screws holding the Y-SUS in place.
Remove the Y-SUS board by lifting slightly upward (to clear standoff collars) and then to the right while
gently prying apart P211~213.
When replacing, be sure to readjust the Va/Vs voltages in accordance with the Panel Label.
Confirm -Vy
Vy and Z-bias
Z bias as well.
Board Standoff
Y-Drive Board Removal

Disconnect P101~P106 Connectors to the Panel


Remove the 3 screws holding g the Y-Drive board in p place.
Lift up slightly (to clear standoff collars), then slide to the left while gently
prying apart P101, P102 and P106. Remove the Y-Drive Board.
Collar
Note: Y-SUS, Z-SUS and Y-Drive boards are mounted on board stand-offs that have a small collar.
Th board
The b d mustt be b lifted
lift d slightly
li htl tto clear
l th
these collars.
ll Behind
B hi d each
hbboard
d are Ch
Chocolate
l t (d
(dense rubber
bb
like material) that act as shock absorbers. They may make the board stick when removing.

49 June 2011 42PW350 Plasma


Disassembly Procedure for Circuit Board Removal (2)
Z-SUS Board Removal
Disconnect the following connectors: P2 and P7, then P6 by flipping up the locking mechanism and pulling out the
ribbon cable.
Remove the 4 screws holding the board in place.
Lift up slightly to clear the screw stand-offs and pull the Z-SUS to the left to unseat P3 / P4 from the Z-SUB board
and remove the Z-SUS board.
When replacing, be sure to readjust the Va/Vs voltages in accordance with the Panel Label.
Confirm VS, -Vy and Z-bias (VZB) as well.
Z-SUB Board Removal
Remove P203 connector. Disconnect P201 and P202 by Flipping up on the locking mechanism and pull out the
FPC to the panel. Remove the two screws in the Z-SUB board. Pull to the right and remove Z-SUB.
Main Board Removal
Disconnect the following connectors: P1401 LVDS by Flipping up on the locking mechanism and pull out the
LVDS cable. Disconnect P501 by pressing gently inward on the locking tabs and pull out. Disconnect P602,
P1404 and P700. Remove the 4 screws holding the Main board in place and Remove the board. Remove the
shield by lifting upward and to the left on the board.
Control Board Removal
Disconnect the following connectors: P2, P106 LVDS, P105, P107 and P108 by lifting up the locking tab.
Remove the 4 screws holding the Control board in place and Remove the board. Pay attention to the bottom left
back side of the board. There is a piece of rubber (Chocolate) that may fall off. Be sure to replace the rubber
piece.
i
Front IR and Key Pad Removal
FRONT IR/INTELLIGENT SENSOR and SOFT TOUCH KEY BOARD.
Disconnect P100. The board is attached to the Front Glass.
KEY PAD:
The Key Pad is part of the Front IR/Soft Touch Key Board.

50 June 2011 42PW350 Plasma


X Drive Circuit Board Removal Continued
Make sure AC is removed.
Lay the Television down carefully on a padded surface.
Make sure to use at least two people for this process so as not to flex the panel glass.

a) Remove the Back Cover.


b) Remove the Stand (4 Stand Screws were removed during back removal).
c)) Di
Disconnect t th
the ttwo connector
t on the
th left
l ft side
id off th
the M
Main
i bboard,
d P902 andd P1404.
P1404
d) Remove the Stand Metal Support Bracket (4 Screws) 2 Plastic tap thread and 2 Metal thread.
e) Remove the two Vertical support Braces marked E.
Note: There are 4 Screws per/brace, 2 Plastic tap thread and 2 Metal thread.
((Note,, y
you can slide the Heat Sink to the left and out without removing
g the vertical braces).
)
f) Remove the 7 screws holding the Heat Sink. (Warning: Never run the set with this heat sink removed).
To remove the heat sink, lift up to release the tacky Chocolate (heat transfer material) and slide the
heat sink to the left to clear the connector wires on the right side.
Note: There may be conductive tape on the heat sink that must be removed if present.
Also note that there several pieces of Chocolate heat transfer material attached all the way across the
Also,
underside of the heat sink. There is a mark on either
side of the tape on the heat sink which shows its locations. Chocolate
Heat transfer
material
X-DRIVE LEFT OR X-DRIVE RIGHT REMOVAL: Heat sink
Disconnect all TCP ribbon cables from the defective X-Drive board and all other Ribbon cables going to
that particular board.
Remove the 5 screws holding the defective X-Drive board in place.
Remove the board. Reassemble in reverse order. Recheck Va / Vs / VScan / -VY / Z-Drive.

51 June 2011 42PW350 Plasma


Getting to the X Circuit Boards

With Stand removed

E
Left E
Ri ht
Right

Warning:
Never run the TV with the C
TCP Heat Sink removed

F
Heat Sink
D

Warning Shorting Hazard: Conductive Tape. Do not allow to touch energized circuits.

52 June 2011 42PW350 Plasma


Left and Right X Drive Connector Removal Disconnect connector P233
See below to Remove the Connections on the X-Boards. Va from the
Y-SUS to
From the X-Boards
X Boards to the Control Board
Board.
Left X Only
There may be tape on these connectors.

P232, P331
Are the same
Connectors from Left and Right X Boards

P211 to P311
Remove tape (if present) and Gently pry the Left X to Right X
l ki mechanism
locking h i upward
d andd remove th
the ribbon
ibb P211, P311
P211
cable from the connector. Are the same

Carefully lift the TCP ribbon up and off.


It may stick,
stick be careful not to crack TCP
TCP.
Removing Connectors to the TCPs. (See next page for precautions)

TCP
Gently lift the locking mechanism
upward on all TCP connectors
Left X: P201~206
Example
Right X: P301~306

Cushion (Chocolate)
Flexible ribbon cable connector

53 June 2011 42PW350 Plasma


TCP (Tape Carrier Package) Generic Removal Precautions

Lift up
p the lock as shown using
g yyour fingernail.
g
(The Lock can be easily broken.
It needs to be handled carefully.)

Separate the TCP from the connector as shown.


TCP Film can be easily damaged.
Handle with care.
Tab

The TCP has two small tabs on each Tab


side which lock the ribbon cable
fully into the connector
connector. They have
to be lifted up slightly to pull the
connector out.
Note: TCP is usually stuck down
to the Chocolate heat transfer
material, be Very Careful when
lifting up on the TCP ribbon cable.

54 June 2011 42PW350 Plasma


Left and Right X Drive Removal

Remove the 5 screws in Left or Right X-Boards, (9 Total)


Shared with the
Right X

Shared with the The Left X Board drives the Right 1/2 of the side of the screen vertical electrodes.
Left X Viewing from the Front of the TV.

The Right X Board drives the Left 1/2 of the side of the screen vertical electrodes.
Viewing from the Front of the TV.

55 June 2011 42PW350 Plasma


CIRCUIT OPERATION, TROUBLESHOOTING AND CIRCUIT ALIGNMENT SECTION

42PW350 Plasma Display


p y

This Section will cover Circuit Operation, Troubleshooting and Alignment of the
Power Supply, Y-SUS Board, Y-Drive Boards, Z-SUS Board, Control Board,
Main Board and the X Drive Boards
Boards.

At the end of this Section the technician should understand the operation of each
circuit board and how to adjust the controls. The technician should be able with
confidence to troubleshoot a circuit board failure, replace the defective circuit and
perform all necessary adjustments
adjustments.

56 June 2011 42PW350 Plasma


42PW350 Signal and Voltage Distribution Block
SMPS OUTPUT VOLTAGES IN STBY
SMPS TURN ON SEQUENCE STB +5V
FPC: Flexible Printed Circuits Display Panel
Step 1: RL_ON: 17V, 5V, AC_Det, Error Det, SMPS OUTPUT VOLTAGES IN RUN
Horizontal
Y Drive Step 2: M_On: M5V, Va, Vs STB5V, +5V, 17V to Main Board
Electrodes
FPCs VS, VA and M5V to Z-SUS.
Sustain
P201 VS Error Com
VS
M5V: Monitor 5V
M5V VA: Voltage for Address M5V
FG5V (5V), FG15V (15V) P206 FPCs
Measured from Switch Mode Power Supply VS: Voltage for Sustain VS, VA, M5V
P202 Floating Ground P811 P7 P2
SMPS SMPS Note: P201
Va not used
Board Turn On by Z-SUS only fused and

P101
Y-SUS Board Commands routed to Z-SUB then to Z-SUS
P4
P203 P813 X-Board R
SK101
P101 P213
Voltages
Board
AC RL_ON +17V, +5V, AC Det VA
FG FG Developed on the

P103
Input M_On M5V, VA, VS
Y-SUS P3
FPCs Filter
When M5V arrives P6
FG5V
P204
FG15V CONTROL
18V P302
When VS arrives
Logic Signals Board 18V / M5V Z Drive Control Signals
Stand By:
FG FG
To Y-SUS and P2
VSC STB +5 P501 Z-SUB
P205 P102 P212 Y-Drive P1401
-VY
FG5V FG5V P101 P105 P22 LVDS Video Board
Display Enable Run:
Scan Scan 18V / M5V
Note: 18V not used AC Det MAIN Board
P107 P108 P202
P206 P106 P213 by Control +5, 17V P902 P1404
Speakers

Data Data 3.3V 3.3V


P700 FPCs
Floating Gnd (FG)
Drive Signals, FG5V
RGB Logic RGB Logic 3.3V
Display Panel Horizontal Signals Signals STBY
Electrodes, Sustain P100 FT. IR / Keys
Va P312
X-Board-Left P211 P232 P331 P311 X-Board-Right
P201 P202 P203 P204 P205 P206 P301 P302 P303 P304 P305 P306
3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V
TCP VA TCP VA TCP VA TCP VA TCP VA TCP VA TCP VA TCP VA TCP VA TCP VA TCP VA TCP VA 3.3V
Motion
Remote
TCP: Taped Carrier Package Display Panel Vertical Address (Colored Cell Address)
3D
Transmitter

57 June 2011 42PW350 Plasma


Panel Label Explanation

(1) Panel Model Name (9) TUV Approval Mark (Not Used)
(2) Bar Code (10) UL Approval Mark
(3) Manufacture No. (11) UL Approval No.
(4) Adjusting Voltage DC, Va, Vs (12) Panel Model Name
(5) Adjusting Voltage (Set Up / -Vy / Vsc / Ve / Vzb) (13) Max. Watt (Full White)
(6) Trade name of LG Electronics (14) Max. Volts
(7) Manufactured date (Year & Month) (15) Max
Max. Amps
(8) Warning

58 June 2011 42PW350 Plasma


Adjustment Notice
All adjustments (DC or Waveform) are adjusted in WHITE WASH.
Customers Menu, Select Options, select ISM select WHITE WASH.

It is critical that the DC


C Voltage adjustments be checked when;
1) SMPS, Y-SUS or Z-SUS board is replaced.
2) Panel is replaced, Check Va/Vs since the SMPS does not come with new panel.
3) A Picture issue is encountered
4) As a general rule of thumb when ever the back is removed

ADJUSTMENT ORDER IMPORTANT


DCC VOLTAGE
O G ADJUSTMENTS
S S
1) POWER SUPPLY: VS, VA (Always do first)
2) Y-SUS: Adjust Vy, VSC
Remember, the Voltage Label MUST be followed,
3) Z-SUS: Adjust Z-Bias (VZB) it is specific to the panels needs.
WAVEFORM ADJUSTMENTS
1) Y-SUS: Set-Up, Set-Down Power Supply

The Waveform adjustment is only necessary


Panel
1) When the Y-SUS board is replaced Rear View
2) When a Mal-Discharge problem is Set-Up -Vy Vsc Ve ZBias

encountered
All label references are from a specific panel
panel.
3) When an abnormal picture issues is
They are not the same for every panel encountered.
encountered

59 June 2011 42PW350 Plasma


SWITCH MODE POWER SUPPLY SECTION

This Section of the Presentation will cover troubleshooting the Switch Mode Power Supply for
the Single Scan Plasma. Upon completion of the section the technician will have a
better understanding of the operation of the Power Supply Circuit and will be able to
locate voltage and test points needed for troubleshooting and alignments.

DC Voltages developed on the SMPS


Adjustments VA and VS.

Always refer to the Voltage Sticker located on the back of the panel, in the upper Left Hand
side for the correct voltage levels for the VA, VS, -VY, VSC, and Z Bias as these voltages
will varyy from Panel to Panel even in the same size category.
g y
Set-Up and Ve are just for Label location identification and are not adjusted in this panel.

SMPS p/n: EAY62170901


Ch k the
Check th silk
ilk screen label
l b l on th
the ttop center
t off th
the P
Power S
Supply
l bboard
d tto id
identify
tif th
the correctt partt
number. (It may vary in your specific model number, always confirm part number).

On the following pages, we will examine the Operation of this Power Supply.

60 June 2011 42PW350 Plasma


Switch Mode Power Supply Overview
The Switch Mode Power Supply Board Outputs to the :
VS Drives the Display Panels Horizontal Electrodes. (From Z-SUS to Y-SUS).

Z-SUS Board VA To ZY-SUS, fused then to Z-SUB, then to the X-Board Left, then X-Right.
Primarily responsible for Display Panel Vertical Electrodes.
M5V Used to develop
p Bias Voltages
g on the Z-SUS then routed to the Y-SUS,,
Then Routed to the Control board and then back to the Z-SUS Board.

STBY 5V Microprocessor Circuits


Main Board 17V Audio B+ Supply, Tuner B+ Circuits
5V Signal Processing Circuits
Also AC_Det (if missing, Mutes the Audio and Error_Det (not used)

There are 2 adjustments located on the Power Supply Board VA and VS. The
Adjustments
j
M5V is
i pre-adjusted
dj t d and
d fixed.
fi d All adjustments
dj t t are made
d referenced
f d to
t Chassis
Ch i
Ground. Use Full White Raster 100 IRE

VS VR901

VA VR502

61 June 2011 42PW350 Plasma


42PW350 SMPS Layout Drawing
Example:
Model : PDP 42T3###
Voltage Setting: 5V/ Va:55/ Vs:200
F301 D901 N.A. / -200 / N.A. / N.A. / 125
4A/250V VS P811
STBY 160V Supply VA VS
RUN 390V D902 VS TP P811 Connector SMPS to Z-SUS P7
Q802
Pin Label Run Diode Check
D602
VA TP 1~2 *VS 200V OL

F302 D504 n/c n/c n/c n/c

2.5A/250V VR901 VA
VR502 3~4 Gnd Gnd Gnd
Q801 VS Adj Supply
Q601 Q501 VA Adj 5 *VA 55V OL

L602 6 M5V OV 2.16V


STBY 160V
*VS/VA Varies by Panel Label
RUN 390V

Q602 D351
IC301 P813 Connector SMPS to Main P501
5V
Supply Pin Label Stby Run Diode Check
T901
Q355 18 Auto_Gnd Gnd Gnd OL
17 M_On 0V 3.29V OL
L601
D352 16 AC_Det 3.46V 4.14V 3.07V

SMPS 17V 15 RL_On 0V 2.22V OL


Supply
P/N: EAY62170901 13-14 STBY 3.46V 5.16V 2.51V
Q356 9-12 Gnd Gnd Gnd Gnd
8 Error_Det 3.39V 4.89V 2.92V
RL103
D101 5-7 5.1V 0V 5.16V 2.14V
P702 P813 3-4 Gnd Gnd Gnd Gnd
1-2 17V 0V 17V 3.1V
F101
10A/250V
XP5 42T3
SC101 INPUT: 100~240V ~ 50/60Hz 3.2A
17V: 17V = 1.0A VS: 199-203V = 1.3A
5.1V: 5.1V = 3.0A VA: 55V = 1.5A
STBY5V: 5V = 1.0A M5V: 5.1V = 2.5A
PDP Module Max: 210W
LG Electronics

62 June 2011 42PW350 Plasma


Power Supply Circuit Layout

To Z-SUS
Z SUS
VS P811
Fuse F301 Source
160V Stby
390V Run
VS VR901
4Amp/250V
VA
Source VA VR501
PFC Fuse F302
160V Stby
Circuit 389V Run
Primary 2.5Amp/250V STBY-5V
Source M5V, +5V
STBY-5V
Source
+5V M5V
+5V,
and
Controller
RL103 17V On Back of
Source Controller the board
Main Fuse
F101
Bridge
Rectifier To MAIN
10Amp/250V N/C
P813
AC Input
SC 101
P702

63 June 2011 42PW350 Plasma


Power Supply Basic Operation
AC Voltage is supplied to the SMPS Board at Connector SC101 from the AC Input assembly. Rectified by the Bridge
rectifier D101 generates a primary B+. The Power factor circuit generates a Primary supply which can be read at Fuse F301
and F302 160V. This p primaryy voltage
g is routed through
g T901 and routed to the Standbyy 5V supply.
pp y The STBY5V ((standby)
y) is
B+ for the Controller chip on the back of the board (IC701) on the SMPS and output at P813 pins 13 and 14 then sent to the
Main board for Microprocessor (IC101) operation (STBY 3.46V RUN 5.16V). The Main board will receive +5V_ST (STBY
3.46V RUN 5.16V) which is sent to the +3.3V_ST regulator IC500. The 3.3V_ST is used by the Micro circuitry.

When the Microprocessor (IC101) on the Main Board receives a POWER ON Command from either the Power button
or the
th R Remotet IR Si
Signal,l it outputs
t t a hi
high
h (2
(2.22V)
22V) called
ll d RL_ON
RL ON att Pin
Pi 15 off P813.
P813 This
Thi command d causes the
th RRelay
l Ci
Circuitit
to close RL103 which allows the primary voltage to the PFC circuit (Power Factor Controller) to rise to 390V which can be
read measuring voltage at Fuses F301 and F302 from Hot Ground. AC Detection (AC Det) is generated on the SMPS, by
rectifying a small sample of the A/C Line and routed to the Controller (IC701) where it outputs at P813 pin 16 (4.15V) and
sent to P601 to the Main Board where it is sensed by the Audio Processor IC700 pin 23.
When RL_ON
RL ON arrives,
arrives the run voltage +5V source becomes active and is sent out P813 (5 (5.16V
16V at pin 55, 6 and 7) to the
Main Board P501. The (Error Det) from the SMPS Board to the Main Board can be measured at pin 8 of P813 (3.39V STBY
and 4.89V RUN), but it is not used. The RL-ON command also turns on the 17V (Audio B+ 17V) which is also sent to the
Main Board. The 17V Audio supply outputs to the Main board at P813 pins 1 and 2 and used for Audio processing and
amplification by IC700.

The next step is for the Microprocessor IC101 on the Main Board to output a high (3.29V) on M_ON Line to the SMPS at
P813 Pin 17 which is sensed by the Controller IC701, turning on the M5V line and outputs at P811 pins 6 to the Z-SUS
board.

The Controller (IC701) also uses the M_ON line to turn on the VA and the VS supplies. (Note there is no VS On Command
i thi
in this set).
t) VS iis output
t t att P811 tto th
the Z-SUS
Z SUS board
b d P7.
P7 (VA pins
i 5 and d VS pins
i 1 and d 2)
2). N
Note:
t ThThe V
Va iis ffused
d on th
the
Z-SUS then routed out P3 to the Z-SUB and then out P203 to P312 to the X-Board Right. VS is also routed out of the
Z-SUS P2 pins 6 and 7 to the Y-SUS P206.
AUTO GND Pin 18 of P813: This pin is grounded on the Main board. When it is grounded, the Controller (IC701) works in
the normal mode, meaning it turns on the power supply via commands sent from the Main board. When AUTO GND is
floated (opened)
(opened), it pulls up and places the Controller (IC701) into the Auto mode
mode. In this state
state, the Controller turns on the
power supply in stages automatically. A load is necessary to perform a good test of the SMPS if the Main board is suspect.

64 June 2011 42PW350 Plasma


42PW350 Television Turn On Sequence
F301 In Stand-By Primary side is 160V
F302 In Run (Relay On) Primary side is 390V (SMPS)
Vs VS
3rd 9
Reg
AC In 5V Generation

1 STBY 5V
+5V M5V M5V
Reg 1st 7
Reg
STBY RUN
Relay Regulator
3.46V 5.16V
RL On 17V
AC VA
Det RL On Reg nd
Va VS
5 2 8 8 9 8 7 9
Reg
M5V 7
AC Stand By Error Det. 5V 17V
Det. 5V M5V VS VS VA M5V VS
M5V Z-SUB

Y DRIVE
6 2 6 6 6 7 Y-SUS
RL On M_On Z-SUS VA VA 8
5VFG 18V
Not 7 18V M5V
Used
Reg Reg VA
5 7
FG5V Floating Gnd 7 7
If 7
M5V 18V
Missing Error Det. 17V At point 3
Audio IC507
Not Audio TV is in
Mutes 5V_TU
Used IC700 Stand-By CONTROL
state. It is
IC700 3.3V Reg
Energy Star 8
Audio Compliant.
Amp +5V to 3.3V
IC506 +3.3V Reg Less than 1 7 7 Va
3.3V
All EDID ICs Watt
X Board Va 8
X Board
3.3VST 5 MAIN Left Right
3.3V Reg
IC500 2 Error Relay M_On Board STBY 5V
Det. On 7
SOC_Reset
3 2 Front IR / Soft Touch
Microprocessor
R200/C142 Power On Key Pad
IC101 4 4
Remote or Key Pad Board
Remote Power Key Power Key
65 June 2011 42PW350 Plasma
Power Supply Va and Vs Adjustments
Example
Important: The Power Supply adjustments
Voltage Label
Must
Must be performed First
First before any
other adjustments.
VA VS
Important: Use the Panel Label VR502 VR901
Not this book for all voltage adjustments.
Vs TP
V
Use Full White Raster White Wash Pin 1 or 2
For all Adjustments. Va TP
Pin 6 or 7

Vs Adjust:
Place voltmeter on VS TP.
Adjust VR901 until the reading
matches your Panels label.

Va Adjust:
Place voltmeter on VA TP.
Adjust VR502 until the reading
matches your Panels label.

66 June 2011 42PW350 Plasma


42PW350 Power Supply Static Test with Light Bulb Load
Using two 100 Watt light bulbs, attach one end to Vs and the other end to ground. Apply AC to SC101. If the light bulbs
turn on and VS is the correct voltage, allow the SMPS to run for several minutes to be sure it will operate under load.
If this test is successful and all other voltages are generated, you can be fairly assured the power supply is OK.
Note: To be 100% sure, you would need to read the current handling capabilities of each power supply listed on the silk
screen on the SMPS and place each supply voltage under the appropriate load.
Note:
Always test the SMPS under a load using the
2 light bulbs.
F301 2 or 1 Pins
4A/250V Abnormal operational conditions may result if not
VS P811
STBY 160V Supply loaded.
RUN 390V VS TP VS
CURRENT LABEL

100W
VA TP

F302 XP5 42T3


2.5A/250V VR901 VA
VR502 INPUT: 100~240V ~ 50/60Hz 3.2A

100W
VS Adj Supply
VA Adj
L602 Gnd 17V: 17V = 1.0A VS: 199-203V = 1.3A
STBY 160V
RUN 390V
5.1V: 5.1V = 3.0A VA: 55V = 1.5A
P811 STBY5V: 5V = 1.0A M5V: 5.1V = 2.5A
PDP Module Max: 210W
5V Check Pins 1 or 2
P811 T901 Supply
for Vs voltage LG Electronics
L601
Check Pins 5
SMPS 17V
P/N: EAY62170901 Supply for Va voltage

RL103 Check Pins 6 P813


P702 P813 for M5V voltage Check Pins 1 or 2
F101 For 17V (17V)
10A/250V

SC101 Check Pin 5,6 and 7


for (+5.22V)
Note:
To turn on the Power Supply; Check Pin 8
1) With Main Board connected, press power. for Error Det (4.95V)
2) Without Main Board connected SMPS will turn on automatically.
Check Pins 13 or 14
for 5V SBY (5.22V)
Any time AC is applied to the SMPS, STBY 5V will be 3.46V and will be 5.14V when the set turns on.
AC DET WILL NOT be present until set comes on, if missing it will mute the audio. Check Pin 16
Error line WILL NOT be present until set comes on, but its not used. for AC Det (4.96V)

67 June 2011 42PW350 Plasma


Power Supply Static Test (Forcing on the SMPS in stages)
WARNING: Remove AC when adding or removing any plug or resistor.

TEST CONDITIONS:
Connector going to the Z-SUS P811 is disconnected.
P601 on the Main board disconnected (coming in on P813).
Use the holes on the connector P501 (Main Board side) to insert the resistors or jumper leads.
Connect (2) 100 Watt light bulbs in series between VS and Ground.

When the supply is operational in its normal state the Auto Ground line
at Pin 18 of P813 is held at ground by the Main Board.
This Power Supply can be powered on sequentially to test the Controller
Chip IC701 operational capabilities and for troubleshooting purposes.
By disconnecting P501 on the Main board, pin 18 is opened. To return the
SMPS to the normal state for the Static Test procedure, this pin must be
grounded. (See first step A below).

Note: Leave previous installed 100 resistor in place


when adding the next resistor.

(A) Ground the Auto Gnd Line (Pin 18) will allow the supply to be
powered up one section at a time.

(B) Add a 100 watt resistor from 5V Standby to RL_ON and the 17V
and 5V Run Lines on P813 will become active
active. Also AC-Det and
Error_Det will go high.

(C) Add a 100 watt resistor from any 5V line to M_ON (Monitor On) to
make the M5V, VS and VA lines operational.
P811 (VS pins 1 and 2) (VA pins 5) and the (M5V pins 6).
6)

68 June 2011 42PW350 Plasma


P813 SMPS Connector Identification, Voltages and Diode Check
P813 "SMPS" to P601 "Main"
Pin Label STBY Run No Load Diode Check P813
e
18 Auto_Gnd Gnd Gnd 4.87V OL
b
17 M_ON 0V 3.29V 0V OL
ad
16 AC Det 0V 4 15V
4.15V 4 95V
4.95V OL
a
15 RL_ON 0V 2.22V 0V OL
13-14 STBY_5V 3.46V 5.16V 5.2V OL
9-12 Gnd Gnd Gnd Gnd Gnd
8 ac
Error_Det 3.39V 4.89V 4.94V OL 1
a
5-7 5.1V 0V 5.16V 5.2V 2.38V
3-4 Gnd Gnd Gnd Gnd Gnd
a
1 2
1_2 17V 0V 17V 17V OL

a Note: The 17V, 5V, AC_Det and Error Det turn on when the RL_On command arrives.
b Note: The M5V, Va and Vs turn on when the M_On (Monitor On) command arrives.
c Note: The Error Det line is not used in this model. Note:
d Note: If the AC Det line is Missing This connector has two
Missing, the Audio will Mute.
Mute
e Note: Pin 18 is grounded on the Main board. If this line is floated, the SMPS turns on rows of pins.
Automatically when AC is applied. Even on bottom row.
Odd on top row.

Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.

69 June 2011 42PW350 Plasma


P811 & SC101 SMPS Connector Identification, Voltages and Diode Check

SC101 AC INPUT

Connector Pin Number Standby Run Diode Mode


SC101 L and N 120VAC 120VAC Open

P811 "Power Supply" to P7 "Z-SUS"


P811
Pin Label Run Diode Check
1~2 Vs *200V OL
n/c n/c n/c n/c
Vs TP
3~4 Gnd Gnd Gnd
5 Va *55V
55V OL
1 6 M5V 5.06V 2.39V

* Note: Voltages vary according to the Panel Label

Va TP Z-SUS routes Va to the Z-SUS and then to the Bottom X-Right.


Vs routed to Y-SUS from P2 on the Z-SUS.
M5V routed through Z-SUS to Control board and to Y-SUS.`

Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.

70 June 2011 42PW350 Plasma


Z-SUS SECTION
This Section of the Presentation will cover troubleshooting the Z-SUS Board Assembly.
Upon completion of this section the Technician will have a better understanding of the circuit and be
able to locate voltage and diode mode test points needed for troubleshooting and all alignments.

Note: The Z-SUS can run Stand-Alone in the 42T3 Panel Models.

LOCATIONS: DC Voltage and Waveform Test Points


Z BIAS Alignment
Diode Mode Test Points

OPERATIONAL VOLTAGES:
Power Supply Supplied VS Also Routed to Y-SUS Board.
M5V Also Routed to the Y-SUS and to the Control Board.

VA Not used by the Z-SUS but Routed to the Z-SUB and


then to the Right X-Board
X-Board.

Y-SUS Supplied 18V Routed through Control Board


Developed on Z-SUS Z Bias

71 June 2011 42PW350 Plasma


Z-SUS Block Diagram Simplified Block Diagram of Z-SUS (Sustain) Board

Y-SUS Board Power Supply Board


18V M5V

Control Board VS, M5V and VS, VA and


Z-SUB
ERR_COM M5V

M5V Via 2 FPC


VA
Flexible
Z-SUS board receives VS and Printed
Circuits
18V M5V SMPS and 18V from the
Control board
Receives
PDP
Logic
Signals
Display

Circuits generate erase, Generates


G t Panel
sustain waveforms Z Bias 125V

NO IPMs

FET Makes Drive waveform

VA VA
X-Board Left X-Board Right

72 June 2011 42PW350 Plasma


Z-SUS Board Component Identification P/N EBR68342001

P7 Top Two
In on this Connector: P2 Pins are VA
VS, M5V and VA VS, M5V to Z-Bias
Y-SUS.
Y SUS. VR1
Z-Bias TP
Also Error Com R151
P4

No IPMs
Z-SUS
Waveform
Z-SUS Test Point
W
Waveform
f J17
Development and
In on this Connector: output
M5V from SMPS to the P6 FETs
Y-SUS generates +18V. from
M5V and 18V are routed Control
through the Control
board.
Logic Signals generated P3
on the Control board.

P3 To Z-SUB

73 June 2011 42PW350 Plasma


42PW350 Z-SUS Layout Drawing
Example:
Model : PDP 42T3###
Voltage Setting: 5V/ Va:55/ Vs:200
N.A. / -200 / N.A. / N.A. / 125 FS2 VA
Z-Bias P2
P2 Connector Z-SUS to Y-SUS P206
Pin Label Run Diode Check
VR1 10A/125V
1~4 ERROR 102V OL
Vzbias Vzbias TP
5 n/c n/c n/c
P7 R151
6~7 VS 200V OL
8 n/c n/c n/c
FS1/FS2: Diode Check Top 2 Pins
9~11 Gnd Gnd Gnd
12 M5V 5.06V 1.03V
7A/125V OL: Connected or Disconnected
are VA
FS3 (M5V)
*VS Varies with Panel Label FS3: Diode Check P4
0.76V: Connected
P7 Connector Z-SUS to SMPS P811 1.03V: Disconnected
Pin Label Run Diode Check
1~2
n/c
*VS
n/c
200V
n/c
OL
n/c
FS1 VS
3~4
5
Gnd
*VA
Gnd
55V
Gnd
OL
Z-SUS
6 M5V 5.06V 1.03V P/N: EBR68342001
*VS/VA Varies by Panel Label 6.3A/250V
P6 Connector Z-SUS to Control P2
Pin Label Run Diode Check
1~3 15V 18.2V 2.18V The Z-SUS will run stand alone.
4~5 M5V 5.06V 1.03V Disconnect P2 to the Y-SUS. Z-SUS
6 Y-OE OL Disconnect P105 on CTL. Board. Waveform
0.05V
Jump 17V from the SMPS J2
7 CTRL_OE Gnd
Gnd
(just left of P813) to Z-SUS J1 J17
8 VZ_CON 3.25V OL
(just above P6) connector.
9 GND Gnd Gnd
Ground Y-OE Z-SUS (bottom R1).
10 ZBIAS 1.92V OL
Output Waveform J17 (281V p/p).
11 N/C Gnd OL R1
0.79V 18V J1
12 ZSUSDN OL
Y-OE
13 Gnd Gnd Gnd 5V J28 P3
14 ZSUSUP 0.22V OL P6
15 Gnd Gnd Gnd

74 June 2011 42PW350 Plasma


Z-SUS Waveform
The Z-SUS (in combination with the Y-SUS) generates a SUSTAIN Signal and an ERASE PULSE
for g
generating
g SUSTAIN and DISCHARGE in the Panel.
This waveform is supplied to the Z-SUB through P3 and P4 and then to the panel through two
FPC (Flexible Printed Circuit) connections P201 and P202.
Reset

577V p/p

Y Drive
W
Waveform
f

Oscilloscope Connection Point.


J17 to check Z Output waveform.
Right Hand Side Center.
Z Drive
Di
230V p/p Waveform
(Vzb) Z Bias VR1 manipulates the
offset of this waveform segment.
100V p
per/div 100uSec Vzb voltage *125V 1V (*See Your Label)

TIP: The Z-Bias (VZB) Adjustment is a DC level adjustment.


This is only to show the effects of Z-Bias on the waveform.

TIP: To help lock the scope when capturing the Z-SUS Waveform, us the
VS DA TP on the Control Board for an External Clock.
VS_DA Clock

This Waveform is just for reference to observe the effects of Zbz adjustment

75 June 2011 42PW350 Plasma


VZB (Z-Bias) VR1 Adjustment
Read the Voltage Label on the panel when adjusting

Top Right of Z-SUS Board

VZB
VZB (Z Bias) VR1
VR1 LOCATION
VZB (Z
(Z-Bias)
Bias) TP
R151

-
+

Set should run for 15 minutes, this is the Heat Run mode.
Set screen to White Wash mode or 100 IRE White input.
All SMPS adjustments should have been completed.
1. Place DC Volt meter between VZB TPs.
2. Adjust VZB (Z Bias) VR1 in accordance with your Panels voltage label.

76 June 2011 42PW350 Plasma


Z-SUS Board Fuse Identification P/N EBR68342001

FS2
VA Fuse
10A / 125V
FS3
M5V Fuse
7A / 125V

FS1
VS Fuse
6.3A / 250V

77 June 2011 42PW350 Plasma


P7 Connector to SMPS P811 Voltages and Diode Checks
Voltage and Diode Mode Measurements

P2 Location: Top Left


P7 "Z-SUS" to "SMPS" P811
Pin Label Run Diode Check
Pin 1
1~2 +Vs *200V OL
3~4 Gnd Gnd Gnd
5 +Va *55V OL
6 M5V 5.06V 1.03V
* Note: Varies according to Panel Label

There are no Stand-By voltages on this connector

Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.

78 June 2011 42PW350 Plasma


P2 Connector to Y-SUS P206 Voltages and Diode Checks
Voltage and Diode Mode Measurements

P2 "Z-SUS" to "Y-SUS" P206


P2 Location: Top Left
Pin Label Run Diode Check
1~4 ER_PASS 98V~102V OL
5 n/c n/c n/c
6~7 +Vs *200V OL
8 n/c n/c n/c
9~11 Gnd Gnd Gnd
12 M5V 5.06V 1.03V
Pin 1
* Note: This voltage will vary in accordance with Panel Label

There are no Stand-By voltages on this connector

Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.

79 June 2011 42PW350 Plasma


P6 Connector to Control P2 Voltages and Diode Checks
Voltage and Diode Mode Measurements

P6 "Z-SUS Board" to P2 "Control"


Location
Pin Label Run Diode Check Bottom Left hand side
1~3 (+15V) 18.2V 2.18V
4~5 M5V 5.06V 1.03V
6 Y-OE 0.05V OL
7 CTRL_OE Gnd Gnd
8 VZ CON
VZ_CON 3 25V
3.25V OL
Pin 1
9 Gnd Gnd Gnd
10 ZBIAS 1.92V OL
11 n/c n/c OL
12 ZSUSDN 0.79V OL
13 Gnd Gnd Gnd
14 ZSUSUP 0.22V OL
15 Gnd Gnd Gnd

There are no Stand-By voltages on this connector

Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.

80 June 2011 42PW350 Plasma


Testing the Z-SUS without the Y-SUS (Stand-Alone)
This procedure will test the Z-SUS, Power Supply
and Control board without the Y-SUS. Tip: On SMPS just to the left of P813. Use jumper J2 for 17V.

(1) Disconnect
P206

(1) Jump 17V (J2) SMPS (2) Ground Y-OE


to J1 on the Z-SUS (Bottom of R1)

(1) Disconnect P813

(4) Check J17


for 281V p/p
Leave P6 to P2
connected
(1) Disconnect P101

(3) Apply AC

Tip: Disconnect P206 on Y


Y-SUS.
SUS Jump Only
Only M5V to the Y
Y-SUS
SUS (Not VS).
VS) If this brings up the 18V on P101 pins
24~27, then leave P101 connected. There will be no need to jump 17V to the Z-SUS.

81 June 2011 42PW350 Plasma


Y-SUS BOARD SECTION (Overview) p/n: EBR68341901

Y-SUS Board develops the V-Scan drive signal to the Y-Drive boards.

This Section of the Presentation will cover alignment and troubleshooting the Y-SUS Board
for the Single Scan Plasma. Upon completion of the Section the technician will have a better
understanding of the operation of the circuit and will be able to locate voltage and
Diode mode test points needed for troubleshooting and alignments
alignments.
Adjustments
DC Voltage and Waveform Checks
Diode Mode Measurements
Operating Voltages

Z-SUS Supplied VS Supplies the Panels Horizontal Electrodes. (Routed from the Z-SUS board).
From SMPS M5V Supplies
S li Bias
Bi to
t Y-SUS.
Y SUS (Also
(Al routed
t d to
t the
th Control
C t l Board
B d then
th Z-SUS).
Z SUS)

Y-SUS Developed -VY VR502 -VY Sets the Negative excursion of Reset in the Drive Waveform.
V SET UP VR601 SET UP sets amplitude of the Top Ramp of Reset in the Drive Waveform.
V SET DN VR401 SET DOWN sets the Pitch of the Bottom Ramp for Reset in the Waveform.
Used internally to develop the Y-Drive
Y Drive signal.
signal (Also routed to the Control Board
then routed to the Z-SUS board).
18V / VSC Note: There is no VSC or 18V adjustment on this model.

Floating Ground FG 5V Used on the Y-Drive board (Measured from Floating Gnd)
FG 15V Used in the Development of the Y-Drive Waveform (Measured from Floating Gnd)

82 June 2011 42PW350 Plasma


Y-SUS Block Diagram Distributes Va

Distributes Vs, M5V, Va


Power Supply Board - SMPS
Z-SUS Board Z-SUB

Simplified Block Diagram of Distributes Vs, M5V


Y-Sustain Board
Distributes
18V / M5V
Y-SUS Board Distributes M5V
Receive M5V, Vs
from Z-SUS Control Board
Distributes 18V

M5V VS
Generates Vsc and -Vy
Circuits generate
From VS by DC/DC Converters Distributes Distributes
Y-Sustain Waveform
Also controls Set Up/Down 3.3V VA
M5V
Generates Floating
g Ground Right X Board
5V & 15V by DC/DC Converter
FETs amplify Y-Sustain Also 18V by same DC/DC
Waveform
FG5V
Left X Board
Logic signals needed to
scan the panel Y-Drive Board
Display Panel
Receives Scan Waveform

Logic signals needed to generate drive waveform

83 June 2011 42PW350 Plasma


Y-SUS Board Layout
p/n: EBR68341901 c M5V, VS and
P206 ERR_COM
from Z-SUS

All Floating Gnd


c VR601
P213
Set Up

T Y-Drive
To YDi

1~10 Floating Gnd


11~12 FG5V -Vy TP

VR502
-Vy VR401
18V (pins 28~30)
c Set Up
to Control for Z-SUS
1~2 Y-SCAN P212 C213 M5V (pins 24-27) for both
3 4 VPP
3~4
6~12 Scan Data
Ribbon
c P101 c Logic Signals from
P211
FS501 (18V) the Control Board
Logic Signals to 2A/125V
Y-Drive Board

84 June 2011 42PW350 Plasma


42PW350 Y-SUS Example:

Layout Drawing P206


Model : PDP 42T3###
Voltage Setting: 5V/ Va:55/ Vs:200
N.A. / -200 / N.A. / N.A. / 125
TIP: There are Chocolate pieces between the
You can run FG supplies and 18V Y-SUS and the Panel. Be sure to return
Remove All Connectors. them to there correct location if they -Vy
Short OE (J73) to Gnd. should fall off when removing the Y-SUS. P206 Y-SUS to Z-SUS P2
Supply any 5V to the Y-SUS and Gnd. Pin Label Run Diode Check
Use J35 or J13 as M5V TP.
1~4 ERROR 102V OL
5 n/c n/c n/c
6~7 VS 200V OL
8 n/c n/c n/c
9~11 Gnd Gnd Gnd
Y-SUS
P213 Connector Y-SUS to Y-Drive P101 12 M5V 5.03V 1.15V
P/N: EBR68341901
Pin
1~12
Label Run Diode Check
P213
Floating Gnd FGnd FGnd P101 Y-SUS to Control P105
Pin Label Run Diode Check

VR601 28~30 15V 18.2V 1.13V


1.15V
Set-Up 24~27 5V 4.94V
20~23 Gnd Gnd Gnd

19 Dummy2 2.14V OL
18 Y-OE 0.03V 2.02V

17 PC 1.84V OL
Use Left leg of C213 for
P212 Connector Y-SUS to Y-Drive P102 16 ER_DN 0.5V OL
Y-Drive TP.
Pin Label Run Diode Check Y-Drive board removed 470Vp/p -Vy TP 15 DATA_PRE 0.01V OL
1~10 Floating Gnd FGnd FGnd With Y-Drive board 485Vp/p
11~12 FG5V 5.06V 1.57V
R201 14 ER_UP 0.3V OL
13 SC_A 1.45V OL

P211 "Y-SUS" to "Y-Drive" P106


-Vy Adj VR401 12 RAMP_UP 0.22V OL

Pin Label Run Diode Check FG15V VR502 Set-Dn 11 STB 1.5V OL
1~2 VSC (Y-Scan) 146.2V OL J66 FG5V 10 RAMP_BLK 1.07V OL
3~4 VPP 145V OL J54 D502 18V J55
9 CLK 0.6V OL
T501
5 n/c n/c OL
P212 D503
8 SUS_DN 2.71V OL
6 SUS_DN (FG) FG FG M5V J13 7 DUMMY_3 2.14V OL
Scan FG D506
7 CLK 0.92V 1.46V
6 DUMMY_1 1.07V OL
8 STB 2.24V 1.46V C213 OE J73
FS501 5 DUMMY_4 1.35V OL
9 OC1 2.26V 1.54V T502
10 DATA 0V 1.46V
18V 4 SUS_UP_0 0.75V OL
11 OC2 2.8V 1.54V
P211 Back of Board M5V J35 D506 18V Source P101 3 CTRL_OE 0.11V OL
D508 FG15V Source D502 -Vy Source 200V RAMP_DN 2.17V OL
12 SUS_DN (FG) FG FG 2
IC508 FG5V Source D503 VSC Source 146V
Black Lead on FG (Floating Gnd) 1 Gnd Gnd Gnd

85 June 2011 42PW350 Plasma


-VY Adjustment CAUTION: Use the actual panel label and not the book for exact voltage settings.
This is just for example
These are DC level Voltage Adjustments.
They are generated when the VS voltage arrives on the board
board.

PROCEDURE:
Set should run for 15 minutes, this is the Heat Run mode.
Set screen to White Wash. -Vy
1) Adjust Vy VR502 to Panels Label voltage (+/- 1V)

Location: Bottom Center of board


Just Left of Transformer T501

+
-Vy TP
R201
VR502
-VY ADJ

Voltages Reads Positive

Location: Bottom Center of board


Note: There is no VSC adjustment in this model. Just above Transformer T501

86 June 2011 42PW350 Plasma


Y-Drive Signal Overview
Note, this TP
Y-Drive Test Point (VS_DA) can be
(Under 2nd Buffer from Top) used as an External
Trigger for scope
when locking onto
the Y-Drive (Scan) or
the Z-Drive signal.

This signal can also


be used to help lock
the scope when
observing the LVDS
video signals.
NOTE: The Waveform Test Points
are fragile. If by accident the land
is torn and the run lifted, make
sure there are no lines left to right
in the screen picture.

There are several other test points on


either the Upper or Lower Y-Drive
boards that can be used.
Basically any output pin on any of the
FPC to the panel are OK to use.

87 June 2011 42PW350 Plasma


Observing (Capturing) the Y-Drive Signal for Set Up Adjustment Adjustment
Area
Set must be in WHITE WASH
All other DC Voltage adjustments should have already been made.
Fig 1
Fi 1:
As an example of how to lock in to the Y-Drive Waveform. Fig Area to
1 shows the signal locked in at 2ms per/div. expand FIG1
Note the 2 blanking sections. 2mS
Blanking Blanking
j
The area for adjustment is p
pointed out within the Waveform
Adjustment
Fig 2: Area
At 200uSec per/division, the area of the waveform to FIG2
use for SET-UP or SET-DN is now becoming clear. Area to 200uS
p
expand
Now only one blanking signal is present.
present
Expanded
from above
Fig 3:
At 100us per/div the area for adjustment of SET-UP or SET-DN FIG3
i now easier
is i tto recognize.
i It is
i outlined
tli d within
ithi th
the W
Waveform.
f 100uS
st
Remember, this is the 1 large signal to the right of blanking.
155V Expanded from above
p/p
TIP: If yyou expand
p to 40uSec p
per/division, the Area for Set
Set-Up
Up
adjustment for: adjustment
SET-UP can be made using VR601 and the
SET-DN can be made using VR401. Blanking
It will make this adjustment easier if you use the
Expanded mode of your scope.
Expanded scope
Area for Set-Dn
adjustment
195 uSec
88 June 2011 42PW350 Plasma
Set Up and Set Down Adjustments
Set must be in WHITE WASH
All other DC Voltage adjustments should have already been made.

Observe the Picture while making these adjustments


adjustments. Normally
Normally, they do not have to be done
done.

ADJUSTMENT LOCATION: Waveform TP on the Y-Drive Board


Center Right of the board.

Y-Drive Test Point

U d 2nd Buffer
Under B ff from
f top
t

VR601

SET-UP ADJUST:
1) Adjust VR601 and set the (A) portion of the signal to
match the waveform above. (155V p/p 5V)
B
SET-DN ADJUST:
2) Adjust VR401 and set the (B) time of the signal to match
VR401
the waveform above. (195uSec 5uSec)

TIP: To help lock the scope when capturing the


ADJUSTMENT LOCATION:
Y SUS Waveform,
Y-SUS W f us the
th VS_DA
VS DA TP on the
th Control
C t l
Bottom Right
Board for an External Clock.
Just above P101

89 June 2011 42PW350 Plasma


Set Up or Down Adjustment Extremes
Set Up swing is Minimum 146V Max 204V p/p Set Dn swing is Minimum 146uSec Max 206uSec

Back
Porch
Normal
155V

Too Low
146V
Too Short
146uSec
Normal
195uSec

Backk
B
Porch

Too High 206uSec


204V 200V off
th Fl
the Floor
Normal
155V
Floor

90 June 2011 42PW350 Plasma


Y-SUS Board Troubleshooting Y-Scan
Caution: Do not use C213 for adjustments on the Y-Scan
signal. This is just a Test Point for board operation.

TIP: Use C213 Right leg to test for


V-Scan signal when the Y-Drive board is removed

Y-SUS Board develops the Y-Scan drive signal


to the Y
Y-Drive
Drive board.
board The Y Y-SUS
SUS (Y(Y-Scan)
Scan) signal can be
tested on the left leg of C213 if the Y-Drive board is defective
and has to be removed. (Check for 470V p/p)

C213
Left Leg
Y-SCAN

91 June 2011 42PW350 Plasma


P213 Y-SUS Board Connector to P101 Y-Drive (Floating Ground)

P101 P213

All pins are Floating Ground.

Y-Drive Y-SUS
Board Board

92 June 2011 42PW350 Plasma


P212 Y-SUS Board Connector to P102 Y-Drive (Floating Ground 5V)
P212 "Y-SUS" to "Y-Drive" P102
Y-Drive
Y Drive Y-SUS
Y SUS
Pin Label Run Diode Check Diode Check
Board Board
1~10 FGnd FGnd FGnd FGnd

11~12 FG5V 5.06V 1.63V 0.56V

Black Lead Red Lead


Floating Floating Gnd Floating Gnd
Pins 1~10 c Ground 15V
Floating TP
Ground

P211 Note: Pin 1 is at the top.

FG5V (4.9V) measured from Pins 11 or 12


c to Floating Gnd.
Floating
For Floating
g Ground,, use any
yppin on P213.
G
Ground
d 5V TP P102

93 June 2011 42PW350 Plasma


P211 Y-SUS Board to Y-Drive P106 Logic Signals Explained
P211 Connector

Pins 7~11
Pin Label
1~2 VSC (Y-Scan)
3~4
3 4 VPP
c 5 n/c
P211
6 SUS_DN (FG) (4mSec per/div)
7 C
CLK
These signals look very similar
8 STB due to the fact they are read from Chassis Gnd,
9 OC1 but they are actually Floating Ground related.
DO NOT hook scope Gnd to Floating Gnd TP
10 DATA without
ith t an Isolation
I l ti Transformer.
T f

11 OC2
c 12 SUS_DN (FG)
All logic pins about (420V p/p)

Y-Drive Y-SUS
Board P106 Board Pins 7~11 are Logic (Drive) Signals to the Y-Drive Upper.

94 June 2011 42PW350 Plasma


P211 Y-SUS Connector Diode Mode Testing
P106 P211 Measurements taken from Floating Gnd.
For Floating Ground use any pin on P213.

P211 "Y-SUS" to "Y-Drive" P106

Pin Label Run Diode Check


c 1 2
1~2 VSC (Y
(Y-Scan)
S ) 146 2V
146.2V OL

3~4 VPP 145V OL

5 n/c n/c OL

6 SUS DN (FG)
SUS_DN FG FG

7 CLK 0.92V 1.46V

8 STB 2.24V 1.46V

9 OC1 2.26V 1.54V

10 DATA 0V 1.46V

11 OC2 2.8V 1.54V

12 SUS_DN (FG) FG FG
Y Drive
Y-Drive Y SUS
Y-SUS
Board Board Black Lead on FG (Floating Gnd)

Diode Mode Readings taken with all


Y-Drive Board should be DISCONNECTED connectors Disconnected.
f the
for th Di
Diode
d MMode
d ttest.
t DVM in Diode Mode.
Mode

95 June 2011 42PW350 Plasma


Y-SUS Floating Ground (FG 15V, FG 5V) and 18V Checks and Test
TIP: Some Circuit components are on the back of the board. To Test these voltages, remove the board completely,
supply Ground and any 5V supply Y-SUS. Ground OE Jumper J73.

These voltages are generated when the M5V arrives on the board.
Floating Ground checks must be made from Floating Ground.
Use any pin on P213.

FG 15V J66
D506 Cathode
Run: 18.2V
Diode Check
FG 5V J54 1 13V
1.13V
D506 18.2V

Location
J73 OE

T502

Location Back Side of Board


Source FG15V (Floating Ground 15V) D508 cathode.
Source FG5V (Floating Ground 5V) FG15V Must be grounded to test FG5, FG15V
i regulated
is l t dd
down to
t 5V bby IC508.
IC508 and 18V with only 5V applied to board.

96 June 2011 42PW350 Plasma


Y-SUS 18V Fuse Information
Location

FS501
((18V))
2A/125V

FS501 Protects 18V line (created by D506 and T502). 18V is


used on the Y-SUS and leaves the Y-SUS on P101 pins 28~30 to
the Control Board. Then leaves the Control board on P2 pins
13~15 and goes to the Z-SUS arriving on P201 pins 1~3.

Diode Check with Board Connected. Diode Check with Board Disconnected.
0.85V Black lead on Chassis Ground. 0.5V Red Lead on Chassis Gnd
1 13V Black Lead on Chassis Gnd
1.13V

97 June 2011 42PW350 Plasma


P206 Y-SUS Voltage and Diode Mode Measurement

P206 "Y-SUS"
Y-SUS to "Z-SUS"
Z-SUS P2
Pin Label Run Diode Check
1~4 ER_PASS 98V~102V OL P206
5 n/c n/c n/c
6~7 +Vs *200V OL c
8 n/c n/c n/c
9~11 Gnd Gnd Gnd
12 M5V 5.06V 1.15V

* Note: These voltages will vary in accordance with Panel Label

Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.

98 June 2011 42PW350 Plasma


P101 Y-SUS to Control P101 Plug Voltage Checks
There are No Stand By
TIP: The ribbon does not come with a new Y-SUS or Control board. Voltages on this Connector

TIP: Use the Control Board (P101) side of this connector to make voltage readings
readings.

P101 "Y-SUS" to P105 "Control"

Pin Label Run Diode Check Pin Label Run Diode Check
28 30
28~30 +15V
15V 18 2V
18.2V 1 13V
1.13V 11 STB 1 5V
1.5V OL
24~27 +5V 4.94V 1.15V 10 RAMP_BLK 1.07V OL
20~23 Gnd Gnd Gnd 9 CLK 0.6V OL
19 Dumy2 2.14V OL 8 SUS_DN 2.71V OL
18 Y-OE 0.03V 2.02V 7 DUMMY_3 2.14V OL
17 PC 1.84V OL 6 DUMMY_1 1.07V OL
16 ER_DN 0.5V OL 5 DUMMY_4 1.35V OL
15 DATA_PRE 0.01V OL 4 SUS_UP_0 0.75V OL
14 ER UP
ER_UP 0 3V
0.3V OL 3 CTRL OE
CTRL_OE 0 11V
0.11V OL
c
13 SC_A 1.45V OL 2 RAMP_DN 2.17V OL

12 RAMP_UP 0.22V OL 1 Gnd Gnd Gnd

Diode Mode Readings


taken with all connectors
Disconnected.
DVM in Diode Mode.

99 June 2011 42PW350 Plasma


Y-DRIVE BOARD SECTION (Y-
(Y-Drive Explained) p/n: EBR68288401

Y-DRIVE BOARD

The 42PW350 uses 8 Driver ICs on


one Y-Drive Board commonly called
Y-Drive Buffers but are actually Gate Arrays.
Y-Drive Board works as a path supplying the
Sustain and Reset waveforms which are made
in the Y-Sustain board and sent to the Panel
through Scan Driver ICs.
The Y-Drive Boards receive a waveform
developed on the Y-SUS board then selects the
horizontal electrodes sequentially starting at the
top and scanning down the panel.
Scanning is synchronized by receiving Logic
scan signals from the Control board.

100 June 2011 42PW350 Plasma


Y-Drive Board Layout

Key Points of interest are;


There are 6 FPC (Flexible Ribbon Cables)
connecting the Y-Drive board to the Panel. These
FPC connect to a total of 1080 individual
Y-DRIVE electrodes
l t d determining
d t i i Vertical
V ti l resolution.
l ti
BOARD
Floating Ground is delivered to the Y-Drive board
P101 All Pins via all 3 connectors. P101 is only FG.
Floating Ground
Y-Scan
Y S and
d VPP are delivered
d li d to
t the
th Y-Drive
YD i
board by P106.
The Y-Drive board operates from Floating Ground,
P102 top 10 pins FG (no reference to Chassis Gnd). However, when
Bottom 2 pins FG5V
reading the Y-Drive Waveform with a scope, use
chassis ground only.
P106
Top 2 pin Y-Scan Floating Gnd 5V can be measured across C18 or
Pins 10~9
10 9 VPP
Pins 1~6 Logic (Scan C523 surface
f mountt electrolytic
l t l ti capacitors
it or
Control signals Fuse FL1 next to P102.

101 June 2011 42PW350 Plasma


Y-Drive Diode Check Scan and FG
This checks the output Buffers or the input side of the board.

PANEL Y-SUS
Y SUS
SIDE SIDE

FG5V TP

Any Connector to the Panel


(Buffer Output TP) Front Side
P101 C18 +
Floating Gnd
Diode Mode Reading from Floating Ground
FL1
Scan Signal TP
OL with Red Lead on Scan
1.13V with Black Lead on Scan
P102
VPP Signal TP
OL with Red Lead on Scan
0.67V with Black Lead on Scan

FG5V TP (P106 pins 2 and 3)


P106 VPP OL with Red Lead on Scan
TP 0.53V with Black Lead on Scan

Y-Scan
Any Output Buffer TP
TP OL with Red Lead on Scan
0.80V with Black Lead on Scan

102 June 2011 42PW350 Plasma


Y-Drive Buffer Troubleshooting
You can Check for a shorted Buffer output using this check.
6 Ribbon cables communicating with the Panels
Panel s (Horizontal
Any connector going to the Panel. Electrodes) totaling 1080 lines determining the Panels Vertical
BACK SIDE FRONT SIDE resolution pixel count.

Using the Diode Test on the DVM, check


the pins for shorts or abnormal loads.

BUFFER IC
(FGnd)

RED LEAD On BLACK LEAD On ANY


Floating Ground Output Lug Reads 0.80V
White outline on Left

BLACK LEAD On RED LEAD On ANY


Floating Ground Output Lug Reads Open
Indicated by white outline

Any of these output lugs can be checked from


floating ground. Look for shorts indicating a
defective Buffer IC

103 June 2011 42PW350 Plasma


Removing (Panel) Flexible Ribbon Cables from Y-Drive Upper or Lower
Flexible Ribbon Cables shown may be different, but process is the same.
To remove the Ribbon Cable from the connector first carefully lift the Locking Tab from
the back and tilt it forward ( lift from under the tab as shown in Fig 1).
The locking tab must be standing straight up as shown in Fig 2.
Lift up the entire Ribbon Cable gently to release the Tabs on each end. (See Fig 3)
Gently slide the Ribbon Cable free from the connector.
connector
Be sure ribbon tab is released
By lifting the ribbon up slightly,
Gently Pry before removing ribbon.
Up Here

Locking tab in
upright position

Fig 1 Fig 2 Fig 3

To reinstall the Ribbon Cable, carefully slide it back into the slot see ( Fig 3 ), be sure the Tab is seated
securely and press the Locking Tab back to the locked position see ( Fig 2 then Fig 1).

104 June 2011 42PW350 Plasma


Incorrectly Seated Y-Drive Flexible Ribbon Cables

The Ribbon Cable is clearly improperly seated


into the connector. You can tell by observing the
line of the connector compared to the FPC, they
should be parallel.
p

The Locking Tab will offer a greater resistance to


closing in the case.

Note the cable is crooked. In this case the Tab on


the Ribbon cable was improperly seated at the
t
top. This
Thi can cause bars,
b lines,
li iintermittent
t itt t lilines
abnormalities in the picture.

Remove the ribbon cable and re-seat


re seat it correctly
correctly.

105 June 2011 42PW350 Plasma


P101 Y-Drive to Y-SUS P213 (Floating Ground)

P101 P213

All pins are Floating Ground.

Y-Drive Y-SUS
Board Board

106 June 2011 42PW350 Plasma


P102 Y-Drive to Y-SUS P212 (Floating Ground 5V)
P102 "Y-Drive" to P212 "Y-SUS"
Pin Label Run Diode Check Diode Check Y-Drive
Y Drive Y-SUS
Y SUS
12~3 FGnd FGnd FGnd FGnd Board Board
1~2 FG5V 5.06V OL 0.53V
Black Lead Red Lead
Floating Gnd Floating Gnd

Pins 1~10 c
Floating
Ground

Note: Pin 1 is at the bottom. P211

FG5V (4.9V) measured from Pins 1 or 2


to Floating Gnd. c
For Floating
g Ground,, use any
yppin on P101.
Floating P102
Ground 5V TP

107 June 2011 42PW350 Plasma


P106 Y-Drive to Y-SUS P211 Y-Drive Logic Signals Explained
The purpose of the Logic Signals sent to the Y-Drive board are to address a specific gate out of the 8
y ((Buffers)) to allow the output
Gate arrays p of the Y-Drive signal.
g The Panel is scanned from the Top
p ((Gate
1) to the Bottom (Gate 1080) every frame.

P211 Connector

Pins 7~11
Pin Label

11~12 VSC (Y-Scan)

9~10 VPP

8 n/c
c
P211
7 SUS_DN (FG)
(4mSec per/div)
6 CLK

5 STB
These signals look very similar
due to the fact they are read from Chassis Gnd, 4 OC1
but they are actually Floating Ground related.
DO NOT hook scope Gnd to Floating Gnd TP 3 DATA
without an Isolation Transformer.
2 OC2
All logic pins about (420V p/p) 1 SUS_DN (FG)
c
Y-Drive Y-SUS
Pins 1~7 are Logic
g (Drive)
( ) Signals
g to the Y-Drive Upper. Board P106 Board

108 June 2011 42PW350 Plasma


P106 Y-Drive to Y-SUS P211 Connector Diode Mode Testing

Measurements taken from Floating Gnd. P106 P211


For Floating Ground use any pin on P101.

P106 "Y-Drive" to P211 "Y-SUS"


Pin Label Run Diode Check
11~12
11 12 VSC (Y
(Y-Scan)
Scan) 146 2V
146.2V OL c
9~10 VPP 145V OL

8 n/c n/c OL

7 SUS_DN ((FG)) FG FG
6 CLK 0.92V OL
5 STB 2.24V OL
4 OC1 2.26V OL
3 DATA 0V
0 OL
O
2 OC2 2.8V 1.52V
1 SUS_DN (FG) FG FG
Black Lead on FG (Floating Gnd)
Y Drive
Y-Drive Y SUS
Y-SUS
Board Board

Diode Mode Readings taken with all


connectors Disconnected. Y-SUS Board should be DISCONNECTED
DVM in Diode Mode.
Mode f the
for th Di
Diode
d MMode
d ttest.
t

109 June 2011 42PW350 Plasma


Y-Drive FG5V Fuse Information

P102

Location FL1
(FG5V)
2A/125V
/ 5

FG1 Protects the Floating Ground 5V line (created by IC508 and


T502 on the Y
Y-SUS
SUS board).
board) FG5V is used on the Y Y-Drive
Drive by all
the Y-Drive Gate Arrays (Buffers).

Diode Check with Board Connected. Diode Check with Board Disconnected.
1 33V Black lead on Floating Ground.
1.33V Ground 0 53V Red Lead on Floating Gnd
0.53V
OL Black Lead on Floating Gnd

110 June 2011 42PW350 Plasma


CONTROL BOARD SECTION
This Section of the Presentation will cover troubleshooting the Control Board Assembly. Upon
completion of this section the Technician will have a better understanding of the circuit and be
able to locate voltage and diode mode test points needed for troubleshooting
troubleshooting.

DC Voltage and Waveform Test Points


Diode Mode Test Points

SIGNALS
Main Board Supplied Panel Control and LVDS (Video) Signals

Control Board Generated Y-SUS and Z-SUS Drive Signals (Sustain)


X Board
B dD Drive
i SiSignals
l (RGB Add
Address))

OPERATING VOLTAGES
From the Y-SUS Supplied +5V (M5V) Developed on the SMPS
+18V (Routed through the Control board to the
Z-SUS)
(Not used by the Control Board)
p on the Control Board
Developed +1.0V
1.0V (IC703) for internal use
+1.8V (IC701) for internal use
+3.3V (IC53) for internal use and
for the X-Boards (TCPs)

111 June 2011 42PW350 Plasma


Control Board Pictorial p/n: EBR71200701

13~15 To Z-SUS 11~12


18V P2 M5V

IC701
P105 IC101 IC703
DDR
1~3 (18V) D101 Should
4~7 (M5V) be blinking
LVDS
VS_DA
IC22 F External
For E t l Trigger
Ti P106
Serial
Flash
Pattern Generator
For Panel Test
IC702 IC53

From IC53
3.3V

P107 P108 n/c (For ROM Updates)


To X-Left To X-Right P22

112 June 2011 42PW350 Plasma


42PW350 Control Board Layout Drawing
With the unit on, if D1 is not on, check 5V supply. Note: In this set M5V is routed from the SMPS (P811 pin 6)
to the Z-SUS (P205), from the Z-SUS to the Y-SUS, from the Y-SUS to the Control board, from Control to Z-
SUS, Pins 4~7 of P101. If present replace the Control Board. If missing, see (To Test Control Board)

Z-Drive Creation Signals IC703 (1.0V Core Regulator)


IC701 (1.8V Regulator) M5V and 18V to Z-SUS (1) 4.94V ( 9) 1.92V
(1) Gnd (2) 0V (10) 1.06V
(2) 1.8V IC701 (3) Gnd (11) 1.06V
CONTROL BOARD
(3) 3.31V 3 (4) Gnd (12) 1.06V
P/N: EBR71200701 (5) Gnd (13) 6.1V
2 2
1 P2 (6) 0.83V (14) 4.96V
DDR 1.06V 4.94V 3D-Sync (7) 0.61V (15) 3.31V
Memory 3.27V Pin 50
28~30 (18V) 1~3 (18V) (8) 0.52V (16) 5V
L1 3.48V p/p 60 Hz
3.3V 1.8V
24-27 (M5V) 4-7 (M5V) IC703
IC101 VS_DA
1.05V 1.05V
P105 P106 LVDS Video
Ribbon Cable D1 from Main
Y-SUS and Y Drive Signals IC22
1.8V On
To Y-SUS Serial
Flash
3 IC702 IC53
18V generated by D506 on Y-SUS MCM
1 2 1 IC53 (3.3V Regulator)
3.31V
IC11 X1 2 2 (1) 4.94V
IC22 IC11 25 MHz 3
(2) 3.32V
(1) 3.25V (5) 3.28V (1) Gnd
Auto Gen (3) Gnd
(2) 0V (6) 0V (2) 0V
(3) 3.27V (7) 3.27V (3) 3.31V
(4) 0V (8) 3.31V P107 P108 P22 n/c IC53 Diode Check Pin 2 (3.3V)
3.3V from IC53 3.3V from IC53 All Connectors Connected
X1 Pins 41~43 Pins 8~10 0.52V Red Lead
Top: 1.6V n/c Upgrades 0.31V Blk Lead
Bottom: 1.7V All Connectors Removed
3.3V and X-Drive 3.3V and X-Drive 0.66V Red Lead
Left RGB Signals Right RGB Signals 0.36V Blk Lead
TESTING THE CONTROL BOARD:
Disconnect all connectors.
Jump STBY 5V from SMPS P813 Pin 13 to pin 3 (top leg) of IC701
Apply AC and turn on the Set. Observe Control board LED D1, PANEL TEST:
if its blinking, most likely Control board is OK. Disconnect P106 and
Remove LVDS Cable. Short across
NO VIDEO or ABNORMAL VIDEO: Auto Gen TPs to generate a test
* If the complaint is no video running the Panel Test causes video to pattern when A/C power is applied.
appear or appear normal, suspect the Main board or LVDS cable.
Note: LVDS Cable must be removed for Auto Gen to work.

113 June 2011 42PW350 Plasma


Control Board Temperature Sensor Location (Chocolate)
Note: The temperature circuit not only protects the panel from
overheating, but it also is responsible for manipulating the Y-Drive
waveform as the panel changes temperature.
temperature

Make sure the Chocolate


(Heat Transfer Material) remains in place
Chocolate
(Heat Transfer Material)
if the board is removed.
Behind Control Board It makes contact with the Panel and
IC103 (Temperature Sensor)

IC103

Pin 1

IC103 CONTROL BOARD TEMPERATURE


04) 3.3V 03) Gnd SENSOR LOCATION
05) Gnd 02) Gnd BACK SIDE OF THE BOARD
06)) 3.3V 01)) 3.3V

114 June 2011 42PW350 Plasma


VS_DA Test Point on the Control Board

This signal can also


be used to help lock
the scope when
observingg the LVDS
video signals.

Note, this TP
(VS DA) can be
(VS_DA)
used as an External
Trigger for scope
when locking onto
the Y-Drive (Scan) or
the Z-Drive signal.

115 June 2011 42PW350 Plasma


X1 Checking the Crystal Clock on the Control Board
Check the output of the Oscillator (Crystal) X1.
Osc. Check: 25Mhz Top Leg
The frequency of the sine wave is 25 MHZ.
Mi i this
Missing thi clock
l k signal
i l will
ill h
halt
lt operation
ti off th
the panell
drive signals.
X1
1.61V

CONTROL 1.69V
Osc. Check: 25Mhz Bottom Leg
BOARD CRYSTAL
LOCATION

116 June 2011 42PW350 Plasma


Control Board Signal (Simplified Block Diagram)

The Control Board supplies Video Signals to the TCP (Tape Carrier Package) ICs.
If there is a bar defect on the screen, it could be a Control Board problem.

Control Board to X Board Basic Diagram of Control Board


Address Signal Flow
This Picture shows Signal Flow Distribution to help determine the IC702
failure depending on where the it shows on the screen.
CONTROL BOARD
MCM
IC101
Serial
Flash
Resistor Array X-DRIVE BOARD
IC702
MCM
16 bit words PANEL

2 Buffer There are 12 total TCPs.


Outputs
To Left To Right 43072 Vertical Electrodes
per TCP
X-Board X-Board 43072 (RGB) / 3 =
128 Lines per Buffer
To 6 TCPs To 6 TCPs 1024 Total Pixels (H)
256 Lines output Total

117 June 2011 42PW350 Plasma


P105 Control Board Connector to Y-SUS P101 Voltages and Diode Mode Checks
These pins are very close together. Use Caution when taking Voltage measurements.

Note: 18V is labeled 15V on silk screen.


P105 Label Silk Screen
Pins 1 through 3 Pin c
Receive 18V from the Y-SUS.
Developed by D506

Pins 4 through 7
Receive M5V from the Y-SUS.
Protected on Z-SUS by FS3

All the rest are delivering


Y-SUS Waveform development and
Y Drive logic signals to the Y
Y-Drive Y-SUS
SUS
Board (Y-Drive logic signals are simply
routed right through the Y-SUS to the
Y-Drive boards).

Note: The +18V is not used by the Control


board, it is routed to the Z-SUS leaving on
P2 Pins 13~15.
The M5V also leaves on P2 Pins 11~12.

118 June 2011 42PW350 Plasma


P105 Control to Y-SUS P101 Plug Information
Note: There are no voltages in Stand-By mode

TIP: The ribbon cable between the Control board and the Y-SUS does not come Pin c
with
ith either
ith off the
th new boards.
b d

P105 "Control" to P101 "Y-SUS"

Pin Label Run Diode Check Pin Label Run Diode Check

1~3 +15V 18.2V OL 20 STB 1.5V OL

4~7 +5V 4.94V 1.15V 21 RAMP_BLK 1.07V OL

8~11 Gnd Gnd Gnd 22 CLK 0.6V OL

12 Dumy2 2.14V OL 23 SUS_DN 2.71V OL

13 Y-OE 0.03V OL 24 DUMMY_3 2.14V OL

14 PC 1.84V OL 25 DUMMY_1 1.07V OL


P105
15 ER_DN 0.5V OL 26 DUMMY_4 1.35V OL

16 DATA_PRE 0.01V OL 27 SUS_UP_0 0.75V OL

17 ER_UP 0.3V OL 28 CTRL_OE 0.11V OL

18 SC A
SC_A 1 45V
1.45V OL 29 RAMP DN
RAMP_DN 2 17V
2.17V OL

19 RAMP_UP 0.22V OL 30 Gnd Gnd Gnd

Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.

119 June 2011 42PW350 Plasma


P106 Control Board LVDS Signals
LVDS Cable P106 on Control board shown.
Flip the locking tab upward to release. Pins are close together, use caution.

P106 Video Signals from the Main Board to the Control Board are referred
LVDS to as Low Voltage Differential Signals or LVDS. The video is
delivered in 20 bit LVDS format. Their presence can be confirmed
with
ith th
the O
Oscilloscope
ill b
by monitoring
it i ththe LVDS signals
i l with
ith SMPTE
Color Bar input. Loss of these Signals would confirm the failure is on
the Main Board or the LVDS Cable itself.

Example of LVDS Video Signal


Pin 41 5mSec per/div 100mV p/p Pin 40 5mSec per/div 100mV p/p

Pin 41 2mSec per/div 100mV p/p Pin 40 2mSec per/div 100mV p/p
Example of Normal Signals measured at 1V p/p at 10Sec

Pins 12
12~17
17, 22~25
22 25, 28~33
28 33, 38~41
38 41 are LVDS Video Signals
Signals.
Pins 19~20 and 35~36 are clock signals for the data.

120 June 2011 42PW350 Plasma


P106 Control Board LVDS Connector Voltages and Diode Check
P106 LVDS "Control" to P1401 "Main"
Pin Label Run Diode Check Pin Label Run Diode Check
51 Gnd Gnd Gnd 26 Gnd Gnd Gnd
50 VS_3D *0V OL 25 RE1+ 1.11V 1.31V
49 UART_TXD 3.31V OL 24 RE1- 1.19V 1.31V
48 UART_RXD 3.3V OL 23 RD1+ 1.11V 1.31V
47 n/c n/c OL 22 RD1- 1.19V 1.31V
46 n/c n/c OL 21 Gnd Gnd Gnd
45 G d
Gnd G d
Gnd G d
Gnd 20 RCLK1
RCLK1+ 1 16V
1.16V 1 31V
1.31V
44 Gnd Gnd Gnd 19 RCLK1- 1.13V 1.31V
43 Gnd Gnd Gnd 18 Gnd Gnd Gnd
42 Gnd Gnd Gnd 17 RC1+ 1.11V 1.31V
41 RE3+ 1.11V 1.31V 16 RC1- 1.19V 1.31V
40 RE3- 1.19V 1.31V 15 RB1+ 1.11V 1.31V
39 RD3+ 1.11V 1.31V 14 RB1- 1.19V 1.31V
38 RD3- 1.19V 1.31V 13 RA1+ 1.11V 1.31V
37 Gnd Gnd Gnd 12 RA1- 1.19V 1.31V
36 RCLK3+ 1.16V 1.31V 11 Gnd Gnd Gnd
35 RCLK3- 1.13V 1.31V 10 n/c n/c OL
34 Gnd Gnd Gnd 9 n/c n/c OL
33 RC3+ 1.11V 1.31V 8 n/c n/c OL
32 RC3- 1.19V 1.31V 7 n/c n/c OL
31 RB3+ 1.11V 1.31V 6 SDA 3.3V OL
30 RB3- 1.19V 1.31V 5 *DISP_EN 3.05V OL 1
29 RA3+ 1.11V 1.31V 4 SCL 3.3V OL
28 RA3- 1.19V 1.31V 3 PC_SER_DATA 3.31V OL Pin 5 is the reason the LVDS
27 Gnd Gnd Gnd 2 PC_SER_CLK 3.31V OL cable must be removed to use the
1 Gnd Gnd Gnd EX_AUTO_GEN shorting pins to
Pin 5: Enables the Control Board create multiple internal generated
test patterns (Panel Test).
Bold Pins indicate 20 bit differential video signal

Note: There are no voltages in Stand-By mode.

121 June 2011 42PW350 Plasma


P2 Control Board Connector Pin ID and Voltages
Voltage and Diode Mode Measurements for the Control Board.
Note: There are no voltages in Stand-By mode.

P2 "Control" to P201 "Z-SUS Board"


Pin Label Run Diode Check
1 Gnd Gnd Gnd
2 SUS_UP 0.22V OL
18V 1
3 Gnd Gnd Gnd 5V
4 SUS_DN 0.79V OL P2
5 n/c n/c OL Label
6 ZBIAS 1.92V OL
7 Gnd Gnd Gnd
8 Vzbias-con 3.25V OL
9 CTRL_EN Gnd OL
10 Y-OE 0.05V OL
11~12 M5V 5.06V 1.15V
13~15 (+15V) 18 2V
18.2V OL

Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.

122 June 2011 42PW350 Plasma


P107 Connector "Control Board to Left X Board P232
P107 "Control" to P232 "X-Left"
41~43
Pin Label Run Diode Check Pin Label Run Diode Check 3.3V
1 Gnd Gnd Gnd 27 n/c n/c OL 1
2 PDDS_A2_P11 1.11V 1.34V 28 PDDS_A2_P15 1.11V 1.34V
3 PDDS_A2_N11 1.32V 1.32V 29 PDDS_A2_N15 1.32V 1.32V
4 PDDS_A1_P11 1.11V 1.34V 30 PDDS_A1_P15 1.11V 1.34V
5 PDDS A1 N11
PDDS_A1_N11 1.32V 1.32V 31 PDDS A1 N15
PDDS_A1_N15 1.32V 1.32V
6 n/c n/c OL 32 n/c n/c OL
7 PDDS_CLK_P5 1.09V 1.34V 33 PDDS_CLK_P8 1.09V 1.34V
8 PDDS_CLK_N5 1.35V 1.32V 34 PDDS_CLK_N8 1.35V 1.32V
9 n/c OL 35 n/c n/c OL
White hash
10 PDDS_A2_P12 1.11V 1.34V 36 PDDS_A2_P16 1.11V 1.34V
marks
k countt
11 PDDS_A2_N12 1.32V 1.32V 37 PDDS_A2_N16 1.32V 1.32V
as 5
12 PDDS_A1_P12 1.11V 1.34V 38 PDDS_A1_P16 1.11V 1.34V
13 PDDS_A1_N12 1.32V 1.32V 39 PDDS_A1_N16 1.32V 1.32V
14 n/c n/c OL 40 n/c n/c OL
15 _ _
PDDS_A2_P13 1.11V 1.34V 41 +3.3V 3.32V 0.66V
16 PDDS_A2_N13 1.32V 1.32V 42 +3.3V 3.32V 0.66V
17 PDDS_A1_P13 1.11V 1.34V 43 +3.3V 3.32V 0.66V
18 PDDS_A1_N13 1.32V 1.32V 44 n/c n/c OL
19 n/c n/c OL 45 STB (0) 3.25V OL
20 PDDS_CLK_P7 1.09V 1.34V 46 STB (1) 3.25V OL
21 PDDS_CLK_N7 1.35V 1.32V 47 BLK (0) 1.76V OL
22 n/c n/c OL 48 POL (0) 1.89V OL
23 PDDS_A2_P14 1.11V 1.34V 49 X_ER_DN(0) 0.28V OL
24 PDDS_A2_N14 1.32V 1.32V 50 X_SUS_DN(0) 0.28V OL
25 PDDS_A1_P14 1.11V 1.34V
26 PDDS_A1_N14 1.32V 1.32V

123 June 2011 42PW350 Plasma


P108 Connector "Control Board to Left X Board P331
P108 "Control" to P331 "X-Right"
8~10
Pin Label Run Diode Check Pin Label Run Diode Check
3 3V
3.3V
1 X_ER_DN(1) 0.28V OL 27 PDDS_A2_N19 1.32V 1.32V
1
2 X_SUS_DN(1) 0.28V OL 28 PDDS_A2_P19 1.11V 1.34V
3 POL (0) 1.89V OL 29 n/c n/c OL
4 BLK (0) 1.76V OL 30 PDDS_CLK_N10 1.35V 1.32V
5 STB (2) 3.25V OL 31 PDDS_CLK_P10 1.09V 1.34V
6 STB (3) 3.25V OL 32 n/c n/c OL
7 n/c OL 33 PDDS_A1_N20 1.32V 1.32V
8 +3.3V 3.32V 0.66V 34 PDDS_A1_P20 1.11V 1.34V
9 +3.3V 3.32V 0.66V 35 PDDS_A2_N20 1.32V 1.32V
10 +3.3V 3.32V 0.66V 36 PDDS_A2_P20 1.11V 1.34V White hash
11 n/c n/c OL 37 n/c n/c OL
marks
k countt
12 PDDS_A1_N17 1.32V 1.32V 38 PDDS_A1_N21 1.32V 1.32V
as 5
13 PDDS_A1_P17 1.11V 1.34V 39 PDDS_A1_P21 1.11V 1.34V
14 PDDS_A2_N17 1.32V 1.32V 40 PDDS_A2_N21 1.32V 1.32V
15 PDDS_A2_P17 1.11V 1.34V 41 PDDS_A2_P21 1.11V 1.34V
16 n/c n/c OL 42 n/c n/c OL
17 PDDS_CLK_N9 1.35V 1.32V 43 PDDS_CLK_N11 1.35V 1.32V
18 PDDS_CLK_P9 1.09V 1.34V 44 PDDS_CLK_P11 1.09V 1.34V
19 n/c n/c OL 45 n/c n/c OL
20 PDDS_A1_N18 1.32V 1.32V 46 PDDS_A1_N22 1.32V 1.32V
21 PDDS_A1_P18 1.11V 1.34V 47 PDDS_A1_P22 1.11V 1.34V
22 PDDS_A2_N18 1.32V 1.32V 48 PDDS_A2_N22 1.32V 1.32V
23 PDDS_A2_P18 1.11V 1.34V 49 PDDS_A2_P22 1.11V 1.34V
24 n/c n/c OL 50 Gnd Gnd Gnd
25 PDDS_A1_N19 1.32V 1.32V
26 PDDS_A1_P19 1.11V 1.34V

124 June 2011 42PW350 Plasma


X BOARD (LEFT and RIGHT) SECTION
The following section gives detailed information about the X boards. These boards deliver
the
h Color
C l information
i f i signal
i l developed
d l d on the
h Control
C l board
b d to the
h TCPs,
TCP (Taped
(T d Carrier
C i
Packages). The TCPs are attached to the vertical FPCs, (Flexible Printed Circuits) which are
attached directly to the panel. The X boards are the attachment points for these FPCs.
These boards have no adjustment.

X-BOARD VOLTAGES:
VA: Originally developed on the Switched Mode Power Supply VA (Voltage for
Address) sent out P811 pin 5 to Z-SUS P7 pin 5. VA is routed through the Z-SUS
board and out on P4 pins 11~12 (top two pins) to the Z-SUB
Z SUB board P101
P101. VA
leaves the Z-SUB board on P203 pins 3~4 (bottom 2 pins). VA arrives on the Left
X-Board via P312 pins 3~4.
VA leaves the Left X-Board P311 pins 3~4 and is sent to the Right X-Board
arriving on P211 pins 3
3~4.
4.

3.3V: Control board develops 3.3V (IC53). 3.3V leaves on connector P107 pins
41~43 and routes to the Left X-Board via ribbon connector P232 pins 9~11.
3.3V: Control board develops 3.3V (IC53). 3.3V leaves on connector P108 pins
8~10 and routes to the Left X-Board via ribbon connector P331 pins 42~44.

125 June 2011 42PW350 Plasma


X Board Additional Information

There are two X-Boards,, the Left and the Right.


g As viewed from the rear of
the set.
The two X-Boards have very little circuitry. They are basically signal and
voltage
g routing
g boards.
They route Va voltage to all of the Taped Carrier Packages (TCPs).
Va is introduced to the Left X board first, then the Left X-Board
sends Va to the Right
g X-Board.
The X-Boards also route the Logic (Color) signals from the Control board
to all of the Taped Carrier Packages (TCPs).
The X-Boards
X Boards have connectors to 12 TCPs
TCPs, 6 on the left and right
right.
There are a total of 12 TCPs and each TCP has 2 gate arrays, so there are
a total of 24 buffers feeding the panels 5760 vertical electrodes which
determine the Horizontal Resolution of the Panel
Panel.

126 June 2011 42PW350 Plasma


X Board TCP Heat Sink Warning

NEVER run the television with this heat sink removed.


removed
Damage to the TCPs will occur and cause a defective panel.

The Vertical Address buffers (TCPs) Taped Carrier Packages have one
heat sink indicated by the arrow. It protects all 12 TCPs.

127 June 2011 42PW350 Plasma


P211, P232, P311 and P331 X Board Connector (VA and 3.3V)

Pins 3~4 Pins 3~4


T off the
Top th Left
L ft and
d Right
Ri ht X-Drive
XDi B Boards
d
VA VA
Pins 9~11 Pins 42~44

3.3V 3.3V

P232 P331
P211 P311

This shows the routing for VA and for the 3.3V input to the X-Drive boards.

Using a regular diode check:


VA should be (OL)
3.3V should be (0.53V)

128 June 2011 42PW350 Plasma


X Board Layout Primary Circuit Diode Check
The two X-Boards have similar circuit layouts for the connections going to the TCPs, as shown below.
3.3V
EC
Pins 33~34
Pins 3~4 Logic EC
Pins 47~48

Gnd

VA
Pins 6~7 VA
Pi 44~45
Pins 44 45

TCP

All Connectors to Control and Z-SUB boards are disconnected from Left X board.
All readings are in Diode Mode from Chassis Ground
- On the below: On the below:

+
On any Va (0.45V) TCPs connected. On any Va (OL) TCPs connected.
On EC (0.45V) TCPs connected. On EC (OL) TCPs connected.
On 3.3V (0.37V) TCPs connected. On 3.3V (1.22V) TCPs connected.
On any Va (OL) TCPs disconnected. On any Va (OL) TCPs disconnected.
On EC (OL) TCPs disconnected. On EC (OL) TCPs disconnected.
On 3.3V (OL) TCPs disconnected. On 3.3V (OL) TCPs disconnected.

129 June 2011 42PW350 Plasma


TCP 3.3V B+ Check Warning: DO NOT attempt to run the set with the
Heat Sink over the TCPs removed.
For Connectors P107 and
P108 on the Control board,
see Control
C t lb board
d section.
ti Checking IC53 for 3.3V,
3 3V use center pin or Case of component
component.
With all connectors connected, place the
Red Lead On 3.3V = Diode Check (0.53V)
Black Lead On 3.3V = Diode Check (0.32V) 3.3V for TCPs 5.0V
IC121 on 3.3V
With all connectors removed, place the Control Board Gnd
Red Lead On 3.3V = Diode Check (0.66V)
Black Lead On 3.3V = Diode Check (0.36V)
3.3V in on Pins 1 ~ 5 only on P232 connector from the Control board

3.3V Control Board 3.3V


P161 and P162

DC
Continuity
3.3V All Connectors to All TCPs look very
similar for the 3.3V test point. The
picture shows the trace at pins 33 and
34 for each connector. There is a small
feed trough and a Cap, you can use for
Test Points.
Example here from P305. You can only
check for continuity back to IC231
IC231, you
can not run the set with heat sink
removed.

130 June 2011 42PW350 Plasma


TCP (Tape Carrier Package)
This shows the layout of the bottom ribbon cables connecting to the Panels Vertical electrodes,
(Address Bus). Note that each ribbon cable has a solid state device called a TCP attached.

X Drive Board
Va
Y-SUB Board
Frontt panel Horizo
Rear pane

Logic
X_B/D

Control Board
Frame

Connector
3.3V
ontal Address
el Vertical Add
e

Lock Chocolate
TCP 256 total lines
Taped Carrier 128 lines 128 lines
dress

Package
256 Vertical
Electrodes

TCP
Attached directly Long Black
to Flexible cable Heat Sink
Back side of TCP Ribbon

131 June 2011 42PW350 Plasma


TCP Testing TCP Connector Pin Description
3.3V ORIGINATION Any X Board to Any TCP P201~P206 or P301~P306 VA: ORIGINATION
From Control board IC53 center leg. From Z-SUB P203 In Right X P312 3~4
Leaves P107 to P232 and P108 to P331 Va: ROUTING:
Arrives on X board Left P232 Pins 9~11 Leaves Right X P311 pins 3~4
Arrives on X board Right P331 Pins 42~44 To Left X : P211 pins 3~4

Fl ibl Printed
Flexible P i t d Ribbon
Ribb C
Cable
bl to
t TCP IC
DIODE CHECK
Look for any TCPs being discolored. DIODE CHECK
TCP DISCONNECTED
Ribbon Damage. Cracks, folds Pinches, scratches, etc ALL TCPs INSTALLED
Must be checked on FPC
Red Lead on TCP VA OL
Red Lead on TCP VA OL
Gnd Gnd Va Black Lead on TCP VA 0
0.47V
47V
Black Lead on TCP VA 0.5V Va
EC Gnd 3.3V EC Red Lead on TCP 3.3V 0.53V
Red Lead on TCP 3.3V OL Black Lead on TCP 3.3V 0.32V
Black Lead on TCP 3.3V 0.53V Logic
Gnd Gnd EC (OL) either way
EC OL either way
1 5 10 15 20 25 30 35 40 45 50

132 June 2011 42PW350 Plasma


TCP Visual Observation. Damaged TCP

Warning: DO NOT attempt to run the set with the Heat Sink over the TCPs removed
removed.
After a very short time, these ICs will begin to self destruct due to overheating.

This damaged TCP can, (at the location of the TCP).


a) Cause the Power Supply to shutdown. (VA shorted, 3.3V shorted).
b) Generate abnormal vertical bars, (colored noise).
c) Cause the entire area driven by the TCP to be All White or ALL BLACK.
d) Cause a Single Pixel Width Line defect. The line can be Red, Green or Blue.
e) A dirty contact at the connector can cause b, c and d also.

TCP
Tapped
Carrier
Package

Look for burns, pin


holes, damage, etc.

133 June 2011 42PW350 Plasma


P211 Left X Drive Connector from Right X Drive P311 Information
Voltage and Diode Mode Measurement (No Stand-By Voltages)

P211 "X Drive Left" to X Drive Right" P311

Pin Label Run Diode Check


P211 1
1 Gnd Gnd Gnd

2 Gnd Gnd Gnd

3 VA *55V Open

4 VA *55V Open

* Note: This voltage will vary in accordance with Panel Label.


There are no Stand-By voltages on this connector.

Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.

134 June 2011 42PW350 Plasma


P232 Left X Drive Connector from Control Board P107 Information
P232 "X-Left" to P107 "Control" Note: All connector removed except TCPs (No Stand-By Voltages)
Pin Label Run Diode Check Pin Label Run Diode Check
1 X_SUS_DN(0) 0.28V 1.87V 27 PDDS_A2_N14 1.32V 1.8V
2 X_ER_DN(0) 0.28V 1.87V 28 PDDS_A2_P14 1.11V 1.8V
3 POL (0) 1.89V 1.85V 29 Gnd Gnd Gnd
4 BLK (0) 1.76V 1.84V 30 PDDS_CLK_N7 1.35V 1.8V
5 STB (1) 3.25V 1.87V 31 PDDS_CLK_P7 1.09V 1.8V
6 STB (0) 3.25V 1.87V 32 Gnd Gnd Gnd
P232
7 Gnd Gnd Gnd 33 PDDS_A1_N13 1.32V 1.8V
8 +3.3V 3.32V 1.23V 34 PDDS_A1_P13 1.11V 1.8V
9 +3.3V 3.32V 1.23V 35 PDDS_A2_N13 1.32V 1.8V
10 +3.3V 3.32V 1.23V 36 PDDS_A2_P13 1.11V 1.8V
11 Gnd Gnd Gnd 37 Gnd Gnd Gnd
12 PDDS_A1_N16 1.32V 1.8V 38 PDDS_A1_N12 1.32V 1.8V
13 PDDS_A1_P16 1.11V 1.8V 39 PDDS_A1_P12 1.11V 1.8V
14 PDDS_A2_N16 1.32V 1.8V 40 PDDS_A2_N12 1.32V 1.8V 1
15 PDDS_A2_P16 1.11V 1.8V 41 PDDS_A2_P12 1.11V 1.8V
16 Gnd Gnd Gnd 42 Gnd Gnd Gnd
17 PDDS_CLK_N8 1.35V 1.8V 43 PDDS_CLK_N5 1.35V 1.8V
18 PDDS_CLK_P8 1.09V 1.8V 44 PDDS_CLK_P5 1.09V 1.8V
19 Gnd Gnd Gnd 45 Gnd Gnd Gnd
20 PDDS_A1_N15 1.32V 1.8V 46 PDDS_A1_N11 1.32V 1.8V
21 PDDS_A1_P15 1.11V 1.8V 47 PDDS_A1_P11 1.11V 1.8V
22 PDDS_A2_N15 1.32V 1.8V 48 PDDS_A2_N11 1.32V 1.8V
23 PDDS_A2_P15 1.11V 1.8V 49 PDDS_A2_P11 1.11V 1.8V
24 Gnd Gnd Gnd 50 Gnd Gnd Gnd
25 PDDS_A1_N14 1.32V 1.8V
26 PDDS_A1_P14 1.11V 1.8V

Diode Mode Readings taken with all connectors Disconnected except TCPs. Black lead on Gnd. DVM in Diode Mode.

135 June 2011 42PW350 Plasma


P311 Right X Drive Connector from Left X Drive P211 Information
Voltage and Diode Mode Measurement (No Stand-By Voltages)

P311 "X Drive Right" to X Drive Left" P211

Pin Label Run Diode Check


P311

1 Gnd Gnd Gnd

2 Gnd Gnd Gnd


1
3 VA *55V Open

4 VA *55V Open

* Note: This voltage will vary in accordance with Panel Label.


There are no Stand-By voltages on this connector.

Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.

136 June 2011 42PW350 Plasma


P312 Right X Drive Connector from Z-SUB P203 Information
Voltage and Diode Mode Measurement (No Stand-By Voltages)

P312 "X Drive Right" to Z-SUB Left" P203

Pin Label Run Diode Check


P312

1 Gnd Gnd Gnd

2 Gnd Gnd Gnd

3 VA *55V Open 1

4 VA *55V Open

* Note: This voltage will vary in accordance with Panel Label.


There are no Stand-By voltages on this connector.

Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.

137 June 2011 42PW350 Plasma


P331 Right X Drive Connector from Control Board P108 Information
P331 "X-Right" to "Control" P108 Note: All connector removed except TCPs (No Stand-By Voltages)
Pin Label Run Diode Check Pin Label Run Diode Check
1 Gnd Gnd Gnd 27 n/c n/c OL
2 PDDS_A2_P22 1.11V 1.8V 28 PDDS_A2_P18 1.11V 1.8V
3 PDDS_A2_N22 1.32V 1.8V 29 PDDS_A2_N18 1.32V 1.8V
4 PDDS_A1_P22 1.11V 1.8V 30 PDDS_A1_P18 1.11V 1.8V
5 PDDS_A1_N22 1.32V 1.8V 31 PDDS_A1_N18 1.32V 1.8V
6 Gnd Gnd Gnd 32 Gnd Gnd Gnd P331
7 PDDS_CLK_P11 1.09V 1.8V 33 PDDS_CLK_P9 1.09V 1.8V
8 PDDS_CLK_N11 1.35V 1.8V 34 PDDS_CLK_N9 1.35V 1.8V
9 Gnd Gnd Gnd 35 Gnd Gnd Gnd
10 PDDS_A2_P21 1.11V 1.8V 36 PDDS_A2_P17 1.11V 1.8V
11 PDDS_A2_N21 1.32V 1.8V 37 PDDS_A2_N17 1.32V 1.8V
12 PDDS_A1_P21 1.11V 1.8V 38 PDDS_A1_P17 1.11V 1.8V
13 PDDS_A1_N21 1.32V 1.8V 39 PDDS_A1_N17 1.32V 1.8V
14 Gnd Gnd Gnd 40 Gnd Gnd Gnd 1
15 PDDS_A2_P20 1.11V 1.8V 41 +3.3V 3.32V 1.23V
16 PDDS_A2_N20 1.32V 1.8V 42 +3.3V 3.32V 1.23V
17 PDDS_A1_P20 1.11V 1.8V 43 +3.3V 3.32V 1.23V
18 PDDS_A1_N20 1.32V 1.8V 44 Gnd Gnd Gnd
19 Gnd Gnd Gnd 45 STB (3) 3.25V 1.87V
20 PDDS_CLK_P10 1.09V 1.8V 46 STB (2) 3.25V 1.87V
21 PDDS_CLK_N10 1.35V 1.8V 47 BLK (0) 1.76V 1.85V
22 Gnd Gnd Gnd 48 POL (0) 1.89V 1.84V
23 PDDS_A2_P19 1.11V 1.8V 49 X_SUS_DN(1) 0.28V 1.87V
24 PDDS_A2_N19 1.32V 1.8V 50 X_ER_DN(1) 0.28V 1.87V
25 PDDS_A1_P19 1.11V 1.8V
26 PDDS_A1_N19 1.32V 1.8V

Diode Mode Readings taken with all connectors Disconnected except TCPs. Black lead on Gnd. DVM in Diode Mode.

138 June 2011 42PW350 Plasma


MAIN BOARD SECTION
The following section gives detailed information about the Main board. This board contains the
Microprocessor, Audio section, video section and all input, outputs. It also receives all input signals and
processes them to be delivered to the Control board via the LVDS cable. The main tuner (Silicon Tuner
using discreet components) which provides VSB (NTSC), 8VSB (Over the Air Digital Broadcast) and QAM
(Cable Digital) is located on the main board. This board is also where the televisions software upgrades
are accomplished through the USB input.
This board has no mechanical adjustments
adjustments.

The Main Board Receives its operational voltage from the SMPS:

DURING STAND-BY: From SMPS DURING RUN From SMPS : (STBY 5V remains):
STBY 5V
+5V for Video processing
17V for Audio

OUTPUTS:

Sends power supply turn on commands to the SMPS.


Distributes Key 1 and Key 2 to the Front IR/Key Pad Board.
Receives Intelligent Sensor data from the Front IR/Key Pad Board (via SCL/SDA).
Controls the front Power LEDs.
Distributes +3.3V_ST
+3 3V ST to the Front IR Board.
Board
Routes 20 bit LVDS video and Panel Turn On signals to the Control Board.
Processes and Outputs all audio signals and sends them to the Invisible Speakers
Routes Optical Audio Out.
Receives and Transmits to the Motion Remote via RF.
Transmits 3D Sync to the 3D Shutter Glasses.
Glasses

139 June 2011 42PW350 Plasma


Main Board Layout and Identification

IC1400
P501 to
3D Formatter
SMPS
P1401
LVDS

P902 IC101
t Ft IR
to Microprocessor
Video Processor

P1404
Motion USB
Remote / 3D
Transmitter
Optical HDMI
Audio RGB
HDMI
PC
Audio
Remote

P700
Audio RF Composite
p
In A/V
RS232 Rear
Inputs
140 June 2011 42PW350 Plasma
42PW350 Main (Front and Back) Layout Drawing
P501 "Main" to P813 "SMPS"
Pin Label STBY Run Diode Check
a
1_2 17V 0V 17V Open Q1400
E B
3-4 Gnd Gnd Gnd Gnd Serial Flash C

a WP
5-7 5.1V 0.46V 5.17V 1.18V 3D Formatter
ac X1400 IC1402
8 Error_Det 3.44V 4.02V 1.73V
24Mhz Serial Flash
9-12 Gnd Gnd Gnd Gnd P501
IC1400 Other Main Boards
13-14 STBY_5V 3.47V 5.14V 1.07V L1402
a
p/n: EBR72942901 AUSLLHR
15 RL_ON 0V 3.28V 1.78V p/n: EBR71638619
ad IC1407 IC1404
16 AC Det 0V 4.06V 1.04V Interchangeable
+1.0V
b
17 M_ON 0V 3.28V 1.79V IC1401 +1.8V +5V in IC1406
18 e
Auto_Gnd Gnd Gnd Gnd P1401 1 2 3
+3.3V_3D_A In (3) 3
+3.3V Reg
2 2
DDR +3.3V_3D Reg
1
P902 "MAIN" to "Front IR" MAIN BOARD +5V in (3)

Q1402 SDA_3.3V_MOD
p/n: EBT61267425 AUSLLJR
D S

Pin Label STBY Run Diode Check G


+5V_ST_EN In
Q1401
D S
G SCL_3.3V_MOD
1 IR 2.84V 2.7V 2.63V +3.3V_AVDD
IC500 +5V_ST In IC504
2 Gnd Gnd Gnd Gnd IC1202 IC502
3
3.3V_ST +5V_ST_EN In +5V_ST_EN Switch 2
3 Key1 3.3V 3.3V 1.77V
2 1
5V_ST in (3) +1.26V_VDDC) Reg Q501 B

4 Key2 3.3V 3.3V 1.77V P902 DDR D S C


E
Q500
IC102 G
Q501 CTL 17V in
5 LED_RED 3.25V 0V 1.72V
P1404 HDCP EEPROM +5V_TU
C
2
B E IC109 EEPROM
IC507 1 3
6 Gnd Gnd Gnd Gnd Q901 L503
7 EYE_SCL 3.3V 3.3V 1.72V LED_Red 3 IC506
2 2 +3.3V D501
Driver
8 EYE_SDA 3.3V 3.3V 1.72V 1 +5V in +5V in
IC501 IC104 USB +5V OCP
9 Gnd Gnd Gnd Gnd IC1201 NAND IC505 L506
L502 D200 IC1101
10 3.3VST 3.3V 3.3V 0.85V
+1.5V_DDR_IN
A2 A1

DDR
IC101 FLASH
3 2 1
+2.5V_AVDD
+3.3V_AVDD
Micro/
C

11 n/c n/c n/c n/c +5V_ST_EN In in


IC103 Serial Flash IC600 D805
12 n/c n/c n/c n/c Video 3 A1 A2
HDMI CEC Hot Swap +1.2V_DE 2 B+ Routing EDID
13 Touch_Ver_Check 0.19V 0V 1.69V Q800
1 C B
Q806 EDID WP Processor +3.3V in (3)
1
C

IC804
E
A2
14 n/c n/c n/c Open IC700 D804 A2 B
A1
C
A1 C
C
E
Q103
15 n/c n/c n/c Open D801
Audio Amp IC802 X200
TUNER Q807
E
B C

L703 L701 L700 EDID Hot Swap


TU1300
C 18. IF p
P1404 "MAIN Board" To "Motion Remote Sensor" B E 17. IF n
Pin Label STBY Run Diode Check D803 A2 A1
16. IF AGC
C
IC801 EDID
24Mhz 15. Reset Q1304
1 3.3V_Normal 0V 3.29V 0.49V Q805 14. 3.3V B E

2 Gnd Gnd Gnd Gnd L702 Hot


13. 1.26V
12. GND C Tuner SIF
11. CVBS B E

3 3D_RF_RX 0V 3.29V 1.18V Swap 10. NC C


9. SIF
EDID
4 3D_RF_TX 0V 3.29V 1.17V
IC900 8. NC
Q1305
5 3D_RFModule_Reset 0V 3.1V 2.37V RS232 IC901 7. SDA
6. SCL Tuner CVBS
6 3D_RFModule_DC 0V 0.1V 1.32V 5. NC

7 3D_RFModule_DD 0V 0.1V 1.34V P700 Q900


C
B
4. NC
3. 5V
8 Gnd Gnd Gnd Gnd E
2. NC
9 3D_RF_GPIO_0 0V 0V 1.26V
RS232 TX 1. NC

10 3D_RF_GPIO_1 0V 0V/3.18V 1.26V


Buffer
11 3D_RF_GPIO_2 0V 0V 1.26V R-R+L-L+
*12 3D_L/R_Sync 0V 0V/1.59V Open
*No 3D / With 3D
Note: Pin 12 with 3D Sync 3.48V p/p 60 Hz square wave.

141 June 2011 42PW350 Plasma


42PW350 Main (Front) Layout Drawing

E B

Q1400
X1400 Serial Flash WP
24Mhz
P501
IC1400
IC1404
3D Formatter IC1407 +1.0V
+5V in
L1402
IC1401 IC1406
P1401 DDR
1 2 3
3 +3.3V Reg
+3.3V_3D Reg
2 2
+1.8V +5V in (3)
1
Q1402 +3.3V_3D_A In (3)
D S
G SDA_3.3V_MOD +5V_ST_EN In
D S
G SCL_3.3V_MOD +5V_ST_EN In +3.3V_AVDD
Q1401 +1.26V_VDDC
IC504
IC1202 IC502 2
DDR
Q501 +5V_ST In

P902
S
+5V_ST_EN Switch
D G

C
P1404 IC506 1
2
3
B E
L503 IC507
Q901 MAIN BOARD 3
17V in

LED_Red 2 2 +5V_TU D501


Driver p/n: EBT61267425 AUSLLJR 1 +5V in
+3.3V USB +5V OCP
IC501 D200
A2 A1

DDR
IC101 Other Main Boards +5V in
L506
+1.5V_DDR_IN p/n: EBR72942901
+5V_ST_EN In in
L502 C

Micro/
AUSLLHR IC600
IC1201 Video p/n: EBR71638619 3
Audio Amp IC103 2 +1.2V_DE
Serial Flash
Processor Interchangeable 1 +3.3V in (3)

IC700

X200 TUNER
L703 L701 L700 TU1300 18. IF p
17. IF n
16. IF AGC
24Mhz 15. Reset
14. 3.3V
13. 1.26V
L702 12. GND
11. CVBS
10. NC
9. SIF

8. NC
7. SDA
6. SCL
5. NC

P700
4. NC
3. 5V

2. NC
1. NC

R-R+L-L+

142 June 2011 42PW350 Plasma


42PW350 Main Board Front Side Component Voltages

IC103 Serial IC502 +1.26V_VDDC IC507 +5V_TU IC1404 +1.0V Q501 +5V_ST_EN
Flash Pin Regulator Pin Regulator Pin Regulator Pin Switch
Pin For HDMI [1] 5V (In) [1] 11.1V [1] 5V (In) [B] 0.7V
[1] Gnd [2] 5V (In) [2] 17V [2] 0V [C] 5.2V
[2] Gnd [3] 0V [3] 3.1V [3] 0V [E] 5.2V
[3] Gnd [4] 0V [4] 1.8V [4] 0V
[4] Gnd [5] 081V [5] 0.8V [5] 0V Q901 LED_RED
[5] 3.29V [6] 0.81V [6] 0.6V [6] 0.8V Pin Driver
[6] 3.29V [7] 0.72V [7] 0V [7] 0.65V [B] 0.71V
[7] 3.29V [8] 0.53V [8] 5V [8] 0.54V [E] 0V
[8] 3.29V [9] 1.7V [9] 1.7V [C] 0V
[10] 1.3V IC600 +1.2V_DE [10] 1.05V
IC501 +1.5V_DDR_IN [11] 1.3V Pin Regulator [11] 1.05V Q1400 Write Protect
Pin Regulator [12] 1.3V [1] 3.3V (In) [12] 1.05V Pin for IC1402
[1] 5V (In) [13] 6.47V [2] 1.26V (Out) [13] 6.1V [B] 0V
[2] 5V (In) [14] 0.25V [3] Gnd [14] 0.15V [E] 0V
[3] 0V [15] 2.96V [15] 2.9V [C] 3.18V
[4] 0V [16] 5V (In) [16] 0V
[5] 0V Q1401 SCL_3.3V_MOD
[6] 0.81V IC504 +3.3V_AVDD D200 Reset IC1406 +3.3V_VST Pin Buffer
[7] 0.72V Pin Regulator Pin Speed Up Pin +3.3V_3D [B] 3.28V
[8] 0.53V [1] 0V [A1] 0V [1] 0V [C] 3.3V
[9] 1.7V [2] 3.3V (Out) [C] 0V [2] 3.31V (Out) [E] 3.28V
[10] 1.58V [3] 5.2V (In) [A2] 0V [3] 5V (In)
[11] 1.58V Q1402 SDA_3.3V_MOD
[12] 1.58V IC506 +3.3V D501 Reg IC1407 (+1.8V) Pin Buffer
[13] 6.7V Pin Regulator Pin IC507 Pin Regulator [B] 3.28V
[14] 0.12V [1] 0V [A] 0V [1] 0V [C] 3.3V
[15] 2.98V [2] 3.3V (Out) [C] 5V [2] 1.8V (Out) [E] 3.28V
[16] 2.98V (In) [3] 5.2V (In) [3] 3.3V (In)

143 June 2011 42PW350 Plasma


42PW350 Main Back Layout Drawing

IC1402

Serial Flash

MAIN BOARD
p/n: EBT61267425 AUSLLJR
Other Main Boards
p/n: EBR72942901 AUSLLHR
p/n: EBR71638619
Interchangeable

IC500
3

Q500 1 2

Q501 CTL
B
C IC109 IC102 3.3V_ST
E

5V_ST in (3)

EEPROM HDCP EEPROM


+5V in
IC505
USB +5V OCP
IC1101 IC104
NAND
1 2 3
FLASH
+3.3V
IC804
+5V in Hot Swap HDMI CEC
D805
EDID A2 A1

B+ Routing Q806 Q800


C B 1
D804
C
Q103 E
A2
Q807 B A2

E TU1300 EDID WP E
C
C
A1
C
A1

C
B
D801
Hot Swap
18. IF p
17. IF n
Digital Video IC802
16. IF AGC EDID D803 Q805
15. Reset C
E B
14. 3.3V
Tuner SIF 13. 1.26V
A1 A2
C
12. GND
Q1304
E B
Analog
11. CVBS Video Hot Swap
C
E B
10. NC
IC801
Q1305 C
9. SIF
IC901 EDID
8. NC
Tuner CVBS 7. SDA
6. SCL
5. NC
4. NC
EDID IC900 RS232
3. 5V

2. NC B
C
1. NC
E

Q900
RS232 TX
Buffer

144 June 2011 42PW350 Plasma


42PW350 Main Board Back Side Component Voltages

IC102 HDCP IC505 +2.5V_AVDD IC900 RS232 Tx/Rx IC1101 USB 5V Q800 HDMI CEC Q1305 Tuner
EEPROM Pin Regulator Pin Pin Limiter Pin Buffer Pin CVBS
Pin [1] 3.3V (In) [1] 3.3V [1] Gnd [1 B] 3.29V [B] 3.63V
[1] Gnd [2] Gnd [2] 5.6V [2] 5.1V (In) [2 S] 3.29V [C] 0V
[2] Gnd [3] 2.52V (Out) [3] 0V [3] 5.1V (In) [3 D] 3.23V [E] 4.3V
[3] 3.3V [4] 0V [4] 3.3V [4 G] 3.3V
[4] Gnd IC801 IC801, IC802 [5] (-5.6V) [5] 0V D801 Biasing
[5] 3.3V EDID Data [6] (-5.6V) [6] 5.1V (Out) Q806 Hot Pin for Q800
[6] 3.3V Pin For HDMI [7] 5.7V [7] 5.1V (Out) Pin Swap [A1] 3.28V
[7] 3.3V [1] Gnd [8] 0V [8] n/c [B] 0V [C] 3.32V
[8] 3.3V [2] Gnd [9] 3.3V [C] 0V [A2] 0V
[3] Gnd [10] 0V IC1402 Serial [E] 0V
IC109 EEPROM [4] Gnd [11] 3.3V Pin Flash D803 5V
for Micro [5] 3.3V [12] 3.3V [1] 3.29V Q807 Hot Pin Routing
Pin [6] 3.3V [13] 0V [2] 0V Pin Swap [A1] 0V
[1] Gnd [7] 3.3V [14] (-5.6V) [3] 3.3V [B] 0.1V [C] 3.32V
[2] Gnd [8] 3.3V [15] Gnd [4] 0V [C] 0V [A2] 3.28V
[[3]] Gnd [[16]] 3.3V ((B+)) [[5]] 0V [[E]] 0V
[4] Gnd IC804 EDID Data [6] 0V D804 5V
[5] 3.3V Side Input IC901 EDID Data [7] 3.29V Q900 Hot Pin Routing
[6] 0V Pin For HDMI for PC [8] 3.29V Pin Swap [A1] 3.28V
[7] 3.3V [1] Gnd Pin For HDMI [B] 0.63V [C] 3.32V
[8] 3.3V [2] Gnd [1] Gnd Q103 EDID [C] 0V [A2] 0V
[3] Gnd [2] Gnd Pin WP [E] 0V
IC500 3.3V_VST [4] Gnd [3] Gnd [B] 0V D805 5V
Pin Regulator [5] 3.3V [4] Gnd [C] 5V Q1304 Tuner Pin Routing
[1] Gnd [6] 3.3V [5] 3.3V [E] 0V Pin SIF [A1] 5.1V
[2] 3.3V (Out) [7] 3.3V [6] 3.3V [B] 0.23V [C] 4.9V
[3] 5.09V (In) [8] 3.3V [7] 3.3V Q500 +5V_ST_EN [C] 0V [A2] 0V
[8] 3.3V Pin Switch CTL [E] 0.92V
[B] 0.64V
[C] 0V
[E] 0V

145 June 2011 42PW350 Plasma


Main Board Tuner Explained Pop the cover off to expose the Tuner Pins. Or flip the board
over to access the back side of access to the pins.
TU1300

18. IF p Check for Digital signal 700mV p/p


17. IF n on pins 17 and 18.
16. IF AGC
15. Reset
14 3
14. 3.3V_TU
3V TU
13. 1.26V_TU Check ffor Tuner B+:
C
12. GND +5V_TU Pin 3 (provided by IC507 pin 8)
11. CVBS 1.2V_DE Pin 13 (provided by IC600 pin 1)
10. NC +3.3V Pin 14 (provided by IC506 pin 2)
9. SIF

8. NC
7. SDA Data only present during channel
6. SCL change on SDA/SCL. approx:. 4V p/p.
5. NC
4. NC
3. 5V_TU

2. NC
1. NC

Front bottom right hand side

146 June 2011 42PW350 Plasma


Main Board Crystal X200 and X1400 Check
X1400 25Mhz

X1400
1.51V 1.61V

Left Side 3.41V p/p Right Side 4.73V p/p


X1400 Runs only when set is on.
(3D Formatter IC1400 Crystal)

X200 Runs
R when
h power applied.
li d
X1400 (Micro Crystal) X200 25MHZ

X200
X200

1.67V 1.66V
Top Side 3.38V p/p Bottom Side 3.0V p/p
MAIN Board
Crystal Location

147 June 2011 42PW350 Plasma


Main Board Removing the LVDS Cable or Power Supply Connector
((1)) Using
gyyour fingers
g and p
press in g
gently
y on the two locking
g tabs.
Then rock the connector out of the plug.
P501 Main or P813 SMPS
(2) Pull the Cable from the Connector
by rocking back and forth.

If the Connector Locks have been


damaged and will not release, cut off tabs.
Use a thin object
j and slide straight
g down
as indicated by the arrows below and
release the locks.

Cut Cut
Off Off

148 June 2011 42PW350 Plasma


P501 Main Board Plug to Power Supply Voltages and Diode Check
Pin c front
P501 "Main" to P813 "SMPS"
Pin Label STBY Run Diode Check
P501
a
1_2 17V 0V 17V Open
3-4 Gnd Gnd Gnd Gnd
5-7 a
5.1V 0.46V 5.17V 1.18V Frontt pins
F i are odd
dd
ac
Back pins are even
8 Error_Det 3.44V 4.02V 1.73V
9-12 Gnd Gnd Gnd Gnd
13-14 STBY_5V 3.47V 5.14V 1.07V
a
15 RL_ON 0V 3.28V 1.78V
ad
16 AC Det 0V 4.06V 1.04V
b
17 M ON
M_ON 0V 3 28V
3.28V 1 79V
1.79V
e
18 Auto_Gnd Gnd Gnd Gnd

a Note: The RL_On turns on +5V, 17V Error Det. and AC_DET.
b Note: The M5-On command turns on M5V M5V, Va and Vs
Vs.
c Note: The Error Det line is not used in this model.
d Note: If the AC Det line is Missing, Audio will Mute.
e Note: Pin 18 is grounded on the Main. If opened, the power supply turns on automatically.

Diode Mode Check with the Board Disconnected. DVM in the Diode mode.

149 June 2011 42PW350 Plasma


P700 Main Board Speaker Plug Voltage and Diode Check
Voltage and Diode Mode Measurements for the Main Board Speaker Plug

P700 Connector "Main"


Main to "Speakers"
Speakers
Pin Label Run Diode Mode IC700
1 R- 0V~1.0V Open Audio Amp
2 R+
R 0V~1.0V
0V 1.0V Open
3 L- 0V~1.0V Open
4 L+ 0V~1.0V Open

Audio Right out pin 6 and 9.


Audio Left out pin 10 and 13.

17V Audio Amp Power: Right pins 8. Left pins 11.


3 3V Low Voltage Signal Processing: Pins 21,
3.3V 21 35
35.
Audio Mute: Pins 23, control is AC_DET. 1

Right (-)

Left (-)
Right (+)

Left (+)
P700
Diode Mode Check with the Board Disconnected. DVM in the Diode mode. Speaker Connector

150 June 2011 42PW350 Plasma


P902 Main Board Plug to IR Board
Voltage and Diode Mode Measurements for the Main Board 1
P902 "MAIN" tto "F
"Frontt IR"
1 Infrared
Receiver Pin Label STBY Run Diode Check
1 IR 2.84V 2.7V 2.63V
3&4 2 Gnd Gnd Gnd Gnd
S ft T
Soft Touch
h 3 Key1 3.3V 3.3V 1.77V
Key Board 4 Key2 3.3V 3.3V 1.77V
5 LED_RED 3.25V 0V 1.72V
7&8 6 Gnd Gnd Gnd Gnd
Intelligent
7 EYE_SCL 3.3V 3.3V 1.72V
Sensor
8 EYE_SDA 3.3V 3.3V 1.72V
9 Gnd Gnd Gnd Gnd

10 10 3.3VST 3.3V 3.3V 0.85V


Stand-By 11 n/c n/c n/c n/c
3.3V 12 n/c n/c n/c n/c
13 Touch_Ver_Check 0.19V 0V 1.69V
13 14 n/c n/c n/c Open
Soft Touch 15 n/c n/c n/c Open
Sensitivity
Setting

Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.

151 June 2011 42PW350 Plasma


P1401 Main Board LVDS Video Signal Test Points
P106 P1401
Control Main Waveforms Taken from P1401 pins 11 and 12, but there
Pin
51
Pin
1
are actually
y 20 p
pins carrying
y g video.
50 2 3D-Sync P1401 Input Signal SMPT Color Bar. 20mV per/div.
49 3 TXD
48
47
4
5
RXD
Pin 11 5mSec per/div 100mV p/p Pin 12 5mSec per/div 100mV p/p
46 6
45 7
44 8
43 9
42 10
41 11 Video
40
39
38
12
13
14
Video
Video
Video
c
37 15
36 16 CLK
35 17 CLK
34 18
33 19 Video
32 20 Video
31 21 Video
30 22 Video
29
28
23
24
Video
Video
Pin 11 2mSec per/div 100mV p/p Pin 12 2mSec per/div 100mV p/p
27 25
26
25
26
27 Video
The rest of the Waveforms are very
24
23
28
29
Video
Video
similar in appearance and Peak to Peak.
22 30 Video
21 31
20 32 CLK Note1: The Control Board has Test
19
18
33
34
CLK
Points that make taking measurements
17
16
35
36
Video
Video
easier to take.
15 37 Video
14
13
38
39
Video
Video Main Board Note2: The Control Board pins are
12
11
40
41
Video
P1401 Location reversed from the Main Board. Pin 1 is
10
9
42
43
at the bottom of P106 connector. Use
8 44 the table on the left.
7 45
6 46
5 47 Disp_En
4 48 Note3: Use the VS
VS_DADA Test Point and
3
2
49
50
external trigger to help lock the scope
1 51 onto the video waveforms.

152 June 2011 42PW350 Plasma


P1401 Main Board LVDS Voltage and Diode Check
P1401 "Main" to P106 LVDS "Control" P1401
Pin Label Run Diode Check Pin Label Run Diode Check
1 Gnd Gnd Gnd 26 Gnd Gnd Gnd
2 VS_3D *0V OL 27 TE1P 1.11V 1.25V
3 UART_TXD 3.31V OL 28 TE1N 1.19V 1.25V
4 UART_RXD 3.3V OL 29 TD1P 1.11V 1.38V
5
6
n/c
n/c
n/c
n/c
n/c
n/c
30
31
TD1N
Gnd
1.19V
Gnd
1.37V
Gnd
c
7 Gnd Gnd Gnd 32 RCLK1P 1.16V 1.25V
8 Gnd Gnd Gnd 33 RCLK1N 1.13V 1.25V
9 Gnd Gnd Gnd 34 Gnd Gnd Gnd
10 Gnd Gnd Gnd 35 TC1P 1.11V 1.25V
11 TE2P 1.11V 1.25V 36 TC1N 1.19V 1.25V
12 TE2N 1.19V 1.25V 37 TB1P 1.11V 1.38V
13 TD2P 1.11V 1.38V 38 TB1N 1.19V 1.37V
14 TD2N 1.19V 1.37V 39 TA1P 1.11V 1.38V
15 Gnd Gnd Gnd 40 TA1N 1.19V 1.37V
16 RCLK2P 1.16V 1.25V 41 Gnd Gnd Gnd
17 RCLK2N 1 13V
1.13V 1 25V
1.25V 42 n/c n/c n/c
18 Gnd Gnd Gnd 43 n/c n/c n/c
19 TC2P 1.11V 1.25V 44 n/c n/c n/c
20 TC2N 1.19V 1.25V 45 n/c n/c n/c
21 TB2P 1.11V 1.38V 46 SDA 3.3V OL
22 TB2N 1.19V 1.37V 47 _
DISP_EN 3.05V 1.0V
23 TA2P 1.11V 1.38V 48 SCL 3.3V OL
24 TA2N 1.19V 1.37V 49 PC_SER_DATA 3.31V OL
25 Gnd Gnd Gnd 50 PC_SER_CLK 3.31V OL
51 Gnd Gnd Gnd
* Pin 50 0V (No 3D) 1.65V (With 3D)
Pins in Bold are Video pins (20 Total)

Diode Mode Check with the Board Disconnected. DVM in the Diode mode.

153 June 2011 42PW350 Plasma


P1404 Main Board Motion Remote and 3D Transmitter Voltage and Diode Check
Voltage and Diode Mode Measurements for the Main Board Speaker Plug
P1404
0 "MAIN Board"
oa d To
o "Motion
ot o Remote
e ote Sensor"
Se so
P1404
Pin Label STBY Run Diode Check
1 3.3V_Normal 0V 3.29V 0.49V Pin c
2 Gnd Gnd Gnd Gnd
3 _ _
3D_RF_RX 0V 3.29V 1.18V
4 3D_RF_TX 0V 3.29V 1.17V
5 3D_RFModule_Reset 0V 3.1V 2.37V
6 3D_RFModule_DC 0V 0.1V 1.32V
7 3D_RFModule_DD 0V 0.1V 1.34V
8 Gnd Gnd Gnd Gnd
9 3D_RF_GPIO_0 0V 0V 1.26V
10 3D_RF_GPIO_1 0V 0V/3.18V 1.26V
11 3D_RF_GPIO_2 0V 0V 1.26V
*12 3D_L/R_Sync 0V 0V/1.59V Open
*No 3D / With 3D
Note: Pin 12 with 3D Sync 3.48V p/p 60 Hz square wave.

RF Freq GPIO 0 (9) GPIO 1 (10) GPIO 2 (11)


3D Disable 0 0 0
60Hz 1 0 0
59.94Hz 0 1 0

Diode Mode Check with the Board Disconnected. DVM in the Diode mode.

154 June 2011 42PW350 Plasma


FRONT IR, POWER LED and SOFT TOUCH KEY PAD SECTION
The following section gives detailed information about the Front IR and Soft Touch
Key Pad. These boards contains the Infrared Receiver, Intelligent Sensor and Power
LEDs section.

The Soft Touch Function Keys is actually a thin pad adhered to the front protective
shield and actually underneath (as viewed from the rear) the Front IR Board.

The Power LED is driven by LED_RED pin from the Micro IC101. Sent to the base of
Q901 and then to P902 pin 4. Then sent to the Ft. IR board connector pin 5 P100.
This board has no adjustments other than the Soft Touch Key board sensitivity from
the Customers Menu.

The Front Control Board (IR and Intelligent Sensor) receives its operational B+ from
tthe
e Main
a Board.
oa d 3
3.3V
3 _S
ST P100
00 p
pin 10
0 from
o tthee Main
a Board.
oa d Thiss voltage
o tage is
s ge
generated
e ated
on the Main Board by the 3.3V_ST Regulator (IC500)
The Intelligent Sensor IC communicate with the Main Board Microprocessor
(IC101) via Clock and Data lines out P100 to P902 pins 7 and 8.
The IR signal is routed back to the Main Board via pin 1.
Also, the Soft Touch Key Pad is routed through out P100 to P902 pins 3 and 4.

155 June 2011 42PW350 Plasma


Front IR and Intelligent Sensor Board Locations
Lower Left Side (As viewed from rear)
rear).

IR Receiver

P100 To Main Board

To gain access to the Front IR board, as viewed from the bottom of the TV,
remove to two screws that hold the Front Right Speaker and pull the speaker out.

Screw Screw

156 June 2011 42PW350 Plasma


P100 IR Board Connector Voltage and Pin Identification
P100 "Front IR and Soft Touch Keys" to "Main" Board P902
32KHz Pulse Pin Label STBY Run Diode Check
3.5V p/p 1 IR 2.84V 2.7V OL
2 Gnd Gnd Gnd Gnd
3 Key1 3.3V 3.3V OL
3 & 4 For the Soft
T
Touchh Key
K PadP d 4 Key2 3.3V 3.3V OL
section. 5 LED_RED 3.25V 0V OL
6 Gnd Gnd Gnd Gnd
7 & 8 Front LEDs
7 EYE_SCL 3.3V 3.3V OL
and
Intelligent Sensor 8 EYE SDA
EYE_SDA 3 3V
3.3V 3 3V
3.3V OL
9 Gnd Gnd Gnd OL
10 Stand-By 3.3V 10 3.3VST 3.3V 3.3V 2.3V
From IC302 11 n/c n/c n/c OL
12 n/c
/ n/c
/ n/c
/ OL
13 Touch_Ver_Check 0.19V 0V 0.62V
14 n/c n/c n/c OL
15 n/c n/c n/c OL

P100
For Readings when any Key is
touched, see Soft Key Pad Section 1
For Key 1 and Key 2.

Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.

157 June 2011 42PW350 Plasma


P100 (Key 1, Key 2) Resistance Reading with Soft Touch Key pressed.
Soft Touch Key
Pin 3 measured Pin 4 measured
Pad Resistance KEY
from Gnd
KEY
from Gnd
and
d Diode
d Moded Power 3.0M Ohms Enter 3.0M Ohms
Checks CH (Dn) 1.9M Ohms Menu 1.9M Ohms
The Front IR Board Input 900K Ohms Volume (+) 900K Ohms
h aK
has Key bboardd
decoder that is
CH (Up) 205K Ohms Volume (-) 205K Ohms
generating these
P100 Voltage Measurements with Soft Touch Key pressed.
Resistance changes
when a Soft Touch Key Pin 3 measured Pin 4 measured
is touched.
touched KEY KEY
from Gnd from Gnd
This in turn pulls down
the Key 1 and Key 2 Power 2.4V Enter 2.42V
lines to be interpreted
by the Microprocessor. CH (Dn) 1.6V Menu 1.6V
Input 0.9V Volume (+)
( ) 0.89V
CH (Up) 0.2V Volume (-) 0.2V

P100 Connector FT IR Board to P902 Main (No Key Pressed)


Diode Mode
Readings taken with Pin Label STBY Run Diode Mode
all connectors
3 KEY 1 3.29V 3.29V 2.58V
Disconnected. Black
lead on Gnd. DVM 4 KEY 2 3.29V 3.29V 1.58V
in Diode Mode.

158 June 2011 42PW350 Plasma


MOTION REMOTE and 3D SYNC BOARD SECTION
The first time the Motion Remote has its batteries installed and pointed at the
Television, the Motion Remote is synchronized with the TV. After that, when
pointing the remote at the TV and pressing the Enter key, a pointer appears
on screen, then by moving the Motion Remote around, the pointer moves
with the movement of the remote. When the pointer is placed over a
selectable button, you can press the center Enter
Enter button and active the
object. This makes navigation much easier.

You can also adjust the volume, change channels and mute the audio with the
Motion Remote and it has a convenient Home
Home button for the TV Menu.

A wrist band can be attached to the remote to avoid dropping and damaging the
remote.

The Motion Remote utilizes a specialized receiver on the Television to receive


the RF signal and this information is then routed to P1302 and on to the
IC101 the BCM IC for pointer positioning and interpretation of the other
functions.
How to Re-register the Magic Motion Remote Control after Registration Failure. Reset the
remote control by pressing and holding both the ENTER and MUTE buttons for 5 seconds.
An LED will blink 3 times indicating the remote is ready for registering.
Motion Remote Magic Remote AKB73295502

159 June 2011 42PW350 Plasma


Motion Remote Receiver Board
The following section gives detailed information about the Motion Remote
Receiver Board
Board. The Motion Remote Receiver receives signals from the
Motion Remote to manipulate the On-Screen pointer.

The Motion Remote receives its operational B+ from the Main Board:

3.3V_Normal P1302 pin 1 from the Main Board to J1 Pin 1.


This voltage is generated on the Main Board (IC505)
3.3V_MULTI
3 3V MULTI generated on the Main Board (IC402)
(IC402).

No Connector Number
Silk Screened on board

p/n: EBR72499601

160 June 2011 42PW350 Plasma


Motion Remote Receiver Board Close Up p/n: EBR72499601

No Connector No. Rear View

RF Transmitter
Receiver
Front View

161 June 2011 42PW350 Plasma


Motion Remote Connector Voltage and Diode Check
"Motion Remote Sensor to P1302 "MAIN Board"
Pin Label STBY Run Diode Check No Label
1 3.3V_Normal 0V 3.33V 0.49V
2 Gnd Gnd Gnd Gnd
3 M_REMOTE_RX 0V 3.29V 1.18V
4 M_REMOTE_TX 0V 3.3V 1.17V 1
5 M_RFModule_Reset 0V 3.3V 2.37V
6 DC_Mremote 0V 3.3V 1.32V
7 DD Mremote
DD_Mremote 0V 3 3V
3.3V 1 34V
1.34V
8 Gnd Gnd Gnd Gnd
9 3D_GPIO_0 0V 0V 1.26V
10 3D_GPIO_1 0V 0V/3.18V 1.26V
11 3D_GPIO_2 0V 0V 1.26V Pin 12 3.48V p/p
12 3D Sync 0V 0V/1.59V Open w/3D 60 Hz

*Pin 10/12 voltages without 3D / with 3D


Freq GPIO 0 GPIO 1 GPIO 2

3D Disable 0 0 0

60Hz 1 0 0

59.94Hz 0 1 0

Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.

162 June 2011 42PW350 Plasma


INVISIBLE SPEAKER SYSTEM SECTION
Invisible Speaker System Overview (Full Range Speakers) p/n: EAB62028901
The 50PZ950 contains the Invisible Speaker system.
system
The Full Range Speakers point downward, so there are no front viewable speaker grills or air ports.

Installed Bottom View

Anti Rattle Anti Rattle


Pad Pad

Remove two screws


from the bottom Reading across
speaker wires,
8.2 ohm.

Rear View Front View

Speaker
Connection

163 June 2011 42PW350 Plasma


INTERCONNECT DIAGRAM (11 X 17 Foldout) SECTION

This section shows the Interconnect Diagram called the


p and Adobe
11X17 foldout thats available in the Paper
version of the Training Manual.

Use the Adobe version to zoom in for easier reading


reading.

When Printing the Interconnect diagram, print from the


Ad b version
Adobe i and
d print
i t onto
t 11X17 size
i paper for
f bbestt
results.

164 June 2011 42PW350 Plasma


42PW350 (42T3 Panel) CIRCUIT INTERCONNECT DIAGRAM
Z-SUS Signal
VR601 P813 "SMPS" to P500 "Main"
155V 5V Pin Label STBY Run No Load Diode
Set-up P2 "Z-SUS" to "Y-SUS" P206 Connect Scope
P811 "Power Supply" to P7 "Z-SUS" 18 e
Auto_Gnd Gnd Gnd 4.86V Open between Waveform
Pin Label Run
A b TP J17 on Z board
Pin Label Run Diode 17 M_ON 0V 3.28V 0V Open Note a: 1~4 ER_PASS 98V~102V OL
and Gnd. Use RMS
16 ad 0V 4.06V 4.94V 3.1V The RL_On command turns on the 17V, +5V, 5 n/c n/c n/c
100V 2MSec 577V p/p 0V AC Det
Error_Det and AC_DET. information just to
1~2 Vs *200V Open
P201
FPC

15 a
RL_ON 0V 3.28V 0V Open Note b: 6~7 +Vs *200V OL check for board
3~4 Gnd Gnd Gnd The M-On command turns on M5V, Va and Vs. 8 n/c n/c n/c activity.
13-14 STBY_5V 3.47V 5.14V 4.94V 2.53V Note c: 63VRMS 50V 100uSec 230V p/p
VR401 B 9~11 Gnd Gnd Gnd
9-12 Gnd Gnd Gnd Gnd Gnd The Error Det line is not used in this model.
Set-Dn 195uSec 5uSec 5 Va *55V Open Note d: 12 M5V 5.06V 1.03V
ac P7 "Z-SUS" to "SMPS" P811
8 Error_Det 3.44V 4.02V 4.94V 2.84V AC Det line is not used. * Note: Varies according to Panel Label
6 M5V 5.0V 1.38V Note e: Pin Label Run Diode Check
69VRMS 100V 100uS 576V p/p 5-7 a
5.1V 0.46V 5.17V 5.22V 2.13V 1~2 +Vs *200V OL
Pin 18 is grounded on the Main. If opened, the
3-4 Gnd Gnd Gnd Gnd Gnd power supply turn on automatically. 3~4 Gnd Gnd Gnd
Y-DRIVE BOARD
a 5 +Va *55V OL
p/n: EBR69839101 Connect Scope between Waveform TP on Y-Drive and Gnd *Voltage varies with panel label 1_2 17V 0V 17V 17V 3.06V
6 M5V 5.06V 1.03V
* Note: Varies according to Panel Label

DO NOT USE THIS TP FOR ADJUSTMENTS


Z-SUB BOARD
Waveform Taken from C213 Left Side with Y-DRIVES FS2 VA p/n: EBR71728001
Waveform FG5V
116VRMS 100V 2mSec 485V p/p
P206 Diode Check reads F301 P2
P202
FPC

1.33V Board Connected D901


FG5V 4A/250V VS P811 VR1 10A/125V
or 1.63V Disconnected
+ STBY 160V Supply
Vzbias TP
Vzbias
C523 RUN 390V D902 VS TP P7 R151
- Q802 P201
FG D602
VA TP
Diode Check FS1/FS2: Diode Check Top 2 pins
There are Chocolate pieces 7A/125V OL: Connected or Disconnected
are VA
F302 D504 FS3 (M5V) 11~12
between the Y-SUS and the Panel. FS3: Diode Check
VA
Be sure to return them to there 2.5A/250V Q801 Supply VR502 0.76V: Connected P4
WITH NO Y-DRIVE (Board removed completely) correct location if they should fall off Q601 1.03V: Disconnected
112VRMS 100V 2mSec 470V p/p
when removing the Y-SUS. L602 VR901
Q501 VA Adj
STBY 160V P2 "Control" to P201 "Z-SUS Board" P201 "Z-SUS Board" to P2 "Control"
FS1 VS
RUN 390V VS Adj
Pin Label Run Diode Check Pin Label Run Diode Check
P101
Z-SUS
Q602 1 Gnd Gnd Gnd 1~3 (+15V) 18.2V 2.18V
IC301 D351 P/N: EBR68342001 See Waveform
Y-SUS SMPS Test Unplug P813 5V
2 SUSUP 0.22V OL 4~5 M5V 5.06V 1.03V Above
T901 Supply 6.3A/250V
All FGnd to Main board.
P/N: EBR68341901 Q355 3 Gnd Gnd Gnd 6 Y-OE 0.05V OL
P101 P213 Use two (100W) light bulbs in L601 4 SUSDN 0.79V OL 7 CTRL_OE Gnd Gnd
D352 The Z-SUS will run stand alone.
series between Vs and Gnd SMPS
P203

5 n/c n/c OL 8 VZ_CON 3.25V OL Disconnect P2 to the Y-SUS. Z-SUS


FPC

17V
to place a load on the SMPS. P/N: EAY62170901 Supply
Disconnect P105 on CTL. Board. Waveform
6 ZBIAS 1.92V OL 9 Gnd Gnd Gnd Jump 17V from the SMPS J2
VR601 Apply AC, all voltage should Q356 (just left of P813) to Z-SUS J1
P103
7 Gnd Gnd Gnd 10 ZBIAS 1.92V OL (just above P6) connector.
Set-Up run. RL103 Ground Y-OE Z-SUS (bottom R1).
J17
D101 8 VZ_CON 3.25V OL 11 n/c n/c OL
See Auto Gen on the P702 R1
Output Waveform J17 (281V p/p).
P813 9 CTRL_OE Gnd OL 12 ZSUSDN 0.79V OL 18V J1
Control board to perform a Y-OE
F101 5V J28 P3
Panel Test. 10A/250V
10 Y-OE 0.05V OL 13 Gnd Gnd Gnd
P6
FG5V If all supplies do not run 11~12 M5V 5.06V 1.15V 14 ZSUSUP 0.22V OL
SC101
Diode Check reads when A/C is applied, 13~15 (+15V) 18.2V OL 15 Gnd Gnd Gnd
1.33V Board Connected
disconnect P811 to isolate 18V P6 pins 1-3
or OL Disconnected -Vy TP IC701 (1.8V Core) M5V P2 pin 4-5
the excessive load.
Pins are R201 (1) Gnd P6 Pins inverted from P2 on Control
P203
reversed (2) 1.8V 18V P2 pins 13-15
P204

From With the unit on, if D1 is not on, check 5V supply. Q1400
-Vy Adj (3) 3.31V M5V P2 pin 11-12
FPC

Y-SUS VR401 Bottom 2


E B
Serial Flash
If present replace the Control Board. WP
C
Pins are VA
FG15V VR502 Set-Dn IC701 CONTROL BOARD To Speakers
3D Formatter
X1400 IC1402 4~5
If missing, see (To Test Power Supply) 3 P/N: EBR71200701 24Mhz Serial Flash
J66 FG5V 2 2 All speakerIC1400 P501
P2 Other Main Boards
P102 J54 D502 18V J55
1
1.06V 4.94V wires 0V~1V L1402
p/n: EBR72942901 AUSLLHR
T501 p/n: EBR71638619
1, 2 FG5V P212 D503
3.27V
L1
Ribbon Cable Soft to Loud IC1407 IC1404
Interchangeable
Ribbon Cable 3.3V 1.8V +1.0V
IC703 IC1401 +1.8V IC1406
M5V J13 IC101 VS_DA +5V in
FL1 Scan FG D506 1.05V 1.05V LVDS P1401 +3.3V_3D_A In (3) 3
Y-SUS and Y Drive Signals +3.3V Reg
1 2 3
P105 P106 2 2
C213 OE J73 D1
1.8V On
nd
See 2 page for
DDR
MAIN BOARD 1
+3.3V_3D Reg
+5V in (3)

T502 FS501 IC22 Q1402 D S


SDA_3.3V_MOD
p/n: EBT61267425 AUSLLJR
Waveforms
G
D +5V_ST_EN In
Q1401
S
G SCL_3.3V_MOD
18V +3.3V_AVDD
P106 P211 28~30 (18V) 1~3 (18V) IC500
D506 18V Source P101
+5V_ST In IC504
Back of Board M5V J35 3
IC702 IC53 3
IC1202 IC502 +5V_ST_EN Switch 2
Pins are D508 FG15V Source D502 -Vy Source 200V
24-27 (M5V) 4-7 (M5V) 1 2
3.31V
1 PANEL TEST:
2 1
3.3V_ST
5V_ST in (3)
+5V_ST_EN In
+1.26V_VDDC) Reg Q501 B

IC11 X1 P902 S C
Q500
reversed DDR D
2 2
3D Sync
E

IC508 FG5V Source D503 VSC Source 146V OE should be 0V IC102 G


Q501 CTL 17V in
P202
from Y-SUS 25 MHz 3
Remove LVDS Cable. Short A C

P1404 HDCP EEPROM


IC109 EEPROM
+5V_TU
2
(5V indicates a Problem) To Motion 1 3
B E
IC507
Auto Gen across Auto Gen TPs to Q901
B
L503
3 IC506
generate a test pattern. To Ft IR LED_Red
Driver Remote 2 2 +3.3V D501
FS501 18V P105 "Control" to P101 "Y-SUS" P107 P108 1 +5V in
P211 "Y-SUS" to "Y-Drive" P106 P213 "Y-SUS" to "Y-Drive" P101 P22 n/c IC501 IC104
+5V in
USB +5V OCP
Diode Check reads 3.3V from IC53 3.3V from IC53 IC1201 IC505 L506
P205
FPC

Pin Label Run Diode Check NAND


Pin Label Run Diode Check Pin Label Run L502 D200 IC1101
0.85V Board 1~3 +15V 18.2V OL Pins 41~43 Pins 8~10 A2 A1
IC101 FLASH +2.5V_AVDD
+1.5V_DDR_IN DDR 3 2 1
1~2 VSC (Y-Scan) 146.2V OL Connected or 1.13V n/c Upgrades C

Micro/ +3.3V_AVDD
1-2 FGnd FGnd 4~7 +5V 4.94V 1.15V +5V_ST_EN In in
Disconnected IC103 IC600 D805
8~11 Gnd Gnd Gnd Serial Flash
Video
3~4 VPP 145V OL IC53 (3.3V Reg) HDMI CEC Hot Swap
3
B+ Routing
A1 A2
EDID
P212 "Y-SUS" to "Y-Drive" P102 12 Dumy2 2.14V OL IC703 Note: IC53 (3.3V Q800 1 C
Q806 EDID WP Processor +1.2V_DE 2
1
C

n/c n/c
B
5 OL (1) 4.94V E +3.3V in (3)
IC804
13 Y-OE 0.03V OL (1) 4.94V ( 9) 1.92V P902 "MAIN" to "Front IR"
A2

Pin Regulator) routed D804


B
Label Run IC700
A2
C C
Q103
(2) 3.32V
A1 A1 C

To Test Y-SUS
E
6 SUS_DN (FG) FG FG 14 PC 1.84V OL (2) 0V (10) 1.06V D801
1-10 FGnd FGnd to all X Boards Pin Label STBY Run IC802 TUNER Q807
E

7 CLK 0.92V 1.46V 18V, FG5V & FG15V supplies. 15 ER_DN 0.5V OL
(3) Gnd (11) 1.06V (3) Gnd Audio Amp
X200 18. IF p
B

Hot Swap
C

FG5V 5V Disconnect all connectors. 1 IR 2.84V 2.7V L703 L701 L700 EDID
TU1300
11-12
C
17. IF n
16 DATA_PRE 0.01V OL
(4) Gnd (12) 1.06V
B E
D803 A2 A1 16. IF
8 STB 2.24V 1.46V
Black Lead on Floating Gnd
Jump M5V from SMPS to Y-SUS. 17 ER_UP 0.3V OL
(5) Gnd (13) 6.1V * If the complaint is no 2 Gnd Gnd Gnd Q805
C
IC801 EDID
24Mhz AGC
15. Reset
14. 3.3V
Q1304
B E

(J35 bottom of the board is an easy TP). 18 SC_A 1.45V OL L702 Tuner SIF
9 OC1 2.26V 1.54V
video and shorting the Hot 13. 1.26V

Ground J73 (OE) 19 RAMP_UP 0.22V OL


(6) 0.83V (14) 4.96V 3 Key1 3.3V 3.3V Swap
12. GND
11. CVBS
C
B E

10 DATA 0V 1.46V
points (AutoGen) causes
10. NC
(7) 0.61V (15) 3.31V
C

Ground the Y-SUS. 20 STB 1.5V OL 4 Key2 3.3V 3.3V IC900


EDID 9. SIF
Q1305
11 OC2 2.8V 1.54V Apply AC to SMPS. 21 RAMP_BLK 1.07V OL (8) 0.52V (16) 5V video to appear suspect the 5 LED_RED 3.25V 0V RS232 IC901
8. NC
7. SDA Tuner CVBS
6. SCL
12 SUS_DN (FG) FG FG Check 18V, FG5V & FG15V supplies. 22 CLK 0.6V OL 5. NC

23 SUS_DN 2.71V OL
Main board or LVDS cable. 6 Gnd Gnd Gnd P700 Q900
C
B

E
4. NC
3. 5V
Black Lead on FG (Floating Gnd)
24 DUMMY_3 2.14V OL Note: LVDS Cable must be 7 EYE_SCL 3.3V 3.3V RS232 TX 2. NC
1. NC
Buffer
Y-DRIVE CHECKS 8 EYE_SDA 3.3V 3.3V
25 DUMMY_1 1.07V OL
removed for Auto Gen to R-R+L-L+
BUFFER OUTPUT VSCAN CLK, LE, OC1, OC2 26 DUMMY_4 1.35V OL
9 Gnd Gnd Gnd
work.
P206
FPC

DIODE CHECK DIODE CHECK DIODE CHECK 27 SUS_UP_0 0.75V OL


0.8V Red Lead on FGnd 1.13V Red Lead on FGnd 0.6VV Red Lead on FGnd 28 CTRL_OE 0.11V OL 10 3.3VST 3.3V 3.3V
OL Black Lead on FGnd OL Black Lead on FGnd OL Black Lead on FGnd 29 RAMP_DN 2.17V OL 11 n/c n/c n/c
VPP DATA
30 Gnd Gnd Gnd
To P902 Main 12 n/c n/c n/c B
DIODE CHECK DIODE CHECK 13 Touch_Ver_Check 0.19V 0V 3D sync/ Motion Remote
0.67V Red Lead on FGnd 0.78V Red Lead on FGnd
IR/Key Board P100 14 n/c n/c n/c Motion
OL Black Lead on FGnd 2.1V Black Lead on FGnd
Power LED p/n: EBR72499601
p/n: EAB62028901 A 15 n/c n/c n/c
Note: Screws on Y-Drive
To P1404 Main
are Chassis Ground Attached to front glass
Diode Check TCP disconnected
Red Lead on TCP VA OL P211 P232 P331 P311 P1404 on Main to Motion Remote P312
X-Board Left Black Lead on TCP VA 0.5V Va in on 3.3V in on X-Board Right 3D Sync pin 12 (3.48V p/p) 60Hz
Red Lead on TCP 3.3V OL
3.3V in on Va out on VA in on
p/n: EBR68019901 p/n: EBR68020001 Pin 9 or 10 should be high to turn on 3D
Black Lead on TCP 3.3V 0.53V Pins 3~4 Pins 9~11 Pins 42~44 Pins 3~4 Pins 3~4
RF transmitter on Motion Remote board.
EC OL either way

P201 P202 P203 P204 P205 P206 P301 P302 P303 P304 P305 P306
42PW350 Main Board (Front Side) Component Voltages
IC103 Serial IC502 +1.26V_VDDC IC507 +5V_TU IC1404 +1.0V Q501 +5V_ST_EN
Flash Pin Regulator Pin Regulator Pin Regulator Pin Switch
Pin For HDMI [1] 5V (In) [1] 11.1V [1] 5V (In) [B] 0.7V
[1] Gnd [2] 5V (In) [2] 17V [2] 0V [C] 5.2V
[2] Gnd [3] 0V [3] 3.1V [3] 0V [E] 5.2V
[3] Gnd [4] 0V [4] 1.8V [4] 0V
[4] Gnd [5] 081V [5] 0.8V [5] 0V Q901 LED_RED
[5] 3.29V [6] 0.81V [6] 0.6V [6] 0.8V Pin Driver
[6] 3.29V [7] 0.72V [7] 0V [7] 0.65V [B] 0.71V
[7] 3.29V [8] 0.53V [8] 5V [8] 0.54V [E] 0V
[8] 3.29V [9] 1.7V [9] 1.7V [C] 0V
[10] 1.3V IC600 +1.2V_DE [10] 1.05V
IC501 +1.5V_DDR_IN [11] 1.3V Pin Regulator [11] 1.05V Q1400 Write Protect
Pin Regulator [12] 1.3V [1] 3.3V (In) [12] 1.05V Pin for IC1402
[1] 5V (In) [13] 6.47V [2] 1.26V (Out) [13] 6.1V [B] 0V
[2] 5V (In) [14] 0 25V
0.25V [3] Gnd [14] 0 15V
0.15V [E] 0V
[3] 0V [15] 2.96V [15] 2.9V [C] 3.18V
[4] 0V [16] 5V (In) [16] 0V
[5] 0V Q1401 SCL_3.3V_MOD
[6] 0.81V IC504 +3.3V_AVDD D200 Reset IC1406 +3.3V_VST Pin Buffer
[7] 0.72V Pin Regulator Pin Speed Up Pin +3.3V_3D [B] 3.28V
[8] 0.53V [1] 0V [A1] 0V [1] 0V [C] 3.3V
[9] 1.7V [2] 3.3V (Out) [C] 0V [2] 3.31V (Out) [E] 3.28V
[10] 1.58V [3] 5.2V (In) [A2] 0V [3] 5V (In)
[11] 1.58V Q1402 SDA_3.3V_MOD
[12] 1.58V IC506 +3.3V D501 Reg IC1407 (+1.8V) Pin Buffer
[13] 6.7V Pin Regulator Pin IC507 Pin Regulator [B] 3.28V
[14] 0.12V [1] 0V [A] 0V [1] 0V [C] 3.3V
[15] 2.98V [2] 3.3V (Out) [C] 5V [2] 1.8V (Out) [E] 3.28V
[16] 2.98V (In) [3] 5.2V (In) [3] 3.3V (In)

42PW350 Main Board (Back Side) Component Voltages


IC102 HDCP IC505 +2 5V AVDD
+2.5V_AVDD IC900 RS232 Tx/Rx IC1101 USB 5V Q800 HDMI CEC Q1305 Tuner
EEPROM Pin Regulator Pin Pin Limiter Pin Buffer Pin CVBS
Pin [1] 3.3V (In) [1] 3.3V [1] Gnd [1 B] 3.29V [B] 3.63V
[1] Gnd [2] Gnd [2] 5.6V [2] 5.1V (In) [2 S] 3.29V [C] 0V
[2] Gnd [3] 2.52V (Out) [3] 0V [3] 5.1V (In) [3 D] 3.23V [E] 4.3V
[3] 3.3V [4] 0V [4] 3.3V [4 G] 3.3V
[4] Gnd IC801 IC801, IC802 [5] (-5.6V) [5] 0V D801 Biasing
[5] 3.3V EDID Data [6] (-5.6V) [6] 5.1V (Out) Q806 Hot Pin for Q800
[6] 3.3V Pin For HDMI [7] 5.7V [7] 5.1V (Out) Pin Swap [A1] 3.28V
[7] 3.3V [1] Gnd [8] 0V [8] n/c [B] 0V [C] 3.32V
[8] 3.3V [2] Gnd [9] 3.3V [C] 0V [A2] 0V
[3] Gnd [10] 0V IC1402 Serial [E] 0V
IC109 EEPROM [4] Gnd [11] 3.3V Pin Flash D803 5V
for Micro [5] 3.3V [12] 3.3V [1] 3.29V Q807 Hot Pin Routing
Pin [6] 3.3V [13] 0V [2] 0V Pin Swap [A1] 0V
[1] Gnd [7] 3.3V [14] (-5.6V) [3] 3.3V [B] 0.1V [C] 3.32V
[2] Gnd [8] 3.3V [15] Gnd [4] 0V [C] 0V [A2] 3.28V
[3] Gnd [16] 3.3V (B+) [5] 0V [E] 0V
[[4]] Gnd IC804 EDID Data [[6]] 0V D804 5V
[5] 3.3V Side Input IC901 EDID Data [7] 3.29V Q900 Hot Pin Routing
[6] 0V Pin For HDMI for PC [8] 3.29V Pin Swap [A1] 3.28V
[7] 3.3V [1] Gnd Pin For HDMI [B] 0.63V [C] 3.32V
[8] 3.3V [2] Gnd [1] Gnd Q103 EDID [C] 0V [A2] 0V
[3] Gnd [2] Gnd Pin WP [E] 0V
IC500 3.3V_VST [4] Gnd [3] Gnd [B] 0V D805 5V
Pin Regulator [5] 3.3V [4] Gnd [C] 5V Q1304 Tuner Pin Routing
[1] Gnd [6] 3.3V [5] 3.3V [E] 0V Pin SIF [A1] 5.1V
[2] 3.3V (Out) [7] 3.3V [6] 3.3V [B] 0.23V [C] 4.9V
[3] 5.09V (In) [8] 3.3V [7] 3.3V Q500 +5V_ST_EN [C] 0V [A2] 0V
[8] 3.3V Pin Switch CTL [E] 0.92V
[B] 0.64V
[C] 0V
[E] 0V
End of the 42PW350 Presentation

This concludes the


42PW350
Presentation 09/06/2011 Update
Page 1: Corrected Front Cover page: 1080P changed to 720P.
Pages
g 10 and 11: Dropped pp Wireless Readyy information.
Pages 21~28: Added Power Off Status information.
Page 29: Added EDID D/L information
Page 91: Added waveform for Y-SUS waveform with no Y-Drives
Page 165 Interconnect: Added waveform for Y-SUS waveform
output with no Y-Drives.
M
Movedd 3D Section
S ti in i front
f t off Di
Disassembly
bl SSection
ti

Th k You.
Thank Y

167 June 2011 42PW350 Plasma

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