ELECTRONIC CIRCUIT ANALYSIS

LABORATORY MANUAL
(R13) II B. Tech., II Semester
ECE

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

RAMACHANDRA COLLEGE OF ENGINEERING, ELURU 534 007
Accredited by NAAC with B++ Grade
(Approved by AICTE, New Delhi & Affiliated to JNTUK: Kakinada)
West Godavari District, Andhra Pradesh
RCE ELECTRONIC CIRCUIT ANALYSIS LAB

ELECTRONIC CIRCUIT ANALYSIS LABORATORY

(R13) II B. Tech., ECE II-Semester

Index
Part A: Hardware

S. No. Name of the Experiment

1 DETERMINATION OF fT OF GIVEN TRANSISTOR
2 VOLTAGE SERIES FEEDBACK AMPLIFIER
3 CURRENT SHUNT FEEDBACK AMPLIFIER

4 FREQUENCY CHARACTERISTICS OF CSFET AMPLIFIER

5 WIEN BRIDGE OSCILLATOR

6 COLPITTS OSCILLATOR
7 TWO STAGE RC-COUPLED AMPLIFIER
8 DARLINGTON PAIR AMPLIFIER
9 SERIES FED CLASS-A POWER AMPLIFIER
10 COMPLEMENTARY-SYMMETRY CLASS-B POWER AMPLIFIER
11 SINGLE TUNED (CLASS C) VOLTAGE AMPLIFIER
12 BOOTSTRAP EMITTER FOLLOWER
13 CLASS-B PUSH PULL AMPLIFIER

Part B Multisim simulation software tool

S. No. Name of the Experiment

1 DETERMINATION OF fT OF GIVEN TRANSISTOR
2 VOLTAGE SERIES FEEDBACK AMPLIFIER
3 CURRENT SHUNT FEEDBACK AMPLIFIER

4 FREQUENCY CHARACTERISTICS OF CSFET AMPLIFIER

5 WIEN BRIDGE OSCILLATOR

6 COLPITTS OSCILLATOR
7 TWO STAGE RC-COUPLED AMPLIFIER
8 DARLINGTON PAIR AMPLIFIER
9 SERIES FED CLASS-A POWER AMPLIFIER
10 COMPLEMENTARY-SYMMETRY CLASS-B POWER AMPLIFIER
11 SINGLE TUNED (CLASS C) VOLTAGE AMPLIFIER
12 BOOTSTRAP EMITTER FOLLOWER
13 CLASS-B PUSH PULL AMPLIFIER

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RCE ELECTRONIC CIRCUIT ANALYSIS LAB

DESIGNING STEPS OF SINGLE STAGE RC COUPLED AMPLIFIER.

The design of a single stage RC coupled amplifier is shown below.

The nominal value of collector current Ic and hfe can be obtained from the datasheet
of the transistor.

Design of Re and Ce.

Let voltage across Re; VRe = 10%Vcc .(1)
Voltage across Rc; VRc = 40% Vcc. ..(2)
The remaining 50% will drop across the collector-emitter .

From (1) and (2) Rc =0.4 (Vcc/Ic) and Re = 01(Vcc/Ic).

Design of R1 and R2.

Base current Ib = Ic/hfe.
Let Ic Ie .
Let current through R1; IR1 = 10Ib.
Also voltage across R2 ; VR2 must be equal to Vbe + VRe. From this VR2 can be
found.
There fore VR1 = Vcc-VR2. Since VR1 ,VR2 and IR1 are found we can find R1 and R2
using the following equations.
R1 = VR1/IR1 and R2 = VR2/IR1.

Finding Ce.
Impedance of emitter by-pass capacitor should be one by tenth of Re.

i.e, XCe = 1/10 (Re) .

Also XCe = 1/2FCe.

F can be selected to be 100Hz.

From this Ce can be found.

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RCE ELECTRONIC CIRCUIT ANALYSIS LAB

Finding Cin.
Impedance of the input capacitor(Cin) should be one by tenth of the transistors input
impedance (Rin).
i.e, XCin = 1/10 (Rin)
Rin = R1 parallel R2 parallel (1 + (hfe re))
re = 25mV/Ie.
Xcin = 1/2FCin.

From this Cin can be found.

Finding Cout.
Impedance of the output capacitor (Cout) must be one by tenth of the circuits
output resistance (Rout).
i.e, XCout = 1/10 (Rout).
Rout = Rc.
XCout = 1/ 2FCout.
From this Cout can be found.

Setting the gain.

Introducing a suitable load resistor RL across the transistors collector and ground
will set the gain. This is not shown in Fig1.

Expression for the voltage gain (Av) of a common emitter transistor amplifier is as
follows.
Av = -(rc/re)
Re = 25mV/Ie
and Rc = Rc parallel RL
From this RL can be found.

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RCE ELECTRONIC CIRCUIT ANALYSIS LAB

Simulation Procedure:
PROCEDURE for 2 stage RC Coupled Amplifier
1. Connect the circuit as shown in the circuit diagram.
2. Connect the signal generator output to input terminals of the circuit and Channel A
of dual trace CRO.
3. Connect the output terminal of the circuit to Channel B of the dual trace CRO.
4. Set the signal generator output at 10 mV sine wave at 1 kHz constant and fed it to the
circuit.
5. In the Simulation tab go to analysis - AC analysis. Set the starting frequency as 20 Hz
and Stop frequency 10 MHz, vertical scale as linear and no. of points per decade
1000.
6. In the output tab select Add expression write formula as 20*log((VO)/(Vi)) in the
expression field. Select OK and Simulate.
7. Select the cursers and find the FH and FL from the frequency response to find out the
bandwidth.

PROCEDURE for Class C Tuned amplifier

1. Connect the circuit as shown in the circuit diagram.
2. Connect the output terminal of the circuit to Channel A of the dual trace CRO.
3. In the Simulation tab go to analysis - AC analysis. Set the starting frequency as 10
kHz and Stop frequency 30 kHz, vertical scale as linear and no of points per decade
equal to 1000 and simulate.
4. Select the cursers and find the FT from the frequency response to find out the tuned
frequency.

PROCEDURE for RC Phase shift & Wein Bridge Oscillator

1. Connect the circuit as shown in the circuit diagram.
2. Connect the output terminal of the circuit to Channel 1 of the dual trace CRO.
3. Simulate, adjust the potentiometer (i.e., 12 k variable resistance) to get the correct
sine wave form. Place the both cursers in the CRO observe the T2 T1 as T.
4. Plot the graph for the obtained frequency

PROCEDURE for Shunt and Series Voltage Regulators

1. Connect the circuit as shown in the circuit diagram.
2. Connect the output terminal of the circuit to Voltmeter.
3. In the Simulation tab go to analysis - DC Sweep. Set the starting value to 0 Volts and
stop value 20 Volts, Steps 0.5 Volts and simulate.
4. Select the curser to find out the output voltage for the applied voltages. Note down
the voltages in the respective tabular form i.e., Vin and Vout).
5. Repeat the step 4 for all the desired RL.
6. Plot the graph Vin Vs Vout

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RCE ELECTRONIC CIRCUIT ANALYSIS LAB

1a. DETERMINATION OF fT OF GIVEN TRANSISTOR

AIM: To determine the fT of a given transistor

APPARATUS REQUIRED:

1. Transistor BC 107 : 1 No
2. Capacitors 10f/25V : 3 Nos
3. Resistors 1 k, 2.2 k, 4.7 k, 8.2 k, 33 k : 1 No ea ch
4. Function generator : 1 No
5. 20 MHz Dual trace oscilloscope : 1 No
6. Bread board : 1 No
7. 0-30 V DC power supply : 1 No
8. Connecting wires :1 set

THEORY:
Common Emitter amplifier has the emitter terminal as the common terminal between input
and output. The emitter base junction is forward biased and collector base junction is
reverse biased, so that transistor remains in active region throughout the operation. When a
sinusoidal AC signal is applied at input terminals of circuit during positive half cycle the
forward bias of base emitter junction VBE is increased resulting in an increase in IB, The
collector current IC is increased by times the increase in IB, VCE is correspondingly
decreased. i.e., output voltage gets decreased. Thus in a CE amplifier a positive going signal
is converted into a negative going output signal i.e., 180 o phase shift is introduced between
output and input signal and it is an amplified version of input signal.

Characteristics of CE amplifier

1. Large current gain (AI)

2. Large voltage gain (AV)
3. Large power gain (AP=AI.AV)
4. Phase shift of 180 o
5. Moderate input & output impedances.

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RCE ELECTRONIC CIRCUIT ANALYSIS LAB

CIRCUIT DIAGRAM:

MODEL GRAPH:

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RCE ELECTRONIC CIRCUIT ANALYSIS LAB

TABULAR FORM:

Input Voltage Vin=10 mV

Input Freq uen cy Output Gain Ga in in dB

S. No
(Hz) Volta ge (V) AV =V o/Vi 20 log Av
1 100
2 200
3 300
4 400
5 500
6 600
7 700
8 800
9 900
10 1k
11 2k
12 3k
13 4k
14 5k
15 6k
16 7k
17 8k
18 9k
19 10 k
20 20 k
21 30 k
22 40 k
23 50 k
24 100 k
25 200 k
26 300 k
27 400 k
28 500 k

OBSERVATIONS:

1. Maximum gain (Av) = ----------- dB

2. Lower cut-off frequency (Fl) = ----------- Hz

3. Upper cut-off frequency (FH) = ----------- M Hz

4. Band width (B.W) = (FH FL) = ----------- kHz

5. Gain bandwidth product fT = Av (B.W) = ----------- Hz.

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RCE ELECTRONIC CIRCUIT ANALYSIS LAB

The voltage gain of the amplifier is given calculate the gain in by Gain = 20 log Av
Where, Vo is the output voltage. VS is input voltage of applied AC signal.
PROCEDURE:

1. Connect the circuit as shown in the circuit diagram.

2. Connect the signal generator output to input terminals of the circuit and CH-I of
dual trace CRO.
3. Connect the output terminal of the circuit CH-II of the dual trace CRO.
4. Set the power supply voltage to 9V and connect to the circuit.
5. Set the signal generator output sine wave of 100 Hz at 10 mV constant.
6. Vary the function generator frequency from 100 Hz to 500 kHz (as per in the given
tabular form) and note the corresponding output voltage.
7. Calculation the gain AV =Vo/Vi .
8. Plot the graph frequency verses gain (dB) on a semi log sheet.

RESULT:

VIVA QUESTIONS:
1. What are the advantages and disadvantages of single-stage amplifiers?
2. Why gain falls at HF and LF?
3. Why the gain remains constant at MF?
4. Explain the function of emitter bypass capacitor, Ce?
5. How the band width will effect as more number of stages are cascaded?
6. Define frequency response?
7. What is the phase difference between input and output waveforms of a CE amplifier?
8. What is Early effect?
9. Define fT and give the expression for it?
10. What is meant by Bandwidth of an amplifier?

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RCE ELECTRONIC CIRCUIT ANALYSIS LAB

1b. DETERMINATION OF fT OF GIVEN TRANSISTOR (Using Simulation)

AIM: To determine the fT of a given transistor using simulation

TABULAR FORM:

Input Voltage Vin=10 mV

Input Freq uen cy Output Gain Ga in in dB

S. No
(Hz) Volta ge (V) AV =V o/Vi 20 log Av
1 100
2 200
3 300
4 400
5 500
6 600
7 700
8 800
9 900
10 1k
11 2k
12 3k
13 4k
14 5k
15 6k
16 7k
17 8k
18 9k
19 10 k
20 20 k

OBSERVATIONS:

1. Maximum gain (Av) = ----------- dB

2. Lower cut-off frequency (Fl) = ----------- Hz

3. Upper cut-off frequency (FH) = ----------- M Hz

4. Band width (B.W) = (FH FL) = ----------- kHz

5. Gain bandwidth product fT = Av (B.W) = ----------- Hz.

RESULT:

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RCE ELECTRONIC CIRCUIT ANALYSIS LAB

CIRCUIT DIAGRAM:

MODEL GRAPH:

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RCE ELECTRONIC CIRCUIT ANALYSIS LAB

2a. VOLTAGE SERIES FEEDBACK AMPLIFIER

AIM: To find the gain of the Voltage Series feedback amplifier with & without feedback.

COMPONENTS REQUIRED:
1. Transistor (NPN, Si) BC 107 : 1 No.
2. Electrolytic Capacitor 10 F / 25 V : 2 Nos.
3. Carbon film Resistors 220 k, 33 k,
100 k, 1 k : 1 No. each

MEASURING INSTRUMENTS:
1. 20 MHz Dual trace CRO

MISCELLANEOUS:
1. Trainer Module : 1 No.
2. 1 MHz Function Generator : 1 No.
3. 0-30 V 1A D.C power supply : 1 No.
4. Connecting wires : 1 Lot.

THEORY:

The other name of voltage series feedback amplifier is shunt derived series fed feedback
amplifier. The fraction of output voltage is applied in series with input voltage through
feedback circuit. Feedback circuit shunt the output but in series with input. So the output
impedance is decreased while input impedance is increased. The input & output impedance
of an ideal voltage series feedback amplifier is infinite & zero respectively. The resistor R E is
used to provide necessary biasing for the amplifier with voltage series feedback gain of the
amplifier decreases.

PROCEDURE:

1. Connect the Circuit as per the circuit diagram.

2. Apply a sine wave of 100 mV peak to peak amplitude at 1 kHz from signal generator
to the input of amplifier circuit.
3. Measure the output amplitude V O (p-p) and Calculate the gain of amplifier without
feedback by using A =V O/VS.
4. Calculate the feedback factor using A F = A / 1+A.
5. Calculate theoretically value from = RE / (RE +R).

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CIRCUIT DIAGRAM

MODEL GRAPH:

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TABULAR FORM:
Input ac voltage VS = 100 mV p-p Vi = mV

Input Output Gain in

Gain
S. No. frequency voltage dB
=
(Hz) (Volts) 20 log( )

1 10
2 30
3 60
4 100
5 150
6 200
7 500
8 1k
9 3k
10 5k
11 10 k
12 30 k
13 40 k
14 50 k
15 60 k
16 70 k
17 80 k
18 90 k
19 100 k
20 200 k
22 300 k
23 400 k
24 500 k
25 600 k
26 700 k
27 800 k
28 900 k
29 1M

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RESULT:

VIVA QUESTIONS:
1. Define feedback?
2. Define positive feedback?
3. Define negative feedback?
4. Define sensitivity?
5. What is transfer gain?
6. List out the characteristics of feedback amplifier?
7. What is the effect of input resistance due to series mixing?
8. What happens to output resistance due to voltage sampling?
9. Write the expression for input and output resistance of voltage series feedback amplifier?
10. Give the properties of negative feedback?

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2b. VOLTAGE SERIES FEEDBACK AMPLIFIER (Using Simulation)

AIM: To find the gain of the Voltage Series feedback amplifier with & without feedback using
Simulation.

THEORY:

The other name of voltage series feedback amplifier is shunt derived series fed feedback
amplifier. The fraction of output voltage is applied in series with input voltage through
feedback circuit. Feedback circuit shunt the output but in series with input. So the output
impedance is decreased while input impedance is increased. The input & output impedance of
an ideal voltage series feedback amplifier is infinite & zero respectively. The resistor RE is used
to provide necessary biasing for the amplifier with voltage series feedback gain of the amplifier
decreases.

PROCEDURE:

1. Connect the Circuit as per the circuit diagram.

2. Apply a sine wave of 100 mV peak to peak amplitude at 1 kHz from signal generator to
the input of amplifier circuit.
3. Measure the output amplitude V O (p-p) and Calculate the gain of amplifier without
feedback by using A =V O/VS.
4. Calculate the feedback factor using A F = A / 1+A.
5. Calculate theoretically value from = RE / (RE +R).

RESULT:

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CIRCUIT DIAGRAM

TABULAR FORM:
Input ac voltage VS = 100 mV p-p Vi = mV

Input Output Gain in

Gain
S. No. frequency voltage dB
=
(Hz) (Volts) 20 log( )

1 10
2 30
3 60
4 100
5 150
6 200
7 500
8 1k
9 3k
10 5k
11 10 k
12 30 k
13 40 k
14 50 k
15 60 k
16 70 k
17 80 k
18 90 k

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3 a. CURRENT SHUNT FEEDBACK AMPLIFIER

AIM
1. To study the current shunt feedback amplifier
2. To measure the voltage gain of the amplifier at 1 KHz.
3. To obtain the frequency response characteristic and the band width of
the amplifier.
COMPONENTS REQUIRED
1. Transistor (NPN, Si) 2N 2222 : 2 Nos.
2. Electrolytic Capacitor 1 F : 3 Nos.
3. Resistors 10 k-3 Nos, 47 k-2 Nos, 500 -1 No, 4.7 k-1No, 2 k2 Nos.
MEASURING INSTRUMENTS
1. 20 MHz Dual trace CRO : 1 No.
2. 1 MHz Function Generator : 1 No.
MISCELLANEOUS
1. Trainer Module : 1 No.
2. 0 30 V, 1 A DC Power Supply : 1 No.
3. Connecting wires : 1 Lot.
PROCEDURE
1. Connections are made as per circuit diagram.
2. Keep the input voltage constant at 20mV peak-peak and 1 kHz frequency. For different
values of load resistance, note down the output voltage and calculate the gain by using
the expression
AV =20log(Vo/Vi)dB
3. Add the emitter bypass capacitor and repeat step 2. And observe the effect of feedback
on the gain of the amplifier.
4. For plotting the frequency the input voltage is kept constant at 20mV peak-peak and the
frequency is varied from 100Hz to 1MHz.
5. Note down the value of output voltage for each frequency. All the readings are
tabulated and the voltage gain in dB is calculated by using expression
AV =20log(Vo/Vi)dB
6. A graph is drawn by taking frequency on X-axis and gain on Y-axis on semi log graph
sheet.
7. The bandwidth of the amplifier is calculated from the graph using the expression
Bandwidth.
B.W=f2 -f1
Where f1 is lower cut-off frequency, f2 is upper cut-off frequency.
8. The gain-bandwidth product of the amplifier is calculated by using the expression.

Gain-Bandwidth Product=(3-dB mid band gain)(Bandwidth).

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CIRCUIT DIAGRAM:

OBSERVATIONS

S. Frequency(Hz) Output Gain Gain in dB=20log(Vo/Vi)

No Voltage(Vo) Av=Vo/Vi

VOLTAGE GAIN

S. Output Voltage(Vo) Output Voltage(Vo) Gain(dB) with Gain(dB) without

No with feedback without feedback feedback feedback

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RESULT

The gain of the amplifier at 1 kHz is ______________

The bandwidth of the amplifier is _________________

VIVA VOCE QUESTIONS:

1. What happens to output resistance due to current sampling?
2. What is the effect of input resistance due to shunt mixing?
3. Explain the terms feedback factor and open loop gain?
4. Explain the stability of feedback amplifier?
5. Define Nyquist criterion?
6. Define gain and phase margin?
7. If the bypass capacitor CE in an RC coupled amplifier becomes accidentally open circuited,
what happens to the gain of the amplifier? Explain.
8. What is the parameter which does not change with feedback?
9. Give the effect of negative feedback on amplifier characteristics?
10. Write the different types of feedback topologies?

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3b. CURRENT SHUNT FEEDBACK AMPLIFIER (Using Simulation)

AIM
1. To study the current shunt feedback amplifier
2. To measure the voltage gain of the amplifier at 1 KHz.
3. To obtain the frequency response characteristic and the band width of
the amplifier using Simulation.

PROCEDURE
1. Connections are made as per circuit diagram.
2. Keep the input voltage constant at 20mV peak-peak and 1 kHz frequency. For different
values of load resistance, note down the output voltage and calculate the gain by using
the expression
AV =20log(Vo/Vi)dB
3. Add the emitter bypass capacitor and repeat step 2. And observe the effect of feedback
on the gain of the amplifier.
4. For plotting the frequency the input voltage is kept constant at 20mV peak-peak and the
frequency is varied from 100Hz to 1MHz.
5. Note down the value of output voltage for each frequency. All the readings are
tabulated and the voltage gain in dB is calculated by using expression
AV =20log(Vo/Vi)dB
6. The bandwidth of the amplifier is calculated from the graph using the expression
Bandwidth.
B.W=f2 -f1
Where f1 is lower cut-off frequency, f2 is upper cut-off frequency.
7. The gain-bandwidth product of the amplifier is calculated by using the expression.

Gain-Bandwidth Product=(3-dB mid band gain)(Bandwidth).

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CIRCUIT DIAGRAM:

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OBSERVATIONS

S. Frequency(Hz) Output Gain Gain in dB=20log(Vo/Vi)

No Voltage(Vo) Av=Vo/Vi

Voltage Gain

S. Output Voltage(Vo) Output Voltage(Vo) Gain(dB) with Gain(dB) without

No with feedback without feedback feedback feedback

RESULT
The gain of the amplifier at 1 kHz is ____________

The BW of the amplifier is ______________________

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4a. WIEN BRIDGE OSCILLATOR

AIM Design and generate a sine wave for different RC values (Wien Bridge oscillator).

APPARATUS REQUIRED
1. Wien Bridge Oscillator Trainer Module : 1 No.
MEASURING INSTRUMENTS
1. 20 MHz Dual trace CRO : 1 No.
MISCELLANEOUS
1. Patch cards : 1 Lot.

THEORY
The circuit diagram of Wien bridge oscillator is given in figure .The circuit consists of a
two stage RC coupled amplifier which provides a phase shift of 360 0 or 0 0 . A balanced bridged
is used as the feedback network which has no need to provide any additional phase shift. The
feedback network consists of lead-lag network (R1 -C1 and R2 -C2 ) and a voltage divider. The
leadlag network provides positive feedback to the input of first stage and the voltage divider
provides a negative feedback to the emitter of Q1 . If the bridge is balanced,

where Xc1 and Xc2 are the reactance of the capacitors.

By simplifying and equating the real and imaginary parts on both sides, we get the
frequency of oscillation as, the ratio of R3 to R4 being greater than 2 will provide a sufficient gain
for the circuit to oscillate at the desired frequency. This oscillator is used in commercial audio
signal generator.

PROCEDURE
1. Connect the circuit as shown in the circuit diagram.
2. Connect the output terminal of the circuit to Channel 1 of the dual trace CRO.
3. Simulation the circuit and observe the output and note down the frequencies
corresponding selected values of capacitance.

GRAPH : Plot the observed output on a graph sheet.

RESULT : Frequency of oscillations:

VIVA VOCE QUESTIONS

1. Classify oscillators depending on discrete components used
2. What are the differences between oscillators and amplifiers?
3. What did you understand by the term stability of an Oscillator?
4. Which type of feedback used in wein-bridge oscillator?
5. What are the essential parts of an Oscillator?
6. Name two low frequency Oscillators?
7. Name two high frequency Oscillators?
8. What is Barkhausen criterion?
9. What is sustained Oscillation?
10. Write the expression for frequency of oscillations of wein bridge oscillator?

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CIRCUIT DIAGRAM

OUT PUT WAVE FORM

TABULAR FORM

Theoretical
Practical
C Frequency Amplitude
R Frequency
S. No. (kHz) % Error
(kHz)

1.

2.

3.

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4b. WIEN BRIDGE OSCILLATOR (Using Simulation)

AIM Design and generate a sine wave for different RC values (Wien Bridge oscillator) by
using Simulation software.

PROCEDURE

1. Connect the circuit as shown in the circuit diagram.

2. Connect the output terminal of the circuit to Channel 1 of the dual trace CRO.
3. Simulate, adjust the potentiometer (i.e., 12 k variable resistance) to get the correct sine
wave form. Place the both cursers in the CRO observe the T2 T1 as T.
4. Plot the graph for the obtained frequency

OBSERVATIONS

Frequency of oscillations:

GRAPH

Plot the observed output on a graph sheet.

RESULT

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CIRCUIT DIAGRAM

OUT PUT WAVE FORM

TABULAR FORM

Practical
Theoretical
S. No. Frequency % Error
Frequency (kHz)
(kHz)

1.

2.

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5a. COLPITTS OSCILLATOR

AIM: To generate a sine wave of different frequencies.

COMPONENTS REQUIRED:
1. Transistor (NPN, Si) BC 107 : 1 No.
2. Electrolytic Capacitor 10 F : 3 Nos.
3. Carbon film Resistors
33 k, 2.4 k, 8.2 k, 1 k : 1 No. each
4. Decade Inductance Box : 1 No.
5. Decade Capacitance Box : 1 No.
MEASURING INSTRUMENTS:
1. 20 MHz Dual trace CRO : 1 No.
MISCELLANEOUS:
1. Trainer Module : 1 No.
2. 0 30 V, 1 A DC Power Supply : 1 No.
3. Connecting wires : 1 Lot.

THEORY:
In the Colpitts oscillator shown in figure, Z 1, and Z2 are capacitors and Z3 is an inductor.
The resistors R and R2 and RE provide the necessary DC bias to the transistor. C E is a
bypass capacitor C C1 and CC2 are coupling capacitors. The feedback network consisting of
capacitors C1 and C2 , inductor L determine the frequency of the oscillator.

When the supply voltage +V CC is switched ON, a transient current is produced in the
tank circuit, and consequently damped harmonic oscillations are setup in the circuit. The
current in tank circuit produces AC voltages across C1 and C 2. As terminal 3 is earthed, it
will be at zero potential.

If terminal is at positive potential with respect to 3 at any instant, then terminal 2 will be
at negative potential with respect to 3 at the same instant. Thus the phase difference
between the terminals 1 and 2 is always 180 0. In the CE mode, the transistor provides the
phase difference of 180 0 between the input and output. Therefore the total phase shift is
360 0. The frequency of oscillations is

1 1 1 1
= , = +
2 1 2

PROCEDURE:
1. Connect the circuit as per the circuit diagram.
2. Set the DC power supply to 12 V.
3. Connect the circuit output to Channel-1 of CRO.
4. Connect the decade inductance box to the circuit and vary the inductance from
100 H to 5 H and measure the output frequency in CRO as per the table given
5. Compare theoretical and practically values.
6. Sketch the wave forms on graph sheet.

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CIRCUIT DIAGRAM:
VCC = 12 V

R1 RC
33 k 2.4 k

10 F

10 F C
B
BC 107

C E
1
100 H
Vo
R2 RE C
8.2 k 1 k
E

C2 L
10 F

Colpitts Oscillator

OUTPUT WAVEFORM:

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TABULAR FORM:

Frequency Frequency
Capacitance Capacitance Inductance =
1
S. No. f = 1/T 2
C1 C2 L (H)
Practically Theoretical
1 0.1 F 0.1 F
2 0.1 F 0.1 F

RESULT

VIVA-VOCE QUESTIONS:
1. Define oscillator.
2. Which type of Feedback is employed in oscillator?
3. What are the applications of Colpitts oscillator?
4. What is meant by resonant Circuit Oscillators?
5. Define gain and phase Margin?
6. What is a beat frequency oscillator?
7. What is damped Oscillation?
8. Write the expression for frequency of oscillations for colpitts and hartley
oscillators?
9. Classify the different types of Oscillators?
10. What are the factors that determine the stability of an oscillator?

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5b. COLPITTS OSCILLATOR (Using Simulation)

AIM: To generate a sine wave of different frequencies using simulation.

THEORY:
In the Colpitts oscillator shown in figure, Z 1, and Z2 are capacitors and Z3 is an inductor.
The resistors R and R2 and RE provide the necessary DC bias to the transistor. C E is a
bypass capacitor C C1 and CC2 are coupling capacitors. The feedback network consisting of
capacitors C1 and C2 , inductor L determine the frequency of the oscillator.

When the supply voltage +V CC is switched ON, a transient current is produced in the
tank circuit, and consequently damped harmonic oscillations are setup in the circuit. The
current in tank circuit produces AC voltages across C1 and C 2. As terminal 3 is earthed, it
will be at zero potential.

If terminal is at positive potential with respect to 3 at any instant, then terminal 2 will be
at negative potential with respect to 3 at the same instant. Thus the phase difference
between the terminals 1 and 2 is always 180 0. In the CE mode, the transistor provides the
phase difference of 180 0 between the input and output. Therefore the total phase shift is
360 0. The frequency of oscillations is

1 1 1 1
= , = +
2 1 2

PROCEDURE:
1. Connect the circuit as shown in the circuit diagram.
2. Connect the output terminal of the circuit to Channel 1 of the dual trace CRO.
3. Place the both cursers in the CRO observe the T2 T1 as T.
4. Plot the graph for the obtained frequency

RESULT:

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CIRCUIT DIAGRAM
VCC = 12 V

R1 RC
33 k
2.4 k

10F

10F C
B BC 107

C1 E
100H Vo
R2 RE CE
8.2 k
1
C2 L
10 F

Colpitts Oscillator

OUTPUT WAVEFORM

TABULAR FORM

Frequency
Frequency
Capacitance Capacitance Inductance 1
S. No. f = 1/T =
C1 C2 L (H) 2
Practically
Theoretical
1 0.1 F 0.1 F
2 0.1 F 0.1 F

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6a. TWO STAGE RC-COUPLED AMPLIFIER

AIM To Design and study the response of a two stage RC-coupled amplifier and
calculation of gain and band width.

COMPONENTS REQUIRED
1. Transistor (NPN, Si) BC 107 : 2 Nos.
2. Electrolytic Capacitor 10 F / 25 V : 5 Nos.
3. Carbon film Resistors 2.2 k, 15 k : 2 Nos. each
33 k, 2.7 k, 470 , 510 , 5.1 k : 1 No. each
MEASURING INSTRUMENTS
1. 20 MHz Dual trace CRO : 1 No.
MISCELLANEOUS
1. 1 MHz Function Generator : 1 No.
2. Trainer Module. : 1 No.
3. Connecting cards : 1 Lot.

THEORY
As the gain provided by a single stage amplifier is usually not sufficient to drive
the load, so to achieve extra gain multi-stage amplifier are used. In multi-stage
amplifiers output of one-stage is coupled to the input of the next stage. The coupling of
one stage to another is done with the help of some coupling devices. If it is coupled by
RC then the amplifier is called RC-coupled amplifier.
Frequency response of an amplifier is defined as the variation of gain with
respective frequency. The gain of the amplifier increases as the frequency increases from
zero till it becomes maximum at lower cut-off frequency and remains constant till higher
cut-off frequency and then it falls again as the frequency increases.
At low frequencies the reactance of coupling capacitor C C is quite high and hence
very small part of signal will pass through from one stage to the next stage. At high
frequencies the reactance of inter electrode capacitance is very small and behaves as a
short circuit. This increases the loading effect on next stage and service to reduce the
voltage gain due to these reasons the voltage gain drops at high frequencies.
At mid frequencies the effect of coupling capacitors is negligible and acts like
short circuit, where as inter electrode capacitors acts like open circuit. So, the circuit
becomes resistive at mid frequencies and the voltage gain remains constant during this
range.

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CIRCUIT DIAGRAM

MODEL GRAPH

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OBSERVATIONS
VS = _____ mV; Vin =_______ mV; Frequency: 10 Hz to 1 MHz
First Stage
Frequency Gain
Vo Gain Vo Gain
in dB

PROCEDURE

1. Switch on the power supply.

2. Connect the function generator with sine wave output 10 mV (peak to peak) at
the input terminals.
3. And the CRO at output terminals of the first stage.
4. Measure the voltage at the first stage of amplifier.
5. Now connect the function generator to the input of the second stage and output
to the CRO.
6. Measure the voltage at the second stage of the amplifier.
7. By connecting the first stage output to the second stage input measure the output
voltage.
8. Now vary the input frequency from 10 Hz to 1 MHz in steps, for every value of
input frequency note the output voltage and keep the input amplitude at
constant value.
9. Calculate the voltage gain in decibels.
10. Plot in semi-log graph between gain Vs frequency and calculate the band width.

CALCULATIONS

1. Determine lower cut-off frequency and upper cut-off frequency from the graph.
2. Calculate Band width.

RESULT

Lower cut-off frequency (FL) =

Upper cut-off frequency (FH) =
Band width (B.W) = (FH FL) =

VIVA VOCE QUESTIONS

1. What are the advantages and disadvantages of multi-stage amplifiers?

2. Why gain falls at HF and LF?
3. Why the gain remains constant at MF?
4. Explain the function of emitter bypass capacitor, C E?
5. How the band width will effect as more number of stages are cascaded?
6. Define frequency response?
7. Give the formula for effective lower cut-off frequency, when N-number of stages
is cascaded?

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8. Explain the effect of coupling capacitors and inter-electrode capacitances on

overall gain?
9. By how many times effective upper cut-off frequency will be reduced, if three
identical stages are cascaded?
10. Mention the applications of two-stage RC-coupled amplifiers?

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6b. TWO STAGE RC-COUPLED AMPLIFIER (Using Simulation)

AIM
To Design and study the response of a two stage RC-coupled amplifier and
calculation of gain and band width by using Simulation software.

THEORY
As the gain provided by a single stage amplifier is usually not sufficient to drive
the load, so to achieve extra gain multi-stage amplifier are used. In multi-stage
amplifiers output of one-stage is coupled to the input of the next stage. The coupling of
one stage to another is done with the help of some coupling devices. If it is coupled by
RC then the amplifier is called RC-coupled amplifier.

Frequency response of an amplifier is defined as the variation of gain with

respective frequency. The gain of the amplifier increases as the frequency increases from
zero till it becomes maximum at lower cut-off frequency and remains constant till higher
cut-off frequency and then it falls again as the frequency increases.

At low frequencies the reactance of coupling capacitor C C is quite high and hence
very small part of signal will pass through from one stage to the next stage. At high
frequencies the reactance of inter electrode capacitance is very small and behaves as a
short circuit. This increases the loading effect on next stage and service to reduc e the
voltage gain due to these reasons the voltage gain drops at high frequencies.

At mid frequencies the effect of coupling capacitors is negligible and acts like
short circuit, where as inter electrode capacitors acts like open circuit. So, the circuit
becomes resistive at mid frequencies and the voltage gain remains constant during this
range.

PROCEDURE

1. Connect the circuit as shown in the circuit diagram.

2. Connect the signal generator output to input terminals of the circuit and Channel
A of dual trace CRO.
3. Connect the output terminal of the circuit to Channel B of the dual trace CRO.
4. Set the signal generator output at 10 mV sine wave at 1 kHz constant and fed it to
the circuit.
5. In the Simulation tab go to analysis - AC analysis. Set the starting frequency as 20
Hz and Stop frequency 10 MHz, vertical scale as linear and no. of points per
decade 1000.
6. In the output tab select Add expression write formula as 20*log((VO)/(Vi)) in the
expression field. Select OK and Simulate.
7. Select the cursers and find the FH and FL from the frequency response to find out
the bandwidth.

GRAPH

Plot the frequency response on a semi log graph sheet.

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CIRCUIT DIAGRAM

MODEL GRAPH

OBSERVATIONS

Lower cut-off frequency (FL) =

Upper cut-off frequency (FH) =
Band width (B.W) = (FH FL) =

RESULT

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7a. DARLINGTON PAIR AMPLIFIER

AIM
Perform the frequency response of a Darlington amplifier. Calculate gain. Calculate
bandwidth.

COMPONENTS REQUIRED
1. Transistor (NPN, Si) BC 547 : 2 Nos.
2. Electrolytic Capacitor 10 F : 2Nos.
3. Carbon film Resistors 82 k,
22 k, 2.2 k, 390 , 1 k : 1 No. each
MEASURING INSTRUMENTS
1. 20 MHz Dual trace CRO : 1 No.
2. 1 MHz Function Generator : 1 No.
MISCELLANEOUS
1. Trainer Module : 1 No.
2. 0 30 V, 1 A DC Power Supply : 1 No.
3. Connecting wires : 1 Lot.

THEORY
In Darlington connection of transistors, emitter of the first transistor is directly
connected to the base of the second transistor. Because of direct coupling dc output
current of the first stage is (1+h fe)Ib1 . If Darlington connection for n transistor is
considered, then due to direct coupling the dc output current for last stage is (1+h fe)n
times Ib1 . Due to very large amplification factor even two stage Darlington connection
has large output current and output stage may have to be a power stage. As the power
amplifiers are not used in the amplifier circuits it is not possible to use more than two
transistors in the Darlington connection.
In Darlington transistor connection, the leakage current of the first transistor and
overall leakage current may be high, which is not desired.

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CIRCUIT DIAGRAM

Tabular Form
S. No Frequency (Hz) Output Voltage Voltage Gain Gain in dB
(V0 ) (Av)=Vo/Vi. Av=20log(Vo/Vi)

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PROCEDURE
1. Connect the circuit as shown in figure.
2. Apply supply voltage Vcc=12 V
3. Keep Vi=20 mV by keeping frequency of function generator at 1kHz.
4. Keep input constant throughout the experiment.
5. Vary the input frequency 50 Hz to 1 MHz and note down the output voltage.
6. Calculate the gain of the amplifier in decibels using the formula gain in
dB=20log(Vo/Vi).
7. Plot the graph between frequencies Vs Gain.

RESULT

VIVA-VOCE QUESTIONS
1. Why do you need more than one stage of amplifiers in practical circuits?
2. What is the effect of cascading on gain and bandwidth?
3. What happens to the 3dB frequencies if the number of stages of amplifiers
increases?
4. Why we use a logarithmic scale to denote voltage or power gains, instead of
using the simpler linear scale?
5. What is loading effect in multistage amplifiers?
6. How a Darlington pair works?
7. The cascode amplifier is a multistage configuration of ?
8. The output impedance of a Darlington pair Amplifier is ?
9. The current gain of a Darlington pair amplifier is approximately?
10. The CE amplifier configuration is preferred over others. why?

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7b. DARLINGTON PAIR AMPLIFIER (Using Simulation)

AIM
Perform the frequency response of a Darlington amplifier. Calculate gain. Calculate
bandwidth using Simulation.

Tabular Form
S.No Frequency(Hz) Output Voltage Gain in dB
Voltage(V0 ) Gain(Av)=Vo/Vi. Av=20log(Vo/Vi)

PROCEDURE
1. Connect the circuit as shown in figure.
2. Apply supply voltage V cc=12V
3. Keep Vi=20mV by keeping frequency of function generator at 1kHz.
4. Keep input constant throughout the experiment.
5. Vary the input frequency 50 Hz to 1MHz and note down the output voltage.
6. Calculate the gain of the amplifier in decibels using the formula gain in
dB=20log(Vo/Vi).
7. Plot the graph between frequencies Vs Gain.

RESULT

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CIRCUIT DIAGRAM

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8a. SERIES FED CLASS-A POWER AMPLIFIER

AIM
To design a series fed class-A power amplifier in order to achieve max output ac power
and efficiency using hardware.

COMPONENTS REQUIRED
1. Transistor (NPN, Si) BC 107 : 1 Nos.
2. Electrolytic Capacitor 100 nF : 2 Nos.
3. Carbon film Resistors 1 k, 33 and 20 k: 1 No. each
MEASURING INSTRUMENTS
1. 20 MHz Dual trace CRO : 1 No.
2. Multimeter : 2 Nos.
MISCELLANEOUS
1. Power Supply 0-30 V DC : 1 No.
2. Bread Board : 1 No.
3. Connecting Wires : 1 lot

THEORY
The circuit is called series fed because the load RL is connected in series with transistor
output. It is also called as direct coupled amplifier. I CQ=Zero signal collector current
VCEQ=Zero signal collector to emitter voltage power amplifiers are mainly used to deliver
more power to the load. To deliver more power it requires large input signals, so
generally power amplifiers are proceeded by a series of voltage amplifiers. In class-A
power amplifiers, Q-point is located in the middle of DC- load line. So output current
flows from complete cycle of input signal. Under zero signal condition, maximum power
dissipation occurs across the transistor. As the input signal amplitude increases power
dissipation reduces. The maximum theoretical efficiency is 25%.

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CIRCUIT DIAGRAM

TABULAR FORM:

Vin=100 mV

Applied frequency Output voltage(V0 ) Gain in dB=20log(V0/Vi)

1kHz

CALCULATIONS:
Take RL =RC=220

( )
1. DC input power PDC = = ----------------------

( ( )) 2
2. AC output power PAC= =----------------------
8

3. Efficiency = 100=----------------------

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PROCEDURE
1. Connect the circuit diagram and supply the required DC supply.
2. Apply the Ac signal at the input and keep the frequency at 1 kHz and connect the
power output meter at the output. Change the load resistance in steps for each
value of impedance and not down the output power.
3. Plot the graph between o/p power and load impedance. From this graph find the
impedance for which the o/p power is maximum. This is the value of optimum
load.
4. Select load impedance which is equal to 0 V or near about the optimum load. See
the waveform of the o/p of the CRO.
5. Calculate the power sensitivity at a maximum power o/p using the relation.

The maximum input signal amplitude which produces undistorted output signal is
__________.
The practical efficiency of the circuit is ____________.

RESULT

VIVA VOCE QUESTIONS

1. Differentiate between voltage amplifier and power amplifier?
2. Why power amplifiers are considered as large signal amplifier?
3. When does maximum power dissipation happen in this circuit?
4. What is the maximum theoretical efficiency?
5. Sketch waveform of output current with respective input signal?
6. What are the different types of class-A power amplifiers available?
7. What is the theoretical efficiency of the transformer coupled class-A power
amplifier?
8. What is the difference in AC and DC load line?
9. How do you locate the Q-point?
10. What are the applications of class-A power amplifier?

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8b. SERIES FED CLASS-A POWER AMPLIFIER (Using Simulation)

AIM
To design a series fed class-A power amplifier in order to achieve max output ac power
and efficiency using Simulation.

PROCEDURE
1. Connect the circuit diagram and supply the required DC supply.
2. Apply the Ac signal at the input and keep the frequency at 1 kHz and connect the
power output meter at the output. Change the load resistance in steps for each
value of impedance and not down the output power.
3. Plot the graph between o/p power and load impedance. From this graph find the
impedance for which the o/p power is maximum. This is the value of optimum
load.
4. Select load impedance which is equal to 0 V or near about the optimum load. See
the waveform of the o/p of the CRO.
5. Calculate the power sensitivity at a maximum power o/p using the relation.

The maximum input signal amplitude which produces undistorted output signal is
__________.
The practical efficiency of the circuit is ____________.

RESULT

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CIRCUIT DIAGRAM

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9a. COMPLEMENTARY-SYMMETRY CLASS-B POWER AMPLIFIER

AIM To design a complementary-symmetry class-B push-pull power amplifier in

order to achieve maximum output AC power and efficiency.

COMPONENTS REQUIRED
1. Complementary-Symmetry Class-B Power Amplifier Trainer Module
MEASURING INSTRUMENTS
1. CRO (Dual channel) DC 20 MHz
2. Function generator : 1 No.

MISCELLANEOUS
1. Connecting cards : 1 Lot.

THEORY

Power amplifiers are designed using different circuit configuration with the sole
purpose of delivering maximum undistorted output power to load. Push-pull
amplifiers operating either in class-B are class-AB are used in high power audio
system with high efficiency.

In complementarysymmetry class-B power amplifier two types of transistors,

NPN and PNP are used. These transistors acts as emitter follower with both emitters
connected together.

In class-B power amplifier Q-point is located either in cut-off region or in

saturation region. So, that only 1800 of the input signal is flowing in the output.

In complementary-symmetry power amplifier, during the positive half cycle of

input signal NPN transistor conducts and during the negative half cycle PNP
transistor conducts. Since, the two transistors are complement of each other and they
are connected symmetrically so, the name complementary symmetry has come.

Theoretically efficiency of complementary symmetry power amplifier is 78.5%.

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CIRCUIT DIAGRAM

OUTPUT WAVEFORM

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PROCEDURE

1. Connect the circuit has shown in the circuit diagram.

2. Measure base, emitter and collector D.C voltages of both transistors and compare
against estimated values.
3. Apply the input at input terminals of the circuit from the function generator.
4. Keep the input signal at constant frequency under mid frequency region and
adjust the amplitude such that output voltage undistorted.
5. Calculate the power efficiency and compare it with theoretical efficiency.

OBSERVATIONS

Efficiency is defined as the ratio of AC output power to DC input power

DC input power = VCC ICQ; AC output power = VP-P2 / 8RL

CALCULATIONS

Input DC power = V CC ICQ; Output AC power = Vrms x Irms= VPP2 / 8RL,

Output AC power
=
Input DC power
RESULT

The maximum input signal amplitude which produces undistorted output signal is
_________

The practical efficiency of the circuit is ________

VIVA VOCE QUESTIONS

1. Differentiate between voltage amplifier and power amplifier.

2. Explain impedance matching provided by transformer.
3. Under what condition power dissipation is maximum for transistor in this
circuit?
4. What is the maximum theoretical efficiency?
5. Sketch current waveform in each transistor with respective input signal.
6. How do you test matched transistors required for this circuit with DMM?
7. What is the theoretical efficiency of the complementary stage amplifier?
8. How do you measure DC and AC output of this amplifier?
9. Is this amplifier working in class A or B.?
10. How can you reduce cross over distortion?

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9b. COMPLEMENTARY-SYMMETRY CLASS-B POWER AMPLIFIER

(Using Simulation)

AIM: To design a complementary-symmetry class-B push-pull power amplifier in order

to achieve maximum output AC power and efficiency by using Simulation software

THEORY

Power amplifiers are designed using different circuit configuration with the sole
purpose of delivering maximum undistorted output power to load. Push-pull amplifiers
operating either in class-B are class-AB are used in high power audio system with high
efficiency.

In complementarysymmetry class-B power amplifier two types of transistors,

NPN and PNP are used. These transistors acts as emitter follower with both emitters
connected together.

In class-B power amplifier Q-point is located either in cut-off region or in

saturation region. So, that only 1800 of the input signal is flowing in the output.

In complementary-symmetry power amplifier, during the positive half cycle of

input signal NPN transistor conducts and during the negative half cycle PNP transistor
conducts. Since, the two transistors are complement of each other and they are connected
symmetrically so, the name complementary symmetry has come.

Theoretically efficiency of complementary symmetry power amplifier is 78.5%.

PROCEDURE

1. Connect the circuit as shown in the circuit diagram.

2. Connect the signal generator output to input terminals of the circuit and Channel
1 of dual trace CRO.
3. Connect the output terminal of the circuit to Channel 2 of the dual trace CRO.
4. Set the signal generator output at 1 V sine wave at 1 kHz constant and fed it to
the circuit.
5. Simulate the circuit and observe the output waveform

OBSERVATIONS

Efficiency is defined as the ratio of AC output power to DC input power

DC input power = VCC ICQ AC output power = VP-P2 / 8RL

CALCULATIONS

Input DC power = V CC ICQ

Output AC power
Output AC power = V rms x Irms= VPP2 / 8RL, =
Input DC power

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CIRCUIT DIAGRAM

OUTPUT WAVEFORM

RESULT

The maximum input signal amplitude which produces undistorted output signal is
_________

The practical efficiency of the circuit is ________

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10a. SINGLE TUNED (CLASS C) VOLTAGE AMPLIFIER

AIM
To design single tuned (class-C) voltage amplifier and to find-out resonant
frequency, calculate the Gain.

APPARATUS REQUIRED

1. Single tuned (class-C) voltage amplifier trainer : 1 No.

2. 1 MHz Function Generator : 1 No.
3. 20 MHz Dual trace CRO : 1 No.
4. Connecting Patch Cards : 1 Lot

THEORY

The amplifier is said to be class C amplifier, if the Q point and the input signal are
selected such that the output signal is obtained for less than a half cycle, for a full input
cycle. Due to such a selection of the Q point, transistor remains active, for less than a half
cycle. Hence only that much part is reproduced at the output. For remaining cycle of the
input cycle, the transistor remains cut-off and no signal is produced at the output. Here a
parallel resonant circuit acts as a load impedance. As collector current flows for less than
half cycle, the collector current consists of a series of pulses with the harmonics of the
input signal. A parallel tuned circuit acting as a load impedance is tuned the input
frequency. Therefore, it filters the harmonic frequencies and produce a sine wave output
voltage consisting of fundamental component of the input signal. A class C tuned
amplifier can be used as a frequency multiplier if the resonant circuit is tuned to a
harmonic of the input signal. Here class-C amplifier is used with parallel tuned circuit.
Therefore the output voltage is a maximum at the resonant frequency. The resonant
frequency for parallel tuned circuit is given as
1
Resonant frequency= Fr =
2

PROCEDURE

1. Connect the circuit as shown in the circuit diagram.

2. Set the Function generator output to 10 V P-P, sine wave, fed to the circuit input
terminals and Channel I of dual trace CRO.
3. Connect the output terminals of the circuit to Channel II of the dual trace CRO.
4. By keeping the input Voltage Constant, Vary the signal frequency from
10 kHz to 20 kHz and note down the output Voltage in the given tabular form.
5. Plot the graph on Semi log sheet, frequency Vs Gain in dB.
6. Find out the resonant frequency.

OBSERVATIONS
Vin= 10 Vp-p Constant.

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CIRCUIT DIAGRAM:

Single tuned (class-C) voltage amplifier

MODEL GRAPH:

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Applied
Frequency(kHz) Gain in dB
S. No Output Voltage ( V)
(10 kHz to 20 20Log (Vo/Vi)
kHz)
1
2
3
4
5
6
7
8
9
10
11
12
13

CALCULATIONS

a) Resonant frequency =

THEORETICAL CALCULATIONS
1
Resonant frequency= Fr =
2

RESULT

VIVA VOCE QUESTIONS:

1. What are the different types of tuned circuits?
2. What is Q of Tuned circuit employed in circuit?
3. How is class C operation obtained in this circuit?
4. State relation between resonant frequency and bandwidth of a Tuned amplifier.
5. Differentiate between Narrow band and Wideband tuned amplifiers.
6. How harmonic distortion is reduced in class-C Tuned amplifiers?
7. Specify the applications of class-C tuned voltage amplifier?
8. What is a synchronously tuned amplifier?
9. What is stagger tuned amplifier?
10. What is meant by unloaded and loaded Q of tank circuit?

ECA La b 56
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10b. SINGLE TUNED (CLASS C) VOLTAGE AMPLIFIER

(Using Simulation)

AIM: To design single tuned (class-C) voltage amplifier and to find-out resonant
frequency, calculate the Gain by using Simulation.

PROCEDURE:
1. Connect the circuit as shown in the circuit diagram.
2. Connect the output terminal of the circuit to Channel A of the dual trace CRO.
3. In the Simulation tab go to analysis - AC analysis. Set the starting frequency as 10
kHz and Stop frequency 30 kHz, vertical scale as linear and no of points per
decade equal to 1000 and simulate.
4. Select the cursers and find the FT from the frequency response to find out the
tuned frequency.

OBSERVATIONS:
Vin= 10 Vp-p Constant.

Applied Gain in dB
S. No Output Voltage ( V)
Frequency(kHz) 20Log (Vo/Vi)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21

RESULT:

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CIRCUIT DIAGRAM:

Single tuned (Class-C) voltage amplifier

MODEL GRAPH:

CALCULATIONS:

a) Resonant frequency =

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11a. BOOTSTRAP EMITTER FOLLOWER (Using Simulation)

AIM
To construct a bootstrap sweep circuit and generate a ramp voltage and
to measure sweep time , return time using Simulation.

THEORETICAL CALCULATIONS
Sweep time = , Return time =
= RC, R = 15 k, C = 10 nF

=
1

= 150

PROCEDURE

1. Rig-up the circuit on the bread board as per the circuit diagram.
2. Apply 6 V , 8 V from the dual channel DC regulated power
supply.
3. Apply 4 square wave from the function generator to the circuit
and channel I of dual trace CRO.
4. Connect the circuit output to channel II of dual trace CRO.
5. Measure the peak to peak output ramp voltage, sweep time ,
return time from the output waveform.
6. Compare the practical values with the theoretical values.
7. Draw the input and output waveforms on the graph.

RESULT:

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CIRCUIT DIAGRAM

OUTPUT WAVEFORM

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11b. BOOTSTRAP EM ITTER FOLLOWER

AIM
To construct a bootstrap sweep circuit and generate a ramp voltage and
to measure sweep time , return time .

COMPONENTS REQUIRED
1. Transistors SL 100 (Si) : 2 Nos.
2. Diode 1N 4007 (Si) : 1 No.
3. Ceramic Disc Capacitor 100 F, 10 nF : 1 No. each
4. Electrolytic Capacitor 47 F : 1 No. each
5. Carbon film Resistors 0.25 W 100 k,
10 k and 15 k : 1 No. each
MEASURING INSTRUMENTS
1. 20 MHz Cathode Ray Oscilloscope : 1 No.
MISCELLANEOUS
1. 1 MHz Signal generator : 1 No.
2. Regulated DC power supply (0-30 V) : 1 No.
3. Bread board Trainer Module : 1 No.
4. Connecting wires : 1 lot

THEORY:
The bootstrap sweep generator uses the following principle in its
functioning and generates the ramp voltage: The transistor 1 acts as
ON-OFF switch. 2 is emitter follower. Input is a pulse voltage or
rectangular wave. When input is positive transistor 1 becomes ON i.e.
it goes into saturation. Emitter of 2 is coupled to collector of 1 through
capacitor .

When the input goes negative, 1 becomes OFF, the potential at the
collector terminal of 1 rises. This increase of voltage at this point is
transmitted to B through 2 and capacitor . The result is that the
potential of B also arises by the same amount. This is the principle of
bootstrap.

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CIRCUIT DIAGRAM

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PROCEDURE

1. Rig-up the circuit on the bread board as per the circuit diagram.
2. Apply 6 V , 8 V from the dual channel DC regulated power
supply.
3. Apply 4 square wave from the function generator to the circuit
and channel I of dual trace CRO.
4. Connect the circuit output to channel II of dual trace CRO.
5. Measure the peak to peak output ramp voltage, sweep time ,
return time from the output waveform.
6. Compare the practical values with the theoretical values.
7. Draw the input and output waveforms on the graph.

RESULT

VIVA QUESTIONS

1. Explain the basic principle involved in bootstrap sweep generator.

2. Mention the type of feedback employed in bootstrap sweep generator.
3. Mention the characteristics of the amplifier used in bootstrap sweep
generator.
4. What is input resistance of the bootstrapped amplifiers?
5. What does bootstrapping mean?
6. Why bootstrapping is done in a buffer amplifier?

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Dept. of ECE RCEE

12 CLASS-B PUSH PULL AMPLIFIER

AIM : To Plot the Graph between Load and Power of a Class B Push pull
Power Amplifier.

APPARATUS:

Range /
S. No Value Quantity

1. Push pull power amplifier module -- 1

2. D.C Regulated Power supply (0-30V). 1
3. Function generator -- 1
4. CRO -- 1

PROCEDURE :

1. Connect the circuit diagram as shown in the figure.

2. Determine the maximum signal handling capacity of the push pull
amplifier.
3. Apply sinusoidal signal of 4mV peak to peak voltage at a frequency of 1
kHz.
4. Connect Power meter at the O/P terminals.
5. By changing the load at the O/P terminals measure the power in the
Power meter.
6. Tabulate the readings.
7. plot the graph between Power vs load

CIRCUIT DIAGRAM

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Dept. of ECE RCEE

MODEL GRAPH:

TABULAR FORM:
Output Po we r Powe r in db
S.No RL ( )
P o (m W) (10 log P 0 )

RESULT:

VIVA QUESTIONS:

1. What is meant by conversion efficiency? Which type of power amplifier

has the maximum conversion efficiency? Why?
2. To which class does the push-pull amplifier belongs and what are the
advantages of it?
3. What is meant by crossover distortion? In which power amplifier it is
maximum?
4. Why class-A amplifier is used in transmitter modulators?
5. What is the maximum theoretical efficiency of a class-A amplifier?
6. Which harmonics are eliminated in the class B push-pull amplifier?
7. What is meant by complementary symmetry push-pull amplifier? State
its advantages.
8. Why the load is to be coupled through a transformer in a class-A
amplifier?
9. Discuss the stability techniques of power amplifier?
10. Draw the thermal equivalent circuit of a power amplifier?

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