Philips Chassis Ves1 1e La PDF

Colour Television Chassis
VES1.1E
LA
See table of contents on page 3
Published by MB/SC 1270 Quality Printed in the Netherlands Subject to modification EN 3122 785 19391
2012-Oct-12
2012 TP Vision Netherlands B.V.

All rights reserved. Specifications are subject to change without notice. Trademarks are the
property of Koninklijke Philips Electronics N.V. or their respective owners.
TP Vision Netherlands B.V. reserves the right to change products at any time without being obliged to adjust
earlier supplies accordingly.
PHILIPS and the PHILIPS Shield Emblem are used under license from Koninklijke Philips Electronics N.V.
EN 2 1. VES1.1E LA Revision List
1. Revision List
Manual xxxx xxx xxxx.0
First release.
Manual xxxx xxx xxxx.1

Added the CSM menu on page 49
2. Technical Specifications and Connections

Index of this chapter:
Technical specifications
Directions for Use
Notes:
Figures can deviate due to the different set executions.
Specifications are indicative (subject to change).
Technical Specifications
For on-line product support please use the links in Table 2-1. Here is
product information available, as well as getting started, user manuals,
frequently asked questions and software & drivers.
Table 2-1 Described Model numbers
CTN Styling Published in:

22PFL2807H/12 2800 3122 785 19390
32PFL2807H/12
Directions for Use
You can download this information from the following websites:

http://www.philips.com/support
http://www.p4c.philips.com
2012-Oct-12 back to
div. table
Contents
1 Introduction .............................................................................................................................................. 6
1.1 General Block Diagram ................................................................................................................... 6
1.2 MB62 Placement of Blocks............................................................................................................... 7
2 Tuner (TU3) ............................................................................................................................................... 8
2.1 General description of the Sony RE216 tuner .................................................................................. 8
2.2 Pinning ............................................................................................................................................ 9
3 Audio amplifier stage with AZAD2102 (U163, U164) ............................................................................. 10
3.1 General description ........................................................................................................................ 10
3.2 Features .......................................................................................................................................... 10
3.3 Absolute Ratings ........................................................................................................................... 11
3.3.1 Electrical Characteristics ....................................................................................................... 11
3.3.2 Operating specifications ....................................................................................................... 12
3.4 Pinning ............................................................................................................................................ 13
4 Audio amplifier stage with TPA3113 (U168) .......................................................................................... 13
4.1 General Description ........................................................................................................................ 13
4.2 Absolute Ratings ............................................................................................................................. 14
4.2.1 Electrical Characteristics......................................................................................................... 14
4.2.2 Operating Specifications ....................................................................................................... 15
4.3 Pinning ........................................................................................................................................... 15
5 Power stage............................................................................................................................................. 16
5.1 Power management ....................................................................................................................... 19
6 Microcontroller MSTAR (U5) ............................................................................................................... 21
6.1 Description ..................................................................................................................................... 21
6.2 MSTAR block diagram..................................................................................................................... 25
6.3 Reset circuit .................................................................................................................................... 26
7 CI interface .............................................................................................................................................. 26
8 USB interface .......................................................................................................................................... 27
9 DDR2 SDRAM K4T1G164QF (U155) ........................................................................................................ 28
9.1 Description ..................................................................................................................................... 28
9.2 Features .......................................................................................................................................... 28
Pinning ........................................................................................................................................................ 29
10 Scaler and LVDS sockets ...................................................................................................................... 30
10.1 LVDS sockets block diagram ........................................................................................................... 30
10.2 Panel supply switch circuit ............................................................................................................. 30
11 SPI flash memory - MX25L1005 (U158) .............................................................................................. 31
11.1 General Description........................................................................................................................ 31
11.2 Features .......................................................................................................................................... 31
11.3 Absolute maximum ratings ............................................................................................................ 32
11.4 Pinning ............................................................................................................................................ 32
12 NAND Flash memory NAND512XXA2C (U162) ................................................................................ 33
12.1 General Description........................................................................................................................ 33
12.2 Features .......................................................................................................................................... 33
12.3 Pinning ............................................................................................................................................ 34
13 LNBH23L (U6) ..................................................................................................................................... 35
13.1 Description ..................................................................................................................................... 35
13.2 Features .......................................................................................................................................... 35
13.3 Block diagram ................................................................................................................................. 36
14 Advanced DVB-S/S2 demodulator M88DS3002 (U3) ....................................................................... 36
14.1 Description ..................................................................................................................................... 36
14.2 Features .......................................................................................................................................... 36
14.3 Pin Assignment ............................................................................................................................... 38
15 LM1117 (U175, U180, U181) .............................................................................................................. 39
15.2 Features .......................................................................................................................................... 39
15.3 Applications .................................................................................................................................... 39
15.4 Absolute maximum ratings............................................................................................................. 39
15.5 Pinning ............................................................................................................................................ 40
16 MP2012 (U176)................................................................................................................................... 40
17 General description ............................................................................................................................ 40
17.1 Features .......................................................................................................................................... 40
17.2 Pinning ............................................................................................................................................ 41
18 RTA8283A (U23, U173) ....................................................................................................................... 41
18.2 Features .......................................................................................................................................... 41
18.3 Pinning ............................................................................................................................................ 43
19 MP1583 (U174)................................................................................................................................... 44
19.2 Features .......................................................................................................................................... 44
19.3 Pinning ............................................................................................................................................ 44
20 FDC642................................................................................................................................................ 45
20.2 Features .......................................................................................................................................... 45
20.3 Pinning ............................................................................................................................................ 45
21 FDC604P.............................................................................................................................................. 46
21.2 Features .......................................................................................................................................... 46
21.3 Pinning ............................................................................................................................................ 46
22 Connectors.......................................................................................................................................... 47
22.1 SCART (SC1) .................................................................................................................................... 47
22.2 HDMI (CN707, CN708) .................................................................................................................... 47
22.3 VGA (CN711) ................................................................................................................................. 48
23 Customer service mode (CSM) ........................................................................................................... 49
24 Service menu mode ............................................................................................................................ 49
24.1 Main service menu ......................................................................................................................... 49
24.2 Video Settings ................................................................................................................................. 50
24.3 Audio Settings ................................................................................................................................. 50
24.4 Options 1 ........................................................................................................................................ 51
24.5 Options 2 ........................................................................................................................................ 51
24.6 Tuning Settings ............................................................................................................................... 52
24.7 Source Settings ............................................................................................................................... 52
24.8 Diagnostic ....................................................................................................................................... 52
24.9 USB operations ............................................................................................................................... 52
24.10 Profile Operations........................................................................................................................... 55
24.10.1 Upload profile Data from USB ............................................................................................ 55
24.10.2 PQ Files Operations ............................................................................................................ 55
24.10.3 Upload PQ files from USB ................................................................................................... 55
24.10.4 Ci+ credentials key update ................................................................................................. 55
24.10.5 HDCP keys update............................................................................................................... 55
24.10.6 Edid update ........................................................................................................................ 56
24.10.7 DDR settings update ........................................................................................................... 56
24.10.8 MAC address update .......................................................................................................... 56
25 Software update .................................................................................................................................. 56
26 Troubleshooting ................................................................................................................................. 56
26.1 No backlight problem ..................................................................................................................... 56
26.2 CI module problem ......................................................................................................................... 58
26.3 LED blinking problem ...................................................................................................................... 60
26.4 IR problem ...................................................................................................................................... 60
26.5 Keypad touchpad problems ........................................................................................................... 61
26.6 USB problems ................................................................................................................................. 62
26.7 No sound problem .......................................................................................................................... 62
26.8 No sound problem at headphone .................................................................................................. 63
26.9 Standby On/Off problem ................................................................................................................ 63
26.10 DVD problems................................................................................................................................. 64
26.11 No signal problem .......................................................................................................................... 64
27 Styling sheet ....................................................................................................................................... 66
28 Schematics SSB ................................................................................................................................... 67
1 Introduction
The 17MB62 mainboard is driven by a MStar SOC. This IC is capable of handling

Video and audio processing, Scaling-Display processing, 3D comb filter, OSD and text
processing, LVDS transmitting, channel and MPEG2/4 decoding, integrated DVB-T/C
demodulator and media center functionality.
The TV supports PAL, SECAM, NTSC colour standards and multiple transmission
standards as B/G, D/K, I/I, and L/L including German and NICAM stereo. Also DVB T,
DVB-C are supported internal demodulators of Mstar IC and DVB-S/S2 is supported with
external demodulator.
Sound system output is supplying max. 2 2.5 W (less 10% THD at maximum output)
with 4 speakers or 2 6 W for stereo 8 speakers.
Supported peripherals are:
1 RF input VHF I, VHF III, UHF @ 75 (Common)

1 Side AV (CVBS, R/L_Audio)
1 SCART socket (Common)
1 YPbPr (Optional)
1 PC input (Common)
2 HDMI 1.3 input (1 HDMI input is common, 1 input is optional)
1 S/PDIF output (Optional)
1 Headphone (Optional)
1 Common interface (Common)
1 USB (Common)
1 DVD (Optional)
1 On-board Keypad (Optional)
1 External Keypad (Optional)
1 External TouchPad (Optional)
1.1 General Block Diagram

1.2 MB62 Placement of Blocks
2 Tuner (TU3)
A horizontal mounted and Digital Half-Nim tuner is used in the product, which covers 3
Bands (From 48 MHz to 862 MHz for COFDM, from 45.25 MHz to 863.25 MHz for CCIR
channels). The tuning is available through the digitally controlled I2C bus (PLL).
In the active antenna option, the following circuits are used. ANT_CTRL pin is controlled by
microcontroller. If ANT_CTRL is low, ANT_PWR will be low. If ANT_CTRL is high, ANT_PWR wil
be high.
OVER_CUR_DETECT pin is a monitor for short circuit in antenna. OVER_CUR_DETECT is low

ANT_CTRL will be low, so ANT_PWR will be low. Finally, short circuit protection is done by
circuits and microcontroller.
2.1 General description of the Sony RE216 tuner

The SUT-RE216 is designed for terrestrial TV (digital & analog) and digital cable reception. It
includes a full band tuner and a channel filtering for digital signals. It provides a low IF output afte
channel filtering to drive a channel demodulator. Tuning, band switching and initialization are
made via an I2C bus
interface. The module is built on a low-loss printed circuit
board carrying all the components in a metal housing frame
with top and rear covers. The single aerial connector is
mounted on one frame side and all other connections are
made via pins at the bottom.
Features:
Full frequency range from 47 to 870 Mhz

Digital Platform (DVB-T/T2, DVB-C, ISDB-T & ATSC)
Analog platforms (PAL B/G/I/D/K, NTSC M & SECAM L/L)
Low IF tuner concept
Programmable channel
Filter bandwidth
Fully I2C bus controlled
For Hybrid TV applications
2.2 Pinning
3 Audio amplifier stage with AZAD2102 (U163, U164)
3.1 General description
17MB62 uses two 2,5 W Class D Mono Audio Amplifers for from 16" to 24"
TVs. AZAD2102B is a 2.9 Watts (max. can offer 3.0 Watts @ Load =
3 ,THD = 10%, AVdd = DVdd = 5.5 Volt) with high efficiency filter-free class-D
audio power amplifier in a 1613 mm x 1613 mm wafer chip scale package
(WCSP). AZAD2102B uses Current- switch technology to achieve high
performance class-d amplifier that features 0.03% THD, 85% efficiency, 70 dB
PSRR, to improve RF-rectification immunity.
AZAD2102B provide a Vibration-Spectrum modulation clock for PWM Output.
This vibration frequency is around 10 kHz shift (+/- 5 kHz of Fpwm).
The advantage of the small size package (WCSP) makes AZAD2102B very suitable
for mobile phone and PDA device application. And the Class-D amplifier structure let
AZAD2102B to have highly efficiency power consumption than Class-AB amplifier.
AZAD2102B can shrink the application board, reduce system cost, and external
components.
ESD level protection I/O embedded in AZAD2102B. For general applications,
there is no need to add extra ESD protection devices (like Varistors) in application
systems for AZAD2102Bs I/O
3.2 Features
CMOS Technology
High Efficiency 85%
High PSRR 70 dB at 217 Hz
Differential OP-amp Input
AZAD2102B provides Vibration-Spectrum Modulation clock for reduce EMI
Provide Mute function (set Mute_B to GND will go into Mute status)
For the input stage AZAD2102B built-in a 10Kohm resistors (Gain
setting = 29.5 dB)
Maximum Battery Life and Minimum Heat
Efficiency With an 8 Speaker:
3.5 mA Quiescent Current
Output Power at 10% THD
2.85 Watts at AVdd = DVdd = 5.0 Volt, Rload = 4
Eliminate Power on and Power-off Pop noise
A fewer external components
Optimized PWM output stage eliminates LC output filter
Internally generate 290 kHz switching frequency to eliminate capacitor and resistor
Improve PSRR (70 dB) and wide supply voltage (3.0 V to 5.5 V)
Fully differential design reduces RF rectification
This chip has been built-in a very strong ESD protection.
System level ESD 4 KV (IEC 61000-4-2 ESD Contact Level)
Wafer chip scale package (W CSP)
TSSOP package with exposed pad
3.3 Absolute Ratings
3.3.1 Electrical Characteristics

VDD = AVdd = DVdd, VSS = AVss = DVss = Ground
TA = 25C, Filter Bandwidth = 20 Hz -20 kHz
PARAMETER Symbol TEST COND TIONS MNI TYP MAX UNIT
Operating Votlage Vop AVdd-DVdd to AVss-DVss 3.0 5 5.5 v
VDD = 5.5 V,VI= 0 V,AV = 6 V/V 4.5 6.5
Output offset voltage vos VDD = 3.6 V,VI= 0 V,AV = 6 V/V 2.1 4.0 mV
VDD = 3.0 V,VI= 0 V,AV = 6 V/V 1.2 3.0

VDD = 3.0 V to 5.5 V, AV = 2 V/V
Power supply rejection input ac grounded with
PSRR -68 dB
ratio Ci=2.2uF,Vripple=200mVpp,
RL=80 f=217Hz
Common mode rejection VDD = 3.0 V to 5.5 V,Vic = VDD/2 to
Cf':lRR -65 dB
ratio 0.5 V,Vi c = VDD/2 to 0.5 VDD -0.8 V,
High level nput
IIIHII VDD= 5.5V,Vi=5.8V 25 uA
current
Low level Input
IIlLI VDD= 5.5V,Vi=-0.3V 1 uA
current
VDD = 5.5 V,no load 3.6 5.0
Operation current lop VDD = 3.6 V,no load 3.0 4.2 mA
VDD = 3.0 V,no load 2.5 3.5
VDD = 5.5 V,no load 290

Output
Fpwm VDD = 3.6 V,no load 300 KHz
switching
frequency VDD = 3.0 V,no load 315
Vibration-Spectrum
Fvs VDD = 5.0 V,no load +/-5 +/-10 KHz
Modulation clock Ranqe
Under Voltage
Protection
UVP Vin+ and Vin- connect to GND,no load 2.0 2.5 v
Mute_B pin Impedance RMuB Mute_B to Ground 270 KQ
VDD=5.0V,Ri=5K0+10K
Gain Gain 18 20 22 V/V
O (Av=20V/V) I I
3.3.2 Operating specifications
TA = 25C,Gain = 20 V/V,
PARAMETER TEST COND TIONS MIN TYP MAX UNIT
VDD = 5.0V 2.85

THO+ N = 10%, f = 1kHz,RL
= 4Q
VDD = 3.6 V 1.45 w
VDD = 3.0 V 0.77
VDD = 5.0 V 2.25

THO + N = 1%, f = 1 kHz,
RL = 4 Q
VDD = 3.6 V 1.15 w
VDD = 3.0 V 0.60
Pw Output power
VDD = 5.0 V 1.75
THO+ N = 10%, f = 1kHz,RL
= 8Q
VDD = 3.6 V 0.87 w
VDD = 3.0 V 0.47
VDD = 5.0 V 1.39

THO + N = 1%, f = 1 kHz,
RL = 8 Q
VDD = 3.6 V 0.70 w
VDD = 3.0 V 0.36
VDD = 5.0 V,PO = 1W,RL = 8 Q, f = 1kHz 0.15

Total harmonic
THD+N VDD = 3.6 V,PO = 0.5 W,RL = 8 Q, f = 1 kHz 0.12 %
distortion plus noise
VDD = 3.0 V,PO = 200 mW, RL = 8 Q, f = 1kHz 0,09
VDD = 3.6 V, F = 217 H.z,
Supply ripple
PSRR Av=20V/V,Inputs connect to VRipple = 200 dB
rejection ratio -67
grounded with Ci = l.OJ,JF mVpp
SNR Signal-to-noise ratio VDD = 5 V,PO = 1W,RL = 8 Q 95 dB
VDD = 3.6 V,f = 20 Hz to 20 No weighting 45
Vnoise Output noise level kHz, nputs ac-grounded with J,JVRMS
Ci = l.OJJF A weighting 40
Common mode -72
CMRR VDD = 3.6 V,Vin = 100mVpp f = 217Hz dB
rejecti on ratio
ZI Input impedance 8 10 12 kQ
ZF Feedback resistor 120 150 180 kQ

3.4 Pinning
4 Audio amplifier stage with TPA3113 (U168)
4.1 General Description

17MB62 uses a 6W Class D Mono Audio Amplifers for from 26 to 32 TVs. The
TPA3113D2 is a 6-W (per channel) efficient, Class-D audio power amplifier for driving
bridged-tied stereo speakers. Advanced EMI Suppression Technology enables the use of
inexpensive ferrite bead filters at the outputs while meeting EMC requirements.
SpeakerGuard speaker protection circuitry includes an adjustable power limiter and a
DC detection circuit. The adjustable power limiter allows the user to set a "virtual" voltage
rail lower than the chip supply to limit the amount of current through the speaker. The DC
detect circuit measures the frequency and amplitude of the PWM signal and shuts off the
output stage if the input capacitors are damaged or shorts exist on the inputs.
The TPA3113D2 can drive stereo speakers as low as 4 . The high efficiency of the
TPA3113D2, 87%, eliminates the need for an external heat sink when
playing music.
The outputs are also fully protected against shorts to GND, VCC, and output-to-output.
The short-circuit protection and thermal protection includes an auto-recovery feature.
3.2. Features
6-W/ch into an 8- Loads at 10% THD+N From a 10-V Supply
12-W into a 4- Mono Load at 10% THD+N From a 10-V Supply
87% Efficient Class-D Operation Eliminates Need for Heat Sinks
Wide Supply Voltage Range Allows Operation from 8 V to 26 V
Filter-Free Operation
SpeakerGuard Speaker Protection Includes Adjustable Power Limiter plus DC
Protection
Flow Through Pin Out Facilitates Easy Board Layout
Robust Pin-to-Pin Short Circuit Protection and Thermal Protection with Auto
Recovery Option
Excellent THD+N / Pop-Free Performance
Four Selectable, Fixed Gain Settings
Differential inputs
4.2 Absolute Ratings
4.2.1 Electrical Characteristics

4.2.2 Operating Specifications
AC CHARACTERISTICS
TA = 25c, Vee = 12 V, RL = 8 0 (unless otherwise noted)
PARAMETER TEST COND
ITIONS MIN TYP MAX UNIT
200 mVpp ripple from 20 Hz-1kHz,
KsvR Supply ripple rejection -70 dB
Gain = 20 dB,Inputs ac-coupled to AGNO
THO+N Total harmonic distortion +noise RL = 8 0, f = 1kHz, Po = 3 W (half-power) 0.06 %
65 IJV
Vn Output integrated noise 20 Hz to 22 kHz,A-weighted filter, Gan
i = 20 dB
-80 dBV
Crosstalk P0 = 1 W,Gain = 20 dB, f = 1 kHz -100 dB
Maximum output at THO+N < 1%, f = 1 kHz,
SNR Signa-l to-noise ratoi 102 dB
Gain = 20 dB, A-weighted
fosc Oscillator frequency 250 310 350 kHz
Thermal trip point 150 c
Thermal hysteresis 15 c
4.3 Pinning
PIN
Pin 110/P DESCRIPTION
NAME
Number
Shutdown logic input for audio amp (LOW = outputs Hi-Z,HIGH = outputs
so 1 I
enabled).TTL logic levels with compliance to AVCC.
Open drain output used to display short circuit or de detect fault status.Votlage
compilant to AVCC.Short circuit faults can be set to auto-recovery by connecting
FAULT 2 0
FAULT pin to SO pin. Otherwise, both short circuit faults and de detect faults must
be reset by cycling PVCC.
LINP 3 I Postiive audio input for left channeL Biased at 3V.
LINN 4 I Negative audio input for left channeL Biased at 3V.
GAlNO 5 I Gan
i select least significant bit. TTL logic levels with compliance to AVCC.
GAIN1 6 I Gan
i see
l ct most significant bit TTL logic levels with compliance to AVCC.
AVCC 7 p Analog supply
AGNO 8 Analog signalground. Connect to the thermal pad.
High-side FET gate drive supply.Nominalvoltage is 7V. Also should be used
GVOO 9 0
as supply for PLIMIT function
Power limti leveladjust Connect a resistor divider from GVOO to GND to set
PLIMIT 10 I
powerlimit. Connect directly to GVOO for no power limit.
R
INN 11 I Negative audio input for right channe.
l Biased at 3V.
R
INP 12 I Positive audio input for right channeL Biased at 3V.
NC 13 Not connected
PBTL 14 I ParallelBTL mode switch
p Power supply for right channel H-bridge. Right channeland left channelpower
PVCCR 15
supply inputs are connect internally.
p Power supply for right channel H-bridge. Right channelandleft

PVCCR 16
channelpower supply inputs are connect internally.
BSPR 17 I Bootstrap 110 for right channel, positive high-side FET.
OUTPR 18 0 Class-0 H-bridge positive output for right channel.
PGNO 19 Power ground for the H-bridges.
OUTNR 20 0 Class-0 H-bridge negative output for right channel.
BSNR 21 I Bootstrap 1/0 for right channel, negative high-side FET.
BSNL 22 I Bootstrap 1/0 for left channe,l negative high-side FET.
OUTNL 23 0 Class-0 H-bridge negative output for left channel.
PGNO 24 Power ground for the H-bridges.
OUTPL 25 0 Class-0 H-bridge positive output for left channeL
BSPL 26 I Bootstrap 1/0 for left channe,
l positive high-side FET.
p Power supply for left channelH-bridge. Right channel and left channel power
PVCCL 27
p Power supply for left channelH-bridge. Right channel and left channel power
PVCCL 28
5 Power stage
The DC voltages required at various parts of the chassis and panel are provided by a
main power supply unit. MB62 chassis can operate with IPS60, IPS16, IPS17, PW26,
PW27 as main power supply and also with 12V adaptor.
CN706 is used for IPS60, IPS16 and IPS17 and CN1 is used for PW26 and PW 27.
JK9 is used for the adapter option and also CN705 inverter socket or DB32 chassis with
CN706 is used to supply backlight.
The power supplies generate 18V, 12V, 5V, 3,3V and 12V, 5V, stand by mode DC
voltages. Power stage which is on-chassis generates 5V, 3V3 stand by voltage and 12V,
8V, 5V, 3V3, 2.5V, 1,8V and 1,2V supplies for other different parts of the chassis. Chassis
block diagram is indicated below.
The blocks on power block diagram is using dependent to main supply. For PW26 and
PW27 just common blocks are enough for proper operation.
For IPS16, IPS17, IPS60 below blocks must work properly.
For adopter case also below blocks are necessary.

Short CCT Protection Circuit
Short circuit protection is necessary for protecting chassis and main IC against damages
when any Vcc supply shorts to ground. Protect pin should be logic high while normal
operation. When there is a short circuit protect pin shold be logic low. After any short
detection, SW forces LEDs on LED card to blink.
5.1 Power management
---MB62 Power Management with Adaptor---
---MB62 Power Management with PW25/ PW26---

---MB62 Power Management with IPS16/IPS17/IPS60/PW05---
---MB62 Power Management with PW03/PW04/PW07---

6 Microcontroller MSTAR (U5)
6.1 Description
MSD9WB9PT-2 (Main IC) (U5)
The MSD9WB9PT-2 is MStars most up-to-date system-on-chip solution for flat panel
integrated digital television products. Building on the success of MStars preceding SOC
series, the MSD9WB9PT-2 provides most cost-effective solution for DTV application with
creative and attractive features exclusively presented by MStar.
The MSD9WB9PT-2 integrates DTV/multi-media all-purpose AV decoder, DVB-T
demodulator, VIF demodulator, and Sound/Video processor into a single device. This
allows the overall BOM to be reduced significantly making the MSD9WB9PT-2 a very
competitive multi-media DTV solution. For ATV users, the MSD9WB9PT-2 provides multi-
standard analog TV support with adaptive 3D video decoding and VBI data extraction.
The build-in audio decoder is capable of decoding FM, AM, NICAM, A2, BTSC and EIA-J
sound standards. The MSD9WB9PT-2 supplies all the necessary A/V inputs and outputs
to complete a receiver design including a multi-port HDMI receiver and component video
ADC. All input selection multiplexed for video and audio are integrated, including full
SCART support with CVBS output. The equipped MStar MACE-5 color engine is the
latest masterpiece from
MStar famous color engine series providing excellent video and picture quality in Full-HD
and large-scale displaying system.
To meet the increasingly popular energy legislative requirements without the use of
additional hardware, the MSD9WB9PT-2 has an ultra low power standby mode during
which an embedded MCU can act upon standby events and wake up the system as
required.
The MSD9WB9PT-2 is composed of several modules:
High Performance Micro-processor

o Ultra high speed/performance 32-bit RISC CPU
o One full duplex UARTs
o Supports USB and ISP programming
o DMA Engine
Transport Stream De-multiplexer
o Supports parallel and serial TS interface, with or without sync signal
o Supports TS input and output for external CI module
o Maximum TS data rate is 104 Mb/sec for serial or 16 MB/sec for parallel
o 32 general purpose PID filters and section filters for each transport stream
de-multiplexer
o Supports additional audio/video/PCR filters
o Supports TS DMA channel for time-shift
o Supports 3DES/DES and AES encryption/decryption
MPEG-2 Video Decoder
o ISO/IEC 13818-2 MPEG-2 video MP@HL
o Automatic frame rate conversion
o Supports resolution up to HDTV (1080i, 720p) and SDTV
MPEG-4 Video Decoder
o ISO/IEC 14496-2 MPEG-4 ASP video decoding
o Supports resolutions up to HDTV (1080p@30fps)
o Supports DivX1 Home Theater & HD profilesOptional
o Supports VC-1Optional, FLV video format decoding
Hardware JPEG
o Supports sequential mode, single scan
o Supports both color and grayscale pictures
o Following the file header scan the hardware decoder fully handles the
decode process
o Supports programmable Region of Interest (ROI)
o Supports formats: 422/411/420/444/422T
o Supports scaling down ratios: 1/2, 1/4, 1/8
o Supports picture rotation
NTSC/PAL/SECAM Video Decoder
o Supports NTSC-M, NTSC-J, NTSC-4.43, PAL (B,D, G, H, M, N, I, Nc),
and SECAM standards
o Automatic standard detection
o Motion adaptive 3D comb filter
o Five configurable CVBS & Y/C S-video inputs
o Supports Teletext, Closed Caption (analog CC 608/ analog CC 708/digital
CC 608/digital CC708), V-chip and SCTE
Multi-Standard TV Sound Processor
o SIF audio decoding
o Supports BTSC/A2/EIA-J demodulation
o Supports NICAM/FM/AM demodulation
o Supports MTS Mode Mono/Stereo/SAP in BTSC/ EIA-J mode
o Supports Mono/Stereo/Dual in A2/NICAM mode
o Built-in audio sampling rate conversion (SRC)
o Audio processing for loudspeaker channel, including volume, balance,
mute, tone, EQ,virtual stereo/surround and treble/bass controls
o Advanced sound processing options available,for example: SRS1, BBE2,
QSound3, Audyssey4
o Supports digital audio format decoding:
MPEG-1, MPEG-2 (Layer I/II), MP3, Dolby Digital (AC-3), AAC-LC
Supports Optional Dolby Digital Plus, Dolby mPulse, and MS10
multistream decoder, including Dolby Digital Encoder for
transcoding streams to Dolby Digital 5.1 (DDCO)
Supports MPEG Audio, Dolby Digital, Dolby Digital Plus format AD
(Audio Description)
o Supports PVR and time-shifting
Audio Interface
o One SIF audio input interface with minimal external saw filters
o Four L/R audio line-inputs
o Two L/R outputs for main speakers and additional line-outputs
o Supports stereo headphone driver
o I2S digital audio input & output
o S/PDIF digital audio output
o HDMI audio channel processing
o Programmable delay for audio/video synchronization
o Analog RGB Compliant Input Port
o Three analog ports support up to 1080P
o Supports PC RGB input up to SXGA@75Hz
o Supports HDTV RGB/YPbPr/YCbCr
o Supports Composite Sync and SOG Sync-on-Green
o Automatic color calibration
o AV-link support
o Analogue RGB Auto-Configuration & Detection
o Auto input signal format and mode detection
o Auto-tuning function including phasing, positioning, offset, gain, and jitter
detection
o Sync Detection for H/V Sync
DVI/HDCP/HDMI Compliant Input Port
o Two HDMI/DVI Input ports
o HDMI 1.3 Compliant
o HDCP 1.1 Compliant
o 225 MHz @ 1080P 60 Hz input with 12-bit Deep-color support
o CEC support
o Single link DVI 1.0 compliant
o Robust receiver with excellent long-cable support
MStar Advanced Color Engine (MStarACE-5)
10/12-bit internal data processing
Fully programmable multi-function scaling engine
o Nonlinear video scaling supports various modes including Panorama
o Supports dynamic scaling for VC-1
High-Quality DTV video processor
o 3D motion video deinterlacer with motion object stabilizer
o Edge-oriented deinterlacer with edge and artifact smoother
o Automatic 3:2/2:2/M:N pull-down detection and recovery
o 3D multi-purpose noise reduction for DTV or lousy air/cable input
o MPEG artifact removal including de-blocking and mosquito noise
reduction
o Arbitrary frame rate conversion
MStar Professional Picture Enhancement:
o Dynamic brilliant and fresh color
o Dynamic Blue Stretch
o Intensified contrast and details
o Dynamic Vivid Skin
o Dynamic sharpened Luma/Chroma edges
o Global and local dynamic depth of field perception
o Accurate and independent color control
o Supports sRGB and xvYCC color processing
o Supports HDMI 1.3 deep color format
Programmable 12-bit RGB gamma CLUT
Output Interface
o Single/dual link 8/10-bit LVDS output
o Supports panel resolution up to Full-HD (1920x1080) @ 60Hz
o Supports TH/TI format
o Supports dithering options to 6/8-bit output
o Spread spectrum output for EMI suppression
CVBS Video Encoder
o Supports all NTSC/PAL TV Standard
o Stand-alone scaling engine
o Programmable Hue, Contract, Brightness
o Supports TTX/CC/WSS output
o CVBS Video Output

o Allows CVBS output of all source inputs
2D Graphics Engine
o Hardware Graphics Engine for responsive
o Interactive applications
o Supports point draw, line draw, rectangle draw/fill, text draw and trapezoid
draw
o BitBlt, stretch BitBlt, trapezoid BitBlt, mirror BitBlt and rotate BitBlt
o Raster Operation (ROP)
o Support Porter-Duff
VIF Demodulator
o Compliant with NTSC M/N, PAL B, G/H, I, D/K, SECAM L/L' standards
o Audio/Video dual-path processor
o Stepped-gain PGA with 25 dB tuning range and 1 dB tuning resolution
o Maximum IF gain of 37 dB
o Programmable TOP to accommodate different tuner gain and SAW filter
insertion loss to optimize noise and linearity performance
o Multi-standard processing with single SAW
o Supports silicon tuner low IF output architecture
DVB-T Demodulator
o Digital carrier frequency offset correction: 500KHz
o Optimised for SFN channels with pre/post-cursive echoes inside/outside
the guard
o Acquisition range 857kHz includes up to 3x 1/6 MHz transmitter offset
o Meets Nordig Unified 1.0.3, D-Book 5.0, EICTA E-Book/C-Book test
requirement
o 400kHz internal carrier offset recovery range
o 6.8 usecs echo cancellation at 7 Msym/s
o Supports IF, low-IF, zero-IF inputs
o Ultra-fast automatic blind UHF/VHF channel scan (constellations and
symbol rate)
Connectivity
o Two USB 2.0 host ports
o USB architecture designed for efficient support of external storage
devices in conjunction with off air broadcasting
Miscellaneous
o DRAM interface supporting one 16-bit DDR2 @1066MHz
o Supports PVR
o Supports Common Interface for conditional access support
o Bootable SPI interface with serial flash support
o Parallel interface for external NAND flash support
o Power control module with ultra low power MCU available in standby
mode
o 380-ball LFBGA package
o Operating Voltages: 1.26V (core), 1.8V (DDR2), 2.5V and 3.3V (I/O and
analog)
6.2 MSTAR block diagram
6.3 Reset circuit
Reset circuit using for initiliazing main Mstar IC. Reset condition is high and nomal
working condition is low for RESET pin.
7 CI interface
CI Interface Power Switch:

It is used for CI module supply, when Module is inserted (it means CI detect is low) This
circuit is opened or closed by CI_POWER_CTRL port of main uController
8 USB interface
Main Concept IC has integrated 2 USB 2.0 interface. One of them is used for ethernet
function, the other one is used for USB connectivity for last user. Last user can play video,
picture and audio files. Also digital channels can be record to external storage device by
this interface. All SW files can be updated with interface.
USB circuit has 3 main parts

Integrated USB 2.0 Host interface of D3K (U5)
Protection IC (U145)
Over current protection IC (U8)
9 DDR2 SDRAM K4T1G164QF (U155)
9.1 Description
The 1Gb DDR2 SDRAM is organized as a 16Mbit x 8 I/Os x 8 banks, 8Mbit x 16 I/Os x 8
banks device. This synchronous device achieves high speed double-data-rate transfer
rates of up to 1066Mb/sec/pin (DDR2-1066) for general applications. The chip is designed
to comply with the following key DDR2 SDRAM features such as posted CAS with additive
latency, write latency = read latency - 1, Off-Chip Driver (OCD) impedance adjustment and
On Die Termination. All of the control and address inputs are synchronized with a pair of
externally supplied differential clocks. Inputs are latched at the crosspoint of differential
clocks (CK rising and CK falling). All I/Os are synchronized with a pair of bidirectional
strobes (DQS and DQS) in a source synchronous fashion. The address bus is used to
convey row, column, and bank address information in a RAS/CAS multiplexing style. For
example, 1Gb (x8) device receive 14/10/3 addressing. The 1Gb DDR2 device operates
with a single 1.8V 0.1V power supply and 1.8V 0.1V VDDQ. The 1 Gb DDR2 device is
available in 60 ball FBGA(x8) and 84ball FBGA(x16).
9.2 Features
JEDEC standard VDD = 1.8V 0.1V Power Supply

VDDQ = 1.8V 0.1V
533MHz fCK for 1066Mb/sec/pin
8 Banks
Posted CAS
Programmable CAS Latency: 4, 5, 6, 7
Programmable Additive Latency: 3, 4, 5. 6
Write Latency(WL) = Read Latency(RL) -1
Burst Length: 4 , 8(Interleave/nibble sequential)
Programmable Sequential / Interleave Burst Mode
Bi-directional Differential Data-Strobe (Single-ended data-strobe is an optional
feature)
Off-Chip Driver(OCD) Impedance Adjustment
On Die Termination
Special Function Support - PASR(Partial Array Self Refresh) - 50ohm ODT - High
Temperature Self-Refresh rate enable
Average Refresh Period 7.8us at lower than TCASE 85C, 3.9us at 85C < TCASE <
95C
All of products are Lead-free, Halogen-free, and RoHS compliant
Pinning
1 2 3 7 8 9
UOQS
OQ14 UOM UOQS DQ15
OQ9 VooQ VoDQ
OQ12 OQ13
LDQS
OQ7
VooQ VoDQ DQO
OQ3 OQ2 OQ5
Voo
OOT
Voo
1 2 3 4 s 6 8 9
Ball Locations (x16)
AB ++++++
ED +++
c
Populated ball
+ Ball not populated
++ ++
Top view H
+++
(See the balls throughpackage) J
KL
++++
+
+
MN +
++++++
+
+
R ++++
p
10 Scaler and LVDS sockets
10.1 LVDS sockets block diagram
10.2 Panel supply switch circuit

This switch is used to open and close panel supply of TCON. It is controlled by port of
main ucontroller. Also with this circit panel sequency could be adjusted correctly. 3 panel
supplys are connected to this circuit. All of them are optional according to panels.
11 SPI flash memory - MX25L1005 (U158)

MX25L1005 is a CMOS 1,048,576 bit serial Flash memory, which is configured as
131,072 x 8 internally.The MX25L1005 feature a serial peripheral interface and software
protocol allowing operation on a simple 3-wire bus. The three bus signals are a clock
input (SCLK), a serial data input (SI), and a serial data output (SO). SPI access to the
device is enabled by CS# input. The MX25L1005 provide sequential read operation on
whole chip. After program/erase command is issued, auto program/ erase algorithms
which program/ erase and verify the specified page or sector/block locations will be
executed. Program command is executed on page (256 bytes) basis, and erase
command is executes on chip or sector(4K-bytes) or block(64K-bytes). To provide user
with ease of interface, a status register is included to indicate the status of the chip. The
status read command can be issued to detect completion status of a program or erase
operation via WIP bit. When the device is not in operation and CS# is high, it is put in
standby mode and draws less than 10uA DC current. The MX25L1005 utilize MXIC's
proprietary memory cell, which reliably stores memory contents even after 100,000
program and erase cycles.
11.2 Features
Serial Peripheral Interface (SPI) compatible -- Mode 0 and Mode 3
1,048,576 x 1 bit structure
32 Equal Sectors with 4K byte each, Any Sector can be erased individually
2 Equal Blocks with 64K byte each, Any Block can be erased individually
Single Power Supply Operation
2.7 to 3.6 volt for read, erase, and program operations
Latch-up protected to 100mA from -1V to Vcc +1V
Low Vcc write inhibit is from 1.5V to 2.5V
11.3 Absolute maximum ratings
RATING VALUE
Ambient Operating 0C to 70C
Temperature
Storage Temperature -55C to 125C
Applied Input Voltage -0.5v to 4.6v
Applied Output Voltage -0.5v to 4.6v
VCC to Ground Potential -0.5v to 4.6v
11.4 Pinning
8-PIN SOP (150mil)
SYMBOL DESCRIPTION
CS# Chip select
SI Serial Data Input
SO Serial Data Output
SCLK Clock Input
HOLD# Hold, to pause the device without
deselecting the device
VCC +3.3v Power Supply
GND Ground
12 NAND Flash memory NAND512XXA2C (U162)

The NAND flash 528-byte/ 264-word page is a family of non-volatile flash memories that
uses the single level cell (SLC) NAND technology. It is referred to as the small page
family.
The NAND512R3A2C, NAND512R4A2C, and NAND512W3A2C have a density of 512

Mbits and operate with either a 1.8 V or 3 V voltage supply. The size of a page is either
528 bytes (512 + 16 spare) or 264 words (256 + 8 spare) depending on whether the
device has a x8 or x16 bus width.
The address lines are multiplexed with the Data Input/Output signals on a multiplexed x8
or x16 input/output bus. This interface reduces the pin count and makes it possible to
migrate to other densities without changing the footprint.
To extend the lifetime of NAND flash devices it is strongly recommended to implement an

error correction code (ECC). The use of ECC correction allows to achieve up to 100,000
program/erase cycles for each block. A write protect pin is available to give a hardware
protection against program and erase operations.
12.2 Features
High density NAND flash memories
o 512-Mbit memory array
o Cost effective solutions for mass storage applications
NAND interface
o x8 or x16 bus width
o Multiplexed address/ data
Supply voltage: 1.8 V, 3 V

Page size
o x8 device: (512 + 16 spare) bytes
o x16 device: (256 + 8 spare) words
Block size
o x8 device: (16K + 512 spare) bytes
o x16 device: (8K + 256 spare) words
Page read/program
o Random access: 12 s (3 V)/15 s (1.8 V) (max)
o Sequential access: 30 ns (3 V)/50 ns (1.8 V) (min)
o Page program time: 200 s (typ)
Copy back program mode
Fast block erase: 2 ms (typ)
Status register
Electronic signature
Chip Enable dont care
Security features
o OTP area
Serial number (unique ID) option

Hardware data protection
o Program/erase locked during power transitions
Data integrity
o 100,000 program/erase cycles (with ECC)
o 10 years data retention
RoHS compliant packages

Development tools
o Error correction code models
o Bad blocks management and wear leveling algorithms
12.3 Pinning
13 LNBH23L (U6)
13.1 Description
Intended for analog and digital satellite receivers,the LNBH23L is a monolithic voltage
regulator
and interface IC, assembled in QFN32 5 x 5 specifically designed to provide the 13 / 18 V
power supply and the 22 kHz tone signalling to the LNB down-converter in the antenna
dish or to
the multi-switch box. In this application field, it offers a complete solution with extremely
low
component count, low power dissipation together with simple design and IC standard
interfacing.
13.2 Features
Complete interface between LNB and IC bus
Built-in DC-DC converter for single 12 V supply operation and high efficiency (typ.
93% @ 0.5 A)
Selectable output current limit by external resistor
Compliant with main satellite receivers output voltage specification
Auxiliary modulation input (EXTM pin) facilitates DiSEqC 1.X encoding
Accurate built-in 22 kHz tone generator suits widely accepted standards
Low-drop post regulator and high efficiency step-up PWM with integrated power
NMOS allow low power losses
Overload and over-temperature internal protections with IC diagnostic bits
LNB short circuit dynamic protection
+/- 4 kV ESD tolerant on output power pins

13.3 Block diagram
14 Advanced DVB-S/S2 demodulator M88DS3002 (U3)
14.1 Description
The M88DS3002 is an advanced single-chip demodulator for digital satellite television

broadcasting. It is fully compliant with the DVB-S/S2 standard and can support QPSK,
8PSK, 16APSK and 32APSK demodulation schemes. The chip provides a fast, easy-to-
apply and cost-effective front-end solution for digital satellite receiver. The M88DS3002
accepts baseband differential or single ended I and Q signals from a tuner, then
digitizes, demodulates and decodes the signals, and finally outputs an MPEG transport
stream. The M88DS3002 supports symbol rate from 1 Msps up to 45 Msps, and code
rate from 1/4 to 9/10. Its features cover blind scan, fade detection, timing and carrier
recovery, performance monitoring, co-channel interference cancellation, command
interface, and DiSEqC 2.X interface, etc. The device is controlled via a 2-wire serial
bus. The M88DS3002 works properly with 1.25 V and 3.3 V voltage supplies. Typically,
the power consumption is around 390 mW. The chip is available in a 64-pin QFN
package and is RoHS compliant.
14.2 Features
Multi-standard demodulation
Compliant with DVB-S/S2 specification
QPSK, 8PSK, 16APSK and 32APSK demodulation schemes
Maximum channel bit rate is 130 Mbps
Maximum symbol rates are: 45 Msps for QPSK and 8PSK; 36 Msps for 16APSK
and 28 Msps for 32APSK
DSP features
Symbol rate sweeping
I/Q impairment cancellation
Automatic spectrum inversion
Adaptive equalizer for RF reflection removal
Roll-off factor automatic identification
Blind scan for programming search
High performance on-chip micro-controller
Multi-error monitor
Accurate SNR estimation
Multi-lock indicators
Clipping rate reporter
DC removal
Automatic frequency correction (AFC)
Fast timing loop acquisition
Robust frame synchronization scheme
Phase noise indicator
Fast system recovery from fading or other abnormal conditions
Co-channel interference cancellation
Constellation monitor
Interface
DVB-S/S2 common, parallel and serial MPEG output interface compliant
2-wire serial bus to configure the device
2-wire bus repeater for tuner configuration
DiSEqC 2.X compliant interface
General purpose output (GPO)
Dedicated reference clocks (13.5MHz / 27MHz) generation
System
o On-chip 8-bit ADC
o On-chip PLL for master clock from a 27 MHz external clock or quartz
crystal
o Sleep mode supported
---Block Diagram of M88DS3002---
14.3 Pin Assignment

15 LM1117 (U175, U180, U181)

The LM1117 is a series of low dropout voltage regulators with a dropout of 1.2V at 800mA
of load current. It has the same pin-out as National Semiconductors industry standard
LM317. The LM1117 is available in an adjustable version, which can set the output
voltage from 1.25V to 13.8V with only two external resistors. In addition, it is also
available in five fixed voltages, 1.8V, 2.5V, 2.85V, 3.3V, and 5V. The LM1117 offers
current limiting and thermal shutdown. Its circuit includes a zener trimmed bandgap
reference to as-sure output voltage accuracy to within 1%. The LM1117 series is
available in SOT- 223, TO-220, and TO-252 D-PAK packages. A minimum of 10F
tantalum capacitor is required at the output to improve the transient response and
stability.
15.2 Features
Available in 1.8V, 2.5V, 2.85V, 3.3V, 5V, and Adjustable Versions
Space Saving SOT-223 Package
Current Limiting and Thermal Protection
Output Current 800mA
Line Regulation 0.2% (Max)
Load Regulation 0.4% (Max)
Temperature Range
LM1117 0C to 125C
LM1117I -40C to 125C
15.3 Applications
2.85V Model for SCSI-2 Active Termination
Post Regulator for Switching DC/DC Converter
High Efficiency Linear Regulators 15
32 TFT TV Service Manual 10/01/2005
Battery Charger
Battery Powered Instrumentation
15.4 Absolute maximum ratings

15.5 Pinning
16 MP2012 (U176)
17 General description
The MP2012 is a fully integrated, internally compensated 1.2MHz fixed frequency PWM
step-down converter. It is ideal for powering portable equipment that runs from a single
cell Lithium-Ion (Li+) Battery, with an input range from 2.7V to 6V. The MP2012 can
provide up to 1.5A of load current with output voltage as low as 0.8V. It can also operate
at 100% duty cycle for low dropout applications. With peak current mode control and
internal compensation, the MP2012 is stable with ceramic capacitors and small inductors.
Fault condition protection includes cycle-by-cycle current limiting and thermal shutdown.
17.1 Features
2.7-6V Input Operation Range
Output Adjustable from 0.8V to VIN
1 A Max Shutdown Current.
Up to 95% Efficiency
100% Duty Cycle for Low Dropout
Applications
1.2MHz Fixed Switching Frequency
Stable with Low ESR Output Ceramic
Capacitors
Thermal Shutdown
Cycle-by-Cycle Over Current Protection
Short Circuit Protection
Available in 6-pin 3x3mm QFN
17.2 Pinning
Pin Name Description

#
1 FB Feedback input. An external resistor divider from
the output to GND, tapped to the FB pin sets the
output voltage.
2 GND, Ground pin. Connect exposed pad to ground
Exposed plane for proper thermal performance.
Pad
3 SW Switch node to the inductor.
4 PVIN Input supply pin for power FET.
5 VIN Input Supply pin for controller. Put small
decoupling ceramic near this pin.
6 EN Enable input, High enables MP2012. EN is
pulled to GND with 1Meg internal resistor.
18 RTA8283A (U23, U173)

The RT8283A is a high-efficiency, monolithic synchronous step-down DC/DC converter
that can deliver up to 3A output current from a 4.5V to 23V input supply. The RT8283A's
current mode architecture and external compensation allow the transient response to be
optimized over a wide range of loads and output capacitors. Cycle-by-cycle current limit
provides protection against shorted outputs and soft-start eliminates input current surge
during start-up. The RT8283A also provides output under voltage protection and thermal
shutdown protection. The low current (<3A) shutdown mode provides output disconnect,
enabling easy power management in batterypowered systems. The RT8283A is available
in a SOP-8 package.
18.2 Features
1.5% High Accuracy Feedback Voltage
Integrated N-MOSFET Switches
Current Mode Control
Fixed Frequency Operation : 340kHz
Output Adjustable from 0.8V to 20V
Thermal Shutdown Protection
18.3 Pinning
Pin No. Pin Description

Name
1 BOOT Bootstrap for high-side gate driver. Connect a 0.1F or
greater ceramic capacitor from BOOT to SW pins.
2 VIN Input Supply 4.5V to 23V. Must bypass with a suitably
large ceramic capacitor.
3 SW Phase Node--Connect to external L-C filter..
4, 9 (Exposed GND Ground.
Pad)
5 FB Feedback Input pin is connected to the converter output.
It is used to set the output of the converter to regulate to
the desired value via an internal res divider. For an
adjustable output, an external res divider is connected to
this pin.
6 COMP Compensation Node. COMP is used to compensate the
regulation Control loop. Connect a series RC network
from COMP to GND. In some cases, an additional
capacitor from COMP to GND is required.
7 EN Enable Input Pin. Logic high enables the converter; a
logic low forces the RT8253A into shutdown mode.
Attach this pin to VIN with a 100k pull up resistor for
automatic startup.
8 SS Soft-Start Control Input. SS controls the soft-start period.
Connect a capacitor from SS to GND to set the soft-start
period. A 0.1F capacitor sets the soft-start period to
13.5ms.
19 MP1583 (U174)

The MP1583 is a step-down regulator with a built-in internal Power MOSFET. It
achieves
3A of continuous output current over a wide input supply range with excellent load and
line regulation. Current mode operation provides fast transient response and eases
loop stabilization. Fault condition protection includes cycle-by-cycle current limiting and
thermal shutdown. An adjustable soft-start reduces the stress on the input source at start-
up. The MP1583 requires a minimum number of external components, providing a
compact solution.
19.2 Features
3A Output Current
Programmable Soft-Start
100m Internal Power MOSFET Switch
Stable with Low ESR Output Ceramic Capacitors
20A Shutdown Mode
Fixed 385KHz Frequency
Thermal Shutdown
Cycle-by-Cycle Over Current Protection
Wide 4.75V to 23V Operating Input Range
Output Adjustable from 1.22V to 21V
Under-Voltage Lockout
19.3 Pinning
Pin Pin Description

No. Name
1 BOOT High-Side Gate Drive Bootstrap Input. BS supplies the drive for the
high-side N-Channel MOSFET switch.
2 IN Power Input. Drive IN with a 4.75V to 23V power source.
3 SW Power Switching Out is the switching node that supplies power to the
output
4 GND Ground.
5 FB Feedback Input. FB senses the output voltage and regulates it. Drive
FB with a resistive voltage divider from the output voltage. FB
threshold is 1.222V.
6 COMP Compensation Node is used to compensate the regulation control
loop.
7 EN Enable/UVLO. A voltage greater than 2.71V enables operation. For
complete low current shutdown the EN pin voltage needs to be at less
than 900mV. When the voltage on EN exceeds 1.2V, the internal
regulator will be enabled and the soft-start capacitor will begin to
charge. The MP1583 will start switching after the EN pin voltage
reaches 2.71V.
8 SS Soft-Start Control Input. SS controls the soft-start period.
20 FDC642

This P-Channel 2.5V specified MOSFET is produced using Fairchilds advanced
PowerTrench process that has been especially tailored to minimize on-state resistance
and yet maintain low gate charge for superior switching performance.
These devices have been designed to offer exceptional power dissipation in a very small
footprint for applications where the larger packages are impractical.
20.2 Features
Max rDS(on) = 65 m at VGS = -4.5 V, ID = -4.0 A
Max rDS(on) = 100 m at VGS = -2.5 V, ID = -3.2 A
Fast switching speed
Low gate charge (11nC typical)
High performance trench technology for extremely low rDS(on)
SuperSOTTM-6 package: small footprint (72% smaller than standard
SO-8); low profile (1 mm thick)
Termination is Lead-free and RoHS Compliant
20.3 Pinning
21 FDC604P

This P-Channel 1.8V specified MOSFET uses Fairchilds low voltage PowerTrench
process. It has been optimized for battery power management applications.
21.2 Features
5.5 A, 20 V. RDS(ON) = 33 m @ VGS = 4.5 V
RDS(ON) = 43 m @ VGS = 2.5 V
RDS(ON) = 60 m @ VGS = 1.8 V
Fast switching speed.
High performance trench technology for extremely low RDS(ON)(S)
21.3 Pinning
22 Connectors
22.1 SCART (SC1)
22.2 HDMI (CN707, CN708)

22.3 VGA (CN711)
23 Customer service mode (CSM)
To enter the Customer Service Mode, press MENU-1-2-3-6-5-4 keys consecutively, on the remote
control. The read-only top-level service menu will appear. Pressing theRETURN or MENU key will exit
service menu.
24 Service menu mode
To enter the service menu, press MENU-4-7-2-5 keys consecutively, on the remote control. The top-level
service menu will appear. All submenus can be selected via Up/Down keys and displayed by pressing OK
key. When a submenu is displayed, top-level service menu disappears. Pressing RETURN key, returns to
the one level higher menu. Pressing the MENU key will exit service menu.
Some items are changeable at service menu, the values of which are stored in the NVM when the menu is
closed. Some items are read-only, which can only be changed by Profile Manager and displayed in service
menu for convenience.
24.1 Main service menu

Service menu or a sub-menu is displayed on the screen when the TV is in one of the TV/AV/PC modes. It
shows what the items are set in Profile Manager. It is a read-only screen, not writable.
It shows the following items:
TV Life Time: The number of minutes the set is in the On mode.
Standby SW Version: The version number of the Stand-by software.
Mboot Version: The version number of the Mboot software.
PANEL: The LCD panel identification including the software version information.
PQ: Picture quality tool version information.
PROFILE: TV specific option profile
PIX FILES: Not applicable
HW Profile Version: The version number of the hardware profile.
SW Profile Version: The version number of the software profile.
Lan Profile Version: The version number of the Lan profile.
Customer: Philips
Items exist in the main screen of service menu. Also, software version number and DCF id are written in
the header of service menu.
The main items in Service Menu:
24.2 Video Settings

RF AGC adjustments for neighbour and image channels exist or don't. Also, ADC Calibration gain
and offset values for RGB separately due to selected sources
24.3 Audio Settings

Surround type and surround mode text items are displayed.
24.4 Options 1
Profile options such as AUTO TV off time, Power up mode, EPG type, etc. are displayed in options 1.
24.5 Options 2
Profile options such as APS sorting, Dynamic Menu, Auto zoom mode etc. are displayed in Options 2.
24.6 Tuning Settings
Tuner type is displayed.
24.7 Source Settings

Enable and disabled sources are displayed.
When TV is disabled, Items which are connected to Tuner are picked off from menu. (Install and Retune
Menu, Channel List Menu...).
24.8 Diagnostic
The result of various diagnostic tests are displayed here.
24.9 USB operations

USB operations are performed by pressing that button.
See Service Menu Design Idea for Menu structure, look and feel, position, etc
Video Settings RF AGC SECAM
RF AGC NEIGHBOUR NO IMAGE NO
RF AGC NEIGHBOUR NO IMAGE YES
RF AGC NEIGHBOUR YES IMAGE NO
RF AGC NEIGHBOUR YES IMAGE YES
RF AGC
ADC Calibration Source
ADC Calibration R Gain
ADC Calibration G Gain
ADC Calibration B Gain
ADC Calibration R Offset
ADC Calibration G Offset
ADC Calibration B Offset
Audio Settings Surround Type
Surround Mode Text
Options 1 Auto TV OFF
Power Up mode
Backlight Trick Mode
Cable Support
EPG Type
Hotel Mode
LCN
PC Standby
Stby Search
Test Tool
Local Key
Volume Level
Options 2 Aps Sorting
Dynamic Menu
EPG Menus
Transparent Text
HDMI Number
Remote control type
DCF ID
Tuning Settings Tuner Type
Source Settings TV
EXT1
EXT2
EXT2-S
FAV
S-VIDEO
HDMI 1
HDMI 2
HDMI 3
HDMI 4
YPBPR
VGA/PC
Blu-ray
Diagnostic Remote control test
UHF test
VHF test
Factory reset
Tuner I2C
IF I2C
HDMI I2C
Ethernet
EDID Status
HDCP Status
DDR Settings
CI+ Credentials
MAC Address
USB Operations Press this button to perform USB operations.
USB stick should be connected before this operation.
24.10 Profile Operations

VES1.1E LA profile data are kept in the flash file system as separate files. So they can be downloaded to
USB memory stick or uploaded to TV from a memory stick individually.
24.10.1 Upload profile Data from USB

1. Create a folder named profile in the USB stick.
2. Copy mb62_swprofile.bin and mb62_hwprofile.bin into the USB profile folder.
3. Plug the USB stick into the TV.
4. Open service menu and select USB Operations.
The files will be automatically copied to the TV flash file system.
After a reboot, App/Mw will start to use new profiles. It is possible to upload hardware or software profiles
separately.
24.10.2 PQ Files Operations

It is also possible to download/upload PQ files from/into MB62 when USB Operations button in service
menu is pressed.
Whenever a USB stick is connected to TV set and USB Operations button in service menu is pressed, /pq
folder is checked.
If it exists and if they include some files, necessary copy/delete operations are performed.
24.10.3 Upload PQ files from USB
1. Create a folder named pq in the USB stick.

2. Copy VESTEL_D1_Plus_PNL.bin, Titania2_Main.bin and Titania2_Main_Text.bin into USB pq
folder.
3. Connect USB stick to TV.
4. Open service menu, select USB Operations.
The files named VESTEL_D1_Plus_PNL.bin, Titania2_Main.bin, Titania2_Main_Ex.bin and

Titania2_Main_Text.bin will be copied from USB to TV.
24.10.4 Ci+ credentials key update

1. Create a spi folder in root of the memory stick
2. Copy mb62_credentials.bin to spi folder
3. Connect the USB stick to the TV.
4. Perform USB Operations in the service menu.
24.10.5 HDCP keys update

1. Create a spi folder in roof of the memory stick.
2. Copy mb62_hdcp.bin to spi folder.
4. Perform USB operations in the service menu.
24.10.6 Edid update
1. Create a spi folder in root of the memory stick.
2. Copy edid.edid to the spi folder.
24.10.7 DDR settings update

1. Create a spi folder in root of the memory stick.
2. Rename the ddr binary file to be used which resides in the config_mb62 folder as mb62_ddr.bin.
3. Copy the file mb62_ddr.bin to the spi folder.
24.10.8 MAC address update

1. Create spi folder in root of the memory stick.
2. Copy the file mb62_mac.bin to the spi folder.
25 Software update
In the VES1.1E LA there is only one software package. From following steps
software update procedure can be seen:
1. MB62_en.bin, mboot.bin and usb_auto_update_T4.txt documents should copy directly

inside of a flash memory(not in a folder).
2. Put flash memory to the tv when tv is powered off.
3. Power on the and wait when the tv is opened.
4. If first time installation screen is displayed, it means software update procedure is
successful.
26 Troubleshooting
26.1 No backlight problem

Problem: If TV is working, led is normal and there is no picture and backlight on the panel.
Possible couses: Backlight pin, dimming pin, backlight supply, stby on/off pin
Backlight pin should be high in open position. If it is low, please check Q181 and panel
cables.
Dimming pin should be high or square wave in open position. If it is low, please check
S16 for Mstar side and panel or power cables, connectors.
Backlight power supply should be in panel specs. Please check CN705 for MB62, related
connectors for power supply cards.
STBY_ON/OFF should be low for standby on condition, please check R1677.
26.2 CI module problem

Problem: CI is not working when CI module inserted.
Possible couses: Supply, suply control pin, detect pins, mechanical positions of pins
CI supply shoul be 5V when CI module inserted. If it is not 5V please check
CI_POWER_CTRL, this pin should be low.
Please check mechanical positions ofCI module.
Detect ports should be low. If it is not low please check Cl connector pins, Cl module pins
and 3V3_VCC on MB62.
R1632
PCM D3
PCM D4
4
PCM DS
PCM D6
Cl Detect PCM
7 PCM CB N
8
PCM AlO
PCM OB_N
10 PCM All
11 PCM A9
12 PCM AS
13 PCM A13
14 PCM A14 3V3_VCC
21
22
23 12p
24 sov
25
".
27
28
29
Cl Detect 30
31
'A
26.3 LED blinking problem
Problem: LED blinking, no other operation
This problem indicates a short on Vcc voltages. Protect pin should be logic high while
normal operation. When there is a short circuit protect pin will be logic low. If you detect
logic low on protect pin, unplug the TV set and control voltage points with a multimeter to
find the shorted voltage to ground.
26.4 IR problem
Problem: LED or IR not working
Check LED card supply on MB62 chasis.
LED SOCKET
L--<J SV STBY
F259
+----2-- - -[>IR IN
C949 600R
H
Ql70
Ql7l
@ .-< BC949B
26.5 Keypad touchpad problems

Problem Keypad or Touchpad is not working.
Check keypad supply and keyboard pin on the SSB.

26.6 USB problems
Problem: USB is not working or no USB Detection.
Check USB Supply, It should be nearly 5V.
26.7 No sound problem

Problem: No audio at main TV speaker outputs.
Check supply voltages of VDD_AUDIO, 5V_VCC and 3V3_VCC with a voltage-meter.
There may be a problem in headphone connector or headphone detect circuit (when
headphone is connected, speakers are automatically muted). Measure voltage at
HP_DETECT pin, it should be 3.3v.
26.8 No sound problem at headphone

Problem: No audio at headphone output.
Check HP detect pin, when headphone is. Check 5V_VCC and 3V3_VCC with a voltage-
meter.
26.9 Standby On/Off problem

Problem:
Device cannot boot, TV hangs in standby mode.
There may be a problem about power supply. Check 12V_VCC, 5V_VCC and 3V3_VCC with a
voltage-meter. Also there may be a problem about SW. Try to update TV with latest SW.
Additionally it is goood to check SW printouts via hyper-terminal (or Teraterm). These
printouts may give a clue about the problem.
26.10 DVD problems

Problem: DVD is not working.
Check that DVD source is selected in Service menu. Check supply voltage of DVD
namely 12V_VCC.
26.11 No signal problem

Problem: No signal in TV mode.
Check tuner supply voltage; 3V3_TUN. Check tuner options are correctly set in Service menu.
Check AGC voltage at IF_AGC pin of tuner.
27 Styling sheet
11 10
7 3
4 2
1
IR 1
17LD98 1
SCREW P C ZN Y
6
2
ASM 2
DISPLAY ASM 32" LED 1
METAL FRAME 32" LED 1
BACK COVER METAL 32130 1
BACK COVER 32130 LED DVD 1

5
10 SCREW P C ZN YFMB 3 x 9.5 8
1
11 COVER FOOT 1
1 2 3 4 5 6 7 8
ACTIVE_ANT_SUPPLY
NUTUNE/SEMCO/LG C965
C904 2
C61 100n
5V_VCC
1 TP48 22u 16V
100n 1
ANT-DC 1 ANT-DC 1 10V 6V3

ACTIVE_ANT_SUPPLY
R1595
TH1
2R1
VCC 2 +3V3 2 10k 12V_VCC R1597
A 3V3_TUNER 3V3_TUNER TUN_SCL R1963
1 2
IF_AGC_MST
A
10k 100R IF_AGC_TUNER
SCL 3 SCL 3 47R TUN_SCL_MST F304 R1581
TUN_SCL 2
C912 2
C910
TU1
TU3
R30 ACTIVE_ANT_SUPPLY 1k 100n 100n
FDN336P 1 1
SDA 4 SDA 4 47R TUN_SDA_MST 1k R1590 10V 10V
TUN_SDA Q175
R29 R1594 Q172 10k ANT_CTRL
5 5 BC848B
R4
GND GND TUN_SDA OVER_CUR_DETECT 10k
10k
CLK_OUT 6 RESET 6 RESET_TUNER
20k
10k
7 7 S40
R1586
R1593
IF_N DIGITAL_IF_N IF_N DIGITAL_IF_N
28 Schematics SSB
FK1601
8 8 S41
IF_P DIGITAL_IF_P IF_P DIGITAL_IF_P
SUT-RE216
IF_AGC 9 IF_AGC 9
IF_AGC_TUNER IF_AGC_TUNER
1
TP47
SONY TUNER
B B
F1
1V2_VCC 1V25_S2_VDDI
60R
C60
C 22u C
16V
C36
C37
C44
C45
C46
C47
C48
C49
C50
100n 10V
100n 10V
100n 10V
100n 10V
100n 10V
100n 10V
100n 10V
100n 10V
100n 10V
3V3_S2_VDDD
1V25_S2_VDDI
1V25_S2_VDDI
NC NC NC NC NC
C35
50V
33p
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
F2
3V3_VCC 3V3_S2_VDDD
60R C59 C71
C38
NC5
GPO
NC4
NC3
NC2
NC1
NC9
NC8
OLF
LOCK
GNDD 49
22u
4
3
VCC_9
VCC_10
VDDD_4
LNB_EN
6V3 R26
10V 100n
C39
C40
C43
12p
D206
C5V6
27 MHZ KULLANILACAK 1 48
100n 10V
100n 10V
100n 10V
X3
GNDA_1 M_CKOUT 47R 50V TSMICLK
CKXTAL_13
27MHz
R27
1
2
2 XTAL_IN M_SYNC 47 47R TSMISYNC
3 XTAL_OUT VCC_8 46 1V25_S2_VDDI
C34
3V3_S2_VDDA R28
50V
33p
4 45
C8
C9
50V 50V VDDA_1 M_VAL 47R TSMIVALID
C22
C21
27p
27p
10p
10p
F4 16V 5 GNDA_2 M_ERR 44 NC
D D
3V3_VCC 3V3_S2_TUN X1 C29 10n
3V3_S2_TUN
3V3_S2_TUN
60R C58 S2_IP 6 IP M_DATA7 43 R4
1 4 5 4 TS_MDI7
22u 27MHz C30 10n
6V3 2 3 S2_IN 7 IN M_DATA6 42 R3 TS_MDI6
C57
C56
C52
C53
C54
C55
M88DS3002 6 3
100n 10V
100n 10V
100n 10V
100n 10V
100n 10V
100n 10V
16V 3V3_S2_VDDD
8 41
9
8
14
13
12
11
10
3V3_S2_VDDA VDDA_2 VDDD_3 7 R2 2 TS_MDI5
U3
16V 9 GNDA_3 M_DATA5 40 R1

8 1 TS_MDI4
C32 10n 47R
VDDA4
TEST1
TEST2
TEST3
VDDA3
XTALN
XTALP
F3 S2_QN 10 QN M_DATA4 39 R1584
3V3_VCC 3V3_S2_VDDA R39 C31 10n
60R 3k3 RES VDDA2 3V3_S2_TUN S2_QP 11 QP VCC_7 38 1V25_S2_VDDI
15 7
10n 16V 47R
16V CAP CK_OUT NC 12 NC6 M_DATA3 37
TS_MDI3
C41
C42
16 6 5 R4 4
100n 10V
100n 10V
C27
10p
10p
13 36
2 1
CKDIV_OPT IP S2_IP 3V3_S2_VDDD VDDD_1 M_DATA2 R3 TS_MDI2
C10
C11
S11 17 5 6 3
NC 14 35
2 1
3V3_S2_TUN 18 RFBYPASS IN 4 S2_IN 1V25_S2_VDDI VCC_1 M_DATA1 7 R2 2 TS_MDI1
U4
S5
E NC 15 34 R1
E
19 RESET VDDA1 3 3V3_S2_TUN 1V25_S2_VDDI VCC_2 M_DATA0 8 1 TS_MDI0
C63 L1 R1583
M88TS2022 16 33
2 1
CN17 20 LNA_IN QN 2 S2_QN NC7 VCC_6 1V25_S2_VDDI
S138 4n7
1
2
2p2 3.3pF
50V 50V TEST QP S2_QP
C62
50V
21 1
2p2
AAGC
SCLT
SDAT
VCC_3
SDA
SCL
VDDD_2
ADDR_SEL1
ADDR_SEL0
VCC_4
VSEL
DISEQC_IN
DISEQC
VCC_5
CKXTAL_27
RESET
C20
S25
R15
4k7
1n 0.5pF
2
1
3V3_S2_VDDD
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
R44
VDAA5
VDD_DIG
SDA
SCL
VDD_REG
AGC
VDDA6
S2_AGC 2k
LNB_OUT 3V3_S2_VDDD
22
23
24
25
26
27
28
1n 1n 1n 1n 16V RESET_S2
C33
10n
2
3V3_S2_TUN 3V3_S2_TUN
C16
C18
C17
C19
2
50V 50V 50V 50V R31 R32
00 SEILDI WRITE:D0H READ:D1H
2
2
1k 1k S2_AGC
R16
4k7
S20
1
KONTROL EDILECEK
DISEQC_OUT
16V 16V
C25
C26
R14
4k7
R13
4k7
1
10n
10n
1V25_S2_VDDI
3V3_S2_VDDD
1V25_S2_VDDI
1V25_S2_VDDI
16V
C28
1
1
10n
2
R22 R38
F 10k SCL_S2_TUN 33R SCL_SYS 3V3_S2_VDDD F
R35 R37
S12
NC 33R SCL_S2_TUN SDA_S2_TUN 33R SDA_SYS
1
R36
33R SDA_S2_TUN
C72
C73
18p
18p
50V 50V 50V 50V PROJECT NAME : 17mb62-1 A3
C23
C24
27p
27p
SCH NAME : TUNER&S2_TUNER&DEMOD SHEET: OF: 8
DRAWN BY : Ulas Dereli 14-03-2011_17:04
1 2 3 4 5 6 7 8 AX M
1 2 3 4 5 6 7 8
PC INPUT
4
3
2
1
4
3
2
1
4
3
2
1
SCART
D2
5V_VCC
1
2
2
2
D1
2
C663
CDA4C16GTH
D3
SCART VIDEO OUTPUT AMPLIFIER 1
100n
CDA4C16GTH
2
R124 F179 10V
CDA4C16GTH
75R
10k
10k
10k
R1479
R1311
R1310
R1265
12V_VCC 220R
5
6
7
8
5
6
7
8
50V
5
6
7
8
1
2
1
1
1
C835
21 1k
220p
A A
SC_CVBS_IN 15
16V
C120
20
100n
R1949
68k
R102
390R
R103
50V SC_CVBS_OUT 1
14 100R VGA_VSNC
19 220p C860
C836 R1243
2 1 Q146
2 13 100R VGA_HSNC
18 BC858B
R1233 3
47p 3
C378
220R 50V 12
17 2
R1249 Q119 SCART_CVBS_OUT
47R BC848B 11
SC_FB 10u
16 1
R1587 R620 10V
2k7
2k7
50V
R1209
R1206
SC_R SC_CVBS_OUT 75R 100R 10
15 220p
2 1
9
33k
R104
14
C833 R1480
R221
100R
2 1 2 1
75R 75R 8
13 R1481 50V
220p
2 75R 1 TX/SDA_SC 7
12 2 1
R1482
SC1
B C832 SC_G 6 B
11
SCART LT1
2 1
75R RX/SCL_SC R1182 5
10 1 2
D178 R1483 4k7
2 1
4
9
2 1
C15V R1187 R1419
1 2
22k 100n SC_PIN8 3 33R VGA_B
8 50V
10V R1408
220p
SC_B C664 2 33R VGA_G
7 2 1
C853 R1409
50V
C831 1 33R VGA_R
6
1
1
1
2 1
75R F205
1
3
4
5
1 2
3n3
R1489 SC_AUD_L_IN CN711
5 600R
SCART_AUD_L_IN
75R
75R
75R
D5
R1516
R1515
R1517
2
2
2
4
F200 R1244
1 2 1 2
100R SC_AUD_L_OUT
2 NUP4004M5
3 C854 600R
SCART_AUD_R_IN
50V C857
2
C 3n3 C
F206
1 2
1 4n7 SAV RCA INPUT
SC_AUD_R_IN 50V
F201 600R R1245 47n
1 2 1 2 30062840
100R SC_AUD_R_OUT 16V
600R JK4
1 2
R1420 C808 16V R1415 SAV_CVBS_IN
C858 K2 T1 C795 62R 6 S9
INDIA OPTION 33R RIN0M CVBS0 33R SC_CVBS_IN
47n YEL 5
C807 R1413
30064869 47n K3 U2 16V C800 62R DVD_CVBS_IN
VGA_R RIN0P CVBS1 33R 1 2 SAV_L
4n7 16V 1UF 4 S42
SC_CVBS_IN 50V R1422 16V 47n
4 C810 J2 U3
WHT 3
YEL 33R GIN0M CVBS2
47n
1 2
16V C806 16V R1412 SAV_R
J3 V2 C799 62R SAV_CVBS_IN 2 S39
SCART_AUD_L_IN VGA_G GIN0P CVBS3 33R RED
3 47n 1
JK7 WHT 47n R1421 R1411
16V C809 H1 T3 16V C794
33R BIN0M CVBS4 33R SC_R
47n 47n 62R
1
2 SCART_AUD_R_IN 16V C802 H3 BIN0P
RED VGA_B 47n
1 SC SVHS opt 1
R1423 C861 TP49
SAV Slim INPUT
75R
75R
R11
300R
H2 T2 1
R1485
R1486
VGA_G 470R SOGIN0 CVBSOUT0 SCART_CVBS_OUT
2
50V 1n 1
2
D TP245 D
L6 HSYNC0 2
VGA_HSNC SAV_CVBS_IN
1
DVD INTERFACE (for 26" to 32") L5 VSYNC0 VCOM U1 6

VGA_VSNC
50V
D171
C5V6
C830
220p
50V
47n
1 3 C856
R1652 TP38
C959 16V
75R CN704 4 1
16V C882 L3
R1650 RIN1M TP250 F203
47n 1 2 3n3
DVD_CVBS_IN 180R 1 2 SAV_L_IN
33R
16V C798 K1 JK3 5
R1530
SC_R RIN1P SAV_L 600R
! 47n 1
3 4 C973 TP247 F202
5 1 2
1 7
16V C885 M3
TP44 1 TP5 10u 30062423FS1 GIN1M
R1624 SAV_R_IN
1 2 1 2
16V 47n 600R C855
DVD_SENSE 100R 5 6 12V_VCC U5
1
47n C797 L2
1
TP43 4A/24VDC SC_G 16V GIN1P SAV_R
1
NC
2
1 2
TP42 7 8 16V MSD9WB9PT-2 3n3
1 S80 C884 N3
TP1 BIN1M
10V
4k7
1
50V
C628
47n
100n
R1616
TP4 1 9 10 DVD_IR DVD_WAKEUP C796
2
TP242
50V M2
2
SC_B 16V 47n BIN1P
R1623 220p R1505
YPbPr Slim INPUT
50V
1
27p
C650
DVD_SPDIF C862 L1 1
E 100R SC_CVBS_IN 470R SOGIN1 R1974 TP13 E
1n 50V RCA_PR
C972 7 33R
M5 HSYNC1
N4 JK1 5
SC_FB VSYNC1
4 1
R1975 TP3
33R RCA_Y
16V C881 R2 3
RIN2M
47n
16V C805 R3 6 1
DVD_IR RCA_PR RIN2P R1976 TP2
47n RCA_PB
2 33R
BC848B
Q157
16V C883 P2
2
2
2
R694 GIN2M
5
6
7
8
2 1
47n
1
3
1
1
1
IR_IN 4k7 3V3_VCC

1
1
1
1
C829
C823
C828
16V C803 P1 1
RCA_Y GIN2P
2
27p 50V
47n
TP50
75R
75R
75R
50V 27p
D4 27p 50V
16V C886 N1
R1619
R1620
R1621
2
BIN2M
2
2
2
47n
16V C804
CDA4C16GTH
N2 BIN2P
RCA_PB
47k
4
3
2
1
R498
47n
1
F P3 F
RCA_Y 470R SOGIN2
C859
DVD_IR_ON/OFF R1494 1n
50V
PROJECT NAME : 17mb62-1 A3
SCH NAME : PERIPHERALs SHEET: OF: 8
1 2 3 4 5 6 7 8 AX M
1 2 3 4 5 6 7 8
U5
MSD9WB9PT-2 DDR18V F187 R1632
3V3_VCC FLH_3.3V
NAND FLASH 3V3_VCC 10k CN141 CI INTERFACE
C10 A_MADR0 60R
J1
R1
M9
J9
E1
A1
G9
G7
G3
G1
E9
C9
C7
C3
C1
A9
1 A_MADR[0] 35 1
A_MADR[1] D21 A_MADR1 NAND_WPz 1 NC1 NC29 48 PCM_CD1_N 36 2 PCM_D3
C868 2
C657 2
C656
A_MADR[2] A9 A_MADR2 22u TS_MDO3 37 3 PCM_D4
1
100n 1
100n
D205
C5V6
E20 A_MADR3 6V3 2 47 TS_MDO4 PCM_D5
VDDL
VDD5
VDD4
VDD3
VDD2
VDD1
A_MADR[3] 10V 10V NC2 NC28 38 4
VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
B9 A_MADR4 TS_MDO5 PCM_D6
VDDQ10
A_MADR[4] 39 5
A_MADR[5] E19 A_MADR5 AA_MDATA0 DQ0 A0 AA_MADR0 3 NC3 NC27 46 R47 TS_MDO6 40 6 PCM_D7
G8 M8 FLH_3.3V
A_MADR[6] C9 A_MADR6 4k7 TS_MDO7 41 7 PCM_CE_N
A 3V3_VCC A
A_MADR[7] F20 A_MADR7 AA_MDATA1 DQ1 A1 AA_MADR1 4 NC4 NC26 45 R48 42 8 PCM_A10
B8 A_MADR8 G2 M3 PCM_OE_N
A_MADR[8] FLH_3.3V R50 4k7 43 9
A_MADR[9] F19 A_MADR9 AA_MDATA2 DQ2 A2 AA_MADR2 5 NC5 I/O7 44 PCM_A7 4k7 PCM_IORD_N 44 10 PCM_A11
D20 A_MADR10 H7 M7 5 R4 4 PCM_IOWR_N PCM_A9
A_MADR[10] 4k7 45 11
A_MADR[11] C8 A_MADR11 AA_MDATA3 DQ3 A3 AA_MADR3 6 NC6 I/O6 43 PCM_A6 R49 TSMISYNC 46 12 PCM_A8
4k7
F21 A_MADR12 H3 N2 6 R3 3 TS_MDI0 PCM_A13
R1496
A_MADR[12] 47 13 R1172
AA_MDATA4 DQ4 A4 AA_MADR4 F_RBZ 7 RB I/O5 42 PCM_A5 TS_MDI1 48 14 PCM_A14 4k7
H1 N8 7 R2 2 3V3_VCC
A_MDATA[0] C13 A_MDATA0 R33 TS_MDI2 49 15 PCM_WE_N R1425
A_MDATA[1] A19 A_MDATA1 AA_MDATA5 DQ5 A5 AA_MADR5 PF_OEZ 33R 8 R I/O4 41 R1 PCM_A4 TS_MDI3 50 16 33R PCM_IRQA_N
A12 A_MDATA2 H9 N3 8 1
A_MDATA[2] 33R VCC_PCMCIA 51 17 VCC_PCMCIA
A_MDATA[3] B19 A_MDATA3 AA_MDATA6 DQ6 A6 AA_MADR6 NAND_CEz 9 E NC25 40 R1398 52 18
A20 A_MDATA4 F1 N7 TS_MDI4 TSMIVALID
A_MDATA[4] 53 19
A_MDATA[5] B12 A_MDATA5 AA_DDR2_DQS0 LQDS A7 AA_MADR7 10 NC7 NC24 39 C967 TS_MDI5 54 20 TSMICLK
C19 A_MDATA6 F7 P2 TS_MDI6 PCM_A12 C966 NC
A_MDATA[6] 55 21
A_MDATA[7] A13 A_MDATA7 AA_DDR2_DQSB0 LQDS_P A8 AA_MADR8 11 NC8 NC23 38 4p7 50V TS_MDI7 56 22 PCM_A7
B14 A_MDATA8 E8 P8 TSMOCLK PCM_A6
A_MDATA[8] R1388 U162 57 23 12p
A_MDATA[9] C18 A_MDATA9 AA_DDR2_DQM0 LDM A9 AA_MADR9 33R 12 VDD1 VDD2 37 R1171 PCM_RST 58 24 PCM_A5
F3 P3 FLH_3.3V FLH_3.3V 50V
A_MDATA[10] C14 A_MDATA10 PF_AD15 8 R1 1 NAND_WPz 4k7 59 25 PCM_A4
NAND512-A 3V3_VCC
A_MDATA[11] A18 A_MDATA11 AA_MDATA7 DQ7 A10 AA_MADR10 PF_ALE 7 R2 2 NAND_ALE 13 VSS1 VSS2 36 R1427 60 26 PCM_A3
B B18 A_MDATA12 F9 M2 3 NAND_CLE PCM_WAIT_N PCM_REG_N PCM_A2 B
A_MDATA[12] PF_CE1Z 6 R3 33R 61 27
A_MDATA[13] B13 A_MDATA13 AA_MDATA8 DQ8 A11 AA_MADR11 PF_CE0Z 5 R4 4 NAND_CEz 14 NC9 NC22 35 TSMOVALID 62 28 PCM_A1
B17 A_MDATA14 C8 P7 TSMOSTART PCM_A0
A_MDATA[14] 63 29
A_MDATA[15] C15 A_MDATA15 AA_MDATA9 DQ9 A12 AA_MADR12 15 NC10 NC21 34 TS_MDO0 64 30 PCM_D0
C2 R2 TS_MDO1 PCM_D1
65 31
A_DQS[0] A16 A_DDR2_DQS0 AA_MDATA10 DQ10 BA0 AA_BADR_BA0 NAND_CLE 16 CL NC20 33 TS_MDO2 66 32 PCM_D2
C16 A_DDR2_DQSB0 D7 L2 PCM_CD2_N
A_DQSB[0] 67 33 4k7 VCC_PCMCIA
A_DQS[1] A15 A_DDR2_DQS1 AA_MDATA11 DQ11 BA1 AA_BADR_BA1 NAND_ALE 17 AL I/O3 32 PCM_A3 R1642 68 34 R1177
U155
B15 A_DDR2_DQSB1 D3 L3 5 R4 4
A_DQSB[1] R34 3V3_VCC 10k
AA_MDATA12 DQ12 RAS_P AA_RASZ PF_WEZ 33R 18 W I/O2 31 PCM_A2
D1 K7 6 R3 3
128 MEGABYTE
A_DQM[0] B16 A_DDR2_DQM0 R1495
Q209
BSH103
HY5PS121621C
A_DQM[1] C17 A_DDR2_DQM1 AA_MDATA13 DQ13 CAS_P AA_CASZ 3k9 19 WP I/O1 30 PCM_A1
D9 L7 FLH_3.3V 7 R2 2
5V_VCC VCC_PCMCIA
A_MCLK C12 A_MCLK AA_MDATA14 DQ14 WE_P AA_WEZ NAND_WPz 20 NC11 I/O0 29 R1 PCM_A0
B1 K3 8 1 2
C654 2
C653 C970
A_MCLKZ B11 A_MCLKZ 33R 22u
1
100n 1
100n
C20 A_MCLKE AA_MDATA15 21 28 R1389
1
2
A_MCLKE DQ15 CS_P NC12 NC19 10V 10V 6V3

B9 L8
B20 A_WEZ AA_DDR2_DQS1 AA_MCLKE 22 27
10V
A_WEZ B7 UDQS CKE K2 NC13 NC18

B10 A_RASZ
100n
C1220
C A_RASZ C
A_CASZ A10 A_CASZ AA_DDR2_DQSB1 UDQS_P CK AA_MCLK 23 NC14 NC17 26 R1951 R1950
C21 A_BADR_BA0 A8 J8
A_BADR[0] 12V_VCC 4k7 10k
A_BADR[1] B21 A_BADR_BA1 AA_DDR2_DQM1 UDM CK_P AA_MCLKZ 24 NC15 NC16 25
D19 A_BADR_BA2 B3 K8
3
A_BADR[2]
A_ODT C11 A_ODT NC1 ODT AA_ODT R1953
TS IN& OUT
A2 K9 P_D0 K21 P18 TS1_D0 2
Q208
PCMDATA[0]/CI_DATA[0] TS1DATA[0] CI_POWER_CTRL 4k7
MVREF F18 MVREF NC2 VSS1 P_D1 L19 PCMDATA[1]/CI_DATA[1] TS1DATA[1] R18 TS1_D1 BC848B TS1_D0 R4 TS_MDI0
E2 A3 P_D2 M19 T18 TS1_D2 1 TS1_D1 5 4 TS_MDI1
PCMDATA[2]/CI_DATA[2] TS1DATA[2] R3
6 3
AA_BADR_BA2 NC3 VSS2 P_D3 T12 PCMDATA[3]/CI_DATA[3] TS1DATA[3] W19 TS1_D3 TS1_D2 R2 TS_MDI2
L1 E3 P_D4 U13 Y21 TS1_D4 TS1_D3 7 2 TS_MDI3
PCMDATA[4]/CI_DATA[4] TS1DATA[4] R1
8 1
R1367 NC4 VSS3 P_D5 V14 PCMDATA[5]/CI_DATA[5] TS1DATA[5] Y19 TS1_D5 33R
A_MDATA14 1 8 AA_MDATA14 R3 J3 P_IOWR_N PCM_IOWR_N P_D6 V12 R21 TS1_D6
R1 R4 PCMDATA[6]/CI_DATA[6] TS1DATA[6] R1383
A_MDATA9 2 7 AA_MDATA9 P_IORD_N5 4 PCM_IORD_N P_D7 V18 T21 TS1_D7 TS1_D4 TS_MDI4
R2 R7 NC5 VSS4 N1 6 R3 3 PCMDATA[7]/CI_DATA[7] TS1DATA[7] R4 4
A_MDATA12 3 R3 6 AA_MDATA12 P_A13 R2 PCM_A13 TS1CLK Y20 TS1_CLK TS1_D5 5 R3 TS_MDI5
A_MDATA11 4 5 AA_MDATA11 P_WE_N 7 2 PCM_WE_N P_A0 R19 W20 TS1_VALID 3 TS_MDI6
R4 R8 NC6 VSS5 P9 8 R1 1 PCMADR[0]/CI_A[0] TS1VALID TS1_D6 6 R2
2
22R 33R P_A1 P19 PCMADR[1]/CI_A[1] TS1SYNC R16 TS1_SYNC TS1_D7 7 R1 TS_MDI7
C969 8 1
R1369 R1385 P_A2 N21 PCMADR[2]/CI_A[2] 12p 33R
A_MDATA5 8 AA_MDATA5 P_WAIT_N PCM_WAIT_N P_A3 N19 50V NC R1382
VREF
VSSDL
VSSQ10
VSSQ9
VSSQ8
VSSQ7
VSSQ6
VSSQ5
VSSQ4
VSSQ3
VSSQ2
VSSQ1
1 R1 PCMADR[3]/CI_A[3]
A_MDATA2 2 R2 7 AA_MDATA2 P_CE_N 5 R4 4 PCM_CE_N P_A4 V20
D 6 R3 3 PCMADR[4]/CI_A[4] R1512 D
A_MDATA0 6 AA_MDATA0 P_OE_N PCM_OE_N P_A5 U20 TS1_CLK TSMICLK
J2
J7
H8
H2
F8
F2
E7
D8
D2
B8
B2
A7
3 R3 PCMADR[5]/CI_A[5] 33R
A_MDATA7 5 AA_MDATA7 P_IRQA_N 7 R2 2 PCM_IRQA_N P_A6 T20
4 R4 DDR18V 1k PCMADR[6]/CI_A[6] R1514
8 R1 1 P_A7 T19 K20 TS0_D0 TS1_VALID TSMIVALID
22R R1364 33R PCMADR[7]/CI_A[7] TS0DATA[0] 33R
R1610 R1399 P_A8 P17 PCMADR[8]/CI_A[8] TS0DATA[1] L20 TS0_D1 R1513
A_MDATA6 1 R1 8 AA_MDATA6 P_A9 N18 PCMADR[9]/CI_A[9] TS0DATA[2] M20 TS0_D2 TS1_SYNC 33R TSMISYNC
A_MDATA1 2 R2 7 AA_MDATA1 C687 P_A10 U17 PCMADR[10]/CI_A[10] TS0DATA[3] T13 TS0_D3
A_MDATA3 6 AA_MDATA3 P_A11 V16 U14 TS0_D4
1k
3 R3 220n PCMADR[11]/CI_A[11] TS0DATA[4]
A_MDATA4 5 AA_MDATA4 P_A12 R20 U12 TS0_D5 TS0_D2 TS_MDO2
R1355
4 R4 10V DDR18V PCMADR[12]/CI_A[12] TS0DATA[5]
P_A13 R17 T11 TS0_D6 TS0_D1 4 R4 5 TS_MDO1
22R C718 C715 C714 C716 C711 C713 C1214 R1393 PCMADR[13]/CI_A[13] TS0DATA[6] 3 R3 6
R1366 220n 220n 220n 220n 220n 220n 220n 33R P_A14 T16 PCMADR[14]/CI_A[14] TS0DATA[7] U18 TS0_D7 TS0_D0 TS_MDO0
A_MDATA13 1 R1 8 AA_MDATA13 PCM_D1 P_RESET V19 U19 TS0_CLK TS0_D3 2 R2 7 TS_MDO3
10V 10V 10V 10V 10V 10V 10V P_D1 5 R4 4 CI_RST TS0CLK 1 R1 8
A_MDATA10 2 R2 7 AA_MDATA10 P_D0 PCM_D0 TS0VALID P20 TS0_VALID C968 33R
A_MDATA8 6 AA_MDATA8 P_D2 6 R3 3 PCM_D2 P_IRQA_N W21 K19 TS0_SYNC
3 R3 PCM_IRQ/CI_INT TS0SYNC 12p R1384
A_MDATA15 5 AA_MDATA15 P_A0 7 R2 2 PCM_A0 P_OE_N U16 TS0_D4 TS_MDO4
4 R4 F181 PCMOEN 50V 30022165 KULLANILDI
8 R1 1 P_IORD_N V17 2 TS0_D5 5 R4 4 TS_MDO5
22R 1V8_VCC DDR18V PCMIOR/CI_RD
60R P_D5 PCM_D5 P_CE_N T17 TS0_D6 6 R3 3 TS_MDO6
R1609 R1603 2 C712 2 C709 2 C710 C782 5 R4 4 PCMCEN/CI_CS U5 10V 7 R2 2
A_MADR11 1 R1 8 AA_MADR11 A_ODT 22R AA_ODT 22u P_D6 PCM_D6 P_WE_N V21 PCMWEN 100n TS0_D7 TS_MDO7
1
100n 1
100n 1
100n 6 R3 3 8 R1 1
A_MADR8 2 R2 7 AA_MADR8 10V 10V 10V 6V3 P_D7 PCM_D7 PCM_CD2_N T14 CI_CD MSD9WB9PT-2 R6 C906 33R
A_MADR6 6 AA_MADR6 P_A6 7 R2 2 PCM_A6 P_WAIT_N M21
3 R3 R1613 PCMWAIT/CI_WACK 100R DIGITAL_IF_P R1390
E A_MADR4 5 AA_MADR4 A_WEZ 1 8 AA_WEZ 8 R1 1 P_IOWR_N P16 W1 E
2
4 R4 R1 33R PCMIOW/CI_WR IP R1402
3V3_VCC
22R A_MCLKE 2 R2 7 AA_MCLKE R1397 P_REG_N N20 PCMREG/CI_CLK IM Y1 TS0_VALID 33R TSMOVALID
180R
A_BADR_BA1 3 6 AA_BADR_BA1 P_A1 PCM_A1

R1977
R3 AVDD_DDR 1k R1401
4k7
A_BADR_BA0 4 5 AA_BADR_BA0 P_D3 5 R4 4 PCM_D3 TS0_SYNC TSMOSTART
R1660
R4 R1365 100R DIGITAL_IF_N 33R
1
MVREF P_D4 6 R3 3 PCM_D4 OVER_CUR_DETECT G21
22R 7 R2 2 GPIO125 R5 C905 R1424
P_A4 PCM_A4 18k R1607 G20 GPIO128 100n TS0_CLK 33R TSMOCLK
8 R1 1 HDMI0_5V
R1332 C683 33R 18k G19 GPIO127
HDMI1_5V 330R 10V
A_DDR2_DQM1 AA_DDR2_DQM1 R1395 AA2 3V3_TUNER
2 1
1k
R1380 22R 220n R1606 VIFP
3V3_VCC
A_BADR_BA2 8 AA_BADR_BA2 P_A2 PCM_A2 Y2
R1356
1 R1 R1313 10V R4 VIFM F8
A_MADR1 2 R2 7 AA_MADR1 A_DDR2_DQM0 AA_DDR2_DQM0 4 PCM_REG_N
22R P_REG_N 5 R3
33k
33k
16V
6 3
C913
A_MADR10 6 AA_MADR10 P_A3 PCM_A3 Y3 1k

R1605
R1604
100n
3 R3 R2 SIFP
R12
4k7
A_MADR5 4 R4 5 AA_MADR5 P_RESET 7 R1 2 PCM_RST AA3

SIFM
1k2
8 1
R1662
22R R1982 33R IF_AGC_MST R344

A_MCLKZ AA_MCLKZ R1392 PF_ALE U10 W5 S81
R1370 22R PF_ALE/GPIO135 IF_AGC 4k7 9k1 1k2 BACKLIGHT_ON/OFF
A_MADR3 8 AA_MADR3 A_MCLK AA_MCLK P_A14 PCM_A14 PF_AD15 T9 W4 NC
3
1 R1 22R PF_AD[15]/GPIO130 RF_AGC 4k7 R1971
A_MADR9 2 R2 7 AA_MADR9 P_A10 5 R4 4 PCM_A10 PF_CE0Z V11
R1983 6 R3 3 PF_CE0Z/GPIO131 R10 0R R1661
A_MADR7 6 AA_MADR7 P_A9 PCM_A9 PF_CE1Z U11 AA4 1 2 2
3 R3 PF_CE1Z/GPIO132 GPIO66 4k7 Q181
A_MADR12 4 R4 5 AA_MADR12 P_A5 7 R2 2 PCM_A5 PF_OEZ U9 Y4 BC848B
PF_OEZ/GPIO133 GPIO67 PANEL_VCC_ON/OFF
1
8 R1 1 PF_WEZ T10 W6
F 22R R1984 33R PF_WEZ/GPIO134 GPIO68 TUN_SCL_MST F
R1368 A_DDR2_DQSB1 22R AA_DDR2_DQSB1 R1394 F_RBZ 33R V9 F_RBZ/GPIO136 GPIO69 Y5 TUN_SDA_MST
A_MADR2 8 AA_MADR2 A_DDR2_DQS1 AA_DDR2_DQS1 P_A7 PCM_A7
2
1
1 R1 22R R1942
A_MADR0 2 R2 7 AA_MADR0 P_A8 5 R4 4 PCM_A8
R1985 6 R3 3
A_CASZ 6 AA_CASZ P_A11 PCM_A11
R8
R9
3 R3
4k7
4k7
4k7
4k7
A_RASZ 5 AA_RASZ P_A12 7 R2 2 PCM_A12

R1618
R1663
4 R4 R1987 PROJECT NAME : 17mb62-1 A3

1
2
A_DDR2_DQSB0 AA_DDR2_DQSB0 8 R1 1
22R 22R 33R
A_DDR2_DQS0 AA_DDR2_DQS0 R1396
22R 3V3_VCC SCH NAME : RAM&NAND&CI SHEET: OF: 8
R1986
1 2 3 4 5 6 7 8 AX M
1 2 3 4 5 6 7 8
HDMI2 CN708
21
R1877 20
1
2
AUDIO OUTPUTs HDMI_0_RX2P 10R 1
R1869 2
2 1
R1900 HDMI_0_RX2N 10R 3
2
MAIN_L 100R DSP_MAIN_L C1197 HDMI_0_RX1P 10R 1 4
SCART_AUDIO_IN_L C1198 10u 10V N5 AUL0 RXA0N E2 HDMI_1_RX0N R1868 5
R1887
L4 F3 2 1
A SCART_AUDIO_IN_R 10u 10V AUR0 RXA0P HDMI_1_RX0P HDMI_0_RX1N 10R 6 A

1
SAV_AUDIO_IN_L 10u 10V R5 AUL1 RXA1N F2 HDMI_1_RX1N HDMI_0_RX0P 10R 2 7
HDMI1_5V
50V
220k
4n7
T6 G3
R1899
C1183
SAV_AUDIO_IN_R 10u 10V C1196 AUR1 RXA1P HDMI_1_RX1P R1867 R1886 8
P6 G2 2 1
C1195 AUL2 RXA2N HDMI_1_RX2N R1909 HDMI_0_RX0N 10R 9
2 1
2
P5 G1
2
1
R1897 AUR2 RXA2P HDMI_1_RX2P 1k HDMI_0_CLKP 10R 10
100R T4 AUL3 RXACKN E3 HDMI_1_CLKN R1879 11
MAIN_R DSP_MAIN_R R1880
T5 E1 2 1
AUR3 RXACKP HDMI_1_CLKP HDMI1_HPD HDMI_0_CLKN 10R 12
4k7
H5
R1896
DDCDA_CK HDMI_1_SCL 3
CEC 13
50V
1
4n7
N6 H6
C1184
HDMI_1_SDA
OPTIONAL
DSP_MAIN_L AUOUTL0 DDCDA_DA R1912 R1888 14
2 1 2 2 1
220k
R6 J6 Q204
R1898
DSP_MAIN_R AUOUTR0 HOTPLUGA 1k HDMI_0_SCL 10R 15
W9 BC848B 2
DSP_SCART_L AUOUTL1 HDMI_0_SDA 10R 1 16
AA9 B2 1
DSP_SCART_R AUOUTR1 RXB0N HDMI_0_RX0N R1885 17
DSP_HP_L Y7 EAR_OUTL RXB0P B1 HDMI_0_RX0P 18
HDMI0_5V
C1168 L119 DSP_HP_R AA7 EAR_OUTR RXB1N C2 HDMI_0_RX1N 2
10R 1 19
HDMI0_HPD
HDMI0_5V
2 1 C1
2
2
HP_L DSP_HP_L RXB1P HDMI_0_RX1P R1878
4u7 U5 RXB2N D2 HDMI_0_RX2N
100u R1910
D1 2 1
2
MSD9WB9PT-2 RXB2P HDMI_0_RX2P 1k
47k
47k
16V U5 A2
R1864
AUVRP RXBCKN HDMI_0_CLKN R1865
1
1
220R
U6 3 C3
R1858
16V 10V 1u AUVAG RXBCKP HDMI_0_CLKP HDMI0_HPD
4k7
U4 J5
R1895
C1170 100n C1174 10u C1199 C1201 C1200 AUVRM DDCDB_CK HDMI_0_SCL 3
1
B K4 HDMI_0_SDA
B
10u 6V3 4u7 DDCDB_DA R1911
K5 2 1 2
10V 10V HOTPLUGB 1k Q203 CN707
BC848B 21
1
RESET_TUNER MODE SELECTION D4 I2S_OUT_MCK
HDMI1 20
R1874
MODE SELECTION D6 1
C1169 L120 DVD_IR_ON/OFF I2S_OUT_SD HDMI_1_RX2P 10R 1
2 1 F4
HP_R DSP_HP_R ANT_CTRL I2S_OUT_WS R1917 R1870 2
4u7 MODE SELECTION F5 H4 2 1 2 1
STBY_INFO I2S_OUT_BCK CEC 10R CEC HDMI_1_RX2N 10R 3
100u
1
16V HDMI_1_RX1P 10R 4
E4 I2S_IN_BCK R1884 5
AMP_MUTE R1871
2 1
220R
C4
R1859
PROTECT I2S_IN_SD HDMI_1_RX1N 10R 6
D3
2
RESET_S2 I2S_IN_WS HDMI_1_RX0P 10R 7
C1171 R1872 R1882 8
2 1
2
2
2
2
1
10u HDMI_1_RX0N 10R 9
10V NC HDMI_1_CLKP 10R 1 10
P4 SPDIFO R1876 11
R1883
4k7
10k
10k
10k
4k7
R17
4k7
10k
4k7
4k7
2 1
R1601
R1838
R1839
R1840
R1892
R1836
R1656
R1614
R223 HDMI_1_CLKN 10R 12
1
1
1
1
2
2 1
2
SC_L_OUT 100R DSP_SCART_L CEC 13
SPDIF_OUT R1873 14
2 1
COMMON
HDMI_1_SCL 10R 15
22k
50V
C 2
C
R1924
C1185
100p
1
HDMI_1_SDA 10R 16
1
R1875 17
R222 HDMI1_5V 18
3V3_VCC
3V3_VCC
2 1
3V3_STBY
3V3_STBY
3V3_STBY
3V3_STBY
2
2 1
SC_R_OUT 100R DSP_SCART_R HDMI1_HPD 10R 19
2
2
R1881
22k
50V
R1925
C1186
100p
PRE-AMP for SCART AUDIO
47k
47k
1
R1863
R1862
1
1
R1916
V+ 220k 12V_VCC
C1182
10u
220k
R1915
10V
C1177 F301
2 1
12V_VCC
C1181 600R
D 100n D
AUDIO INPUTs SC_AUD_R_OUT 16V R1913
C1206 1 2 C1180
10u R1914 33k PL1
2 1
10V 33k SC_AUD_L_OUT

R1902 C1205
47p 10u
SC_AUD_R_IN 10k SCART_AUDIO_IN_R 50V 10V
R1927 47p PL2
1 2 1 OUT1
82k VDD 8 50V
C1203
R1929 U178 R1926
12k
50V
1 2 1 2
R1921
C1187
470p
2 IN1- OUT2 7
SC_R_OUT 20k 82k
TL062 R1928 C1202
1u PL3
6 1 2
6V3 V+ 3 IN1+ IN2- 20k SC_L_OUT

5 1u
R1901 4 VSS IN2+ V+ 6V3
SC_AUD_L_IN 10k SCART_AUDIO_IN_L PL4
12k
50V
R1920
C1188
470p
E E
COAX SPDIF OUT
R1903
SAV_R_IN 10k SAV_AUDIO_IN_R F5
2 1
5V_VCC
600R
2
12k
50V
C15
16V
R1918
C1189
470p
100n
4k7
50V
R1889
3
1
220p NC C1175 R1907

1 2 2 1 2
Q202 SPDIF_OUT
1 2 100R
BC848B
2
1
TP251
R1904 C1179 1
100n
SAV_L_IN 10k SAV_AUDIO_IN_L
50V
2
10V
1
220p
C1178
C1176
4k7
2 NC
R1890
1 2 1 2
1
3 S92
2
2
JK10
12k
50V
1 100n
R1919
C1190
470p
10V
1k
F F
C5V6
D199
R1908
1
1
NC

SCH NAME : AUDIO_IO&HDMI_INPUTs SHEET: OF: 8
1 2 3 4 5 6 7 8 AX M
1 2 3 4 5 6 7 8
AUDIO AMP for 16" to 24" SLIM HEADPHONE OUTPUT

1
VDD_AUDIO
1 1
TP230 TP51
U163 PT2333 30001734 KULLANILDI 2
A HP_L A
F283
6
12V_VCC
60R 1
INP
GNDA
OUTN
VDDA
VDD1
GNDB
INN
SDB
OUTP
TP229
Q160 F285 NC D192 30049510 KULLANILDI 3
MAIN_L HP_R
BC848B
2
2
A1
A2
A3
B1
B2
B3
C1
C2
C3
24V_VCC C1172 C729
C612 R623 60R 4
SK24 10n 10n
4k7 F294 16V 16V
10k
10k
5 JK6
R1854
R1855
L_AUDIO_P_OUT 5V_VCC VDD_AUDIO
1
1
220n 60R
10V 10V 10V 35V 35V
C665 220u 220u 100u 100u 7
2
R817
100R
AMP_EN
L_AUDIO_N_OUT 100n C615 C870 C1208 C1209 R1704
1
10V 680R HP_MUTE 1 TP52

2N7002
W/2.5W opt. W/6W opt. Q192
1
HP_DETECT 4k7 3V3_VCC
4k7
R624
R1149
VDD_AUDIO
3V6 lik zener kullanilmali
D203
C5V6
10V
C617
220n
B B
R1960
680R
2N7002
Q210
VDD_AUDIO
U164 PT2333
INP
GNDA
OUTN
VDDA
VDD1
GNDB
INN
SDB
OUTP
2
BC848B
MAIN_R Q133
A1
A2
A3
B1
B2
B3
C1
C2
C3
1
C602 R613
4k7 CN710
220n R_AUDIO_P_OUT
10V 1
C666 2
AMP_EN
R_AUDIO_N_OUT 10V R_AUDIO_P 2
4k7
1
R818
100R
R614
100n
C R_AUDIO_N 3 C
VDD_AUDIO L_AUDIO_P 4
10V
C608
220n
L_AUDIO_N 5
POP NOISE CIRCUIT

1 2
S87 NC
12V_VCC
1 S86 2
D AUDIO AMP for 26" to 32" 5V_VCC
D
1
F282 F296
D191
VDD_AUDIO 16V
1N4148
1k
L_AUDIO_P
AMP_EN
2
60R 60R 10u

R1941
L_AUDIO_P_OUT
16V
1
2
3
4
1n
50V
3V3_VCC
10u
C942
1 28
C1121
3V3_STBY
SD PVCCL2
VDD_AUDIO
C1032
R1
S85
100R
30022132 KULLANILDI 2 27
R1980
FAULT PVCCL1
8
7 R2
6 R3
5 R4
47k
30050557 KULLANILDI
R1699
100k C1077 C1045

1u 3 26 220n NC NC
R1715 MAIN_L LINP BSPL
30050557 KULLANILDI 6V3 25V
1
VDD_AUDIO 100k
15k
10k
10k
R616
C1075 1u 4 25
R1712
R1309
R1714 LINN OUTPL Q195
50V
1
10n
NC 6V3
C1218
CONNECT TO DSP_M_L GND F299 BC858B 2
5 24
2
NC100k GAIN0 PGND1 L_AUDIO_N_OUT L_AUDIO_N AMP_EN BC848B

3
60R NC 3
R1717 C1058 Q186
10k C1123 6 GAIN1 OUTNL 23 100n
VDD_AUDIO R1702
1n
50V
3k9
2 2 1
C943
100k
R1711
R1701
R1716 100R U168 C1046 16V 10k

1
E 1 8 ANALOG VCC 7 22 E
2
R1 AVCC BSNL 25V 3

1u 1
50V TPA3110D2 220n R_AUDIO_N_OUT F298 R1684

1 2 2
7 8 21 C1044 BC848B
2 R2 AGND BSNR R_AUDIO_N AMP_MUTE 10k Q185
100k
C1074 25V 60R

R1718
VDD_AUDIO 220n
1
3 R3 6 1u 9 20 1
GVDD OUTNR
1
2
3
4
1n
50V
C944
25V
R1687 R1696
10 19
R1
R2
R3
R4
4 R4 5 10k 10k PLIMIT PGND2
100R
R1981
R1741 30050557 KULLANILDI
1u R_AUDIO_P_OUT
8
7
6
5
C1073 C1076 11 RINN OUTPR 18
1u
30050557 KULLANILDI
6V3
25V 12 17 C1043 220n
RINP BSPR
25V
6V3
50V
10n
13 16
C1219
MAIN_R 1u NC PVCCR1 F297
C1078 F281 R_AUDIO_P
14 PBTL PVCCR2 15 VDD_AUDIO 60R
CONNECT TO DSP_M_R GND
60R
1n
50V
C945
16V
10u
C1122
F F

SCH NAME : AUDIO_AMP&HP_AMP SHEET: OF: 8
1 2 3 4 5 6 7 8 AX M
1 2 3 4 5 6 7 8
10k
R1835
10k
R1833 TX_B_0_N 30
PCM_CD1_N
15.6" LVDS OPTION TWISTED PAIR LVDS OPTION
J21 AA19 TX_B_0_P TX_B_0_P
TP21
R1615 PWM0 LVB0P 29
2 1
3V3_VCC J20 AA20 TX_B_0_N
CN3
4k7 PWM1 LVB0M KEYBOARD_ONBOARD 2
C630
1
J19 AA18 TX_B_1_P TX_A_0_N
CN136 TX_B_1_N
BACKLIGHT_DIM PWM2 LVB1P 100n 1 2 PANEL_VCC 28
1
W18
2
3V3_STBY LVB1M TX_B_1_N R793 F248 10V TX_B_0_N 1 2
1 2
A W17 TX_B_2_P 1 2
TX_A_0_P 1
TX_B_1_P
A
LVB2P 47R KEYBOARD 3 4 TP23 27
LVB2M Y18 TX_B_2_N TOUCH_PAD_OPTION F249 600R TX_B_0_P 3 4
4k7
1 2
W16 S76 1
R1528
LVBCKP TX_B_CLK_P 3V3_STBY 5 6 TP19 TX_B_2_N 26
1
KEYBOARD B4 SAR0 LVBCKM Y17 TX_B_CLK_N 600R TX_B_1_N 5 6
C5 AA16 1
DVD_SENSE SAR1 LVB3P TX_B_3_P R1937 TX_A_1_N 7 8 PIN_01 TP17 TX_B_2_P 25
V3 Y16 1 2
SC_PIN8 SAR2 LVB3M TX_B_3_N MECH_SWITCH 47R SCL_SYS TX_B_1_P 7 8
AA15 1
R1 LVB4P TX_B_4_P R1936 TX_A_1_P 9 10 MEGA_DCR_OUT TP16 24
W15 1 2
2 1
3V3_STBY 4k7 LVB4M TX_B_4_N 47R SDA_SYS TX_B_2_N 9 10
1 S26 2
1 1
NC 11 12 DIMMING TP18 TP9 TX_B_CLK_N 23
B6 W14
1
2
3
4
5
6
DVD_WAKEUP GPIO12 LVA0P TX_A_0_P PIN_02 TX_B_2_P 11 12 TX_B_4_N
C7 Y15 1
CN709
SPI_CSN_1 SCZ LVA0M TX_A_0_N TX_A_2_N 13 14 PIN_03 TP8 TX_B_CLK_P 22
B5 SCK LVA1P W13 TX_A_1_P 13 14 TX_B_4_P
SPI_SCK
1 S31 2
C6 Y14 1
SPI_SDI_1 SDI LVA1M TX_A_1_N TX_A_2_P 15 16 BACKLIGHT_ON/OFF TP20 TX_B_3_N 21
A6 SDO LVA2P AA13 TX_A_2_P EXT KEYPAD PIN_04 TX_B_CLK_N 15 16
SPI_SDO
1 2
A7 Y13 S28 1
FLASH_WPN GPIO14 LVA2M TX_A_2_N TX_A_CLK_N 17 18 12V_VCC TP22 TX_B_3_P 20
LVACKP AA12 TX_A_CLK_P PIN_05 TX_B_CLK_P 17 18 PANEL_VCC
1 S27 2
W12 1
LVACKM TX_A_CLK_N TX_A_CLK_P 19 20 12V_VCC TP24 TX_A_0_N 19
3V3_VCC LVA3P W11 TX_A_3_P 15.6 LVDS OPTION TX_B_3_N 19 20
K6 Y12 1
PIN12,16,18,20 JUMPER TAKILACAK
1
1
B RX/SCL_SC DDCA_CK/UART0_RX LVA3M TX_A_3_N OPTION1 TP26 PIN_01 TX_A_0_P 18 B
TX/SDA_SC M6 DDCA_DA/UART0_TX LVA4P W10 TX_A_4_P TX_B_3_P 21 22
1 2
Y11 S57 & S10&S4= 0R 1
S57
LVA4M TX_A_4_N TP28 17
4k7
4k7
U5
R1524
R1527
TX_A_0_N 23 24
2
2
PIN 6 LVDS KABLOSUNDA n.C YAPILMALI 1 NC
2 1
MSD9WB9PT-2 R1959 TP25 10k 3V3_VCC TX_A_1_N 16
H19 1 2
SCL_SYS DDCR_CK 4 4k7 3V3_STBY TX_A_0_P 25 26 R1266
SDA_SYS H20 DDCR_DA GPIO137 Y9 ONBOARD KEYBOARD NC 10k 2 1
TX_A_1_P 15
HP_MUTE 3V3_VCC
SPDIFI/GPIO139 W7 27 28 R1301
DVD_SPDIF
AA10 1
HP_DETECT MEGA_DCR_OUT
TP10
GPIO141 100R TP30 14
GPIO143 Y10 R1954 CI_POWER_CTRL TX_A_1_N 29 30
R1543
50V
1 2
C952
33p
1
IR_IN A4 IRIN R1952 TX_A_2_N 13
100R KEYBOARD_ONBOARD
1 2
1 2
S10
4k7 3V3_VCC TX_A_1_P 31 32
TX_A_2_P 12
1
TP27 33 34 PIN_02
D204
B5V1
Y6 B7 1
STBY_ON/OFF_NOT TX_A_CLK_N
1M
XIN GPIO10 TP29 11
1 2
AA6 E6 S4
R1533
TX_A_2_N
X2
XOUT GPIO11 LED1 35 36
F6 1
24MHz
PIN_03 TX_A_CLK_P
2k
R7
GPIO7 LED2 TP31 10
R23
R45
S38
10k
470R
1
1
1
TX_A_2_P 37 38 PIN_04
1
TP34 PIN_05 TX_A_3_N 9
E5
1
2 1
RESET 100R HWRESET
+ - TX_A_CLK_N 39 40
50V
4k7
4k7
4k7
C C
C951
33p
R1617
R1672
R1671
1
2
2
R1666 TX_A_3_P 8
2
2
2
4
3
C
T
2
1
TX_A_CLK_P 41 42 OPTION1
16V
S35
10n
1
C1215
TP33 7
S37
S36
S34
2
B3 USB0_DP TX_A_3_N 43 44
SW5 OPTION2
2
1
1
2 1
A3 1
S15
USB0_DM E2 E1 TP35 6
2 1
W8 S98
USB_DP USB1_DP TX_A_3_P 45 46
Y8 1 1
3V3_STBY
3V3_STBY
3V3_STBY
USB_DM USB1_DM TP32 TP6 PANEL_VCC 2 1
5
J9 TX_A_4_P S32
G4
G3
G2
G1
GND0 47 48
H9 1
2 1
GND1 TP7 4
S33
1
MEGA_DCR_IN 49 50 TX_A_4_N
PANEL_VCC 3
3 BUTTONS KEYBOARD OPTION
S6
MEGA_DCR_OUT
PANEL_VCC
2
2
19" TO 22" DOUBLE LVDS FFC OPTIONS
1
LED SOCKET
CN139
1
2
3
4
5
1
RESET
CN703
D TP56 D
R1668 TP57 5V_STBY
1
3V3_STBY 1k TP54 1 F259
1 2
TP53 1
IR_IN
C949 600R
16V
150R
C1016
100n
R1940
1 2
TP55 1
6V3
27p
22u
C1031
Q170 50V
RESET 3
BC848B
2
R1567 3
2
2
2
C1015 10k R1568
2
100n Q171 10k
SINGLE LVDS FFC OPTIONS
10k
1
10k
10k
1
D189
220R
BC848B
R1667
R1563
R1571
R1562
1N4148
10V
OPTION2
PANEL_VCC
PANEL_VCC
OPTION1
1
1
220R
R1572
MEGA_DCR_IN
1
MEGA_DCR_OUT
3 3
2
1
2
2
1
Q174
2 2
LED2
2
PANEL_VCC
LED1
Q173
PANEL_VCC
S56
10k
S19
S30
BC858B 1 1 BC858B
R1280
R1300
S58
1
2
1
1
2
2
2
1
1
OPTION4
OPTION3
NC
NC 10k
E E
1
2
PANEL_VCC
OPTION5
10k
10k
220R
220R
R1569
R1570
R1296
R1297
10k
S55
1
1
2
2
R1295
2
2
2
2
1
2
1
NC
NC
USB INTERFACE 5V_STBY

PANEL_VCC
NC
S3
TX_A_3_P
TX_A_3_N
TX_A_CLK_P
TX_A_CLK_N
TX_A_2_P
TX_A_2_N
TX_A_1_P
TX_A_1_N
TX_A_0_P
TX_A_0_N
S99
S14
S13
10k
S94
R1274
R844 PANEL VCC = 5V/12V

1
1
1
1
2
6 1 1 2
4 IO4 IO1 10R USB_DP
NC
U145
3 5 VDD GND 2
USB
AZ099-04S R845
4 3 1 2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
2 IO3 IO2 10R USB_DM

PANEL_VCC
CN138
TP14
CN128 1
C610 3V3_STBY
SERIAL FLASH D165
1
PANEL_VCC = 5V/12V
10u 3V3_STBY
10V
2
C658 1N5819
1
2
3
4
5
6
7
8
9
TP15
TP40
TP11
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
100n
4k7
4k7
U158 1
R1357
R1358
10V
CN137
4k7
F F
1
1
1
5 MX25L512
R1183
5V_VCC 1 VIN
VOUT R1967
1 2 1
SPI_CSN_1
TP12
U8 100R CS# VCC 8
1 2 2
2 GND SPI_SDO 100RR1968 SO HOLD# 7 R1248
1 2 1 2
1
FPF2124 R46 3 WP# SCLK 6

FLASH_WPN 100R R1970 100R SPI_SCK
1 2
1
3V3_VCC 4k7 3 ON ISET 4 560R R1969 4 GND SI 5 PROJECT NAME : A3

100R SPI_SDI_1 17mb62-1
R1198
SCH NAME : GPIOs&USB&LVDS_OUT SHEET: OF: 8
TP41

1 2 3 4 5 6 7 8 AX M
1 2 3 4 5 6 7 8
F274
F277
2V5_VCC AVDD_2V5_PGA
1V2_VCC VDDC_1V2 60R
60R C1007
C1081 C997 C1005 C1070
L9
M9
N9
P9
R9
W2
W3
V4
V5
V6
100n
D10
E10
F10
G10
H10
J10
K10
L10
M10
N10
P10
R10
D11
E11
F11
G11
H11
J11
K11
L11
M11
N11
P11
R11
D12
E12
F12
G12
H12
J12
K12
L12
M12
N12
P12
R12
D13
E13
F13
G13
H13
J13
K13
L13
M13
N13
P13
R13
D14
E14
L14
M14
N14
P14
R14
D15
K15
L15
M15
N15
P15
R15
D16
K16
L16
M16
D17
K17
L17
M17
K18
L18
M18
10u 100n 100n 100n 16V
6V3 16V 16V 16V
AVSS_PGA
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
GND19
GND20
GND21
GND22
GND23
GND24
GND25
GND26
GND27
GND28
GND29
GND30
GND31
GND32
GND33
GND34
GND35
GND36
GND37
GND38
GND39
GND40
GND41
GND42
GND43
GND44
GND45
GND46
GND47
GND48
GND49
GND50
GND51
GND52
GND53
GND54
GND55
GND56
GND57
GND58
GND59
GND60
GND61
GND62
GND63
GND64
GND65
GND66
GND67
GND68
GND69
GND70
GND71
GND72
GND73
GND74
GND75
GND76
GND77
GND78
GND79
GND80
GND81
GND82
GND83
GND84
GND85
GND86 D9
GND87 D18
F271
3V3_STBY AVDD_3V3
1k
A A
F295
60R C1030 C1024 C1025 C1022
6
10u 100n 100n 100n
6V3 16V 16V 16V 60R 402 ferrite secilecek
U5
F305
F272 2V5_VCC AVDD2V5_ADC
1V8_VCC AVDD_DDR C1028 1k C1009 C1223
60R
VDDC0
VDDC1
VDDC2
VDDC3
VDDC4
VDDC5
VDDC6
DVDD_DDR
AVDD_126
AVDD_ADC25_0
AVDD_ADC25_1
AVDD_REF25_0
AVDD_REF25_1
AVDD_AU25
AVDD_MOD25_0
AVDD_MOD25_1
AVDD_PGA25
PGA_VCOM
AVDD_ALIVE_0
AVDD_ALIVE_1
AVDD_ALIVE_2
AVDD_DMPLL
AVDD_CVBS33_0
AVDD_CVBS33_1
AVDD_AU33
AVDD_EAR33
VDDP0
VDDP1
AVDD_LPLL
AVDD_DDR_0
AVDD_DDR_1
AVDD_DDR_2
AVDD_DDR_3
AVDD_DDR_4
BYPASS
10u 100n 100n
MSD9WB9PT-2
C990 100n 100n
22u 6V3 16V 16V
6V3 16V 16V
N7
N8
P7
P8
T8
R7
R8
U8
V8
E8
F8
G8
G9
E9
F9
J8
H8
K9
F306
H15
H16
H17
J14
J15
J16
J17
H14
K14
G16
G17
G15
E15
E16
E17
F16
F17
C1004 C1001 AVDD2V5_REF
1k C1008 C1224 1u
100n 100n
16V 16V 6V3
F270 F307
3V3_VCC VDD_3V3 AVDD2V5_AUD C974
60R C1029 C1014 1k C1221
AVSS_PGA
10u 100n 100n
VDD_3V3
VDDC_1V2
AVDD_DDR
6V3 16V F308 16V
AVDD_3V3
AVDD2V5_MOD
AVDD2V5_ADC
AVDD2V5_REF
AVDD2V5_AUD
AVDD2V5_MOD
B B
AVDD_2V5_PGA
1k C1222 C1225
100n 100n
16V 16V
R1649
2 1
33k 24V_VCC
W/PW26 W/IPS16
2
S7 S8
1 2
3V3_STBY 5V_STBY PW04 LOW POWER Option 10k
U1 AP211H 3 R1631
D185
LM1117
BAW56
16" to 24" POWER SOCKET S24 S22 SHORT CCT PROTECTION R1727
1
3 2 1
PIN_7_8 12V_STBY PIN_11 12V_VCC PIN_7_8 IN OUT 2 3V3_STBY 33k 12V_VCC
20 19 ADJ VOUT R1750
W/IPS16 W/PW26
22k
18 17 3V3_VCC 1 4
5V_VCC 3V3_STBY
2
3V3_VCC
16 15 R1635
W/IPS16 2 1
10k 3
S1
D186
BAW56
PIN_7_8 14 13 PIN_7_8 5V_VCC

1
C 5V_VCC C
12 11 PIN_9 W/IPS16
PIN_10 S23 S21 S29
PIN_9 5V_STBY PIN_10 5V_VCC PIN_7_8 5V_STBY 3V3_TUNER
PROTECT
NC
2
PIN_11 1
TP202
12V_VCC 10 9
W/PW26
R1636 ADAPTOR OVER VOLTAGE PROTECTION
1 2
1
Q180
8 7 DIMMING 2 10k 3 R40
BC858B
D184
BAW56
20k 12V_STBY
3
1
3
6 5 BACKLIGHT_ON/OFF C971 2
Q178 R21
100n R1638 R20 10k
1 2 1 2 1 2
4 3 STBY_ON/OFF
DIMMING CIRCUIT 10V 10k 10k 3V3_STBY
3V3_VCC
3
2
1
BC848B U7 VCC
3
2 1 SOFT_SW Q211
LM809 RST GND
10k
2 2 1
R1639
2
CN706 1
R1973
1
R1158 100R
1 2 Q193 1
BC848B
2
1k
MEGA_DCR_OUT 4k7 BC858B
R1221
R1761
1
3
C839 100R
NC 8 1
1 2 R1
S17
D 220p 2 D
3
7 R2 R1679
50V
R1165 100R DIMMING LNB CIRCUIT
2
S16 1 2 Q189 3
BACKLIGHT_DIM 4k7
6 R3 1N4001
BC848B
1 4
C838 3
5 R4 C70 35V C69 D7
S18
MEGA_DCR_IN 1 2 R1166 C774 470n 100u 1u
1 2 2
Q188 10u 25V C65 50V
220p 4k7
26" to 32" POWER SOCKET NC BC848B 10V
50V 1
C840
R42
2k2
4k7
R41
A/D DIMMING SELECTION

1 2
D8
CN1
SK24
NC
R2
50V
1 2
220p
15n C68
2 1 3V3_VCC L2 27 V_UP VO_TX 22

4k7 50V
12V_VCC 4 LX EXTM 13
4 3 24V_VCC F302 10u 19 VCC VO_RX 21 LNB_OUT
STBY_INFO
1 2 18 11
3V3_VCC 12V_VCC VCC_L PDC C12
6 5 60R SDA_SYS 6 SDA DSQIN 12 220n
C6
22u
16V
C5
22u
16V
9
D6
F289 C64 SCL_SYS SCL 25V

1 2 14 1
TP213
1N5819
8 7 C13 TTX NC_1

60R PANEL SUPPLY SWITCH 220n 29 RSV_1 NC_2 2
35V
E E
1
30 3
100u
5V_VCC 10 9 3V3_VCC F288 25V RSV_2 NC_3

1 2 7
5V_VCC PANEL_VCC NC_4
R19
10k
10k
R18
12 11 60R U6 NC_5 8
4
5
6
F290 NC_6 16
1 2
LNBH23L
C7
17
2
PIN_7_8
16V
PIN_7_8 14 13 12V_VCC NC_7
22u
DISEQC_OUT
60R NC_8 23
PIN_9 24
Q199
PIN_10 16 15 NC_9
33k
25
R1734
FDC642P
NC_10
1u
25V
1
26
C1128
12V_VCC 18 17 PIN_11 3V3_STBY NC_11
3
2
1
3V3_VCC
NC_12 31
R1725
1 2
3V3_VCC
32
2
DIMMING
ADDR
BYP
I_SEL
P_GND
A_GND
20 19 47R NC_13
5
10
15
28
20
22 21 BACKLIGHT_ON/OFF
4k7
R1676
2
R1677 3V3_VCC
22k
1
1 2
R1749
24 23 STBY_ON/OFF F250 4k7 STBY_ON/OFF

1
MECH_SWITCH 3 C14
4k7
15k
R43
600R
R1678
3
26 25 R1748 220n
1
NC 1 2 2
STBY_ON/OFF_NOT Q191 25V
S95 R1693 4k7
1 S82 2 2 1 2 BC848B
28 27 Q190
10k
1
F BC848B F
3
2
C1042 1
W/IPS16
R1685 100n 1
2 1 2
PANEL_VCC_ON/OFF
Q19410V
10k
BC848B
1
SOFT_SW
SCH NAME : POWER_1&LNBP SHEET: OF: 8
1 2 3 4 5 6 7 8 AX M
1 2 3 4 5 6 7 8
ADAPTER SOCKET FS3
W_ADAPTER 1 2
12V_STBY
5 7A/32VDC
TP239
4 FS2
! POWER BLOCK DIAGRAM
1 2
1
12V_INV
7A/32VDC
4
5
6
JK9 3 SW1
A 12V_STBY 12V_VCC A
2
W/ADAPTOR DC-DC4
TP243
Q1
1
1
DC 1V2_VCC
FDC604P
1 C1038
TP36 100n
SW2 5V_VCC DC-DC1 DC
3
2
1
DC/DC1 U174
C1112 2
5V_STBY
4
5
6
MP1583 16V DC 5V_STBY
10n 1
1 8 DC
1
F287 0R 16V BS SS R1972
1 2 2 7 2 1 SW2
2
12V_STBY IN EN 10k 12V_STBYR1709
60R 3 6 1 2 5V_VCC
1 2
Q198
C1091 C1092 C1037 SW COMP R1690 3k9 25V
4
5
6
33k
1
4 5 1 2 LDO2
C1047
220n
R1729
FDC604P
22u 22u 100n GND FB 10k
2
5n6 DC-DC2 3V3_TUN
16V 16V 16V R1722
3
2
1
50V 1 2 LDO
C1130 47R
Q2
NC DC 3V3_STBY
DC
FDC642P
CCFL INVERTER SOCKET
SW3
1k
3
2
1
33k
3V3_VCC
R1737
R1728
CN705
3
L118
1 2
B DC-DC3 B
1 12V_INV 5V_STBY R1698
2 1 2
1
15u Q184
2
TP37 C1102 C1103 MOSFET_CONTROL 10k
BC848B DC 1V8_VCC
2 22u 22u
1 DC
16V 16V
D197
SS33
3
1
1 TP39 LDO1
4
INVERTER SOCKET W/ADAPTER 2V5_VCC
LDO
5 DIMMING
6 BACKLIGHT_ON/OFF
1
1
TP45
TP46
C
W/ADAPTOR & W/IPS16&17&60&PW25&PW06 C
FS5 FS4
SW1 1 2
DC/DC2 SW3 1 2
12V_VCC 30068939 3V3_VCC
C1036
100n
10V
TP238
12V_STBY 7A/32VDC C1114 2
3V3_STBY 7A/32VDC
4
5
6
4
5
6
2
1
1 BS SS 8
4A 10n 1
1
2A
1
1
F286 16V U23 R1689

1 2 2 2 1
2
IN EN 7 12V_STBY 2
12V_STBY 10k
60R C1129
Q200
Q197
C1089 C1090 MP1484 R1708
25V
33k
25V
33k
1
1
C1049
220n
R1732
FDC642P
C1048
220n
R1731
FDC604P
1 2
22u 22u SW COMP 6 5k6
2
2
16V 16V 3N3 R3

R1724 R1723
3
2
1
3
2
1
1 2 4 5 5n6 1 2
47R GND FB 50V 6k8 47R
1
for 3v3 Panel Sup.
33k
10k
R1733
R1730
L123 NC
22k
2
1 2
R1735
TP244
1
2
3
4
15u
3 3
1
L16
R1
R2
R3
R4
R1692 R1697
2 1 2 2 1 2
100R
Q182 Q183
R1978
MOSFET_CONTROL 10k 3V3_STBY MOSFET_CONTROL 10k
8
7
6
5
D BC848B 10u BC848B D
C1096 C1097
1 1
22u 22u
6V3 6V3
50V
10n
C1216
COMMON DC/DC4
E
DC/DC3 E
R1738 R1769
LDO1 30068939
C1035
100n
10V
U175 3V3_STBY 20k 100k

LDO2
2
C1113
2
1
LM1117 1 8
F303 10n BS SS
1 2 1
3 IN OUT 2 C1107 R1770 F273 16V U2 AP211H
5V_VCC 2V5_VCC U173 R1691
1 1 2 2 2 1 LM1117
60R
1
2
GND VOUT C1033
6 EN FB 150k 12V_VCC IN EN 7 10k 12V_VCC F300
1 2
60R 3V3_TUNER
TP241
22u U176 150K C1085 C1084 MP1484 C1131 R1710 5V_VCC
3 IN OUT 2
6V3
1u
2
1 4 10UH 3 1 2 330R
C1080
100u
6V3 5 VIN GND 2 22u 22u SW COMP 6 1 2 3k9 C1212 2
6V3 ADJ VOUT C1034
100R
1
R1721
F291 MP2012 L116 16V 16V R1686 22u 100n
6V3
1
1 2
5n6 1
22u
4 5 1 4
C1079
3V3_VCC 4 PVIN SW 3 1V8_VCC GND FB 50V 39k 6V3 10V

60R 10u
1 2
100R R1768
R1720 C1093 C1094 C1101 C1098 1k
22u 22u 22u 22u 1 100R 2
6V3 6V3 6V3 6V3 R25

1
TP231
22k
NC
R1736
S89
1
STBY_ON/OFF L117
1
2
3
4
R24
100R
1V2_VCC
2
10u
R1
R2
R3
R4
S83 C1087 C1086

100R
R1979
STBY_ON/OFF_NOT MOSFET_CONTROL 22u 22u

8
7
6
5
F 6V3 6V3
F
50V
10n
C1217

SCH NAME : POWER_2 SHEET: OF: 8
1 2 3 4 5 6 7 8 AX M

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Colour Television Chassis

See table of contents on page 3

2012 TP Vision Netherlands B.V.

Manual xxxx xxx xxxx.1

2. Technical Specifications and Connections

Table 2-1 Described Model numbers

CTN Styling Published in:

Directions for Use

You can download this information from the following websites:

The 17MB62 mainboard is driven by a MStar SOC. This IC is capable of handling

Supported peripherals are:

1 RF input VHF I, VHF III, UHF @ 75 (Common)

1.1 General Block Diagram

OVER_CUR_DETECT pin is a monitor for short circuit in antenna. OVER_CUR_DETECT is low

2.1 General description of the Sony RE216 tuner

Full frequency range from 47 to 870 Mhz

3.3.1 Electrical Characteristics

VDD = 3.0 V,VI= 0 V,AV = 6 V/V 1.2 3.0

Operation current lop VDD = 3.6 V,no load 3.0 4.2 mA

VDD = 3.0 V,no load 2.5 3.5

VDD = 5.5 V,no load 290

VDD = 5.0V 2.85

VDD = 5.0 V 2.25

VDD = 5.0 V 1.39

VDD = 5.0 V,PO = 1W,RL = 8 Q, f = 1kHz 0.15

ZF Feedback resistor 120 150 180 kQ

4 Audio amplifier stage with TPA3113 (U168)

4.1 General Description

4.2 Absolute Ratings

4.2.1 Electrical Characteristics

p Power supply for right channel H-bridge. Right channelandleft

For IPS16, IPS17, IPS60 below blocks must work properly.

For adopter case also below blocks are necessary.

---MB62 Power Management with Adaptor---

---MB62 Power Management with PW25/ PW26---

---MB62 Power Management with PW03/PW04/PW07---

MSD9WB9PT-2 (Main IC) (U5)

The MSD9WB9PT-2 is composed of several modules:

High Performance Micro-processor

o CVBS Video Output

CI Interface Power Switch:

USB circuit has 3 main parts

JEDEC standard VDD = 1.8V 0.1V Power Supply

10.1 LVDS sockets block diagram

10.2 Panel supply switch circuit

11.1 General Description

11.3 Absolute maximum ratings

12.1 General Description

The NAND512R3A2C, NAND512R4A2C, and NAND512W3A2C have a density of 512

To extend the lifetime of NAND flash devices it is strongly recommended to implement an

Supply voltage: 1.8 V, 3 V

Serial number (unique ID) option

RoHS compliant packages

Complete interface between LNB and IC bus

Selectable output current limit by external resistor

Compliant with main satellite receivers output voltage specification

Auxiliary modulation input (EXTM pin) facilitates DiSEqC 1.X encoding

Accurate built-in 22 kHz tone generator suits widely accepted standards

Overload and over-temperature internal protections with IC diagnostic bits

LNB short circuit dynamic protection

+/- 4 kV ESD tolerant on output power pins

14 Advanced DVB-S/S2 demodulator M88DS3002 (U3)

The M88DS3002 is an advanced single-chip demodulator for digital satellite television