MUHAMAD NAZREN BIN MOHD ZAIDI 56211115004

NURUL NADHIRA BINTI HAMZAH 56211115080

LAB REPORT 2
TITLE : LOGIC GATES

1.0 INTRODUCTION

1.1 WHAT IS LOGIC GATES

A logic gate is an elementary building block of a digital circuit. Most
logic gates have two inputs and one output. At any given moment, every
terminal is in one of the two binary conditions low (0) or high (1), represented
by different voltage levels. The logic state of a terminal can, and generally
does, change often, as the circuit processes data. In most logic gates, the low
state is approximately zero volts (0 V), while the high state is approximately
five volts positive (+5 V).

1.2 LIST OF LOGIC GATES

There are six basic logic gates: AND, OR, XOR, NAND, NOR, and XNOR
and inverter.
i) AND gate

The AND gate is so named because, if 0 is called "false" and 1

is called "true," the gate acts in the same way as the logical "and"
operator

ii) OR gate

The OR gate gets its name from the fact that it behaves after the
fashion of the logical inclusive "or."

iii) XOR gate

The XOR ( exclusive-OR ) gate acts in the same way as the

logical "either/or."
iv) NAND gate

The NAND gate operates as an AND gate followed by a NOT

gate. It acts in the manner of the logical operation "and" followed by
negation.

v) NOR gate

The NOR gate is a combination OR gate followed by an

inverter.

vi) XNOR gate

The XNOR (exclusive-NOR) gate is a combination XOR gate

followed by an inverter..

vii) Inverter

A logical inverter, sometimes called a NOT gate to differentiate

it from other types of electronic inverter devices, has only one input.
2.0 RESULT
2.1 PICTURE OF LIVE WIRE
Part A

Part B
 2.2 EXPERIMENT DATA SHEET

Input Output
LED (On/Off) Level ( 1/0 )
0 On 1
1 Off 0

Table 2.2.1 Truth table of NOT gate

Input Output
A B LED (On/Off) Level ( 1/0 )
0 0 Off 0
0 1 On 1
1 0 On 1
1 1 On 1

Table 2.2.2 Truth table of OR gate

Input Output
A B LED (On/Off) Level ( 1/0 )
0 0 Off 0
0 1 Off 0
1 0 Off 0
1 1 On 1

Table 2.2.3 Truth table of AND gate

INPUTS OUTPUTS LED (ON = 1 / OFF = 0)

W X Y Z
0 0 0 0 1 1 0
0 0 1 0 0 1 0
0 1 0 1 1 0 0
0 1 1 1 1 0 0
1 0 0 0 1 1 0
1 0 1 0 0 1 0
1 1 0 0 1 1 0
1 1 1 0 1 1 0

Table 2.2.4 Circuit Operation

3.0 DISCUSSION

i) AND gate
The output is "true" when both inputs are "true." Otherwise, the output is "false."

A B Z
0 0 0
0 1 0
1 0 0
1 1 1

ii) OR gate
The output is "true" if either or both of the inputs are "true." If both inputs are
"false," then the output is "false."

A B Z
0 0 0
0 1 1
1 0 1
1 1 1

iii) XOR gate

The output is "true" if either, but not both, of the inputs are "true." The output is
"false" if both inputs are "false" or if both inputs are "true." Another way of looking at
this circuit is to observe that the output is 1 if the inputs are different, but 0 if the
inputs are the same.

A B Z
0 0 0
0 1 1
1 0 1
1 1 0
iv) NAND gate
The output is "false" if both inputs are "true." Otherwise, the output is "true."

A B Z
0 0 1
0 1 1
1 0 1
1 1 0

v) NOR gate
Its output is "true" if both inputs are "false." Otherwise, the output is "false."

A B Z
0 0 1
0 1 0
1 0 0
1 1 0

vi) XNOR gate

Its output is "true" if the inputs are the same, and "false" if the inputs are different.

A B Z
0 0 1
0 1 0
1 0 0
1 1 1

vii) Inverter
Inverter has only one input. It reverses the logic state.

A Z
1 0
0 1
MUHAMAD NAZREN BIN MOHD ZAIDI 56211115004
NURUL NADHIRA BINTI HAMZAH 56211115080
LAB FORMAT 3
TITLE : COMBINATIONAL LOGIC CIRCUITS

1.0 INTRODUCTION

1.1 HALF ADDER

The half adder adds two single binary digits A and B. It has two outputs, sum
(S) and carry (C). The carry signal represents an overflow into the next digit of
a multi-digit addition. The value of the sum in decimal system is 2C + S.

1.2 FULL ADDER

A full adder adds binary numbers and accounts for values carried in as well as
out. A one-bit full adder adds three one-bit numbers, often written as A, B,
and Cin; A and B are the operands, and Cin is a bit carried in from the previous
less-significant stage.[2] The full adder is usually a component in a cascade of
adders, which add 8, 16, 32, etc. bit binary numbers. The circuit produces a
two-bit output. Output carry and sum typically represented by the
signals Cout and S, where in decimal system.

1.3 MULTIPLEXER

In electronics, a multiplexer (or mux) is a device that selects one of

several analog or digital input signals and forwards the selected input into a
single line. A multiplexer of 2n inputs has n select lines, which are used to
select which input line to send to the output. Multiplexers are mainly used to
 increase the amount of data that can be sent over the network within a certain
amount of time and bandwidth. A multiplexer is also called a data selector.
Multiplexers can also be used to implement Boolean functions of multiple
variables.

1.4 DECODER

A 1-of-n binary decoder has n output bits. This type of decoder asserts exactly
one of its n output bits, or none of them, for every integer input value. The
"address" (bit number) of the activated output is specified by the integer input
value.

1.5 PLD
A programmable logic device (PLD) is an electronic component used
to build reconfigurable digital circuits. Unlike a logic gate, which has a fixed
function, a PLD has an undefined function at the time of manufacture. Before
the PLD can be used in a circuit it must be programmed, that is, reconfigured.
2.0 RESULT
2.1 PICTURE OF LIVE WIRE

HALF-ADDER

FULL-ADDER

MULTIPLEXER
 2-4 DECODER

3-8 DECODER

PLD

2.2 EXPERIMENT DATA SHEET

Half Adder

A B S C
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
Full Adder

A B Ci S C
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

Multiplexer

S1 So F
0 0 D0
0 1 D1
1 0 D2
1 1 D3

2-4 Decoder

A0 A1 D0 D1 D2 D3
0 0 1 0 0 0
0 1 0 1 0 0
1 0 0 0 1 0
1 1 0 0 0 1

3-8 Decoder

Ao A1 A2 D0 D1 D2 D3 D4 D5 D6 D7
0 0 0 1 0 0 0 0 0 0 0
0 0 1 0 1 0 0 0 0 0 0
0 1 0 0 0 1 0 0 0 0 0
0 1 1 0 0 0 1 0 0 0 0
1 0 0 0 0 0 0 1 0 0 0
1 0 1 0 0 0 0 0 1 0 0
1 1 0 0 0 0 0 0 0 1 0
1 1 1 0 0 0 0 0 0 0 1
 PLD truth table

Ao A1 A2 Do D1
0 0 0 1 1
0 0 1 1 1
0 1 0 0 0
0 1 1 0 0
1 0 0 0 1
1 0 1 0 0
1 1 0 1 1
1 1 1 0 0

3.0 DISCUSSION
3.1 Half Adder
By using half adder, simple design can be produced with the help of logic
gates.

3.2 Full Adder

The full-adder is usually a component in a cascade of adders, which add 8, 16,
32, etc. binary numbers.

3.3 Multiplexer
A multiplexer (or mux) is a device that selects one of several analog or digital
input signals and forwards the selected input into a single line

3.4 Decoder
A decoder is a circuit that changes a code into a set of signals. It is called
a decoder because it does the reverse of encoding.

3.5 PLD
PLD is an electronic component used to build reconfigurable digital circuits.
MUHAMAD NAZREN BIN MOHD ZAIDI 56211115004
NURUL NADHIRA BINTI HAMZAH 56211116080
LAB REPORT 4
TITLE : BIPOLAR JUNCTION TRANSISTOR (BJT)

1.0 INTRODUCTION
1.1 What is BJT ?
Bipolar Junction Transistor (BJT) is a Semiconductor device
constructed with three doped Semiconductor Regions (Base, Collector and
Emitter) separated by two p-n junctions. In BJT, Current is produced by both
types of Charge Carriers (Electrons and Holes), hence the name Bipolar.
There are two Types of BJT which are npn and pnp. The npn-type
consists of two n-Regions separated by a p-Region. The pnp-type consists of
two p-Regions separated by an n-Region.

Schematic symbol of an npn, BJT

Schematic symbol of a pnp, BJT

 1.2 What is the function ?
The main basic function of a BJT is to amplify current it will allow
BJTs are used as amplifiers or switches to produce wide applicability in
electronic equipment.

1.3 Where to use ?

BJT is used widely in electronic equipment such as mobile phones,
industrial controls, television, radio transmitters and more.

2.0 RESULT
2.1 Picture of live wire-the measurement

Figure 1

Figure 2
 Figure 3

2.2 Experiment data sheet

3.0 DISCUSSION
3.1 Show the calculation of each variable required.
3.2 Compare the measurement result with the calculation result in table form.
Calculation Measurement
Ic 1.75mA
IE 1.76mA
IB 7.55uA
Vce 30 V
Vc 7V
VB 23.51V
VBE 23.51V
VE 22.85V
Figure 1
 Calculation Measurement
Ic 6.44mA
IE 3.92mA
IB 6.46uA
Vce 20 V
Vc 7.73V
VB 3.92V
VBE 3.92 V
VE 3.23V
Figure 2

Calculation Measurement
Ic 10.99uA
IE 2.04mA
IB 2.02mA
Vce 12.0 V
Vc 4.05V
VB 7.27V
VBE -663.66V
VE 4.07V
Figure 3

3.3 Discuss why your answer different from the calculation.

The potential factor would contribute to the differences may cause from the
human error. Which is there is likely error in circuit connection, or calculation.
Also to be considered the accuracy of the equipment.
 PRACTICAL TEST 1

COMBINATIONAL LOGIC CIRCUITS

MUHAMAD NAZREN BIN MOHD NURUL NADHIRA BINTI HAMZAH

ZAIDI
56211116080
56211115004

LECTURER: NORHAYATI MOHD ZAINEE

TITLE: COMBINATIONAL LOGIC CIRCUITS
A. Circuit 1

Figure Circuit 1

i. Write the Boolean expression for the output Figure Circuit 1.

ABC+ + B + C
ii. Draw a truth table.

A B C X
0 0 0 0
0 0 1 0
0 1 0 1
0 1 1 0
1 0 0 1
1 0 1 0
1 1 0 1
1 1 1 1
B. Circuit 2

Figure Circuit 2

i. Write the Boolean expression for the output Figure Circuit 2.

E=AB + A BC
F=A B C

ii. Draw a truth table.

A B C X
0 0 0 0
0 0 1 1
0 1 0 1
0 1 1 0
1 0 0 1
1 0 1 0
1 1 0 0
1 1 1 1
 C. Circuit 3

i. Write the Boolean expression for the output Figure Circuit 3.

X = +A + D

ii. Draw a truth table.

A B C X
0 0 0 1
0 0 1 1
0 1 0 0
0 1 1 0
1 0 0 1
1 0 1 0
1 1 0 0
1 1 1 0

1.0 INTRODUCTION
Theory of K-map.
The Karnaugh map (K-map) is a method of simplifying Boolean algebra
expressions. The Karnaugh map reduces the need for extensive calculations by taking
advantage of humans' pattern-recognition capability. It also permits the rapid
identification and elimination of potential race conditions. The required Boolean
results are transferred from a truth table onto a two-dimensional grid and each cell
position represents one combination of input conditions, while each cell value
represents the corresponding output value. Optimal groups of 1s or 0s are identified,
which represent the terms of a canonical form of the logic in the original truth table.
These terms can be used to write a minimal Boolean expression representing the
required logic.
2.0 RESULT
2.1 Picture of Livewire

FIGURE 1

FIGURE 2

FIGURE 3
 2.2 Experiment Data Sheet
2.3 Simplified the equation in circuit 1,2 and 3 using K-map.

Circuit 1
BC / A 0 1
00 0 0
01 1 0
11 0 1
10 1 1

--------------------------------------

Circuit 2
BC/A 0 1
00 1 0
01 0 0
11 0 1
10 0 0

---------------------------------------

Circuit 3
CD/AB 00 01 11 10
00 1 0 0 1
01 1 0 0 1
11 1 0 0 0
10 0 0 0 0

----------------------------------------
2.4 Draw the logic diagram based on Result Part (C) by using NAND gate

3.0 Discussion
3.1 Discuss the step in simplifying equation using K-map.
Step 1: Initiate
Express the given expression in its canonical form

Step 2: Populate the K-map

Enter the value of 'one' for each product-term into the K-map cell, while filling
others with zeros.

Step 3: Form Groups .Consider the consecutive 'ones' in the K-map cells and
group them. Each group should contain the largest number of 'ones' and no
blank cell.
 Step 4: Obtain Boolean Expression for Each Group
Express each group in terms of input variables by looking at the common
variables seen in cell-labelling. For example, there are two groups with two
and one number of 'ones' in them (Group 1 and Group 2, respectively). All the
'ones' in the Group 1 of the K-map are present in the row for which A = 0.
Thus they contain the variable A . Further these two 'ones' are present in
adjacent columns which have only B term in common as indicated by the pink
arrow in the figure.

Hence the next term is B . This yields the product term corresponding to this
group as AB. Similarly the 'one' in the Group 2 of the K-map is present in the
row for which A = 1. Further the variables corresponding to its column are
BC. Thus one gets the overall product-term for this group as ABC.

Step 5: Obtain Boolean Expression for the Output The product-terms obtained
for individual groups are to be combined to form sum-of-product (SOP) form
which yields the overall simplified Boolean expression.

3.2 Why we need to simplify the equation.

K-map simplification process is an effective reduction technique when
dealing with logical expressions which contain around three to six input
variables. The K-map simplification technique is simpler and less error-prone
compared to the method of solving the logical expressions using Boolean
laws. It prevents the need to remember each and every Boolean algebraic
theorem. It involves fewer steps than the algebraic minimization technique to
arrive at a simplified expression. K-map simplification technique always
results in minimum expression if carried out properly