Automatica 35 (1999) 1579}1585

Technical Communique
Getting more phase margin and performance out of PID controllers
W.K. Ho*, K.W. Lim, C.C. Hang, L.Y. Ni
Department of Electrical Engineering, National University of Singapore, 10 Kent Ridge Crescent, Singapore 119260, Singapore
Received 2 November 1998; received in "nal form 22 February 1999

Abstract

Designing a PID controller to meet gain and phase margin speci"cation is a well-known design technique. If the gain and phase
margin are not speci"ed carefully then the design may not be optimum in the sense that there could be larger phase margin (more
robust) that could give better performance. This paper studies the relationship between the integral square error performance index,
gain margin, phase margin and gives recommendation for gain and phase margin speci"cation to get more phase margin and
performance out of PID controllers.  1999 Elsevier Science Ltd. All rights reserved.

Keywords: PID controllers; PI controllers; Gain margin; Phase margin; Integral square error

1. Introduction Robust control design is an area of intensive research.

Over the years, many formulas for the optimum design
of the PID controllers have been published (Shinskey,
1988; As stroK m et al., 1993; As stroK m and HaK gglund, 1995;
Ho et al., 1998). One common approach is to minimize
a performance index. The popular performance indexes
are the integral square error (ISE), the integral absolute
error (IAE), and the integral time absolute error (IAE)
indexes, de"ned as
Robustness is important as the process model used is
often an approximation of the industrial process. The
formulas in Tables 1 and 2 though optimum as far as the
performance indexes are concern do not give robust
systems. Ho et al. (1995a, 1996) showed that the formulas
can give gain and phase margins less than 1.5 and 303,
respectively, which are outside the recommended ranges.
The recommended ranges of gain and phase margin are
between 2}5 and 303}603, respectively (As stroK m and


 HaK gglund, 1995). This paper gives formulas with gain
ISE" e(t) dt, and phase margin within the recommended range and
 could be more useful for the industry.


 Designing a PID controller to meet gain and phase
IAE" "e(t)" dt,
margin speci"cation is a well-known design technique.

Often, control design, like any engineering design, in-


IAE" t " e(t)" dt, volves tradeo!. This paper shows that for the commonly
 used controller and plant model in process control * the
where e(t) is the error signal at time t. The formulas are PID controller and the "rst order plus dead-time plant
also separated into those that are optimized for step model * this may not be the case for phase margin versus
set-point response and those that are optimized for step performance. The paper shows how this can be made use
load disturbance response (see Tables 1 and 2). These of in the design of PID controllers and to simplify the
formulas are derived for the "rst order plus dead-time design problem, a set of design equations are given.
process model. Traditionally, gain and phase margin have been used
as measures of robustness (Franklin et al., 1986). A classi-
*****

cal approach to consider model uncertainties is to design
This paper was not presented at any IFAC meeting. This paper the closed-loop control system with su$cient gain
was recommended for publication in revised form by Editor Peter
Dorato. and phase margin then it is guaranteed that gain vari-
* Corresponding author. Tel.: 00-65-874-6286; fax: 00-65-779-1103; ations and phase delays do not lead to instability. On one
e-mail: elehowk@nus.edu.sg. hand, gain and phase margin are measures of stability

0005-1098/99/$ - see front matter  1999 Elsevier Science Ltd. All rights reserved
PII: S 0 0 0 5 - 1 0 9 8 ( 9 9 ) 0 0 0 5 5 - 2
1580 W.K. Ho et al. /Automatica 35 (1999) 1579}1585

Table 1 optimum in the sense that there could be larger phase

PI controller tuning formulas for the "rst order plus dead-time process margin (greater robustness) that could give better perfor-
model (K /(sq#1) e\Q*) and various performance indexes
 mance (lower ISE).
Controller G (s)"K (1#1/s )
 
Performance Indexes K 2. Gain margin, phase margin and ISE




1.305 \  q  
ISE-load
K q 0.492 q Denote the process and controller transfer function as

G (s) and G (s), the gain and phase margin as a and
,



0.984 \  q    
IAE-load
K q 0.608 q
respectively. From the de"nitions of gain margin and
 phase margin, the following equations are obtained:



0.859 \  q  
IAE-load
K q 0.674 q
"arg[G ( jw )G ( jw )]#n, (1)
    


0.98 \  q
ISE-set-point 1
K

q 0.69!0.155(/q) a" , (2)
"G ( jw )G ( jw )"
   


0.758 \  q
IAE-set-point
K q 1.02!0.323 (/q) where w and w are given by
  


0.586 \  q
IAE-set-point "G ( jw )G ( jw )""1, (3)
K

q 1.03!0.165(/q)    
arg[G ( jw )G ( jw )]"!n. (4)
   
robustness and therefore should be speci"ed according to 2.1. PI control
the uncertainties of the plant. On the other hand, gain
and phase margin are also related to the performance of The PI controller transfer function is given as
the closed-loop system and therefore should be speci"ed


to give good performance. The ISE performance index is 1
G (s)"K 1# . (5)
considered in this paper. In this paper, we study the   s
change in ISE performance index when di!erent gain and
phase margin speci"cations are used in the design of PI Like the formulas in Tables 1 and 2, consider the "rst
and PID controllers and show how one can specify the order plus dead-time process model given by
gain and phase margin wisely to give the best of perfor-
mance and robustness. If the gain and phase margin K
G (s)"  e\*Q. (6)
are not speci"ed carefully then the design may not be  (qs#1)

Table 2
PID controller tuning formulas for the "rst order plus dead-time process model (K /(sq#1) e\Q*) and

various performance indexes

Controller G (s)"K (1#1/s #s )

  
Performance Indexes K
 




1.495 \  q    
ISE-load 0.56q
K q 1.101 q q





1.435 \  q    
IAE-load 0.482q
K q 0.878 q q





1.357 \  q    
IAE-load 0.381q
K q   q q




1.048 \  q  
ISE-set-point 0.489q
K q 1.195!0.368 (/q) q




1.086 \  q  
IAE-set-point 0.348q
K q 0.74!0.13(/q) q




0.965 \  q  
IAE-set-point 0.308q
K q 0.796!0.147 (/q) q

 W.K. Ho et al. /Automatica 35 (1999) 1579}1585 1581

Substituting Eqs. (5) and (6) into Eqs. (1)}(4) gives 2.2. PID control
p

" #arctan(w )!arctan(w q)!w , (7) The PID controller transfer function is given as
2   


1


w 1#wq G (s)"K 1# #s . (11)
a"   , (8)   s 
KK 1#w
   The derivative gain, , is usually chosen as a "xed ratio


w 1#wq of the integral time . Researchers Ziegler and Nichols
  "1, (9)
KK 1#w (1942), As stroK m and HaK gglund (1984) and Hang et al.
  
(1991) have recommended
p
#arctan(w )!arctan(w q)!w "0. (10)
2    " . (12)
 
Designing a PI controller to meet given gain margin (a) Substituting Eqs. (6), (11) and (12) into Eqs. (1)}(4)
and phase margin (
) speci"cation is a well-known and just like the case of PI control, the ISE for various
design technique (Ho et al., 1995b; Ho et al., 1997). combinations of a and
can be computed. They are
If the gain margin (a) and phase margin (
) are speci- plotted in Fig. 1(c) and (d). If , is not chosen as a

"ed, Eqs. (7)}(10) can be solved numerically for the "xed ratio of then the extra degree of freedom

cross-over frequencies (u , u ) and PI controller para- can be used for minimizing the ISE performance index,
 
meters (K , ). The performance (ISE) of PI controllers given the gain and phase margin. This is given in Ho et al.

for speci"cations in the range (24a45, 3034
4753) (1998).
and for plant dynamics (0.14/q41) considered
in Tables 1 and 2 are studied and some of the results 2.3. Design equations
are plotted in Fig. 1(a) and (b). Note that some of
the curves do not cover the complete range con- Controller design involves tradeo!. Some of the
sidered because solutions do not exist for such tradeo!s are intuitive: e.g. to obtain a faster response,
speci"cations. a larger input power is expected. Other tradeo!s may not

Fig. 1. Relationship between integral square error (ISE), gain margin (a), phase margin (
) (solid line a"2; dashed line a"3; dotted line a"4;
dash-dotted line a"5) (a) step set-point response of PI control system; (b) step load disturbance response of PI control system; (c) step set-point
response of PID control system; (d) step load disturbance response of PID control system.
1582 W.K. Ho et al. /Automatica 35 (1999) 1579}1585

Fig. 2. Phase margin,

, that gives the minimum ISE for a given gain margin, a (x: phase margin,
, obtained through numerical search;

*: curve of Eqs. (13)}(16); *: global optimum when the controller is designed using the formulas in Table 1 or 2) (a) step set point response with PI
control; (b) step-load disturbance response with PI control; (c) step set point response with PID control; (d) step load disturbance response with PID
control.

be so obvious: e.g. tradeo! between robustness and load disturbance response with PI control:
performance. From Fig. 1, the following observations

"45.9848a (/q)  , (14)
may be made: for a given gain margin, a, there is a phase
margin,
, that gives the minimum ISE. For phase set-point response with PID control:

margin larger than
, there is a phase margin versus

"29.7985#62.1189/a#40.3182(/q)
performance tradeo!: one has to sacri"ce phase margin
(reduce margin) to obtain better performance (lower !76.2833(/q)/a, (15)
ISE) and vice versa. For phase margin less than
,
K load disturbance response with PID control:
there is no tradeo!: one can gain performance (lower
ISE) and phase margin (increase margin) at the same

"46.5489a (/q) . (16)
time and this can be gainfully made use of in the design of
the controller. The study also shows that for the range of gain margin
For a given gain margin, a, a numerical search for the considered, there is a tradeo! between performance (ISE)
phase margin,
, that gives the minimum ISE index in and gain margin (a). Fig. 1 shows that better performance

Fig. 1 can be performed. (Note that because of space (lower ISE) is obtained at the expense of gain margin
constraint, Fig. 1 could only show the curves for (reduced margin).
/q"0.2, 0.5 and 1.) The results are shown in Fig. 2(a) The PI and PID controllers designed using the ISE
to (d), respectively, for /q"0.1, 0.2, 0.321. For formulas in Tables 1 and 2 give the PI, PID parameters
24a45, 0.14/q41, curve "tting in the least squares for the global minimum in ISE. The corresponding gain
sense gives and phase margin are also given in Fig. 2. They are
set-point response with PI control: clearly outside or at the boundary of the recommended
range 2}5 and 303}603 for the gain margin and phase

"68.8884!34.3534/a#9.1606(/q), (13) margin, respectively.

 W.K. Ho et al. /Automatica 35 (1999) 1579}1585 1583

Fig. 3. Load disturbance responses with PI control (dashed line: a"3,

"353, K "0.4885, "0.3551; solid line: a"3,
"513, K "0.9538,
 
"0.7660; dotted line: the design for global minimum IAE, K "1.9490, "1.0071) (a) G (s)"(1/(s#1)) e\ Q (dashed line: ISE"0.4772; solid
 
line: ISE"0.3317; dotted line: ISE"0.1827); (b) G (s)"(1.2/(s#1)) e\ Q (dashed line: ISE"0.8192; solid line: ISE"0.4797; dotted line:

ISE"0.5675).

2.4. Illustrative example mance, the other two designs give systems that are
closer to instability with poorer performance and more
Consider the plant model given by oscillatory responses because they have smaller stability
margins.
1
G (s)" e\ Q.
 s#1
3. Model mismatch
Assume that from stability robustness requirement a gain
margin of a"3 and a phase margin of
"353 are
Eqs. (13)}(16) and Tables 1 and 2 are given for the
su$cient. The load disturbance response for such a sys-
commonly used plant model in the process control in-
tem is shown in Fig. 3(a). Substituting a"3, /q"0.5
dustry: the "rst order plus dead-time model. To use the
into Eq. (14) reveals that the response would be better
formulas in the industry, the industrial process is "rstly
(lower ISE) if we design for a more &&robust'' phase mar-
approximated by a "rst order plus dead-time model.
gin speci"cation of
"513. The load disturbance re-
A typical practice is to "t the step response of the process
sponse is also shown in Fig. 3(a). In designing for 3 and
to that of the "rst order plus dead-time model in the
513, we gain not only performance but also robustness in
least-squares sense. We will follow this procedure to test
terms of larger phase margin (513 versus 353). The design
Eqs. (13)}(16) on a selection of the test processes used to
for global minimum IAE is also given in Fig. 3(a).
develop heuristics for the PID controller (As stroK m et al.,
There could be variation or uncertainty in the process
1992; As stroK m and HaK gglund, 1995) :
parameters. If the gain and delay of the process are 20%
higher 1
G (s)" for n"3, 4, 5, (17)
 (s#1)L
1.2
G (s)" e\ Q
 s#1 1!bs
G (s)" for 04b40.8, (18)
 (s#1)
then the load disturbance response with the above three
controllers are given in Fig. 3(b). It is clear that while 1
G (s)" e\Q" for 0.14D41.1. (19)
the design for 3, 513 continues to give acceptable perfor-  (s#1)
1584 W.K. Ho et al. /Automatica 35 (1999) 1579}1585

Fig. 4. Set-point responses for PI control of higher order proceses (a) G (s)"1/(s#1) (dashed-line: a"2,
"303, ISE"2.2487; solid line: a"2,


"56.73, ISE"1.4929); (b) G (s)"1/(s#1) (dashed-line: a"2,

"403, ISE"4.2322; solid line: a"2,
"60.93, ISE"3.5566); (c)
N
G (s)"(1!0.5s)/(s#1) (dashed-line: a"2,
"303, ISE"3.7772; solid line: a"2,
"59.43, ISE"2.3429); (d) G (s)"1/(s#1) e\ Q (dashed
 
line: a"2,
"303, ISE"1.9523; solid line: a"2,
"57.43, ISE"1.3563).

The ranges of n, b, and D are selected such that 4. Conclusion

0.14/q41 for the "rst order plus dead-time model.
Consider the process Designing a controller to meet gain and phase margin
speci"cation is a well-known design technique. Often,
1 control design involves tradeo!. This paper shows that
G (s)" . (20)
 (s#1) for the commonly used controller and plant model in
process control * the PID controller and the "rst order
The approximation of this process is obtained by "tting
plus dead-time plant model * this may not be the case
its step response to that of a "rst order plus dead-time
for phase margin versus performance. The paper shows
model in the least-squares sense:
how this can be made use of in the design of PID
1 controllers and to simplify the design problem, a set of
G< (s)" e\
Q . design equations are given. If the gain and phase margin
 2.0s#1
are not speci"ed carefully then the design may not be
Assume that from stability robustness requirement, optimum in the sense that there could be a larger phase
a gain margin of a"2 and a phase margin of
"303 are margin (more robust) that could give better performance
su$cient. The PI controller that meets this speci"cation * it would be desirable to be able to specify gain and
can be obtained by solving Eqs. (7)}(10) numerically. phase margin that will give the best of robustness and
This, however, may not give the best design. The step performance.
response for this design is shown in Fig. 4(a). Substituting
a"2 and /q"0.55 into Eq. (14) reveals that the re-
sponse would be better (lower ISE) if we design for References
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