CAD FOR IC

Question bank
1. What are the main differences between floor planning and placement?
2. A chip is to be designed for implementing a new speech processing algorithm .
The chip must be released into market a short deadline . What chip design style
you would use and why?
3. What is the need of layout design rules and what are they?
4. Represent the floor plan for below figure as a slicing tree.
A c f
b d
e g

5. Describe the steps involved in designing the new integrated circuit and CAD
tools to be used for it?
6. Discuss various SOC design styles and compare and contrast them.
7. Explain the constructive placement algorithm . Compare it with iterative
placement algorithm .
8 . Draw polar horizontal and polar vertical graph for below floor plan

9 . For below slicing floor plan write normalized polish expression

10 . While finalizing the floor plan of the SOC how much should be dead space ?
How the dead space percentage is calculated ?

11. Explain with example how the wire length estimation is done?

12. During partitioning , floor planning and routing what you need to optimize?
what is desired optimization result expected out of this exercise? Explain.
13. Explain what is slicing and non slicing floorplan with example.
14. How NPE is used to optimize the floor plan. Explain with example.
15. What is shape curves used for ? How?
16. Explain 5 operators: ~, V1, V2, H1, H2 with examples.
17. Explain step by step chip design flows .
18. What is partitioning and explain with example bad partitioning
19. Explain Kernighan-Lin (K-L) Algorithm with example
20. Explain design style specific partitioning problem
21. Explain hierarchical partitioning at system level, board level and SOC level.
22. Explain Heuristic algorithms with examples
23. How graph theory is used to implement various algorithms and explain
different types of graphs?
24. What do you understand by net, netlist, connectivity graph, connectivity
matrix, congestion, fixed die routing and variable die routing ?
25. What are different considerations and types of routings and explain their
significance .
26. Explain different steps in physical design of SOCs.
27. Give brief commentary on below SOC design steps ?
28. What is channel and how channel capacity is measured explain with example
29. What is information you need to start for routing ? What are optimization goals for routing in custom, standard cell and gate array design
styles ?
30. Explain Grid graph model, Channel connectivity graph and Switchbox connectivity graph with example.
31. What are the different types of CAD algorithms used in each step of the design ?
32. Explain the Classification of Placement Algorithms in detail .
33. Explain Terminal Propagation Algorithm with example.
34. Explain in detail the FPGA design style with example when you should prefer it
35. A power management SOC is to be designed from scratch what is design style you would use and give reasons of choosing it?
36. Standard cell libraries of various types are available for building SOCs what are those and how you decide to use each of these during
design.
37. What is use of global routing phase why do you need to study routing congestion and provide solutions to avoid routing congestion
38. What is simulated annealing ? What is its significance ?
39. Explain Fiduccia-Mattheyses Algorithm and its significance with example
40. How do you find Shortest Paths with Dijkstras Algorithm. Explain .
41. What is Left-Edge Algorithm used for and how?
42. Explain Dogleg Routing and Switchbox Routing with example.