Data Sheet No.

PD60026-P

IR2112(S)
HIGH AND LOW SIDE DRIVER
Features Product Summary
Floating channel designed for bootstrap operation
Fully operational to +600V VOFFSET 600V max.
Tolerant to negative transient voltage
dV/dt immune IO+/- 200 mA / 420 mA
Gate drive supply range from 10 to 20V
Undervoltage lockout for both channels VOUT 10 - 20V
3.3V logic compatible
Separate logic supply range from 3.3V to 20V ton/off (typ.) 125 & 105 ns
Logic and power ground 5V offset
CMOS Schmitt-triggered inputs with pull-down Delay Matching 30 ns
Cycle by cycle edge-triggered shutdown logic
Matched propagation delay for both channels
Packages
Outputs in phase with inputs

Description
The IR2112(S) is a high voltage, high speed power
MOSFET and IGBT driver with independent high and
low side referenced output channels. Proprietary HVIC
and latch immune CMOS technologies enable rugge- 16-Lead SOIC
dized monolithic construction. Logic inputs are com- 14-Lead PDIP (wide body)
patible with standard CMOS or LSTTL outputs, down
to 3.3V logic. The output drivers feature a high pulse
current buffer stage designed for minimum driver cross-conduction. Propagation delays are matched to sim-
plify use in high frequency applications. The floating channel can be used to drive an N-channel power
MOSFET or IGBT in the high side configuration which operates up to 600 volts.

Typical Connection up to 600V

HO
VDD VDD VB
HIN HIN VS
TO
SD SD LOAD

LIN LIN VCC

VSS VSS COM
VCC LO

(Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical connections
only. Please refer to our Application Notes and DesignTips for proper circuit board layout.

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This datasheet has been downloaded from http://www.digchip.com at this page

IR2112(S)

Absolute Maximum Ratings

Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured
under board mounted and still air conditions. Additional information is shown in Figures 28 through 35.
Symbol Definition Min. Max. Units
VB High Side Floating Supply Voltage -0.3 625
VS High Side Floating Supply Offset Voltage VB - 25 VB + 0.3
VHO High Side Floating Output Voltage VS - 0.3 VB + 0.3
VCC Low Side Fixed Supply Voltage -0.3 25 V
VLO Low Side Output Voltage -0.3 VCC + 0.3
VDD Logic Supply Voltage -0.3 VSS + 25
VSS Logic Supply Offset Voltage VCC - 25 VCC + 0.3
VIN Logic Input Voltage (HIN, LIN & SD) VSS - 0.3 VDD + 0.3
dVs/dt Allowable Offset Supply Voltage Transient (Figure 2) 50 V/ns
PD Package Power Dissipation @ TA +25 C (14 Lead DIP) 1.6
W
(16 Lead SOIC) 1.25
RTHJA Thermal Resistance, Junction to Ambient (14 Lead DIP) 75
C/W
(16 Lead SOIC) 100
TJ Junction Temperature 150
TS Storage Temperature -55 150 C
TL Lead Temperature (Soldering, 10 seconds) 300

Recommended Operating Conditions

The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. The VS and V SS offset ratings are tested with all supplies biased at 15V differential. Typical
ratings at other bias conditions are shown in Figures 36 and 37.
Symbol Definition Min. Max. Units
VB High Side Floating Supply Absolute Voltage VS + 10 VS + 20
VS High Side Floating Supply Offset Voltage Note 1 600
VHO High Side Floating Output Voltage VS VB
VCC Low Side Fixed Supply Voltage 10 20
V
VLO Low Side Output Voltage 0 VCC
VDD Logic Supply Voltage VSS + 3 VSS + 20
VSS Logic Supply Offset Voltage -5 (Note 2) 5
VIN Logic Input Voltage (HIN, LIN & SD) VSS VDD
TA Ambient Temperature -40 125 C

Note 1: Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).
Note 2: When VDD < 5V, the minimum VSS offset is limited to -VDD.

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 IR2112(S)

Dynamic Electrical Characteristics

VBIAS (VCC, VBS, VDD) = 15V, CL = 1000 pF, TA = 25C and VSS = COM unless otherwise specified. The dynamic
electrical characteristics are measured using the test circuit shown in Figure 3.

Symbol Definition Figure Min. Typ. Max. Units Test Conditions

ton Turn-On Propagation Delay 7 125 180 VS = 0V
toff Turn-Off Propagation Delay 8 105 160 VS = 600V
tsd Shutdown Propagation Delay 9 105 160 VS = 600V
ns
tr Turn-On Rise Time 10 80 130
tf Turn-Off Fall Time 11 40 65
MT Delay Matching, HS & LS Turn-On/Off 30

Static Electrical Characteristics

VBIAS (VCC, VBS, VDD) = 15V, TA = 25C and VSS = COM unless otherwise specified. The VIN, VTH and IIN parameters
are referenced to VSS and are applicable to all three logic input leads: HIN, LIN and SD. The VO and IO parameters are
referenced to COM and are applicable to the respective output leads: HO or LO.

Symbol Definition Figure Min. Typ. Max. Units Test Conditions

VIH Logic 1 Input Voltage 12 9.5
V
VIL Logic 0 Input Voltage 13 6.0
VOH High Level Output Voltage, VBIAS - VO 14 100 IO = 0A
mV
VOL Low Level Output Voltage, VO 15 100 IO = 0A
ILK Offset Supply Leakage Current 16 50 VB = VS = 600V
IQBS Quiescent VBS Supply Current 17 25 60 VIN = 0V or VDD
IQCC Quiescent VCC Supply Current 18 80 180 VIN = 0V or VDD
A
IQDD Quiescent VDD Supply Current 19 2.0 5.0 VIN = 0V or VDD
IIN+ Logic 1 Input Bias Current 20 20 40 VIN = VDD
IIN- Logic 0 Input Bias Current 21 1.0 VIN = 0V
VBSUV+ VBS Supply Undervoltage Positive Going 22 7.4 8.5 9.6
Threshold
VBSUV- VBS Supply Undervoltage Negative Going 23 7.0 8.1 9.2
Threshold V
VCCUV+ VCC Supply Undervoltage Positive Going 24 7.6 8.6 9.6
Threshold
VCCUV- VCC Supply Undervoltage Negative Going 25 7.2 8.2 9.2
Threshold
IO+ Output High Short Circuit Pulsed Current 26 200 250 VO = 0V, VIN = VDD
PW 10 s
mA
IO- Output Low Short Circuit Pulsed Current 27 420 500 VO = 15V, VIN = 0V
PW 10 s

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IR2112(S)
Functional Block Diagram
VB
UV
VDD DETECT
R Q
HV
LEVEL PULSE R HO
R Q SHIFT
S FILTER S
VDD /VCC
HIN LEVEL
SHIFT PULSE VS
GEN

SD
VCC
UV
DETECT
VDD /VCC
LIN LEVEL LO
S SHIFT
R Q DELAY

VSS COM

Lead Definitions
Symbol Description
VDD Logic supply
HIN Logic input for high side gate driver output (HO), in phase
SD Logic input for shutdown
LIN Logic input for low side gate driver output (LO), in phase
VSS Logic ground
VB High side floating supply
HO High side gate drive output
VS High side floating supply return
VCC Low side supply
LO Low side gate drive output
COM Low side return

Lead Assignments

14 Lead DIP 16 Lead SOIC (Wide Body)

IR2112 IR2112S
Part Number

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 IR2112(S)

<50 V/ns

Figure 1. Input/Output Timing Diagram Figure 2. Floating Supply Voltage Transient Test
Circuit

HIN 50% 50%

LIN
ton tr toff tf

90% 90%

HO
LO 10% 10%

Figure 3. Switching Time Test Circuit Figure 4. Switching Time Waveform Definition

HIN 50% 50%

SD
LIN
50%

LO HO
tsd

HO 90% 10%
LO MT MT

90%

LO HO

Figure 5. Shutdown Waveform Definitions Figure 6. Delay Matching Waveform Definitions

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IR2112(S)

250 250
Turn-On Delay Time (ns)

Turn-On Delay Time (ns)

Max .
200 200
Max.
150 150

100 100
Typ. Typ.
50 50

0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature VCC /VBS Supply Voltage (V)

Figure 7A. Turn-On Time vs. Temperature Figure 7B. Turn-On Time vs. VCC/VBS Supply Voltage

400 250
Turn-On Delay Time (ns)

Turn-Off Delay Time (ns)

200
300
Max.
Max. 150
200
100

100 Typ. Typ.

50

0 0
0 2 4 6 8 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125
VDD Supply Voltage (V) Temperature (C)

Figure 7C. Turn-On Time vs. VDD Supply Voltage Figure 8A. Turn-Off Time vs. Temperature

250 400

200
Turn-Off Delay Time (ns)

Turn-OFF Delay Time (ns)

Max. 300
150 Max.
200
100
Typ.
100
50
Typ.
0 0
10 12 14 16 18 20 0 2 4 6 8 10 12 14 16 18 20

VCC /VBS Supply Voltage (V) VDD Supply Voltage (V)

Figure 8B. Turn-Off Time vs. VCC/VBS Supply Voltage Figure 8C. Turn-Off Time vs. VDD Supply Voltage

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 IR2112(S)

250 250
Shutdown Delay Time (ns)

Shutdown Delay Time (ns)

200 200
Max. Max.
150 150

100 100
Typ.
Typ. 50
50
0
0
10 12 14 16 18 20
-50 -25 0 25 50 75 100 125

Temperature (C) VCC /VBS Supply Voltage (V)

Figure 9A. Shutdow n Time vs. Temperature Figure 9B. Shutdown Delay Time
vs. VCC/VBS Supply Voltage
400 250
Turn-On rise Time (ns)
S hutdow n D elay Tim e (ns)

200
300

Max. 150
200 Max.
100
100
Typ. 50
Typ.
0 0
0 2 4 6 8 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125
V D D S upply V oltage (V ) Temperature (C)

Figure 9C. Shutdown Time vs. VDD Supply Voltage Figure 10A. Turn-On Rise Time vs. Temperature

250 125
Turn-On Rise Time (ns)

Turn-On Fall Time (ns)

200 100
Max.
150 75
Max.
100 50
Typ.
50 25
Typ.
0 0
10 12 14 16 18 20 -50 -25 0 25 50 75 100 125

Tem perature (C)

VBIAS Supply Voltage (V)
Figure 10B. Turn-On Rise Time vs. Voltage Figure 11A Turn-On Fall Time vs. Temperature

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IR2112(S)

125 15

Logic "1" Input Threshold (V)

12
T u rn -O ff F a ll T im e (n s )

100
Min.
Max.
75 9

6
50
Typ. 3
25
0
0 -50 -25 0 25 50 75 100 125
10 12 14 16 18 20
V B IA S S u p p ly V o lta g e (V ) Temperature (C)

Figure 11B. Turn-Off Fall Time vs. Voltage Figure 12A. Logic I Input Threshold
vs. Temperature
15

Logic "0" Input Threshold (V) 15

L o g ic " 1 " In p u t T re s h o ld

12

12

9
9

Min. Max.
6
6

3
3

0
0

2 .5 5 7 .5 10 1 2 .5 15 1 7 .5 20 -5 0 -2 5 0 25 50 75 100 125
V D D L o g ic S u p p ly V o lta g e (V ) Te m p e ra t u re (C )

Figure 12B. Logic I Input Threshold Figure 13A. Logic 0 Input Threshold
vs. Voltage vs. Temperature
15

1
Logic " 0 " Input Treshold (V)

H igh Level O utput V oltage (V )

12

0.8

0.6
9

0.4
6

Max. M ax.
0.2
3

0
0

2.5 5 7.5 10 12.5 15 17.5 20 -50 -25 0 25 50 75 100 125

VDD Logic Supply Voltage (V) T e m p e ra tu re

Figure 13B. Logic 0 Input Threshold Figure 14A. High Level Output vs. Temperature
vs. Voltage

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 IR2112(S)

1 1

Low Level Output Voltage (V)

H igh L eve l O utpu t V olta ge (V )

0.8 0.8

0.6 0.6

0.4 0.4
M a x.
Max.
0.2 0.2

0 0
10 12 14 16 18 20 -50 -25 0 25 50 75 100 125
V B A IS S upply V otage (V ) Temperature (C)
Figure 14B. High Level Output vs. Voltage Figure 15A. Low Level Output vs. Temperature

Offset Supply Leakage Current (uA)

1 500
Low Level Output Voltage (V)

0.8 400

0.6 300

0.4 200
Max.
Max.
100
0.2
0
0
-50 -25 0 25 50 75 100 125
10 12 14 16 18 20

VBIAS Supply Votage (V) Temperature (C)

Figure 15B. Low Level Output vs. Voltage Figure 16A. Offset Supply Current vs.
Temperature

500 100
Offset Supply Leakage Current (uA)

VBS Supply Current (uA)

400 80

300 60
Max.
200 40
M ax .
100 20

0 Typ.
0
0 100 200 300 400 500 600 -50 -25 0 25 50 75 100 125
V B B oos t V oltage (v) Tem perature (C )

Figure 16B. Offset Supply Current vs. Voltage Figure 17A. VBS Supply Current vs. Temperature

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IR2112(S)

100 300
VBS Supply Current (uA)

250

Vcc Supply Current (uA)

80
M ax .
200
60
Max.
150
40 Typ.
100

20
50
Typ.
0 0
10 12 14 16 18 20 -5 0 -2 5 0 25 50 75 100 125
T e m p e ra t u re ( C )
V B S Floating S upply V oltage (V )

Figure 17B. VBS Supply Current vs. Voltage Figure 18A. VCC Supply Current vs. Temperature

300 12
VDD Supply Current (uA)
250 10
Vcc Supply Current (uA)

Max.
200 8
Max.
150 6
Typ.
100 4
Typ.
50 2

0 0
10 12 14 16 18 20 -50 -25 0 25 50 75 100 125
Temperature (C)
Vcc Fixed Supply Voltage (V)

Figure 18B. VCC Supply Current vs. Voltage Figure 19A. VDD Supply Current vs. Temperature

12 100
Logic "1 " Input Bias Current (uA)
VDD Supply Current (uA)

10 80

8
60
Max.
6 Max.
40
4

2 20
Typ. Typ.
0 0
0 2 4 6 8 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125
VDD Logic Supply Voltage (V) Temperature (C)

Figure 19B. VDD Supply Current vs. VDD Voltage Figure 20A. Logic I Input Current vs. Temperature

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 IR2112(S)

100 5
Logic " 1" Input Bias Current (uA)

Logic "0" Input Bias Current (uA)

80 4

60 3
Max.
40 2
Max.
20 1
Typ.
0 0
0 2 4 6 8 10 12 14 16 18 20 -50 -25 0 25 50 75 100 125
V D D L o g ic S u p p ly V o lta g e (V )
Temperature (C)

Figure 20B. Logic 1 Input Current vs. VDD Voltage Figure 21A. Logic 0 Input Current vs. Temperature

11
VBS Undervoltage Lockout +(V)
5
Logic "0" Input Bias Current (uA)

4 10
Max.

3 9
Typ.
2 8
Min.
Max.
1 7

6
0
-50 -25 0 25 50 75 100 125
0 2 4 6 8 10 12 14 16 18 20
VDD Supply Voltage (V) Temperature (C)

Figure 21B. Logic 0 Input Current vs. VDD Voltage Figure 22. VBS Undervoltage (+) vs. Temperature

11 11
VBS Undervoltage Lockout -(V)

Vcc Undervoltage Lockout +(V)

10 10
Max.
Max.
9 9
Typ.
Typ.
8 8
Min.
Min.
7 7

6 6
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
Temperature (C) Temperature
(C)
Figure 23. VBS Undervoltage (-) vs. Temperature Figure 24. VCC Undervoltage (-) vs. Temperature

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IR2112(S)

11 500
VCC Undervoltage Lockout - (V)

Output source Current (mA)

10 400
Max.
9 300
Typ. Typ.
8 200

Min. Min.
7 100

6 0
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
Tem perature (C) Tem perature (C )

Figure 25. VCC Undervoltage (-) vs. Temperature Figure 26A. Output Source Current vs. Temperature

500 750
Output source Current (mA)

Output Sink Current (mA)

400 600
Typ.
Typ.
300 450

200 Min.
300
Min.
100
150
0
10 12 14 16 18 20 0
-50 -25 0 25 50 75 100 125
VBIAS Supply Voltage (V) Temperature (C)

Figure 26B. Output Source Current vs. Voltage Figure 27A. Output Sink Current vs. Temperature

750
Output Sink Current (mA)

600
Typ.
450

300
Min.
150

0
10 12 14 16 18 20
VBIAS Supply Voltage (V)

Figure 27B. Output Sink Current vs. Voltage

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 IR2112(S)

150 150
320V

125 320V 125

Junction Temperature (C)

Junction Temperature (C)

100 100 140V

75 75
140V

50 10V 50 10V

25 25

0 0
1E+2 1E+3 1E+4 1E+5 1E+6 1E+2 1E+3 1E+4 1E+5 1E+6
Frequency (Hz) Frequency (Hz)

Figure 28. IR2112 TJ vs. Frequency (IRFBC20) Figure 29. IR2112 TJ vs. Frequency (IRFBC30)
, VCC = 15V
RGATE = 33 , VCC = 15V
RGATE = 22
320V 320V 140V 10V
150 150

125 125
140V
Junction Temperature (C)

Junction Temperature (C)

100 100
10V

75 75

50 50

25 25

0 0
1E+2 1E+3 1E+4 1E+5 1E+6 1E+2 1E+3 1E+4 1E+5 1E+6
Frequency (Hz) Frequency (Hz)

Figure 30. IR2112 TJ vs. Frequency (IRFBC40) Figure 31. IR2112 TJ vs. Frequency (IRFPE50)
, VCC = 15V
RGATE = 15 , VCC = 15V
RGATE = 10
320V 140V
150 320V 150

125 125
Junction Temperature (C)

Junction Temperature (C)

100 100
140V

75 10V 75
10V

50 50

25 25

0 0
1E+2 1E+3 1E+4 1E+5 1E+6 1E+2 1E+3 1E+4 1E+5 1E+6
Frequency (Hz) Frequency (Hz)

Figure 32. IR2112S TJ vs. Frequency (IRFBC20) Figure 33. IR2112S TJ vs. Frequency (IRFBC30)
, VCC = 15V
RGATE = 33 , VCC = 15V
RGATE = 22

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IR2112(S)

320V 320V 140V 10V

150 150
140V

125 10V 125

Junction Temperature (C)

Junction Temperature (C)

100 100

75 75

50 50

25 25

0 0
1E+2 1E+3 1E+4 1E+5 1E+6 1E+2 1E+3 1E+4 1E+5 1E+6
Frequency (Hz) Frequency (Hz)

Figure 34. IR2112S TJ vs. Frequency (IRFBC40) Figure 35. IR2112S TJ vs. Frequency (IRFPE50)
, VCC = 15V
RGATE = 15 , VCC = 15V
RGATE = 10

0.0 20.0

-3.0 16.0
VSS Logic Supply Offset Voltage (V)
VS Offset Supply Voltage (V)

Typ.

-6.0 12.0

-9.0 8.0 Typ.

-12.0 4.0

-15.0 0.0
10 12 14 16 18 20 10 12 14 16 18 20
VBS Floating Supply Voltage (V) VCC Fixed Supply Voltage (V)

Figure 36. Maximum VS Negative Offset vs. Figure 37. Maximum VSS Positive Offset vs.
VBS Supply Voltage VCC Supply Voltage

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 IR2112(S)

Case outline

01-6010
14-Lead PDIP 01-3002 03 (MS-001AC)

01 6015
16-Lead SOIC (wide body) 01-3014 03 (MS-013AA)

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
Data and specifications subject to change without notice. 3/25/2003

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