Modeling & Simulation of Seven levels

Multilevel Inverter fed Induction motor

Drive
 TABLE OF CONTENTS

CHAPTER TITLE PAGE NO

ACKNOWLEDGEMENT
ABSTRACT
i PROJECT ASSOCIATES
ii LIST OF TABLES
iii LIST OF FIGURES
iv LIST OF SYMBOLS
vi LIST OF ABBREVIATION
vii

1. CHAPTER 1
1
1.1 Sub title
1.2 Sub title
1.3 Sub title

2. CHAPTER 2
20
2.1 Sub title
2.2 Sub title
2.3 Sub title
2.4 Sub title

3. CHAPTER 3
30
3.1 Sub title
3.2 Sub title
3.3 Sub title
3.4 Sub title

4. CONCLUSION

5. REFERENCES

CHAPTER 1
 INTRODUCTION
An induction or asynchronous motor is an AC electric motor in which the electric
current in the rotor needed to produce torque is obtained by electromagnetic
induction from the magnetic field of the stator winding. An induction motor can therefore
be made without electrical connections to the rotor as are found
in universal, DC and synchronous motors. An induction motor's rotor can be
either wound type or squirrel-cage type.
1.1. SQUIRREL CAGE INDUCTION MOTOR
Three-phase squirrel-cage induction motors are widely used in industrial drives
because they are rugged, reliable and economical. Single-phase induction motors are used
extensively for smaller loads, such as household appliances like fans. Although
traditionally used in fixed-speed service, induction motors are increasingly being used
with variable-frequency drives (VFDs) in variable-speed service. VFDs offer especially
important energy savings opportunities for existing and prospective induction motors in
variable-torque centrifugal fan, pump and compressor load applications. Squirrel cage
induction motors are very widely used in both fixed-speed and variable-frequency
drive (VFD) applications. Variable voltage and variable frequency drives are also used in
variable-speed service.
1.1.1 PRINCIPLES OF OPERATION

In both induction and synchronous motors, the AC power supplied to the

motor's stator creates a magnetic field that rotates in time with the AC oscillations.
Whereas a synchronous motor's rotor turns at the same rate as the stator field, an
induction motor's rotor rotates at a slower speed than the stator field. The induction motor
stator's magnetic field is therefore changing or rotating relative to the rotor. This induces
an opposing current in the induction motor's rotor, in effect the motor's secondary
winding, when the latter is short-circuited or closed through an external impedance. The
rotating magnetic flux induces currents in the windings of the rotor, in a manner similar
to currents induced in a transformer's secondary winding(s). The currents in the rotor
windings in turn create magnetic fields in the rotor that react against the stator field. Due
to Lenz's Law, the direction of the magnetic field created will be such as to oppose the
change in current through the rotor windings. The cause of induced current in the rotor
windings is the rotating stator magnetic field, so to oppose the change in rotor-winding
currents the rotor will start to rotate in the direction of the rotating stator magnetic field.
The rotor accelerates until the magnitude of induced rotor current and torque balances the
applied load. Since rotation at synchronous speed would result in no induced rotor
current, an induction motor always operates slower than synchronous speed. The
difference, or "slip," between actual and synchronous speed varies from about 0.5 to
5.0% for standard Design B torque curve induction motors. The induction machine's
essential character is that it is created solely by induction instead of being separately
excited as in synchronous or DC machines or being self-magnetized as in permanent
magnet motors.

For rotor currents to be induced, the speed of the physical rotor must be lower than

ns
that of the stator's rotating magnetic field ( ); otherwise the magnetic field would not

be moving relative to the rotor conductors and no currents would be induced. As the
speed of the rotor drops below synchronous speed, the rotation rate of the magnetic field
in the rotor increases, inducing more current in the windings and creating more torque.
The ratio between the rotation rate of the magnetic field induced in the rotor and the
rotation rate of the stator's rotating field is called slip. Under load, the speed drops and
the slip increases enough to create sufficient torque to turn the load. For this reason,
induction motors are sometimes referred to as asynchronous motors. An induction motor
can be used as an induction generator, or it can be unrolled to form a linear induction
motor which can directly generate linear motion.

1.2 MULTI LEVEL INVERTER

Multilevel inverter is one of the most recent and popular type of advances in power
electronics. It synthesizes desired output voltage waveform from several dc sources used
as input for the multilevel inverter. There are two techniques for improving the quality of
the output voltage and efficiency. First, new novel topology for multilevel inverter is
introduced which reduces the number of switches compared to other for the same level of
output voltage. Second, selective harmonics elimination stepped waveform method is
used to eliminate the lower order harmonics.

The concept of multilevel converters has been introduced since 1975. The cascade
multilevel inverter was first proposed in 1975. Separate DC-sourced full-bridge cells are
placed in series to synthesize a staircase AC output voltage. The term multilevel began
with the three-level converter. Subsequently, several multilevel converter topologies have
been developed. The advantages of cascade multilevel inverters were prominent for
motor drives and utility applications. The cascade inverter has drawn great interest due to
the great demand of medium-voltage high-power inverters. These multilevel inverters can
extend rated inverter voltage and power by increasing the number of voltage levels. They
can also increase equivalent switching frequency without the increase of actual switching
frequency, thus reducing ripple component of inverter output voltage and electromagnetic
interference effects.

A multilevel converter can be implemented in many different ways. The simplest

techniques involve the parallel or series connection of conventional converters to form
the multilevel waveforms. More complex structures effectively insert converters within
converters. The voltage or current rating of the multilevel converter becomes a multiple
of the individual switches, and so the power rating of the converter can exceed the limit
imposed by the individual switching devices.
In last few years there is growing interest in multilevel topologies, because of many
possibilities of expanding areas of power electronics use. It can also extend the
application of power converters to higher voltage and power ratio. Introducing multilevel
converters to power conditioning, drives, power generation and power distribution small
and medium voltage (2 to 15kV) applications is very promising idea.
Multilevel converters synthesize output voltage from more than two voltage levels.
Thus, the output signals spectrum is significantly improved in comparison to classical
two level converter. The main drawback of multiphase multilevel converters is number of
switches which is growing when number of levels is increasing. Other drawback of those
converters is requirement of multiple DC voltage sources, mainly provided by capacitors.
Balancing voltage sources during operation under different load conditions is an
important challenge. In spite of these drawbacks, introducing multilevel converters will
decrease switching losses (smaller voltage on the power device) in comparison with two
level appliance, allowing to increase switching frequency and as consequence decrease
requirements for reactive components. This, in turn, results in converter weight,
dimension and cost reduction.

1.3. INVERTERS

Recent advances in the power-handling capabilities of static switch devices such

as IGBTs with voltage rating up to 4.5 kV commercially available, has made the use of
the voltage source inverters (VSI) feasible for high-power applications. High power and
high-voltage conversion systems have become very important issues for the power
electronic industry handling the large ac drive and electrical power applications at both
the transmission and distribution levels. For these reasons, a new family of multilevel
inverters has emerged as the solution for working with higher voltage levels. Multilevel
inverters include an array of power semiconductors and capacitor voltage sources, the
output of which generate voltages with stepped waveforms. Capacitors, batteries, and
renewable energy voltage sources can be used as the multiple dc voltage sources. The
commutation of the power switches aggregate these multiple dc sources in order to
achieve high voltage at the output; however, the rated voltage of the power
semiconductor switches depends only upon the rating of the dc voltage sources to which
they are connected.
Switch-mode dc-to- ac inverters used in ac power supplies and ac motor drives
where the objective is to produce a sinusoidal ac output whose magnitude and frequency
can both be controlled. Practically, we use an inverter in both single-phase and three
phase ac systems. A half-bridge is the simplest topology, which is used to produce a two
level square-wave output waveform. A center-tapped voltage source supply is needed in
such a topology. It may be possible to use a simple supply with two well-matched
capacitors in series to provide the center tap. Today, multilevel inverters are extensively
used in high-power applications with medium voltage levels. The field applications
include use in laminators, mills, conveyors, pumps, fans, blowers, compressors, and so
on.
 Fig 1.1 Classification of inverter
1.4 TWO LEVEL INVERTER
H topology has many redundant combinations of switches positions to produce the
same voltage levels. As an example, the level zero can be generated with switches in
position S(1) and S(2), or S(3) and S(4), or S(5) and S(6), and so on.
Another characteristic of H converters is that they only produce an odd number of
levels, which ensures the existence of the 0V level at the load .For example, a 51-level
inverter using an H configuration with transistor-clamped topology requires 52
transistors, but only 25 power supplies instead of the 50 required when using a single leg.
Therefore, the problem related to increasing the number of levels and reducing the size
and complexity has been partially solved, since power supplies have been reduced to
50%.
The single-phase H Bridge of cascaded inverter. The ac terminal voltages of each
bridge are connected in series. Unlike the diode clamp or flying capacitors inverter, the
cascaded inverter does not require any voltage-clamping diodes or voltage balancing
capacitors.
 This configuration is useful for constant frequency applications such as active front-
end rectifiers, active power filters, and reactive power compensation. In this case, the
power supply could also be voltage regulated dc capacitor. The circuit diagram consists
of two cascade bridges. The load is connected in such a way that the sum of output of
these bridges will appear across it. The ratio of the power supplies between the auxiliary
bridge and the main bridge is 1:3. One important characteristic of multilevel converters
using voltage escalation is that electric power distribution and switching frequency
present advantages for the implementation of these topologies.
The full-bridge topology is used to synthesize a three-level square-wave
output waveform. The half-bridge and full-bridge configurations of the single-phase
voltage source inverter are shown in Fig. 1.2 and 1.3, respectively.
In a single-phase half-bridge inverter, only two switches are needed. To avoid
shoot-through fault, both switches are never turned on at the same time. S1 is turned on
and S2 is turned off to give a load voltage, VAO in Fig. 1.2, of +V s/2 . To complete one
cycle, S1 is turned off and S2 is turned on to give a load voltage, VAO , of -V s/2.

Fig 1.2: Half Bridge Inverter

 Fig 1.3: Full Bridge Inverter

In full bridge configuration, turning on S1 and S4 and turning off S2 and S3 give a voltage
of VS between point A and B (VAB ) in Fig. 1.3, while turning off S1 and S4 and turning on
S2 and S3 give a voltage of -Vs .
Table 1.1: Switching pattern of 3 level full bridge inverter

Conducing Switches Load Voltage VAB

S1,S4 +Vs
S1,S4 -Vs
S1,S4 or S1,S4 0

Table 1.1 Shows the voltage levels and their corresponding switching state condition to
generate zero level in a full-bridge inverter, the combination can be S 1 and S2 on while S3
and S4 off or vice versa. Note that S1 and S3 should not be closed at the same time, nor
should S2 and S4. Otherwise, a short circuit would exist across the dc source.
The output waveform of half bridge and full-bridge of single-phase voltage source
inverter are shown in Fig. 1.4 and 1.5 respectively.
Fig 1.4 shows the output wave form of half bridge to get positive half cycle S 1 is turned
on and S2 is turned off to give a load voltage, VAO of +V s/2. To complete one cycle, S1 is
turned off and S2 is turned on to give a load voltage, VAO , of -V s/2.

Fig 1.5 Output waveform of Full Bridge Inverter to get positive half cycle s1 will be in
on state and s4 will be in off state to give a load voltage, Vao or vice versa

1.4. MULTILEVEL INVERTER

A voltage level of three is considered to be the smallest number in multilevel

converter topologies. Due to the bi-directional switches, the multilevel VSC can work in
both rectifier and inverter modes. This is why most of the time it is referred to as a
converter instead of an inverter in this dissertation. A multilevel converter can switch
either its input or output nodes (or both) between multiple (more than two) levels of
voltage or current. As the number of levels reaches infinity, the output THD approaches
zero. The number of the achievable voltage levels, however, is limited by voltage-
imbalance problems, voltage clamping requirements, circuit layout and packaging
constraints complexity of the controller, and, of course, capital and maintenance costs.

Three different major multilevel converter structures have been applied in

industrial applications: cascaded H-bridges converter with separate dc sources, diode
clamped, and flying capacitors. The multilevel inverter structures are the main focus of
discussion in this chapter; however, the illustrated structures can be implemented for
rectifying operation as well. Although each type of multilevel converters share the
advantages of multilevel voltage source inverters, they may be suitable for specific
application due to their structures and drawbacks. Operation and structure of some
important type of multilevel converters are discussed in the following sections.
In a multilevel VSI, the dc-link voltage Vdc is obtained from any equipment which
can yield stable dc source. Series connected capacitors constitute energy tank for the
inverter providing some nodes to which multilevel inverter can be connected. Primarily,
the series connected capacitors will be assumed to be any voltage sources of the same
value. Each capacitor voltage Vc is given by

Vc=Vdc/ (n-1)

Where n denotes the number of level. Fig 1.6 shows a schematic diagram of one
phase leg of inverters with different number of levels, for which the action of the power
semiconductors is represented by an ideal switch with several positions. A two-level
inverter generates an output voltage with two values (levels) with respect to the negative
terminal of the capacitor, while the three-level inverter generates three voltages, and so
on.
Fig. 1.6 One phase leg of an inverter with (a) two levels, (b) three levels, and (c) n levels.

The term multilevel starts with the three-level inverter introduced by Nabae. By
increasing the number of levels in the inverter, the output voltages have more steps
generating a staircase waveform, which has a reduced harmonic distortion. However, a
high number of levels increases the control complexity and introduces voltage imbalance
problems.
An inverter is a device that converts dc input power to ac output power at desired
output of voltage and frequency.

A multilevel converter has several advantages over a conventional two-level

converter that uses high switching frequency pulse width modulation (PWM). The
attractive features of a multilevel converter can be briefly summarized as follows.
Staircase waveform quality: Multilevel converters not only can generate the output
voltages with very low distortion, but also can reduce the dv/dt stresses; therefore
electromagnetic compatibility (EMC) problems can be reduced.
Common-mode (CM) voltage: Multilevel converters produce smaller CM voltage;
therefore, the stress in the bearings of a motor connected to a multilevel motor drive can
be reduced. Furthermore, CM voltage can be eliminated by using advanced modulation
strategies such as that proposed in.
 Input current: Multilevel converters can draw input current with low distortion.
Switching frequency: Multilevel converters can operate at both fundamental switching
frequency and high switching frequency PWM. It should be noted that lower switching
frequency usually means lower switching loss and higher efficiency.
Unfortunately, multilevel converters do have some disadvantages. One particular
disadvantage is the greater number of power semiconductor switches needed Moreover,
three different major multilevel converter structures have been reported in the literature:
cascaded H-bridges converter with separate dc sources, diode clamped (neutral-clamped),
and flying capacitors (capacitor clamped). Moreover, abundant modulation techniques
and control paradigms have been developed for multilevel converters such as sinusoidal
pulse width modulation (SPWM), selective harmonic elimination (SHE-PWM), space
vector modulation (SVM), and others. In addition, many multilevel converter
applications focus on industrial medium-voltage motor drives, utility interface for
renewable energy systems, flexible AC transmission system (FACTS) , and traction drive
systems.
As previously mentioned, three different major multilevel converter structures
have been applied in industrial applications: cascaded H-bridges converter with separate
dc sources, diode clamped, and flying capacitors. Before continuing discussion in this
topic, it should be noted that the term multilevel converter is utilized to refer to a power
electronic circuit that could operate in an inverter or rectifier mode. The multilevel
inverter structures are the focus of in this chapter; however, the illustrated structures can
be implemented for rectifying operation as well.
ADVANTAGES OF MULTILEVEL INVERTERS

In High power circuits if you switch at high frequency switching losses are high.
Particularly in Low power & low voltage circuits Mosfets are used.
In Mosfets the conductions losses 70% of total losses and switching losses are 30 %
of total losses.
So switching the Mosfets at high switching frequency not effects the total losses
much.
In case of High power high voltage circuits IGBTs are used.
 In IGBTs the conduction losses 50 % of total loss and switching losses are 50 % of
total loss. So if you switch at high frequency the efficiency of the system reduces.
SO in High power High frequency PWM is not suitable, so we need to use multilevel
inverter for high power application.
The most attractive features of multilevel inverters are as follows.
They can generate output voltages with extremely low distortion and lower dv/dt.
They draw input current with very low distortion.
They generate smaller common-mode (CM) voltage, thus reducing the stress in
the motor bearings. In addition, using sophisticated modulation methods, CM
voltages can be eliminated.
They can operate with a lower switching frequency.

1.6 TYPES OF MULTILEVEL INVERTER

 Fig 1.7 Classification of Multilevel Inverters

In General, the multilevel inverters are classified as Single DC source and

Multiple DC sources or Several Separate DC Sources (SDCS).Both the Diode Clamped
Multilevel Inverter and the Flying Capacitor inverter comes under the category of Single
DC source where the input supply is taken from a single DC source.

1.6.1 DIODE-CLAMPED MULTILEVEL INVERTER

The most commonly used multilevel topology is the diode clamped
inverter, in which the diode is used as the clamping device to clamp the dc bus voltage so
as to achieve steps in the output voltage. The neutral point converter proposed by Nabae,
Takahashi, and Akagi in 1981 was essentially a three-level diode-clamped inverter. A
three-level diode clamped inverter consists of two pairs of switches and two diodes. Each
switch pairs works in complimentary mode and the diodes used to provide access to mid-
point voltage. In a three-level inverter each of the three phases of the inverter shares a
common dc bus, which has been subdivided by two capacitors into three levels.
The DC bus voltage is split into three voltage levels by using two series
connections of DC capacitors,C1 and C2. The voltage stress across each switching device
is limited to Vdc through the clamping diodes Dc1 and Dc2. It is assumed that the total dc
link voltage is Vdc and mid point is regulated at half of the dc link voltage, the voltage
across each capacitor is Vdc/2 (Vc1=Vc2=Vdc/2). In a three level diode clamped inverter, there
are three different possible switching states which apply the stair case voltage on output
voltage relating to DC link capacitor voltage rate. For a three-level inverter, a set of two
switches is on at any given time and in a five-level inverter, a set of four switches is on at
any given time and so on. Fig 1.8 shows the circuit for a diode clamped inverter for a
three-level and a five-level inverter

(a)
 (b)

Fig 1.8: Topology of the diode-clamped inverter (a) three-level inverter, (b) five -level
inverter
Table 1.2: Switching pattern of 3 levels Diode clamped MLI
Table 1.2 shows the voltage level and switching state conditions of 3- levels diode
clamped multilevel inverter to generate +vdc/2 S1 is on state and S2 and S1 and S2 is in
off state and vice versa
Fig 1.9 shows the phase voltage and line voltage of the three-level inverter in the
balanced condition. The line voltage Vab consists of a phase-leg a voltage and a phase-leg
b voltage. The resulting line voltage is a 5-level staircase waveform for three-level
inverter and 9-level staircase waveform for a five-level inverter. This means that an N-
level diode-clamped inverter has an N-level output phase voltage and a (2N-1)-level
output line voltage. In general the voltage across each capacitor for an N level diode
clamped inverter at steady state is Vdc/ (N-1). Although each active switching device is
required to block only a voltage level of Vdc, the clamping diodes require different ratings
for reverse voltage blocking.

Fig: 1.9 Output voltage in three-level diode- clamped inverter (a) leg voltage(b) output
phase voltage

In general for an N level diode clamped inverter, for each leg 2(N-1) switching
devices, (N-1) * (N-2) clamping diodes and (N-1) dc link capacitors are required. By
increasing the number of voltage levels the quality of the output voltage is improved and
the voltage waveform becomes closer to sinusoidal waveform. However, capacitor
voltage balancing will be the critical issue in high level inverters. When N is sufficiently
high, the number of diodes and the number of switching devices will increase and make
the system impracticable to implement. If the inverter runs under pulse width modulation
(PWM), the diode reverse recovery of these clamping diodes becomes the major design
challenge.

FEATURES
High-Voltage Rating Required for Blocking Diodes. Although each active
switching device is only required to block a voltage level of Vdc/(m - l ), the
clamping diodes
ADVANTAGES

All of the phases share a common dc bus, which minimizes the capacitance
requirements of the converter. For this reason, a back-to-back topology is not
only possible but also practical for uses such as a high-voltage back-to-back
inter-connection or an adjustable speed drive.
The capacitors can be pre-charged as a group.
Efficiency is high for fundamental frequency switching.

DISADVANTAGES

Real power flow is difficult for a single inverter because the intermediate dc
levels will tend to overcharge or discharge without precise monitoring and
control.
The number of clamping diodes required is quadratically related to the
number of levels, which can be cumbersome for units with a high number of
levels.

1.6.2 FLYING-CAPACITOR MULTILEVEL INVERTER (FCMI)

A FCMI shown in Fig. 1.10 uses a ladder structure of dc side capacitors
where the voltage on each capacitor differs from that of the next capacitor. To generate m-
level staircase output voltage, m-1 capacitors in the dc bus are needed. Each phase-leg
has an identical structure. The size of the voltage increment between two capacitors
determines the size of the voltage levels in the output waveform.
 Fig 1.10: Five level Flying capacitor MLI
In fact, there is more than one combination to produce output voltages V2, V3,
and V4. That makes the FCMI more flexibility than DCMI. Table 3, however, shows only
one possible combination.
Table 1.3 Switching States of Five level Capacitor MLI
Switch state
Sa1 Sa2 Sa3 Sa4 Sa1 Sa2 Sa3 Sa4
Output VAO
V5=Vdc 1 1 1 1 0 0 0 0

V4=3Vdc /4 1 1 1 0 1 0 0 0

V3=Vdc/2 1 1 0 0 1 1 0 0

V2=Vdc/4 1 0 0 0 1 1 1 0

V1=0. 0 0 0 0 1 1 1 1

In table 1.3 the switching states of the Five level Flying capacitor multilevel inverter. In
this five levels are 0, Vdc,Vdc/4, Vdc/2,3Vdc/4 and Vdc switching state on position is 1 off
position is 0.
ADVANTAGES AND DISADVANTAGES OF (FCMLI).
Compared to the diode-clamped inverter, this topology has several unique and
attractive features as described below:
i) Added clamping diodes are not needed.
ii) It has switching redundancy within the phase, which can be used to balance the flying
capacitors so that only one dc source is needed.
iii) The required number of voltage levels can be achieved without the use of the
transformer. This assists in reducing the cost of the converter and again reduces power
loss.
iv) Unlike the diode clamped structure where the series string of capacitors share the
same voltage, in the capacitor-clamped voltage source converter the capacitors within a
phase leg are charged to different voltage levels.
v) Real and reactive power flow can be controlled.
vi) The large number of capacitors enables the inverter to ride through short duration
outages and deep voltage sags.
DISADVANTAGES
i) Converter initialization i.e., before the converter can be modulated by any modulation
scheme the capacitors must be set up with the required voltage level as the initial charge.
This complicates the modulation process and becomes a hindrance to the operation of the
converter.
ii) Control is complicated to track the voltage levels for all of the capacitors.
iii) Precharging all of the capacitors to the same voltage level and startup are complex.
iv) Switching utilization and efficiency are poor for real power transmission.
v) Since the capacitors have large fractions of the dc bus voltage across them, rating of
the capacitors are a design challenge.
vi) The large numbers of capacitors are both more expensive and bulky than clamping
diodes in multilevel diode-clamped converters.
vii) Packaging is also more difficult in inverters with a high number of levels.
1.6.3 CASCADED H-BRIDGE MULTILEVEL INVERTER
The cascaded H-bridge multilevel Inverter uses separate dc sources (SDCSs).
The multilevel inverter using cascaded-inverter with SDCSs synthesizes a desired voltage
from several independent sources of dc voltages, which may be obtained from batteries,
fuel cells, or solar cells. This configuration recently becomes very popular in ac power
supply and adjustable speed drive applications. This new inverter can avoid extra
clamping diodes or voltage balancing capacitors. Again, the cascaded multilevel inverters
are classified depending the type of DC sources used throughout the input.

In fig 1.11 shows the single-phase structure of an m-level cascaded inverter is

each separate dc source (SDCS) is connected to a single-phase full-bridge, or H-bridge,
inverter. Each inverter level can generate three different voltage outputs, +V dc, 0, and

Vdc by connecting the dc source to the ac output by different combinations of the four

switches, S1, S2, S3, and S4. To obtain +Vdc, switches S1 and S4 are turned on, whereas

Vdc can be obtained by turning on switches S2 and S3. By turning on S1 and S2 or S3

and S4, the output voltage is 0. The ac outputs of each of the different full-bridge inverter

levels are connected in series such that the synthesized voltage waveform is the sum of
the inverter outputs.
 Fig 1.11: Single phase structures of Cascaded inverter (a) 3-level, (b)5-level, (c) 7-level
One more alternative for a multilevel inverter is the cascaded multilevel inverter
or series H-bridge inverter. The series H-bridge inverter appeared in 1975. Cascaded
multilevel inverter was not fully realized until two researchers, Lai and Peng. They
patented it and presented its various advantages in 1997. Since then, the CMI has been
utilized in a wide range of applications. With its modularity and flexibility, the CMI
shows superiority in high-power applications, especially shunt and series connected
FACTS controllers. The CMI synthesizes its output nearly sinusoidal voltage waveforms
by combining many isolated voltage levels. By adding more H-bridge converters, the
amount of Var can simply increase without redesign the power stage, and build-in
redundancy against individual H-bridge converter failure can be realized.
A series of single-phase full bridges makes up a phase for the inverter. A three-
phase CMI topology is essentially composed of three identical phase legs of the series-
chain of H-bridge converters, which can possibly generate different output voltage
waveforms and offers the potential for AC system phase-balancing. This feature is
impossible in other VSC topologies utilizing a common DC link. Since this topology
consists of series power conversion cells, the voltage and power level may be easily
scaled. The dc link supply for each full bridge converter is provided separately, and this is
typically achieved using diode rectifiers fed from isolated secondary windings of a three-
phase transformer. Phase-shifted transformers can supply the cells in medium-voltage
systems in order to provide high power quality at the utility connection.
1.6.4 SYMMETRICAL CASCADED H-BRIDGE MULTILEVEL INVERTER
If all the input sources are of equal magnitude, it is known as Symmetrical H-
Bridge inverter as shown in fig 1.12 and the switching sequence is given in table 4 .Here
both the full bridge inverters are fed with different sources of equal magnitude.

Fig 1.12: Symmetrical five level Cascaded H-Birdge inverter

In fig 1.12 each SDCS of equal magnitude is associated with a single-phase
full-bridge inverter. The ac terminal voltages of different level inverters are connected in
series. By different combinations of the four switches, S1-S4, each inverter level can
generate three different voltage outputs, +Vdc, -Vdc, and zero. The ac output of each of
the different level of full-bridge inverters are connected in series such that the synthesized
voltage waveform is the sum of the inverter outputs. In this topology, the number of
output phase voltage levels is defined by m = 2s+1, where s is the number of dc sources.
 5-level cascaded-inverters will have two SDCSs and two full-bridge cells.
Table 1.4: Switching states of Symmetrical five level cascaded H-Bridge inverter

Switches ON Voltage level

S1, S2, S5 and D7 Vdc/2
S1, S2, S6and S5 Vdc
S1, S2, S6 and D8 Vdc/2
S1, D3, S6 and D8 0
S3, S4, S6 and D8 -Vdc/2
S3, S4, S7 and S8 -Vdc
S3, S4, D6 and S8 -Vdc/2
S1, S3, D6 and S8 0

Table 1.4 shows the switching table for the five level cascaded inverter. Here, 2 Full
Bridges are used and are cascaded to each other. The Switches S1, S2, S3,and S4 are from
upper H-Bridge and Switches S5 S6 S7 and S8 are from lower H-Bridge .By giving correct
switching patter n ,we get 5 voltage levels i.e 2V dc,Vdc,0,-2Vdc,- Vdc, S1,S2,S5,D7 are on .To
get 2Vdc, S1,S2,S6,S5 are kept on .
 Vdc
Vdc/2

-Vdc/2

-Vdc

Fig 1.13 Output waveform of Symmetrical Cascaded H-Bridge multilevel Inverter

1.6.5 ASYMMETRICAL CASCADED H-BRIDGE MULTILEVEL INVERTER

The cascaded H-Bridge multilevel inverter with two SDCS with unequal
magnitude is known as Asymmetrical Cascaded H-Bridge multilevel Inverter. The
following is fig 1.14 of Asymmetrical Cascaded H-Bridge multilevel Inverter where it is
having 2 unequal DC sources +2Vdc/3 and +Vdc/3.

Fig.1.14 Asymmetrical Cascaded H-Bridge multilevel Inverter

By using this type of Asymmetrical configuration, for a n bridge inverter we
can get 3n+1 voltage levels and n Capacitors of each rating nV dc/(n+1), Vdc/(n+1) to get Vdc
max and 6n switches of each voltage rating is Vdc/(n+1).The following is the switching table
of Asymmetrical Cascaded H-Bridge multilevel Inverter
Table 1.5: Switching states of Asymmetrical five level cascaded H-Bridge inverter

Switches ON Voltage level

S4, S2, S5 and S6 Vdc/3
S1, S2, S8 and S6 2Vdc/3
S1, S2, S5and S6 Vdc
S4, S2, S7 and S8 -Vdc/3
S3, S4, S6 and S8 -2Vdc/3
S3, S4, S7 and S8 -Vdc
S4, S2, S8 and S6 0

In table 1.5 the switching states of the seven level Asymmetrical Cascaded H-Bridge
multilevel Inverter. In this seven levels are 0, Vdc, Vdc/3, 2Vdc/3, -Vdc/3 and 2Vdc/3,
Vdc switching state on position is 1 off position is 0.
 CHAPTER 2
LITERATURE SURVEY
2.1 VSI FED INDUCTION MOTOR DRIVE
Voltage source inverters (VSI), together with induction motors are being used
ever more frequently as drive units in various field. In particular, they are frequently used
in controlling these drives and in microprocessors technology, which improves the static
and dynamic properties of the drive. The widespread implementation of the variable
speed drives is also challenging designers and users to investigate the steady-state and
transient operating conditions of these drives.
The SPICE circuit simulator is extensively used in power electronics circuits.
However, there are some of difficulties in this environment such as, long execution time
and frequent numerical convergence problems. Also, computer-aided analysis and
synthesis packages such have been used in power electronic circuits. But, the steady-state
and transient performance of the three-phase voltage source inverters (VSI) with space
vector modulation (SVM) feeding an induction motor in exact analytical form has not
received much attention. Analytical results are also useful since performance equations,
from which the rms and average currents of the inverter or the load, can be obtained
directly without the need to perform numerical treatment of the system.
The steady-state performance of the three-phase voltage-source or the current-
source six-step inverters (without modulation) was presented in, but in most cases, pulse-
width modulation is used to control output voltage.
 Several papers dealing with SVM technique have been published, emphasizing
the effects of the current ripple produced by different switching sequence. Most authors
use purely numerical calculations, which can only be made for certain machine values
and PWM parameters. Recent developments in high switching frequency power devices,
such as IGBT, offer the possibility of developing high frequency PWM control
techniques. Voltage waveforms of such modulated converters contain many pulses and
gaps. The analytical solution of performance equations is much more complicated
because numerous algebraic equations must be solved.
Until now, an analytical closed-form solution for SVM VSI feeding induction
motor has not been presented the analytical results were mainly used to solve problems
associated with sinusoidal supplies.
The developed model has the main advantage that the design parameters, such as
voltage and currents ratings of the power semiconductor switches and the motor current
can be easily calculated. The convergence problem is also avoided and computation time
is greatly reduced. The proposed model can be easily extended to different power
conversion topologies, such as dcdc converters and matrix converters.
All the analytical waveforms were visualized from the derived relations with the
program MATHCAD.
The solution uses the Laplace transform and modified z -transform of the space
vectors (mixed p z approach). The analysis is made on the assumptions that the motor
runs at a constant speed, no-saturation occurs, eddy currents phenomenon is neglected,
space harmonics of the air-gap MMF are not taken into account, and switching devices
are ideal [1].
2.2 INDIRECT FIELD ORIENTATION CONTROL FOR INDUCTION MOTOR
The voltage-source-inverter (VSI)-fed induction machine drive systems have
many advantages such as a rugged and low-cost rotor structure, capability of high
waveform fidelity with pulse width-modulation (PWM) operation, reasonably high
performance, etc. However, their applications are still limited to the lower end of the
high-power range due to the limitations on the ratings of the gate-turn-off-type
semiconductor power devices. To achieve a high power rating in such systems, multilevel
inverters have been developed in the past decade as a promising approach. Another strong
contender in achieving high power is the multiphase-inverter-fed multiphase (in excess of
three) induction machine drive system. In addition to enhancing the power rating, a
multiphase system also has the merit of high reliability at the system level. In particular,
with loss of one or more of the stator winding excitation sets, a multiphase induction
machine can continue to be operated with an asymmetrical winding structure and
unbalanced excitation. The potential benefits of a multiphase induction machine drive
result from the 30o displacement angle between the two three-phase sets of a six-phase

machine, leading to elimination of all the air-gap harmonics of order (6n 1, n = 1, 3,

5,. ). Consequently, all the rotor copper losses produced by these harmonics as well as
all the torque harmonics of the order 6n are eliminated. Large multiphase machines for
ship propulsion have already been prototyped industrially, and are currently undergoing
commercial evaluation.
The concept of multiphase is not new. There is already a body of literature
describing multiphase machines, of which are but a representative sample. A
comprehensive survey of the literature on this topic is given in. An experimental
investigation about the power-rating enhancement in a multiphase machine under
balanced and unbalanced steady-state condition is depicted in. Recently, Williamson and
Smith have presented a detailed study about the pulsating torque and losses in
multiphase. A variety of transformations have been proposed in the past for the analysis
of multiphase induction machines. Symmetrical component theory and matrix theory
have served as the theoretical foundations for these transformations.
The steady-state performance of a symmetrical six-phase induction motor driven
by a voltage-source six-step inverter is presented in, where the large stator current

harmonics of order (6n 1, n = 1, 3, 5,. ) have been noticed. These harmonics

generate additional losses in the machine resulting in the increase of size and cost of both
inverter and machine. The same additional losses have been noted in, where a space-
vector modulation technique for dual three-phase drives has been developed. Thus, the
subsequent investigations have been focused on the minimization of the stator current
harmonics.
 Another solution to this problem is the use of an appropriate PWM technique
without modifying the machine design and construction. Zhao and Lipo have presented a
unique vector space decomposition approach in to obtain the machine model and suitable
PWM technique, which considerably reduces the current harmonics with some
implementation problems caused by the required computational time. To reduce the
computational requirements, other PWM techniques have been reported in and.
The specific issue of current control is the problem of the unbalanced current
sharing between the two three-phase winding sets, due to the small asymmetries that
cannot be eliminated.
The authors have suggested that the unbalanced current sharing can be minimized
by using the phase variable coordinates in current loops in the speed control scheme [24].
A direct rotor field oriented-control (FOC)-strategy-based vector space decomposition
approach [19], and addressing the problem of current unbalance has been recently
reported in [25]. Almost all the control schemes discussed above use the vector space-
decomposition technique, and have been developed for the machine with 30 o electrical
phase displacement between the two three-phase winding sets. Two different schemes are
required for the operation and control of the machine under balanced and unbalanced
condition. The computational time for most of these schemes is high, and special
attention is needed especially when the use of low-cost digital signal processors (DSPs)
for motor control is required. This paper, therefore, presents a simple indirect FOC
scheme for operation and control of a multiphase induction machine with an arbitrary
displacement between the two three-phase winding sets. The control strategy is based on
the two-axis (d q) model of the machine, and can be easily extended for the operation
and control of a machine under unbalanced operating condition by the simple
modification in the machine model [12], and with the help of simple IFTHEN logic. No
separate modeling and control scheme is required. The current unbalance is automatically
eliminated in this scheme. The practical implementation of the scheme is simple. Several
informative simulation and experimental results are provided to verify the validity of the
proposed scheme [3].
2.3 MULTI LEVEL INVERTER DC AC CONVERSION TOPOLOGY
The different topologies presented in the literature as multilevel converters [1] show a
number of characteristics in common, giving them some clear advantages over bi level
converters, such as:
reduction in the commutation frequency applied to the power components;
reduction in the voltages applied to the main power switches, enabling operation
at higher load voltages;
transient voltages automatically limited.
The main disadvantage associated with the multilevel configurations is their
circuit complexity, requiring a high number of power switches that must be commutated
in a precisely determined sequence by a dedicated (and complex) modulator circuit; they
also require a great number of auxiliary dc levels, provided either by independent
supplies or, more commonly, by a cumbersome array of capacitive voltage dividers. In
this case, ensuring that the dc voltages are kept in equilibrium is another factor that
increases the complexity of the modulator circuit.
In the past, these disadvantages were almost overwhelming, due to the cost
differences they produced between multilevel and standard configurations. Multilevel
converters were used only in some high power applications such as high power motor
drivers in marine, mining, or chemical industries applications, high power transmission,
power line conditioners, etc. In all these applications their advantages compensate the
cost differential.
The continuing development of high power high switch frequency devices such as
insulated-gate bipolar transistors (IGBTs) working at 3.3, 4.5, and 6.5 kV, and insulated-
gate commutated thyristors (IGCT) working at 4.5 or 6 kV has improved overall
converter performance, renewing the interest in multilevel topologies, that may be able to
compete in the market with the standard two-level pulse width modulation (PWM)
converters at lower power ranges. Initially, the main interest was concentrated in three-
level configurations, but recently four and five-level converters have also been reported.
Even taking into account the technological tendency to lower the prize at which
multilevel converters can compete with standard configurations, the prize difference will
remain unless the complexity issue is solved both at the power circuit and at the
modulator circuit levels.
As a contribution to solve these twin problems (cumbersome power stages and complex
firing control circuits), this work proposes a new converter topology, presented as a block
diagram in Fig.2.1. This topology includes an H-bridge stage with an auxiliary
bidirectional switch, drastically reducing the power circuit complexity, and a modulator
and firing control circuit developed using a field programmable gate array (FPGA)
programmable circuit, to simplify the modulator circuit design and implementation.

Fig.2.1. New topology block diagram.

CHAPTER 3
PROPOSED CONCEPT
3.1 INTRODUCTION
Induction motor has gained an upper hand in every sphere of motoring
application due to its low cost, reliability, low maintenance, no brushes to wear out
and very simple rotor assembly. Squirrel cage induction machine when operated at
constant line voltage and frequency delivers constant speed. However in industries
the applications is not confined to constant speed. Variable speed can be achieved
using Induction motor drives where speed control is possible below the rated speed
[1]. Main application of Induction Motor drives are Fans, blowers, Compressor,
Pumps, machine tools like lathe, drilling machine, lifts, and conveyer belts etc.
Induction motor is widely used to drive the industrial pump
loads. Centrifugal pump are the most common type of kinetic pump, and it is
widely used in the field of irrigation and industrial fluid pumping applications [2].
In this Paper our objective is to analyze the MLI Fed Induction Motor drive with
IFOC for pump application [3].
We have connected a Multilevel Inverter to feed the Induction Motor as it
possesses several advantages over Voltage source Inverters. Multilevel inverters are
suitable for high voltage and high power applications due to their ability to synthesize
waveforms with better harmonic spectrum, reduced filter requirements, suitable for
renewable and distributed
generation system. Using multilevel technique, the amplitude of the output voltage is
increased, switching stress in the devices is reduced and the overall harmonic profile is
improved. Two level inverter output has high harmonic distortion content and cannot be
used for high power applications and drive systems. Multi-level inverters can be used to
replace the two level inverters. For a particular switching frequency, compared with a
two level inverter, the harmonic content is less in case of MLI [4, 5].
There are several control schemes devised for the control of Induction Motor
both in open loop as well as in closed loop.Vector control or Field oriented control
(FOC) of Induction motor is widely accepted control scheme due to its better dynamic
response. In Indirect Field Oriented control (IFOC) scheme speed and position are not
directly measured [3], [14].Speed and position are estimated from parameters such as
phase voltages and currents which are directly measured from Induction motor output.
The closed loop control strategy used in this paper is IFOC
A pump is device that supplies energy to fluid. Pumping application shares about
20% of the total power consumed in Industries. The most common and efficient pumps
used in Industries are centrifugal pumps. Centrifugal pumps are generally sized to operate
at or near the best efficiency point at maximum flow. The maximum flow requirements,
however, frequently occur for a very short period during the operating cycle with the
result that some method of flow control is required. The traditional approach to flow
control has used valves; which increase system pressure, inherently waste energy, and
generally cause the pump to operate at reduced efficiencies. Adjustable speed drives
(ASDs) can achieve reduced flow by providing adjustable speed pumping operation.
This results in reduced system pressure and operation near the pump's Best Efficiency
Point (BEP). In addition, maintenance costs will also be reduced.
In this work a 5 level cascaded H-bridge MLI is used to feed the induction motor
driving the centrifugal pump. Indirect Field oriented control (IFOC) strategy is used for
the closed loop control of the drive. Alternate Phase opposition disposition (APOO)
multicarrier PWM technique is used to produce the control signals for the IGBT
switches. A complete drive is modeled using MATLAB Simulink and the affinity laws
of centrifugal pump is validated using this model.
3.2 CASCADED H BRIDGE MLI
The basic block diagram of a cascaded H bridge MLI is shown in Fig 3.1 Here 4
switches are used in H-shape 2 switches in first leg & 2 in second leg and NOT gate is
connected to upper switch of the first leg and lower switch of the second leg. Not gate is
used in order to avoid short circuit across a leg.

Fig. 3.1. Single H-Bridge

 A three phase five level inverter is used to control the induction motor driving a
pump load. In the proposed drive scheme, Sine Pulse Width Modulation, technique is
used. The multicarrier PWM technique for generating Sinusoidal Pulse Width
Modulation is again subdivided into Phase Disposition techniques and Phase
displacement techniques [6], [7]. Very popular Phase Disposition techniques are Phase
Disposition (PD), Phase Opposition Disposition (POD) and Alternate Phase Opposition
Disposition (A POD). In this paper, Alternate Phase Opposition Disposition (A POD)
technique is used since it has shown better harmonic spectrum compared to PD and POD.
In this technique, alternate carrier waveforms are in phase opposition with each other. In
Fig 3.2 APOD Multicarrier PWM with reference sine wave is shown. The number of H
bridges required per phase to produce a 5 level output is two and these H bridges are
connected in cascade. Increasing no of voltage level results in reducing the voltage stress
across the switching devices and as a whole overall harmonic spectrum of the system is
significantly reduced.
3.3 INDUCTION MOTOR MODELLING NOMENCLATURE
I , I I d, Iq
, : Currents in a-B and d-q reference frame.

IA IB IC
, , , : Currents in ABC reference frame.
 Fig. 3.2. Alternate Phase Opposition Disposition (APOD) Multicarrier
PWM
The mathematical model of induction machine is obtained in synchronously rotating
reference frame [9, 10, and 11 ].Matrix for transforming three phase reference frame to
two phase stationary reference frame - commonly known as Clark's Transformation is
given below.

(3.1)
Matrix for transforming to dq reference frame - Park's Transformation

(3.2)

(3.3)

(3.4)

(3.5)
 (3.6)
Thus the matrix for transforming three-phase rotating to stationary two phase (d-q) frame
can be obtained by-

(3.7)

(3.8)

(3.9)

(3.10)
The machine is modeled with the following direct & quadrature axis voltage equations

(3.11)

(3.12)
Eq. (3.11) and (3.12) gives the Stator voltage in D axis and Q axis. Fig. 3.3 and Fig. 3.4
shows the direct axis and quadrature axis equivalent circuit of Induction Motor
respectively.
 Fig. 3.3. Direct axis equivalent Circuit of Induction Motor

(3.13)

(3.14)
Eq (3.13) and (3.14) gives the Rotor voltage in D axis and Q axis.
V ds V qs V dr V dr
, , and are the stator and rotor voltages in DQ axes

respectively. Eq. (3.15) gives the relation between flux & current for the stator and rotor
in 0 and Q axis component.

(3.15)
 Fig. 3.4. Quadrature axis equivalent Circuit of Induction Motor
i ds i qs i dr
Where, and , are the current in the d-axis and qaxis of the stator, and

iqr Ls Lr
are the d-axis, q-axis rotor currents. is the stator inductance, is the

Lm
rotor inductance and is the mutual inductance between stator and rotor. Thus the

currents in the respective axis can be obtained as,

(3.16)

where,

(3.17)
Mechanical part is modeled with the equations below, the instantaneous electromagnetic
torque is given as,

(3.18)

(3.19)

(3.20)

(3.21)

(3.22)

s ,
Using inverse Parks transformation matrix P( the following equations can be

derived,

(3.23)
 (3
.24)

Thus the Two-axis frame can be modeled as shown below-

(3.25)

These are the equations used in the IFOC model for the determination of magnitude &
flux angle [3].

3.4 IFOC CONTROL

Due to the inherent coupling effect in the machin the scalar control methods of
voltage-fed and current-fed inverter offer a very sluggish control response. A vector or
field oriented control offers a better dynamic response. In vector control, an Induction
Motor is controlled like a separately excited DC motor. In case of a separately excited

f a
DC motor, the field flux and armature flux is established by the respective
 If Ia
field current and armature or torque component of current are independent

Ia
and orthogonal in space such that when torque is controlled by , the field flux is not

affected which results in fast torque response. Similarly, in induction motor vector

I ds I qs
control, the synchronous reference frame currents and are analogous to

If Ia
and , respectively as shown in Fig 3.5 which is the significance of IFOC

I qs
Scheme [8]. Therefore, when torque is controlled by , the rotor flux is not affected

thus giving fast DC motor-like torque response.The drive dynamic model also becomes
simple like that of a dc machine because of decoupling vector control.

In the DFOC scheme rotor speed is calculated by means of position sensors and
encoders fitted in the rotor shaft so it makes the rotor bulky, costly and complicated and
hence overall efficiency of the system is reduced due to the friction and vibration losses
in the rotor shaft. In IFOC scheme, the speed of motor is calculated from the stator
current. An error signal is generated by comparing the speed with the reference value.

The error signal thus generated is then fed to a PI controller P2 (s ) which generates

the reference torque T re . The reference torque is converted to the reference Q axis

current I rqs by machine equations [9]. The reference voltage V rqs is obtained from

I rqs by current controller P4 (s) .The flux Controller P1 (s ) generates I rd

which is compared with the reference flux and provided as input to current
r
controller P3 (s ) .that generates the voltage reference V d . The input of flux

controller P1 (s ) is error obtained between desired rotor flux and calculated flux.
 V ABC
The reference voltages are converted back to three phase rotating reference

which is used as reference voltage for PWM generation.

Fig. 3.5. Significance of IFOC Scheme

Fig. 3.6 shows the block diagram of IFOC Scheme with Induction Motor coupled
with pump load. A PI controller is used for converting the speed error into torque
reference that is converted to corresponding q axis currents by the equation [3.10],
[3.11].
 (3.26)

The reference current is converted to reference voltage by the equation

(3.27)

(3.28)

For flux control, the reference flux is generated using a field weakening block. In field
weakening method, till the base speed is achieved the flux reference is kept constant and
above base speed, the flux is weakened gradually. This was implemented using a lookup
table. The flux reference is converted to the corresponding d-axis current by the above
equations.
 Fig. 3.6. Block Diagram of IFOC Scheme with Induction Motor & Pump Load

3.5 MATHEMATICAL MODEL OF CENTRIFUGAL PUMP

Centrifugal pumps are used on many industrial and commercial applications.

Many of these pumps are operated at fixed speeds, but could provide energy savings
through adjustable speed operation.

Fig. 3.7. Affinity laws for centrifugal pump

 Fig. 3.7 graphically illustrates the physical laws of centrifugal pumping
applications. The flow is directly proportional to speed; pressure is proportional to the
square of the speed; and power is proportional to the cube of the speed. Theoretically, it
would be possible to operate at 50% flow with only 13% of the power required at 100%
flow. Since the power requirements decrease much faster than the reduction in flow, the
potential exists for significant energy reduction at reduced flows. This will help in cost
savings in the long run. The most important choice to be made in selecting pump drives
is the decision to select a non-slip, solid-state, adjustable speed drive. Any such drive can
offer dramatic energy savings by efficiently matching the energy consumed to the
hydraulic load requirements at any given moment

Fig. 3.8. Pump curve describing the head v/s flow

The curve in Fig. 3.8 shows that the pump will produce limited flow if applied to
a piping system in which a large pressure differential is required across the pump to lift
the liquid and overcome resistance to flow(as at point A). Higher flow rates can be
achieved as the required pressure differential is reduced (as at point B)
 CHAPTER 4
MATLAB/SIMULINK MODEL
4.1 INTRODUCTION TO MATLAB:
The name MATLAB stands for MATrix LABoratory. MATLAB was written
originally to provide easy access to matrix software developed by the LINPACK (linear
system package) and EISPACK (Eigen system package) projects.

MATLAB is a high-performance language for technical computing. It integrates

computation, visualization, and programming environment. Furthermore, MATLAB is a
modern programming language environment: it has sophisticated data structures, contains
built-in editing and debugging tools, and supports object-oriented programming. These
factors make MATLAB an excellent tool for teaching and research.

MATLAB has many advantages compared to conventional computer languages

(e.g., C, FORTRAN) for solving technical problems. MATLAB is an interactive system
whose basic data element is an array that does not require dimensioning. The software
package has been commercially available since 1984 and is now considered as a standard
tool at most universities and industries worldwide.
It has powerful built-in routines that enable a very wide variety of computations.
It also has easy to use graphics commands that make the visualization of results
immediately available. Specific applications are collected in packages referred to as
toolbox. There are toolboxes for signal processing, symbolic computation, control theory,
simulation, optimization, and several other fields of applied science and engineering.

4.2 SIMULATION

Simulink is a simulation and model-based design environment for dynamic and

embedded systems, integrated with MATLAB. Simulink, also developed by MathWorks,
is a data flow graphical programming language tool for modeling, simulating and
analyzing multi-domain dynamic systems. It is basically a graphical block diagramming
tool with customizable set of block libraries. It allows you to incorporate MATLAB
algorithms into models as well as export the simulation results into MATLAB for further
analysis. Simulink supports:

system-level design

simulation

automatic code generation

testing and verification of embedded systems.

There are several other add-on products provided by Math Works and third-party
hardware and software products that are available for use with Simulink. The following
list gives a brief description of some of them:

State flow allows developing state machines and flow charts.

Simulink Coder allows the generation of C source code for real-time implementation of
systems automatically.

XPC Target together with x86-based real-time systems provide an environment to

simulate and test Simulink and State flow models in real time on the physical system.

Embedded Coder supports specific embedded targets.

HDL Coder allows to automatically generate synthesizable VHDL and Verilog.

SimEvents provides a library of graphical building blocks for modelling queuing

systems.

Simulink is capable of systematic verification and validation of models through

modelling style checking, requirements traceability and model coverage analysis.
Simulink Design Verifier allows you to identify design errors and to generate test case
scenarios for model checking.

4.2.1 SIMULATION TABLE:

SIMULATION PARAMETERS
PARAMETER VALUE

1 V ds , V qs ,

2 I ds, I qs ,

3 Ls ,

4 Lr ,

5 Lm ,
r
6 Te

4.3 SIMULATION RESULTS:

 CHAPTER 5
CONCLUSION
We have analyzed the performance of Induction Motor drive with IFOC control
scheme connected to pump load. Different parameters of centrifugal pump like
discharge and input power is analyzed for different ratings of speed. We have
found that by using variable speed drives, operations' requiring less discharge is
possible with a proportional lower speed and this will lead to the much lesser
power consumptions.
We can compare the results obtained with that of the basic affinity laws of
centrifugal pump and can see that graphs obtained are almost same. Thus by
designing and implementing this variable speed drive for pumping applications
overall efficiency of the drive can be improved reducing considerable cost spend for
electricity.

5.1 FUTURE SCOPE:

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