EE 287

Basic ASIC Concepts

How to build a chip

Logic Design
Circuit design
Physical design
Test generation
Fabrication
Validation

EE 296q notes
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Morris Jones

1
 Buzz words
The industry is full of Buzz words and
Acronyms
There are no real standards
Published dictionaries
No one uses them
Companies vary in usage and
definitions
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Morris Jones

Whats in a Chip?
Its like a birthday cake
Many different layers
Some make transistors
Some make wired (Ill call interconnect)
Some make special analog items
Resistors, Capacitors, etc

EE 296q notes
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Morris Jones

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 How to make a MOS
Transistor
MOS = Metal Oxide Semiconductor
In the early days, it was made of metal!
Poly-silicon was easier and cheaper to build
We are too lazy to change the name to POS
Many Fabrication steps
Keeps the Chemical and manufacturing
engineers up late at night!

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Morris Jones

Add Metal and cover with

Glass
Metal (Al)

Glass

Gn Poly Gp Poly
SiO2 SiO2

N+ N+ P+ P+

P Well N Well

N- Substrate

Note: Implants not shown

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Morris Jones

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 As Viewed From Above

Implant Implant
Metal Metal

poly

P Well
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Morris Jones

L and W
L Well Removed for clarity

Implant Implant
W

poly

P Well
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Morris Jones

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 So Which is the Source and
Drain?
In MOS circuits with rectangular gates
There is no difference
In NMOS,
The most positive is the Drain
The other is the Source
The Body is almost ALWAYS Ground
Life is real fun if it isnt
Not for this class
In PMOS Just reverse the signs

EE 296q notes
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Morris Jones

As Viewed From Above

Implant Implant
Metal Metal

poly

P Well
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Morris Jones

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 L and W
L Well Removed for clarity

Implant Implant
W

poly

P Well
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Morris Jones

How much of the Cake is

the same for all customers
All of it. Standard/Custom products
Standard products (Microprocessors)
Programmable logic (FPGAs, CPLDs)
All the transistors Gate arrays/Sea of
Gates
Just Change the Metal layers
Just the Cells (Gates) Standard Cell
Change all layers
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Morris Jones

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 Which is Right for a
product?
Right is a value judgment
Value of industry is $
$ is Revenue Costs
Revenue
Selling Price times volume sold
Costs
Product costs Recurring (for each chip)
Development costs One time
Not static Time sensitive.
Markets change. Prices go down. You lose job
EE 296q notes
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Morris Jones

The Importance of Time to

Profit
Every day of every program is a crisis
Student effort
Unit impulse function on the due date
Start on Time
Finish on Time
Never let time slip away
Schedule Properly
It takes longer than you think

EE 296q notes
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Morris Jones

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 Timing is Everything!!!
Entering a market Late
Waiting until a customer asks for change
Responding to competition
Wrong feature set
Lower volume
Higher Costs, No added ASP
Market Window Projection
Closes early, Opens Late, Early obsolesce
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Morris Jones

Market Volume is time

critical
Volume

Shake-out

Growth, Mature Market

Pent up Demand
End-Life

Jan Feb Mar Apr May Jun Jul Aug Sep Oct Nov Dec Jan

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Morris Jones

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 Impact of entering late

Fewer Design Wins,

Smaller share of the market
Same ending point

Jan Feb Mar Apr May Jun Jul Aug Sep Oct Nov Dec Jan

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Morris Jones

Selling Price over time

Most of area
is in 1st of
window
Volume
Price
Revenue

Jan Feb Mar Apr May Jun
Time to market is
An important
Decision factor in
Technology selection
Jul Aug Sep Oct Nov Dec Jan

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Morris Jones

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 Comparisons
TTM Dev Device
$ $ $
Custom Foundry

Standard Cells
ASIC territory

Gate Arrays

FPGAs Standard products

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Morris Jones

The balancing act

Trade off different product factors
Product cost
Development costs
TTM costs/revenues
Optimize for the best profit

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Morris Jones

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 Design cycles (Custom)

Logical Physical Diffusion Metal

2-10W 2-6W 1-2W

Circuit Active Interconnect

Cell devices
Power/Gnd
Clocks
Timing
EE 296q notes
Physical
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Morris Jones

FPGAs

Logical Physical Diffusion Metal

2-10W 2-6W 1-2W

All the parts are the same. You run a very simple physical
Design, and then load it into standard products.
Turn around time typically 1 to 2 days on large FPGAs

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Morris Jones

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 Gate Array

Logical Physical Diffusion Metal

2-10W 2-6W 1-2W

All chips have a common diffusion. Built

Ahead of time. Shared costs. Physical design
Is limited to place and route. Fast specialized
Tools. Resulting in 3-5W turnaround times
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Morris Jones

Standard Cells

Logical Physical Diffusion Metal

2-10W 2-6W 1-2W

Chips have common cells, and most physical design

Done with automated place and route cells. Rest the
Same as custom

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Morris Jones

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 Foundry
A manufacture that builds Si for $
Normally to a fixed process
TSMC, UMC, Chartered, etc.
Customer delivers tooling (Masks, etc.)
Fab builds the parts
Physical design owned by customer
Value added primarily in manufacturing
abilities.
High Volume products
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Morris Jones

ASIC
Manufacture of Si
Provides design services
Physical design
Libraries
IP blocks
Test engineering
Shorter time to market through ASICs
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Morris Jones

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 Typical Volume Concepts
1000

100

Volume/M
10

1
fpga Gate STD Custom
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Morris Jones

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