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Dear Customer,

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tradename Nexperia. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS
semiconductors with its focus on the automotive, industrial, computing, consumer and wearable
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Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on
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Should be replaced with:
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Kind regards,

Team Nexperia
BUK9640-100A
K
PA
D2 N-channel TrenchMOS logic level FET
13 March 2014 Product data sheet

1. General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product has been designed and qualified to
the appropriate AEC standard for use in automotive critical applications.

2. Features and benefits


Low conduction losses due to low on-state resistance
Q101 compliant
Suitable for logic level gate drive sources
Suitable for thermally demanding environments due to 175 C rating

3. Applications
12 V, 24 V and 42 V loads
Automotive and general purpose power switching
Motors, lamps and solenoids

4. Quick reference data


Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
VDS drain-source voltage Tj 25 C; Tj 175 C - - 100 V

ID drain current VGS = 5 V; Tmb = 25 C; Fig. 2; Fig. 3 - - 39 A

Ptot total power dissipation Tmb = 25 C; Fig. 1 - - 158 W

Static characteristics
RDSon drain-source on-state VGS = 4.5 V; ID = 25 A; Tj = 25 C - - 43 m
resistance
VGS = 10 V; ID = 25 A; Tj = 25 C - 29 39 m

VGS = 5 V; ID = 25 A; Tj = 25 C; - 34 40 m
Fig. 11; Fig. 12
Dynamic characteristics
QGD gate-drain charge VGS = 5 V; ID = 25 A; VDS = 80 V; - 20 - nC
Tj = 25 C; Fig. 13

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NXP Semiconductors BUK9640-100A
N-channel TrenchMOS logic level FET

Symbol Parameter Conditions Min Typ Max Unit


Avalanche ruggedness
EDS(AL)S non-repetitive drain- ID = 39 A; Vsup 100 V; RGS = 50 ; - - 182 mJ
source avalanche VGS = 5 V; Tj(init) = 25 C; unclamped
energy

5. Pinning information
Table 2. Pinning information
Pin Symbol Description Simplified outline Graphic symbol
1 G gate mb D

2 D drain[1]
G
3 S source
mb D mounting base; connected to mbb076 S
2
drain
1 3
D2PAK (SOT404)

[1] It is not possible to make a connection to pin 2.

6. Ordering information
Table 3. Ordering information
Type number Package
Name Description Version
BUK9640-100A D2PAK plastic single-ended surface-mounted package (D2PAK); 3 leads SOT404
(one lead cropped)

7. Marking
Table 4. Marking codes
Type number Marking code
BUK9640-100A BUK9640-100A

8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VDS drain-source voltage Tj 25 C; Tj 175 C - 100 V

VDGR drain-gate voltage RGS = 20 k - 100 V

VGS gate-source voltage -15 15 V

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Product data sheet 13 March 2014 2 / 13


NXP Semiconductors BUK9640-100A
N-channel TrenchMOS logic level FET

Symbol Parameter Conditions Min Max Unit


Ptot total power dissipation Tmb = 25 C; Fig. 1 - 158 W

ID drain current Tmb = 25 C; VGS = 5 V; Fig. 2; Fig. 3 - 39 A

Tmb = 100 C; VGS = 5 V; Fig. 2 - 28 A

IDM peak drain current Tmb = 25 C; pulsed; tp 10 s; Fig. 3 - 159 A

Tstg storage temperature -55 175 C

Tj junction temperature -55 175 C

Source-drain diode
IS source current Tmb = 25 C - 39 A

ISM peak source current pulsed; tp 10 s; Tmb = 25 C - 159 A

Avalanche ruggedness
EDS(AL)S non-repetitive drain-source ID = 39 A; Vsup 100 V; RGS = 50 ; - 182 mJ
avalanche energy VGS = 5 V; Tj(init) = 25 C; unclamped

03na19 03nh74
120 40

ID
Pder (A)
(%)
30
80

20

40
10

0 0
0 50 100 150 200 25 50 75 100 125 150 175 200
Tmb (C) Tmb (C)

Fig. 1. Normalized total power dissipation as a Fig. 2. Normalized continuous drain current as a
function of mounting base temperature function of mounting base temperature

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Product data sheet 13 March 2014 3 / 13


NXP Semiconductors BUK9640-100A
N-channel TrenchMOS logic level FET

03nh72
103

ID
(A)
tp = 10 s
102 RDSon = VDS / ID

100 s

10
DC 1 ms

10 ms
100 ms

1
1 10 102 103
VDS (V)

Fig. 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage

9. Thermal characteristics
Table 6. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
Rth(j-mb) thermal resistance Fig. 4 - - 0.95 K/W
from junction to
mounting base
Rth(j-a) thermal resistance mounted on a printed-circuit board; - 50 - K/W
from junction to minimum footprint
ambient

03nh73
1

Zth(j-mb) = 0.5
(K/W)
0.2

10- 1 0.1
0.05

0.02

tp
P =
10- 2 T
Single Shot

tp t
T
10- 3
10- 6 10- 5 10- 4 10- 3 10- 2 10- 1 1
tp (s)

Fig. 4. Transient thermal impedance from junction to mounting base as a function of pulse duration

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Product data sheet 13 March 2014 4 / 13


NXP Semiconductors BUK9640-100A
N-channel TrenchMOS logic level FET

10. Characteristics
Table 7. Characteristics
Symbol Parameter Conditions Min Typ Max Unit
Static characteristics
V(BR)DSS drain-source ID = 0.25 mA; VGS = 0 V; Tj = 25 C 100 - - V
breakdown voltage
ID = 0.25 mA; VGS = 0 V; Tj = -55 C 89 - - V

VGS(th) gate-source threshold ID = 1 mA; VDS = VGS; Tj = 25 C; 1 1.5 2 V


voltage Fig. 10
ID = 1 mA; VDS = VGS; Tj = 175 C; 0.5 - - V
Fig. 10
ID = 1 mA; VDS = VGS; Tj = -55 C; - - 2.3 V
Fig. 10
IDSS drain leakage current VDS = 100 V; VGS = 0 V; Tj = 175 C - - 500 A

VDS = 100 V; VGS = 0 V; Tj = 25 C - 0.05 10 A

IGSS gate leakage current VGS = 10 V; VDS = 0 V; Tj = 25 C - 2 100 nA

VGS = -10 V; VDS = 0 V; Tj = 25 C - 2 100 nA

RDSon drain-source on-state VGS = 4.5 V; ID = 25 A; Tj = 25 C - - 43 m


resistance
VGS = 5 V; ID = 25 A; Tj = 175 C; - - 100 m
Fig. 11; Fig. 12
VGS = 10 V; ID = 25 A; Tj = 25 C - 29 39 m

VGS = 5 V; ID = 25 A; Tj = 25 C; - 34 40 m
Fig. 11; Fig. 12
Dynamic characteristics
QG(tot) total gate charge ID = 25 A; VDS = 80 V; VGS = 5 V; - 48 - nC

QGS gate-source charge Tj = 25 C; Fig. 13 - 5.4 - nC

QGD gate-drain charge - 20 - nC

Ciss input capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz; - 2304 3072 pF

Coss output capacitance Tj = 25 C; Fig. 14 - 222 266 pF

Crss reverse transfer - 151 207 pF


capacitance
td(on) turn-on delay time VDS = 30 V; RL = 1.2 ; VGS = 5 V; - 20 - ns

tr rise time RG(ext) = 10 ; Tj = 25 C - 135 - ns

td(off) turn-off delay time - 125 - ns

tf fall time - 90 - ns

LD internal drain from upper edge of drain mounting - 2.5 - nH


inductance base to centre of die; Tj = 25 C

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Product data sheet 13 March 2014 5 / 13


NXP Semiconductors BUK9640-100A
N-channel TrenchMOS logic level FET

Symbol Parameter Conditions Min Typ Max Unit


from drain lead 6 mm from package to - 4.5 - nH
centre of die; Tj = 25 C

LS internal source from source lead to source bond pad; - 7.5 - nH


inductance Tj = 25 C

Source-drain diode
VSD source-drain voltage IS = 25 A; VGS = 0 V; Tj = 25 C; Fig. 15 - 0.85 1.2 V

trr reverse recovery time IS = 37 A; dIS/dt = -100 A/s; - 60 - ns

Qr recovered charge VGS = -10 V; VDS = 30 V; Tj = 25 C - 240 - nC

03na66 03na64
120 34
ID 5.0 VGS = 10 (V) RDSon
(A) (m)
4.0
100
32

80
30

60 3.0

28
40

2.4 26
20

0 24
0 2 4 6 8 10 0 5 10 15
VDS (V) VGS (V)

Fig. 5. Output characteristics: drain current as a Fig. 6. Drain-source on-state resistance as a function
function of drain-source voltage; typical values of gate-source voltage; typical values

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Product data sheet 13 March 2014 6 / 13


NXP Semiconductors BUK9640-100A
N-channel TrenchMOS logic level FET

03aa36 03na65
10-1 80
ID
gfs
(A)
(S)
-2
10
60

10-3
min typ max
40
-4
10

20
10-5

10-6 0
0 1 2 3 0 10 20 30 40
VGS (V) ID (A)

Tj = 25 C; VDS = 5 V Fig. 8. Forward transconductance as a function of


Fig. 7. Sub-threshold drain current as a function of drain current; typical values
gate-source voltage

03na61 03aa33
80 2.5
VGS(th)
ID
(V)
(A)
2 max
60

1.5 typ
40

1 min

20
0.5
Tj = 175 C Tj = 25 C

0 0
0 1 2 3 4 -60 0 60 120 180
VGS (V) Tj ( C)

Fig. 9. Transfer characteristics: drain current as a Fig. 10. Gate-source threshold voltage as a function of
function of gate-source voltage; typical values junction temperature

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Product data sheet 13 March 2014 7 / 13


NXP Semiconductors BUK9640-100A
N-channel TrenchMOS logic level FET

03na67 aaa-011480
50 3
RDSon a
(m)
45 VGS = 3.0 (V) 2.5

3.2
40 3.4 2
3.6
4.0
5.0
35 1.5
10

30 1

25 0.5

20 0
10 20 30 40 50 60 70 -60 0 60 120 180
ID (A) Tj (C)

Fig. 11. Drain-source on-state resistance as a function Fig. 12. Normalized drain-source on-state resistance
of drain current; typical values factor as a function of junction temperature

03na63 03na68
5 6000
VGS C
(V) (pF)
5000 Ciss
4

VDD = 14 (V) VDD = 80 (V)


4000
3 Coss
3000

2
Crss
2000

1
1000

0 0
0 20 40 60 10- 2 10- 1 1 10 102
QG (nC) VDS (V)

Fig. 13. Gate-source voltage as a function of gate Fig. 14. Input, output and reverse transfer capacitances
charge; typical values as a function of drain-source voltage; typical
values

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Product data sheet 13 March 2014 8 / 13


NXP Semiconductors BUK9640-100A
N-channel TrenchMOS logic level FET

03na62
100
IS
(A)
80

60

40

Tj = 175 C Tj = 25 C

20

0
0 0.5 1.0 1.5 2.0
VSD (V)

Fig. 15. Source current as a function of source-drain voltage; typical values

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Product data sheet 13 March 2014 9 / 13


NXP Semiconductors BUK9640-100A
N-channel TrenchMOS logic level FET

11. Package outline


Plastic single-ended surface-mounted package (D2PAK); 3 leads (one lead cropped) SOT404

E A1

D1 mounting
base

HD

Lp
1 3

b2 b c

e e Q

0 5 mm

scale

Dimensions (mm are the original dimensions)

Unit A A1 b b2 c D D1 E e HD Lp Q

max 4.5 1.40 0.85 1.45 0.64 11 1.6 10.3 15.8 2.9 2.6
mm nom 2.54
min 4.1 1.27 0.60 1.05 0.46 1.2 9.7 14.8 2.1 2.2

sot404_po

Outline References European


Issue date
version IEC JEDEC JEITA projection
06-03-16
SOT404
13-02-25

Fig. 16. Package outline D2PAK (SOT404)

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Product data sheet 13 March 2014 10 / 13


NXP Semiconductors BUK9640-100A
N-channel TrenchMOS logic level FET

In no event shall NXP Semiconductors be liable for any indirect, incidental,


punitive, special or consequential damages (including - without limitation -
12. Legal information lost profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.

12.1 Data sheet status Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors aggregate and cumulative liability towards
Document Product Definition customer for the products described herein shall be limited in accordance
status [1][2] status [3] with the Terms and conditions of commercial sale of NXP Semiconductors.

Objective Development This document contains data from Right to make changes NXP Semiconductors reserves the right to
[short] data the objective specification for product make changes to information published in this document, including without
sheet development. limitation specifications and product descriptions, at any time and without
Preliminary Qualification This document contains data from the notice. This document supersedes and replaces all information supplied prior
[short] data preliminary specification. to the publication hereof.
sheet
Suitability for use in automotive applications This NXP
Product Production This document contains the product Semiconductors product has been qualified for use in automotive
[short] data specification. applications. Unless otherwise agreed in writing, the product is not designed,
sheet authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
[1] Please consult the most recently issued document before initiating or malfunction of an NXP Semiconductors product can reasonably be expected
completing a design. to result in personal injury, death or severe property or environmental
[2] The term 'short data sheet' is explained in section "Definitions". damage. NXP Semiconductors and its suppliers accept no liability for
[3] The product status of device(s) described in this document may have inclusion and/or use of NXP Semiconductors products in such equipment or
changed since this document was published and may differ in case of applications and therefore such inclusion and/or use is at the customer's own
multiple devices. The latest product status information is available on risk.
the Internet at URL http://www.nxp.com.
Quick reference data The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
12.2 Definitions
Applications Applications that are described herein for any of these
Preview The document is a preview version only. The document is still products are for illustrative purposes only. NXP Semiconductors makes no
subject to formal approval, which may result in modifications or additions. representation or warranty that such applications will be suitable for the
NXP Semiconductors does not give any representations or warranties as to specified use without further testing or modification.
the accuracy or completeness of information included herein and shall have
no liability for the consequences of use of such information. Customers are responsible for the design and operation of their
applications and products using NXP Semiconductors products, and NXP
Draft The document is a draft version only. The content is still under Semiconductors accepts no liability for any assistance with applications or
internal review and subject to formal approval, which may result in customer product design. It is customers sole responsibility to determine
modifications or additions. NXP Semiconductors does not give any whether the NXP Semiconductors product is suitable and fit for the
representations or warranties as to the accuracy or completeness of customers applications and products planned, as well as for the planned
information included herein and shall have no liability for the consequences application and use of customers third party customer(s). Customers should
of use of such information. provide appropriate design and operating safeguards to minimize the risks
associated with their applications and products.
Short data sheet A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is NXP Semiconductors does not accept any liability related to any default,
intended for quick reference only and should not be relied upon to contain damage, costs or problem which is based on any weakness or default
detailed and full information. For detailed and full information see the in the customers applications or products, or the application or use by
relevant full data sheet, which is available on request via the local NXP customers third party customer(s). Customer is responsible for doing all
Semiconductors sales office. In case of any inconsistency or conflict with the necessary testing for the customers applications and products using NXP
short data sheet, the full data sheet shall prevail. Semiconductors products in order to avoid a default of the applications
and the products or of the application or use by customers third party
Product specification The information and data provided in a Product customer(s). NXP does not accept any liability in this respect.
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and Limiting values Stress above one or more limiting values (as defined in
customer have explicitly agreed otherwise in writing. In no event however, the Absolute Maximum Ratings System of IEC 60134) will cause permanent
shall an agreement be valid in which the NXP Semiconductors product damage to the device. Limiting values are stress ratings only and (proper)
is deemed to offer functions and qualities beyond those described in the operation of the device at these or any other conditions above those
Product data sheet. given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
12.3 Disclaimers
Terms and conditions of commercial sale NXP Semiconductors
Limited warranty and liability Information in this document is believed products are sold subject to the general terms and conditions of commercial
to be accurate and reliable. However, NXP Semiconductors does not give sale, as published at http://www.nxp.com/profile/terms, unless otherwise
any representations or warranties, expressed or implied, as to the accuracy agreed in a valid written individual agreement. In case an individual
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responsibility for the content in this document if provided by an information applying the customers general terms and conditions with regard to the
source outside of NXP Semiconductors. purchase of NXP Semiconductors products by customer.

BUK9640-100A All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2014. All rights reserved

Product data sheet 13 March 2014 11 / 13


NXP Semiconductors BUK9640-100A
N-channel TrenchMOS logic level FET

No offer to sell or license Nothing in this document may be interpreted


or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.

Export control This document as well as the item(s) described herein


may be subject to export control regulations. Export might require a prior
authorization from competent authorities.

Translations A non-English (translated) version of a document is for


reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.

12.4 Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.

Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV,


FabKey, GreenChip, HiPerSmart, HITAG, IC-bus logo, ICODE, I-
CODE, ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight,
MoReUse, QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug,
TOPFET, TrenchMOS, TriMedia and UCODE are trademarks of NXP
Semiconductors N.V.

HD Radio and HD Radio logo are trademarks of iBiquity Digital


Corporation.

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Product data sheet 13 March 2014 12 / 13


NXP Semiconductors BUK9640-100A
N-channel TrenchMOS logic level FET

13. Contents
1 General description ............................................... 1
2 Features and benefits ............................................1
3 Applications ........................................................... 1
4 Quick reference data ............................................. 1
5 Pinning information ............................................... 2
6 Ordering information ............................................. 2
7 Marking ................................................................... 2
8 Limiting values .......................................................2
9 Thermal characteristics .........................................4
10 Characteristics ....................................................... 5
11 Package outline ................................................... 10
12 Legal information .................................................11
12.1 Data sheet status ............................................... 11
12.2 Definitions ...........................................................11
12.3 Disclaimers .........................................................11
12.4 Trademarks ........................................................ 12

NXP Semiconductors N.V. 2014. All rights reserved


For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 13 March 2014

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Product data sheet 13 March 2014 13 / 13


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