Project-1 MicroinverterSystem Report Final Report

Design and Simulation Validation of a 245W Grid
Connected PV Micro-Inverter System with

Maximum Power Tracking
A Project Report
By
Chinmay Vaidya 1211377034

Soham Karyakarte 1211359536
Under the guidance of

Dr. Raja Ayyanar
SCHOOL OF ELECTRICAL, COMPUTER AND ENEGY ENGINEEIRNG

IRA A. FULTON SCHOOLS OF ENGINEERING
ARIZONA STATE UNIVERSITY
Acknowledgement
It gives us a great pleasure to express our deep sense of gratitude to our guide Dr.
Raja Ayyanar for his valuable guidance, suggestions and co-operation in this project.
We are thankful for his coherent encouragement and for providing the needed
resources.
Chinmay Vaidya 1211377034

Soham Karyakarte 1211359536
Declaration
I declare that this written submission represents my ideas in my own words and
where others' ideas or words have been included, I have adequately cited and
referenced the original sources. I also declare that I have adhered to all principles of
academic honesty and integrity and have not misrepresented or fabricated or falsified
any idea/data/fact/source in my submission. I understand that any violation of the
above will be cause for disciplinary action by the Institute and can also evoke penal
action from the sources which have thus not been properly cited or from whom
proper permission has not been taken when needed.
Chinmay Vaidya Soham Karyakarte

1211377034 1211359536
Date: 10/18/2016
Place: Tempe, AZ
Contents
1. Introduction ................................................................................................ 3
2. Solar PV Module......................................................................................... 4
2.1. Derivation of Circuit Model for TSM-245 PA05.08............................ 4
2.2. Current-Voltage and Power-Voltage Characteristics at STC ............ 6
3. Selection of PV Micro-Inverter Model ...................................................... 8
4. Designing of DC-DC Stage ......................................................................... 9
5. Designing of DC-AC Stage ....................................................................... 12
6. Designing of Controllers ........................................................................... 14
7. Simulation Results .................................................................................... 20
8. Conclusion and Future Scope .................................................................. 45
1
List of Figures
Figure 1:Equivalent Circuit of PV Module TSM-245 PA05.08 ................................................................... 5
Figure 2:Equivalent Circuit of PV Module TSM-245 PA05.08 with bypass diodes .................................... 5
Figure 3:Current-voltage characteristics at 1000 W/m^2, 800 W/m^2, 200 W/m^2 for all cells @ STC .... 6
Figure 4:Power-voltage characteristics at 1000 W/m^2 , 800 W/m^2, 200 W/m^2 for all cells @ STC .... 6
Figure 5:Current-voltage characteristics at 500 W/m^2 for 20 cells, 800 W/m^2 for 20 cells, 200 W/m^2
for 20 cells @ STC........................................................................................................................................ 7
Figure 6:Power-voltage characteristics at 500 W/m^2 for 20 cells, 800 W/m^2 for 20 cells, 200 W/m^2
for 20 cells @ STC........................................................................................................................................ 7
Figure 7:Isolated Boost DC-DC Converter with HFT Isolation ................................................................. 11
Figure 8: DC-AC Inverter Stage ................................................................................................................. 13
Figure 9:Block diagram of Current Controller for DC-AC Stage............................................................... 14
Figure 10: Implemented Current Controller of DC-AC Stage .................................................................... 14
Figure 11:Block diagram of PLL Basis (Reference .................................................................................... 15
Figure 12:Implemented PLL for DC-AC Stage .......................................................................................... 15
Figure 13: Block diagram of DC-Link Voltage Controller ......................................................................... 16
Figure 14:Implemented DC-Link Voltage Controller................................................................................. 16
Figure 15:Actual Voltage Controller for DC-AC Stage ............................................................................. 17
Figure 16:Incremental Conductance MPPT algorithm Flowchart .............................................................. 18
Figure 17: MPPT block used in simulation ................................................................................................ 19
Figure 18: Complete Simulation Model ...................................................................................................... 20
Figure 19: Parameter Initialization ............................................................................................................. 21
Figure 20: TSM-245 PA05.08 circuit model at 50 deg. C .......................................................................... 23
Figure 21: TSM-245 PA05.08 I-V Characteristics at 50 deg. C ................................................................. 23
Figure 22: TSM-245 PA05.08 P-V Characteristics at 50 deg. C ................................................................ 24
List of Tables
Table 1: Main technical parameters of ABB Micro-inverter MICRO-0.3-I-OUTD..................................... 8
Table 2: Summary of Parameters ............................................................................................................... 21
Table 3: Temperature Ratings of TSM-245 PA05.08 ................................................................................. 22
Table 4: PV Module Parameters at STC and at 50 deg. C .......................................................................... 22
2
1. Introduction
A grid connected PV micro-inverter system with maximum power point tracking

algorithm is designed for the rated power of 245W. PLECS has been used as a
simulation software with RADAU (stiff) solver for analyzing different system
operating scenarios.
The total system is divided into four basic power stages- a PV module, DC-DC stage
with high frequency transformer isolation, DC-AC stage and a power grid. A 245W
TSM 245 PA05.08 of the Trina Solar is considered as PV module. The module is
considered with bypass diodes per 20 cell and its equivalent circuit is derived from
the datasheet. An ABB MICRO-0.3-I-OUTD micro-inverter model is selected for
the micro-inverter stage consisting of DC-DC and DC-AC stage. Converter switches
are designed for the maximum power output 300W while the inductors and
capacitors involved in the converter are designed for the rated power output of
245W. The single phase AC grid is simulated as an ideal voltage source. The micro-
inverter along with PV module is interfaced with the grid to simulate a complete
micro-inverter system.
The controllers for DC-AC and DC-DC stage are designed and implemented in S
domain transfer functions. DC-DC stage controller involves PV output voltage
controller with maximum power point tracking implemented based on incremental
conductance algorithm. DC AC stage include DC link voltage controller, phase
locked loop controller which keeps, inverter in synchronism with the grid and the
grid current controller.
The complete system is simulated for 1000W/m2 and 500W/m2 with 500 C cell
junction temperature with step change in grid voltage from 1p.u. to 0.9 p.u. The
reactive power support feature is tested by simulating the step change in output
power from unity power factor to 0.8 lagging power factor. The MPPT algorithm
with its performance is tested for the change in the irradiation intensity.
3
2. Solar PV Module
2.1. Derivation of Circuit Model for TSM-245 PA05.08
A PV module TSM-245 PA05.08 of Trina Solar Energy Systems is selected for the micro-inverter
design. Data sheet for the same is attached in Annexure-I.
In order to have a complete simulation of the system; an equivalent cell model is derived for the
above module.
Following are the steps for the extraction of PV Cell Parameters.
a. Photon Current at STC (Iph)
Ignoring the diode current and shunt resistance current, photon current at STC is same as the
short circuit current. Hence,
I ph = ISC = 8.68 A
b. Shunt resistance (Rsh)

From the datasheet, zooming in near the short circuit current region at full irradiance (8-9A
and 0-10V region). Scaling factors are: 1A=0.21 inch, 10V=0.52 inch
dv 1 0.52
| at SC = tan(0.54) = 2.333 103 A/V
di 0.21 10
dv 1
Rsh = | at SC = = .
di 2.333 10 3
c. Slope of I-V characteristic at open circuit

Scaling factors are: 1A=11.52 inch, 1V=5.164 inch at I-V characteristics at open circuit.
dv 11.52 1
di | at OC = tan(100.12 90) 5.164 = 0.39817 V/A
1
d. Determination of a, Rs and I0
Following three equations are solved simultaneously in MATLAB.
Voc
Isc
Io = Rsh
Voc
e VT
Vmp+Imp Rs Vmp + Rs Imp
Imp = Isc Io (e VT 1 )
Rsh
dv VT NsaKT
Rs = dI | at OC where VT =
Isc q
Where, Voc = 37.5V, Vmp = 30.2V, Imp = 8.13A, Ns = 60cells, q = 1.6 1019
, T = 298K, k = 1.38 1023
4
Above three equations are solved simultaneously in MATLAB and the values of , are
obtained. The MATLAB script for the same is attached in Annexure-I.
Hence the values obtained are as follows:
= . , = . , a = 1.2688
The equivalent circuit of the PV Module is obtained.
Figure 1:Equivalent Circuit of PV Module TSM-245 PA05.08
Let us consider that the PV module has bypass diode per 20 cells. (No information is provided in
the data sheet. Hence assumed.) The equivalent circuit with bypass diodes is as follows.
Figure 2:Equivalent Circuit of PV Module TSM-245 PA05.08 with bypass diodes
5
2.2. Current-Voltage and Power-Voltage Characteristics at STC
1. Current-voltage characteristics at 1000 /2 , 800 /2 , 200 /2 for all cells @ STC
Figure 3:Current-voltage characteristics at 1000 W/m^2, 800 W/m^2, 200 W/m^2 for all cells @ STC
2. Power-voltage characteristics at 1000 /2 , 800 /2 , 200 /2 for all cells @ STC
Figure 4:Power-voltage characteristics at 1000 W/m^2 , 800 W/m^2, 200 W/m^2 for all cells @ STC
6
3. Current-voltage characteristics at 500 /2 for 20 cells, 800 /2 for 20 cells, 200
/2 for 20 cell @ STC
Figure 5:Current-voltage characteristics at 500 W/m^2 for 20 cells, 800 W/m^2 for 20 cells, 200 W/m^2 for 20 cells @ STC
4. Power-voltage characteristics at 500 /2 for 20 cells, 800 /2 for 20 cells, 200

/2 for 20 cell @ STC
Figure 6:Power-voltage characteristics at 500 W/m^2 for 20 cells, 800 W/m^2 for 20 cells, 200 W/m^2 for 20 cells @ STC
7
3. Selection of PV Micro-Inverter Model
The PV module TSM-245 PA05.08 has peak power of 245W at STC. Hence the micro-inverter
model of ABB manufacturer MICRO-0.3-I-OUTD having peak power capacity of 300W is
selected.
Main technical parameters of ABB Micro-inverter MICRO-0.3-I-OUTD
The data sheet for the selected ABB Micro-inverter is attached in the Annexure- II. The main
technical parameters are listed in the table below.
Table 1: Main technical parameters of ABB Micro-inverter MICRO-0.3-I-OUTD
BASIC DATA
Nominal Output Power 300W
Rated Grid AC Voltage 208 V (1ph / 2W)
INPUT SIDE (DC)
Maximum PV Panel Rating (STC) 300W
Full Power MPPT Voltage Range 30V-60V
Maximum Usable Current (Idcmax) 10.5A
Maximum SC Current 12.5A
OUTPUT SIDE (AC)
Adjustable Voltage Range 183-228V (1ph / 2W)
Nominal Grid Frequency 60Hz
Adjustable Frequency Range 57-60.5 Hz
Maximum Output Current 1.44A
Power Factor >0.95
INPUT PROTECTION
Reverse Polarity Protection Yes
Anti-islanding protection Meets UL 1741 / IEEE1547 requirements
Over-voltage Protection Type Varistor
EFFICIENCY
Maximum efficiency 96.5%
CEC Efficiency 96%
SAFETY
Isolation level HF Transformer
The THD limitation is not specified in the data sheet. Hence a 3% of THD limitation is assumed
complying to IEEE-519 while designing of filters.
8
4. Designing of DC-DC Stage
The converter for DC-DC stage of the Micro-inverter is selected as an isolated-boost DC-DC
converter with high frequency transformer isolation. The selected converter is capable of providing
reactive power support to the grid.
IGBTs are considered as the switching devices and switching signals are generated by selecting
switching frequency of 20kHz.
fs = 20kHz, Ts = 5 105 sec.
a. Selection of Transformer Turns Ratio
Transformer turns ratio is selected to optimize the switch ratings of the isolated boost DC-DC
stage. The maximum grid voltage supported by the inverter is 228V (RMS). Hence the minimum
DC link voltage has to be 2282 = 322.44V. Considering the voltage drop across the output filter
inductor, a DC link voltage of 400V is selected for the designing purpose.
V(dclink) = 400V
Maximum value of input DC voltage as per the ABB micro-inverter specification is 60V.
Vin(max) = 60V
The switch rating can be optimized by selecting duty cycle (d) as small as possible. Considering
practical limitations of the duty cycle generation, 10% of minimum duty cycle is considered for
the designing purpose.
d(min) = 0.1
Transformer turns ratio is calculated by following formula:
V(dclink) (1 d(min) ) 400 (1 0.1)

n= =
Vin(max) 60
=
b. Selection of Input Inductor
Input current to the DC-DC converter should have minimum ripple content as possible (2-5% of
maximum input current). A 3% of ripple is considered for the designing of the input inductor.
Po 245
I in(max) = = = 8.166A
Vin(min) 30
IL = 0.245A
9
Hence the inductor is

(1 ) 2
=

The worst case ripple will be observed at maximum output voltage of 400V and duty ratio of 0.5
Hence,
400 5 105
0.5 (1 0.5)
= 6 2 = 1.70068 103
0.245
Standard inductor value available 1.8 mH. Hence an inductor of 1.8mH is selected. The ESR value
assumed is 0.01 Ohm obtained from the standard manufacturers datasheet.
c. DC-DC Converter Switch Ratings
Switch voltage rating is the transformer primary voltage across High Frequency Transformer and
the ripple.
() + 400 + 20
= = =
6
Switch current rating is the maximum primary current of the High Frequency Transformer.

= () +
2
Now,
300
(max) = = = 10
(min) 30
When ripple is limited to 3%, = 0.3
Hence switch current rating is
0.3
= 10 + = .
2
d. Selection of DC Link Capacitor
DC link capacitor is selected based on the 120Hz voltage ripple. Maximum peak to peak ripple of
10% is selected for the designing purpose.
() = 10% = 0.1 400 = 40
() ()
= =
4 () 2 ()
245
= = 40.6167 106
2 400 377 20
10
Standard capacitor available is of 47. Hence 47 capacitor is selected as DC-link capacitor.
Being high value, its ESR value is neglected.
e. Selection of Input Capacitor
Input capacitor for the converter is designed by considering the converter as a Buck-Converter.
The input capacitor is selected based on the maximum permissible ripple in the PV output voltage
and output PV current. The output PV voltage ripple of 2.5% is selected for the designing by
considering the variation in the maximum output power with respect to the ripple in the PV output
voltage. The output PV Voltage at MPPT from the PV cell model is 30.67V @ STC.
Vpv(output) = 2.5% 30.67 = 0.7667V
Ripple in the input current selected is of 3%. Hence,

IL = 0.245A
The input capacitor value is
IL 1 0.3 1
C= = = 1.9971 106 F
Vpv(output) 8fs 0.7667 8 20 103
The standard rating available is 2.2F. The ESR value of the 2.2 F capacitor is 0.02 from the
standard manufacturers catalogues.
( 0.7625
= = 3.1122 >
0.245
Hence the 2.2 F capacitor is selected as input capacitor.
The isolated boost DC-DC Stage is implemented as shown below.
Figure 7:Isolated Boost DC-DC Converter with HFT Isolation
11
5. Designing of DC-AC Stage
For the DC AC stage a single phase inverter is considered. IGBTs are used as switches. Pulses
are supplied to IGBT with a frequency of 20kHz. Single L filter is used as a filter for the micro-
inverter.
a. Design of L filter
For a given DC link voltage and varying modulation index (ma), the highest value THD is obtained
at around ma=0.62. However, based on the maximum and minimum value of output ac voltage;
the modulation index for the fixed value of dc link capacitor voltage (excluding designing ripple
of 10%) varies in the range of 0.647 to 0.806.
Hence the ma value selected for the filter calculation is 0.647 which is closer to the worst case ma
value of 0.618. The fundamental output current is at the peak power output of the PV cell is
calculated at the rated power of 245W as,
P 245
IRMS = = = 1.1778846A
V 208
Let us consider the current ripple to be limited to 3%. (THD limitation is not provided in the micro-
inverter data sheet. Hence limited to 3% as per IEE519 specifications).
Current ripple is given by
IRMS = THD IRMS = 0.03 1.1778846 = 0.035335A
Filter inductor is calculated by
1 TSw Vd 3 8
L= ma m2a ma +
12 IRMS 8 3 2
Considering,
1
Tsw = = 2.5 105 sec
2fs
IRMS = 0.035335 A
Vd = 400 V
ma = 0.647
Evaluating, we get
L = 17.353mH
The inductor value of 17.5 is chosen for the designing purpose. The internal resistance of the
inductor is considered as 0.1 from standard manufacturers datasheet.
12
b. DC-AC Converter Switch Ratings
The rating of switches is decided by currents passing through them and voltage across them when
they are off. When considering the micro-inverter maximum power of 300W interfaced with
minimum grid voltage of 183Vrms, the current peak will determine the current rating of the switch.
(max) 300
= = = 1.63934
(min) 183
( ) 400 2.5 105

() = = = 0.176056
4 4 14.2 103
() = 1.63934 2 + () = 1.63934 2 + 0.088028 = 2.40641
Hence the switch current rating is 2.40641A.

The voltage rating of switch is governed by the dc link reference voltage. This voltage is enforced
upon the switches along with the ripple when switches are in off state.
= + () = 400 + 20 =
The time delays of the switches (rise time, fall time etc.) must be sufficient so as to appropriately
switch with a frequency of 20 kHz.
Figure 8: DC-AC Inverter Stage
13
6. Designing of Controllers
A. Controllers for DC-AC Stage
a. Current controller with AC voltage feed forward for inverter with L filter
A PI controller with AC grid voltage feed forward term is selected for the inner current control
loop of the DC-AC stage. The grid voltage feed forward term is used to reduce the phase angle
and amplitude disturbance in the grid current. The reference current magnitude is derived from the
outer voltage control loop while the phase and frequency information is derived from the PLL
loop.
Figure 9:Block diagram of Current Controller for DC-AC Stage (Courtesy: PSERC Academy)
The plan transfer function to be controlled is the current through the inductor filter multiplied by
dc link voltage. Hence the plant transfer function is as follows:
dclink 400
Gplant (S) = =
SL + rl S 17.5 103 + 0.1
A PI controller is designed using K-factor method. MATLAB program for the same is attached in
Annexure- III.
Controller Designing Parameters: Bandwidth of 2kHz is chosen so as to compensate for any
ripple in the current over the large range. Phase margin of 60 is chosen for the controller design.
Phase boost calculated is 60. Hence the controller is type-II controller. The controller transfer
function is as follows:
S
(1 + )
z
GController (S) = Kc
S
(1 + )
p
Where, Kc = 1852.9, z = 3370.2, p = 46856
Figure 10: Implemented Current Controller of DC-AC Stage
14
b. Phase Locked Loop Controller
A phase locked loop controller is used to synchronize the inverter output with the Grid phase and
frequency so as to have controlled energy exchange. The PLL loop designed is capable of
satisfying IEEE-1547 requirements of voltage fluctuation less than 5% and 1800 out of phase
synchronization. The phase locked loop architecture is considered as follows:
Figure 11:Block diagram of PLL Basis (Courtesy: PSERC Academy)
The phase detector considered here is a simple gain block which is considered as unity. The
reference grid signal is reduced to unity by applying suitable gain.
The loop filter is used to remove the pulsating component in the grid voltage from the desired dc
component. A PI controller is used as the first order filter in the designing stage with the fairly low
bandwidth of 6Hz to filter out the ripple content. Phase margin of 60 is chosen.
The voltage controller oscillator is simply an integrator which generates the phase information
which is then combined to generate sine or cosine signal of unity magnitude. Here the plant transfer
function is a simple integrator as follows:
1
Gplant (S) =

Annexure-III.
Controller Designing Parameters: Bandwidth = 6 Hz, Phase margin =60. Phase boost calculated
is 60. Hence the controller is type-II controller. The controller transfer function is as follows:
S
(1 + )
z
S
(1 + )
p
Where, Kc = 380.8156, z = 10.1014, p = 140.695
Figure 12:Implemented PLL for DC-AC Stage
15
c. DC-Link Voltage Controller
DCAC inverter stage regulates the dc link voltage and does this by providing the current reference
of sinusoidal ac line current to the inner current control loop.
The bandwidth of this dc link voltage loop is kept small so that it doesnt distort the wave shape
of the reference line current due to 120Hz ripple in the dc link voltage. Bandwidth of 12Hz is
selected for the designing of the controller.
Due to low bandwidth, the controller doesnt respond to the 120Hz ripple content in the dc link
voltage. By the energy balance equation at the DC link terminal:
C(dclink) dVdclink 2 Ig (peak) Vg (peak)

=P
2 dt 2
Hence the plant transfer function considering constant power input P is:
Vdclink 2 (s) Vg (peak) 2282

Gplant (S) = = =
IL(s) SC(dclink) S 47 106
Annexure- III. Negative sign is implemented using subtract block in the simulation.
Figure 13: Block diagram of DC-Link Voltage Controller (Courtesy: PSERC Academy)
Controller Designing Parameters: Bandwidth = 12 Hz, Phase margin =60. Phase boost
calculated is 60. Hence the controller is type-II controller. The controller transfer function is as
follows:
S
(1 + )
z
S
(1 + )
p
4
Where, Kc = 2.4339 10 , z = 20.2029, p = 281.39
Figure 14:Implemented DC-Link Voltage Controller
16
B. Controllers for DC-DC Stage
a. Controller for isolated boost dc-dc stage

The controller for the isolated boost DC-DC stage controls the input PV voltage command to
follow the voltage reference generated by the MPPT algorithm so as to ensure the maximum power
tracking. This controller is designed by considering the isolated boost DC-DC converter as a buck
converter with DC-link being the input voltage and PV cell as an output voltage.
The PV cell in the small signal analysis is modelled as a resistor at the MPP voltage and current.
Hence its resistance is
Vmp 30.2
RL = = = 3.714
Imp 8.13
The plant transfer function is the transfer function of the buck converter which is given by
Vin (1 + S C0 ESR)
Gplant (S) =
L ESR
1 + (R + C0 ESR) + S 2 LC0 (1 + R )
L L
400
Where, Vin = = 66.66V , C0 = 2.2 106 F, ESR = 0.02
6
Annexure- III.
Controller Designing Parameters: The bandwidth selected is 2kHz so that the controller should
respond to the variations in the input MPP voltage. Phase margin of 45 is selected for the design
purpose. Phase boost calculated is 40.938. Hence the controller is type-II controller. The controller
transfer function is as follows:
S
(1 + )
z
S
(1 + )
p
Where, Kc = 518.3851, z = 5663.4, p = 27883
Figure 15:Actual Voltage Controller for DC-AC Stage
17
b. Maximum Power Point Tracking Controller
The MPPT controller is designed as per the incremental conductance MPPT algorithm. The
incremental conductance algorithm flowchart is as follows.
Figure 16:Incremental Conductance MPPT algorithm Flowchart
We have used control blocks and switches to implement this in PLECS. As per the algorithm,
initial values of voltage and current are assumed and set accordingly in memory blocks. (named
as V(n-1) and I(n-1). At each iteration, the difference is calculated (dI, dV) and earlier values are
replaced by present ones. Through division blocks, dI/dV and I/V is calculated. They are added to
check the slope and then accordingly value is forwarded to another switch (switch2) that will allow
this signal to pass to signum function only if dI, dV are non-zero.
For changing irradiance conditions, whether dV=0 is checked and correspondingly switch
(switch1) is set to check dI. The signal is passed to signum function through a switch that will
allow its passage only if dV=0. Finally the value obtained through signum function is given as
dVref only if dV, dI are non-zero (For which a final switch is implemented). In case of dV and dI
zero, this final switch (switch3) will directly set dVref to zero thus allowing no change in the
existing operating conditions.
18
Figure 17: MPPT block used in simulation
19
7. Simulation Results
The complete system schematic is as follows:
Figure 18: Complete Simulation Model
There are different PLECS files for the different simulation conditions. The above figure shows a
basic simulation file for Case-I
20
All the simulation parameters are initialized as follows:
Figure 19: Parameter Initialization
Summary of all stages

Table 2: Summary of Parameters
PV CELL MODEL
Photon current 8.782A at 50 deg. and 1000W/m^2 irradiation.
This value is changed directly in proportion to
the irradiation specified.
Reverse saturation current 7.4421 107 A
Series Resistance 0.156672 ohm.
Shunt Resistance 241.11 ohm.
DC-DC STAGE
Input Capacitor 2.2 F, 0.02 ohm
Input Inductor 1.8 mH, ESR 0.01 ohm
DC link capacitor 47 F, ESR 0 ohm.
DC-AC STAGE
Inductor filter 17.5mH, ESR 0.1 ohm
21
Case-I: Steady-state operation with uniform 1000 / irradiation and cell junction
temperature of C, and grid at nominal conditions.
The cell junction temperature is 500 C. Hence the PV cell circuit model is modified according to
this change in temperature from 250 C(STC) to 500 C.
From the TSM-245 PA05.08 data sheet, the temperature ratings are as follows:
Table 3: Temperature Ratings of TSM-245 PA05.08
The new value of short circuit current is calculated as

I ph(new) = ISc(old) (1 + 0.047% 25) = 8.782 A
The new value of open circuit voltage is calculated as
V oc(new) = Voc(old) (1 0.32% 25) = 34.5 V
Let us assume that the ideality factor remains constant as that of at STC that is 1.2688, the new
values of , 0 are calculated as follows:
60 1.2688 1.38 1023 323
= = = 2.12083
q 1.619
34.5
8.782
= = 241.11 = 7.4421 107
34.5
2.12083
2.12083
= | = 0.39817 = 0.156672
8.782
Table 4: PV Module Parameters at STC and at 50 deg. C
Module Parameters @ STC @ C

Photon Current 8.68 A 8.782 A
Open Circuit Voltage 37.5 V 34.5 V
Reverse Saturation Current 4.0510 108 A 7.4421 107 A
Ideality Factor 1.2688 1.2688
Series Resistance 0.1727 0.156672
Shunt Resistance 241.11 241.11
22
Verification of the assumption of constant ideality factor:
With the new values cell parameters at 250 C the maximum power at 1000 W/m2 is reduced to
222.5 W. As per the data sheet for the PV cell, the power reduction co-efficient is -0.32%/0 C
which gives the power of 245 (1 0.32% 25) = 225.4 W. Thus the new parameters
obtained for the PV Cell model are correct.
The PV cell model with these new values is used in all the simulation results.
Figure 20: TSM-245 PA05.08 circuit model at 50 deg. C
Figure 21: TSM-245 PA05.08 I-V Characteristics at 50 deg. C
23
Figure 22: TSM-245 PA05.08 P-V Characteristics at 50 deg. C
From the above characteristics, it is clear that the maximum power obtained at 1000 W/m2 is
222.5W and corresponding voltage is 27.7V and current is 8.025A.
24
1. PV Array Output Voltage/ DC Side capacitor voltage, its ripple and PV Array Output
Current
Graph 1
From PV cell model simulation; the maximum power output at 500 C is at the voltage of 27.7V
and at the output current of 8.025A.
The mean values obtained by complete system simulation are Vmp= 27.6784V and
Imp=8.03432A. This shows that the MPPT algorithm is correctly tracking the maximum power
point.
The DC side capacitor is designed for the peak to peak ripple of 2.5%.
Max Min 27.8131 27.5225
%Peak to peak ripple = 100 = 100 = 1.0499%
Mean 27.6784
MPPT incremental conductance algorithm makes voltage reference to fluctuate about maximum
power voltage. Hence there is a ripple observed in PV output voltage and current.
25
2. Output Voltage of DC-AC Stage
Graph 2
The output voltage of DC-AC stage oscillates between +415.8 to -415.8 which is same as the peak
value of dc link voltage shown in 7.
3. Transformer Input Voltage and Current
Graph 3
26
Primary side current is the primary side inductor current switching at 20kHz with duty ratio dictated by
input voltage controller. As inductor discharges during positive and negative off periods through HFT and
hence a negative slope is observed in the current plot. HFT primary side voltage which is the dc link
capacitor voltage reflected on primary side.
400
=
= 6
= 66.667V
4. Inductor current of DC-DC stage and its Peak-Peak Ripple
Graph 4
The inductor is designed for the peak to peak ripple of 3% at constant DC link voltage of 400V
and power of 245W. From the graph the peak to peak ripple is as follows:
Max Min 8.16123 7.92807
Mean 8.04589
The DC side inductor ripple may go higher than the designed value due to the fact that the
transformer primary side voltage which is the dc link voltage has 10% peak to peak ripple and the
converter is operating at the reduced power of 222.5W.
27
5. PWM Voltage and Grid Current and THD in Line Current
Graph 5
The THD is designed as 3% at STC for the rated PV output of 245W considering constant dc link
voltage of 400V. The THD increases with the decrease in the power output from the PV cell. With
the junction temperature of 500 C, the power of the PV module is reduced to 222.5W. The dc link
voltage in the system is designed with peak to peak ripple of 10% and hence is no longer a constant
value. Because of above two reasons the THD obtained at simulation is 3.50963% and is higher
than that of the designed value at STC.
However, the THD of 3% is obtained when the PV module at STC is simulated with the system.
28
6. Switching and average values of Inverter DC-link Current
Graph 6
The simulation condition is at unity power factor and hence the dc-link current is oscillating above
zero axis.
7. Peak to Peak Ripple in DC link capacitor voltage
Graph 7
29
The DC link capacitor is designed for the 10% peak to peak ripple. The obtained peak to peak
ripple is as follows:
Max Min 415.608 383.836
Mean 399.911
Case-II: Irradiation fixed to 1000 / with step change 1 p.u. to 0.9 p.u.
1. PV Array Output Voltage and Current
Graph 8
The mean values obtained by complete system simulation are Vmp= 27.7289V and
Imp=8.01975A. This shows that the MPPT algorithm is correctly tracking the maximum power
point.
Max Min 27.9196 27.5334
Mean 27.7289
30
Graph 9
The DC-AC stage output voltage peak value is increased as it has to push higher grid current at
0.9p.u. voltage to maintain constant power of 222.5W.
Graph 10
31
The transformer primary voltage and current is constant with the step change in output due to the
fact that the DC link controller keeps the dc link voltage constant irrespective of any change in
grid voltage. The value is same as explained in Case-I.
4. Inductor current of DC-DC stage with peak to peak ripple
Graph 11
Max Min 8.13248 7.88848
Mean 8.01231
The DC side inductor ripple may go higher than the designed value due to the fact that the
transformer primary side voltage which is the dc link voltage reflected on the primary side has
10% peak to peak ripple and also the converter is operating at the reduced power of 222.5W.
32
Graph 12
the junction temperature of 500 C, the power of the PV module is reduced to 222.5W. Also the dc
link voltage in the system is designed with peak to peak ripple of 10% and is no longer a constant
value. Because of above two reasons the THD obtained at simulation is 3.2538% and is higher
than that of the designed value at STC.
33
Graph 13
The average value of the dc-link current remains constant as that in the Case-I due to the fact that
the power delivered is constant in both cases. However, the peak of switching waveform increases
as the grid current has increased (voltage dropped to 0.9p.u.) because same current is passed to the
grid through switches.
34
7. Peak to Peak Ripple in DC link capacitor voltage
Graph 14
Max Min 417.143 383.791
Mean 400.138
The average DC-link capacitor voltage remains constant due to dc-link voltage controller.
35
Case-III: With fixed irradiation of 500 / with step change in power factor command of
unity to 0.8 lagging (the injected current should lag the grid voltage) while operating with
MPPT.
The power factor is changed by giving delay in voltage signal in the PLL block.
1. PV Array Output Voltage/ DC Side capacitor voltage, its ripple and PV Array Output
Current
Graph 15
The mean values obtained by complete system simulation are Vmp= 26.8351V and Imp=3.965A.
This shows that the MPPT algorithm is correctly tracking the maximum power point. The
irradiation is reduced by 50% which causes the maximum power current to reduce by 50% and
maximum power voltage has very small reduction.
Max Min 27.0475 26.6291
Mean 26.8416
This increment in ripple from Case-I and II is because the output power has reduced to 50% of that
at 1000W/m^2 irradiance and the capacitor is sized for the rated power of 245W.
36
Graph 16
A small ripple is observed when there is a step change in power factor. The peak value is same as
dc link voltage in 7.
Graph 17
37
The transformer primary voltage is constant because the DC link controller keeps the dc link
voltage constant irrespective of any change in irradiation or grid power. DC link current is reduced
almost to 50% because power output is reduced to 50%.
A small ripple is observed when the step change is applied in the power factor.
4. Inductor current of DC-DC stage with peak to peak ripple
Graph 18
Max Min 4.07577 3.85502
Mean 3.96545
The DC side inductor ripple is higher than the designed value due to the fact that the transformer
primary side voltage which is the dc link voltage reflected on the primary side has 10% peak to
peak ripple and also the converter is operating at 50% of the rated power.
A small ripple is observed when a step change in the power factor is applied.
38
Graph 19
the junction temperature of 500 C, the power of the PV module is reduced to 50% of rated power.
Also the dc link voltage in the system is designed with peak to peak ripple of 10% and is no longer
a constant value. Because of above two reasons the THD obtained at simulation is 5.57583% and
is almost 2 times that of the designed value at STC.
39
Graph 20
The negative peak in the inverter DC link current appears after the application of step change in
the power factor. This because the converter is supplying reactive power once the power factor has
changed from 1 to 0.8. The average value is reduced and it goes below zero.
7. Peak Ripple in DC link capacitor voltage
Graph 21
40
Max Min 409.132 385.189
Mean 397.22
The peak to peak ripple has reduced as compared to Case-I, because less current is pushed into the
grid due to less maximum power.
Case-IV: With nominal grid voltage and unity power factor operation, step change in
irradiation from 1000 / to 600 / .
A MPPT algorithm is implemented as per the logic described in controller design stage. A step
change in irradiation is applied at 0.5 sec. in the simulation by changing photon current of the PV
Module.
1. PV Output Voltage and Current
Graph 22
A step change in irradiation has affected the PV current with the same proportion as that of the
change in irradiation. The effect of change in irradiance on voltage at maximum power is
negligible.
The MPPT algorithm tracks the new MPP after change in irradiation and a small transient is
introduced till the controller has tracked the new MPP.
41
2. DC link Voltage
Graph 23
There is a transient introduced in the dc link voltage till the new MPP is tracked. The peak to peak
ripple has reduced after step change because less current is pushed into the grid due to less
maximum power.
42
3. DC link Current (into inverter)
Graph 24
Due to reduced irradiance, less power is delivered to the grid and hence dc link current is reduced.
4. CCA values of PWM voltage
Graph 25
43
5. Grid Current (along with current reference for comparison)
Graph 26
Controller is working appropriately as the reference current and actual current are coinciding in
the graph.
44
8. Conclusion and Future Scope
The micro inverter system is able to provide required active and reactive power to the grid.
The variations of certain parameters from the ideal values can be because of multiple
reasons (interaction of various controllers, changes in grid conditions, atmospheric
conditions etc. as simulated).
The controllers give an instant response and have a less settling time.
The MPPT controller having implemented incremental conductance algorithm, works for
the given cell conditions.
System can be modified to build a standalone system with battery support.
The MPPT algorithm can be modified to work with PV modules with partial shading.
45
ANNEXURE-I
PV Module TSM-PA05.08 Data Sheet
46
Matlab Script for finding a, Rs and I0
syms rs del;isc=8.68;voc=37.5;vmp=30.2;imp=8.13; ns=60;dvdi=0.39817;q=1.6*10^-19;
t=298;rsh=241.11;k=1.38*10^-23;
del=1;
a=1;
while del~=0
io=(isc-(voc/rsh))/((exp((q*voc)/(ns*a*k*t))));
rs= dvdi-((ns*a*k*t/(isc*q)));
del=isc-(io*(exp(q*(vmp+imp*rs)/(ns*a*k*t))-1))-((vmp+imp*rs)/rsh)-imp;
if del>=0
a=a+0.00001;
else del=0;
end
end
isc
a
rs
io
Solution:
isc = 8.6800
a =1.2688
rs = 0.1727
io = 4.0510e-08
47
ANNEXURE-II
48
ANNEXURE-III
Matlab Script for Current controller with AC voltage feed forward for inverter with L filter
% K-factor Controller
%Let Phase margin=60, Bandwidth=2kHz, L=17.5*10^-3, rl=0.1
s=zpk(0,[], 1);
wc=2*pi*2000;
pm=60;
rl=0.1;
l=17.5*10^-3;
j=sqrt(-1);
p=j*wc;
vd=400;
Gplant=(vd/(p*l+rl));
phisystem=angle(Gplant)*180/pi;
phiboost=(pm-90)-phisystem;
k=tan(((phiboost*pi/180)/2)+pi/4);
wz=wc/k
wp=k*wc
Gcpre=abs ((1+p/wz)/(1+p/wp))*(1/p);
Golpre=Gcpre*Gplant;
Kc=1/abs(Golpre)
Gc=Kc*(1+s/wz)/(s*(1+s/wp))
Solution:
wz = 3.3702e+03
wp = 4.6856e+04
Kc = 1.8529e+03
Gc =
25760 (s+3370)
--------------
s (s+4.686e04)
Continuous-time zero/pole/gain model.
49
Matlab Script for Phase Locked Loop Controller
%Let Phase margin=60, Bandwidth=6Hz
s=zpk(0,[], 1);
wc=2*pi*6;
pm=60;
j=sqrt(-1);
p=j*wc;
Gplant=(1/(p));
wz=wc/k
wp=k*wc
Kc=1/abs(Golpre)
Solution:
wz = 10.1014
wp = 140.6950
Kc = 380.8156
Gc =
5304.1 (s+10.1)
---------------
s (s+140.7)
50
Matlab Script for DC-Link Voltage Controller
%Let Phase margin=60, Bandwidth=12Hz, Cdclink=47*10^-6
s=zpk(0,[], 1);
wc=2*pi*12;
pm=60;
cdclink=47*10^-6;
vg=294.156;
j=sqrt(-1);
p=j*wc;
Gplant=(vg/(p*cdclink));
wz=wc/k
wp=k*wc
Kc=1/abs(Golpre)
Solution:
wz = 20.2029
wp = 281.3900
Kc = 2.4339e-04
Gc =
0.0033899 (s+20.2)
------------------
s (s+281.4)
51
Matlab Script of controller for isolated boost dc-dc stage
%Let Phase margin=45, Bandwidth=2kHz, L= 1.8*10^-3,
Co=2.2*e-6
s=zpk(0,[], 1);
n=6;
Vin=400/n;
R_L=3.714;
wc=2*pi*2000;
pm=45;
L=1.8*10^-3;
Lr=10*10^-3;
ESR=0.02;
C0=2.2*10^-6;
j=sqrt(-1);
p=j*wc;
Gplant=(Vin*(1+p*C0*ESR))/(1+p*((L/R_L)+
C0*ESR)+p*p*L*C0*(1+ESR/R_L));
wz=wc/k
wp=k*wc
Kc=1/abs(Golpre)
Solution
wz = 5.6634e+03
wp = 2.7883e+04
Kc = 518.3851
Gc =
2552.2 (s+5663)
---------------
s (s+2.788e04)
52
References
[1] ABB Micro-Inverters
https://library.e.abb.com/public/3b4b2359a4986e2685257dff005e1834/MICRO-0.25-0.3-0.3HV-
Rev0.1.pdf
[2] http://psercacademy.asu.edu/
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Design and Simulation Validation of a 245W Grid

Connected PV Micro-Inverter System with

Chinmay Vaidya 1211377034

Under the guidance of

SCHOOL OF ELECTRICAL, COMPUTER AND ENEGY ENGINEEIRNG

Chinmay Vaidya 1211377034

Chinmay Vaidya Soham Karyakarte

A grid connected PV micro-inverter system with maximum power point tracking

b. Shunt resistance (Rsh)

c. Slope of I-V characteristic at open circuit

Figure 1:Equivalent Circuit of PV Module TSM-245 PA05.08

Figure 2:Equivalent Circuit of PV Module TSM-245 PA05.08 with bypass diodes

2. Power-voltage characteristics at 1000 /2 , 800 /2 , 200 /2 for all cells @ STC

4. Power-voltage characteristics at 500 /2 for 20 cells, 800 /2 for 20 cells, 200

Transformer turns ratio is calculated by following formula:

V(dclink) (1 d(min) ) 400 (1 0.1)

Ripple in the input current selected is of 3%. Hence,

Figure 7:Isolated Boost DC-DC Converter with HFT Isolation

( ) 400 2.5 105

Hence the switch current rating is 2.40641A.

Figure 8: DC-AC Inverter Stage

Figure 10: Implemented Current Controller of DC-AC Stage

Figure 11:Block diagram of PLL Basis (Courtesy: PSERC Academy)

Figure 12:Implemented PLL for DC-AC Stage

C(dclink) dVdclink 2 Ig (peak) Vg (peak)

Vdclink 2 (s) Vg (peak) 2282

Figure 14:Implemented DC-Link Voltage Controller

a. Controller for isolated boost dc-dc stage

Where, Kc = 518.3851, z = 5663.4, p = 27883

Figure 15:Actual Voltage Controller for DC-AC Stage

Figure 16:Incremental Conductance MPPT algorithm Flowchart

Figure 18: Complete Simulation Model

Figure 19: Parameter Initialization

Summary of all stages

The new value of short circuit current is calculated as

Table 4: PV Module Parameters at STC and at 50 deg. C

Module Parameters @ STC @ C

Figure 20: TSM-245 PA05.08 circuit model at 50 deg. C

Figure 21: TSM-245 PA05.08 I-V Characteristics at 50 deg. C

4. Inductor current of DC-DC stage and its Peak-Peak Ripple

4. Inductor current of DC-DC stage with peak to peak ripple

7. Peak Ripple in DC link capacitor voltage

4. CCA values of PWM voltage

Continuous-time zero/pole/gain model.

Continuous-time zero/pole/gain model.

Continuous-time zero/pole/gain model.

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