CSE 440

Computer
Architecture
*******
Examples
Of
Addressi
ng Modes

CSULB -- CECS 341Examples of

Addressing Modes
2014 -- R.W. Allison 1
Addressing Modes Operand Specifications

Addressing Mode a specification for generating an

address of an operand at run time.
All operands for a particular processor are in registers,
both CPU and memory.
However, although all processors, simple or complex, obtain
operands from registers, there are no standards as to the
names of various of addressing modes.
RISC processors dont do any CPU operations (e.g. add,
shift, mul, etc.) using memory registersall operands
must be in CPU registers. Thus, addressing modes for
memory operands only apply to Load and Store type
CISC processors do almost all CPU operations (e.g. add,
instructions.
shift, mul, etc.) using both CPU registers and memory
registers. Thus, addressing modes are a critical part of
compiling almost all of the instructions.
Thus, in our introduction to understanding these varieties of
ways to obtain instruction operands, we are going to
generalize the fundamental ways, not being processor
specific.
For the following fundamental addressing modes, well show a
pseudo assembly language usage, and then how that
assembly language statement might be compiled.
CSULB -- CECS 341Examples of
Addressing Modes
2014 -- R.W. Allison 2
Addressing Modes General Examples
For the following fundamental addressing modes, well show (1) a
pseudo assembly language usage, and then (2) how that
assembly
For language
the sake statement
of illustrating might
in the be compiled.
following examples, we assume
all addresses are 16-bits, and all memory and CPU registers are
16-bits wide.
Mode 1: Immediatethe operand itself (not the address of the
operand) is part of the instruction. This mode is useful for initializing
registers with address or data constants in programs.
Memory Addr Addr
Instruction Contents
0x017A add
r0, #0xA39D 0x01 ------
78 ------
Compile the example 0x01 opc r0 one
instruction into the 79 reg/imm instruct
appropriate memory ion
Note that since the immediate 0x01 0xA39D
locations
operand is 16-bits long, it is 7A ------
placed at memory location 0x01 ------
0x017B, a trailing word. 7B
Thus, this is a two-word 0x01
What is the address of the operand that7C is
instruction.
added to R0?
What is the value of the operand that is 0x01
added to R0? 7D

CSULB -- CECS 341Examples of

Addressing Modes
2014 -- R.W. Allison 3
Addressing Modes General Examples
For the following fundamental addressing modes, well show (1) a
pseudo assembly language usage, and then (2) how that
assembly language statement might be compiled.
Mode 2: Directthe instruction contains the address of the operand.
Direct addressing may also be referred to as "absolute" addressing. The
address must be known at compile time.
Memory Addr Addr
Instruction Contents
0x017A add
r0, @0xA39D 0x01 ------
78 ------
Compile the example 0x01 opc r0 one
instruction into the 79 reg/dir instruct
appropriate memory ion
Note that since the direct 0x01 0xA39D
locations 7A ------
address is 16-bits long, it is
placed at memory location 0x01 ------
0x017B, a trailing word. 7B : :
Again, this is a two-word 0xA3
0x01 ----
What is the address of the operand that7C is
9C --
instruction.
added to R0? 0xA3 0xBC
What is the value of the operand that is 0x01
added to R0? 9D
7D 5F
0xA3 ----
9E --
:

CSULB -- CECS 341Examples of

Addressing Modes
2014 -- R.W. Allison 4
Addressing Modes General Examples
For the following fundamental addressing modes, well show (1) a
pseudo assembly language usage, and then (2) how that
assembly language statement might be compiled.
Mode 3: Register Indirectspecifies the register holding the address of
the operand. This addressing mode is used to access memory operands
pointed to by base pointers that are stored in registers
Memory Addr Addr
Instruction Contents
0x017A add
r0, [r7] 0x01 ------
78 ------
Compile the example 0x01 opc r0 r7
one
instruct
instruction into the 79 reg/regi ion
appropriate memory 0x01 ------
Note that since the R7 contains
locations 7A ------
the 16-bit address, there is no
0x01 ------
trailing word.
Thus, isthis would be a one-word 7B : :
What the address of the operand that is
0x87 ----
instruction. 0x01
added to R0?
This cant be answered without knowing the 5E --
7C
contents of R7. 0x87 0x10
For this example, lets assume R7 = 0x875F 0x01
What is the value of the operand that is 7D 5F D5
added to R0? 0x87 ----
60 --
:

CSULB -- CECS 341Examples of

Addressing Modes
2014 -- R.W. Allison 5
Addressing Modes General Examples
For the following fundamental addressing modes, well show (1) a
pseudo assembly language usage, and then (2) how that
assembly language statement might be compiled.
Mode 4: Base (Indexed) a variation of register indirect mode, where the
effective address of the operand is calculated by the addition of a "base"
register and a offset (signed displacement) included as a field in the
AddrIndirect with Offset.
instruction. We could name this mode as Register
Memory Addr Contents
Instruction
0x017A add
0x01 ------
r0, [r7+ 0xA39D]
78 ------
Compile the example 0x01 opc r0 r7 one
instruction into the 79 reg/base instruct
appropriate memory 0xA39D ion
Although R7 contains the 16-bit 0x01
locations 7A ------
base address, the 16-bit offset
0x01 ------
must be in a trailing word.
Thus, isthis would be a two-word 7B : :
What the address of the operand that is
0xBA ----
instruction. 0x01
added to R0?
This cant be answered without knowing the 9C --
7C
contents of R7. 0xBA 0x5A
For this example, lets assume R7 = 0x1700 0x01
What is the value of the operand that is 7D 9D 17
added to R0? 0xBA ----
9E --
:

CSULB -- CECS 341Examples of

Addressing Modes
2014 -- R.W. Allison 6
Addressing Modes General Examples
For the following fundamental addressing modes, well show (1) a
pseudo assembly language usage, and then (2) how that
assembly language statement might be compiled.
Mode 5: PC Relative a variation of base mode, where the effective
address of the operand (typically an address to jump to) is calculated by the
addition of the current PC and a offset (signed displacement) included as a
field in the instruction. Addr
Memory Addr Contents
Instruction
0x017A jmp 0x01 ------
[PC + 0x439D] 78 ------
Compile the example 0x01 opc PC_rel one
instruction into the 79 0x439D instruct
appropriate ion
Although PCmemory
contains the 16-bit 0x01 ------
locations 7A ------
base address, the 16-bit offset
must be in a trailing word. 0x01
Again,isthis 7B : :
What thewould be a to
address two-word
jump to? 0x45 ------
instruction. 0x01
Based on all the info 18
7C instr well
given above, you should 0x45
0x01 jmp to
be
able to answer this 19
7D ------
PC 0x017C +
0x439D 0x45
1A
:

CSULB -- CECS 341Examples of

Addressing Modes
2014 -- R.W. Allison 7
Addressing Modes General Examples
For the following fundamental addressing modes, well show (1) a
pseudo assembly language usage, and then (2) how that
assembly language statement might be compiled.
Mode 5: PC Relative a variation of base mode, where the effective
address of the operand (typically an address to jump to) is calculated by the
addition of the current PC and a offset (signed displacement) included as a
field in the instruction. Addr
Memory Addr Contents
Instruction
0x017A jcs 0x01 ------
[PC + 0x439D] 78 ------
Compile the example 0x01 opc PC_rel
instruction into the 79 0x439D
appropriate memory
The difference between this example 0x01 ------
locations 7A ------
and the previous one is that the
jmp here is conditional. If the C-flag 0x01
is set, the PC changes; if the C-flag is 7B : :
clear, address
the PC does not the
change. 0x45
0x01 ------
What does PC get if C=1?
18
7C instr well
PC 0x017C + 0x45
0x01 jmp to
0x439D 19
7D ------
What address does the PC get if C=0?
0x45
PC 0x017C 1A
:

CSULB -- CECS 341Examples of

Addressing Modes
2014 -- R.W. Allison 8