DIGITAL DESIGN

(CS /EEE /INSTR F215)

BITS PILANI K.K. BIRLA GOA CAMPUS

Lecture 1
 Logic Gates
Digital symbols:
We assign a range of analog voltages to each
digital (logic) symbol
2 types of logic systems are used
Positive logic
Negative logic

assignment of voltage ranges depend on electrical properties of

transistors being used,
typical values for "1": +5V, +3.3V, +2.9V

Anita Agrawal
06-Aug-16 CS/EEE/INSTR F215 2
Advantages of Digital Techniques

The devices used in digital circuits operate only in one of

the two states, resulting in a very simple operation
Requires Boolean Algebra which is very easy to
understand
Requires basic concepts of electric network analysis
A large no. of ICs. are available for performing various
operations. These are highly reliable, accurate and speed
of operation is very high

Anita Agrawal
06-Aug-16 CS/EEE/INSTR F215 3
 Moores Law

(Transistor
count
doubles
every
two years)

06-Aug-16 4
International Technology Roadmap for
semiconductors
Technology Year
10 m 1971
6 m 1974
3 m 1977
1.5 m 1982
1 m 1985
800 nm 1989
600 nm 1994
350 nm 1995
250 nm 1997
180 nm 1999
130 nm 2001

Anita Agrawal
06-Aug-16 CS/EEE/INSTR F215 5
 Technology Year
90 nm 2004
65 nm 2006
45 nm 2008
32 nm 2010
22 nm 2012
14 nm 2014
10 nm 2017
7 nm 2020
5 nm 2023

Anita Agrawal
06-Aug-16 CS/EEE/INSTR F215 6
Advantages of Digital Techniques

The effect of fluctuations in the characteristics of the

components, ageing of the components, temperature
and noise is very small in digital circuits.

Digital circuits have capability of memory which

makes these circuits highly suitable for computers,
calculators, wrist watches etc.

Anita Agrawal
06-Aug-16 CS/EEE/INSTR F215 7
Advantages of Digital Techniques
contd.

Most Digital Devices are programmable

Cost is very less

Anita Agrawal
06-Aug-16 CS/EEE/INSTR F215 8
Applications of Digital Circuits

Communications
Business Transactions
Traffic Control
Space guidance
Medical Treatment
Internet
Weather monitoring etc, etc.

Anita Agrawal
06-Aug-16 CS/EEE/INSTR F215 9
Basic Logic gates

Anita Agrawal
06-Aug-16 CS/EEE/INSTR F215 10
NAND and NOR gates

Anita Agrawal
06-Aug-16 CS/EEE/INSTR F215 11
NAND & NOR gates

Anita Agrawal
06-Aug-16 CS/EEE/INSTR F215 12
Ex-OR gate

Anita Agrawal
06-Aug-16 CS/EEE/INSTR F215 13
Ex-NOR gate

Anita Agrawal
06-Aug-16 CS/EEE/INSTR F215 14
Buffer

Anita Agrawal
06-Aug-16 CS/EEE/INSTR F215 15
Gates with multiple inputs

Anita Agrawal
06-Aug-16 CS/EEE/INSTR F215 16
 Anita Agrawal
06-Aug-16 CS/EEE/INSTR F215 17
Timing waveforms

Anita Agrawal
06-Aug-16 CS/EEE/INSTR F215 18
Levels of Integration

No.
Level of Integration Abbr.
of Gates(G)
Small-Scale SSI G < 10
Medium-Scale MSI 10 < G <1000
Large-Scale LSI 1000 < G <100,000
Very Large-Scale VLSI G >100,000

Anita Agrawal
06-Aug-16 CS/EEE/INSTR F215 19
Digital Logic Families

Digital Integrated Circuits are classified not only by

their complexity or logical operation but also on the
basis of the specific circuit technology to which they
belong. The circuit technology is referred to as a

Digital Logic Family

Anita Agrawal
06-Aug-16 CS/EEE/INSTR F215 20
Classification of Digital Logic families

Bipolar Logic Family

Unipolar Logic Family

Anita Agrawal
06-Aug-16 CS/EEE/INSTR F215 21
Bipolar Logic Family

Elements:
Resistors, Diodes, transistors

Operations:
Saturated
Non-saturated

Anita Agrawal
06-Aug-16 CS/EEE/INSTR F215 22
Saturated Bipolar Logic families

Resistor Transistor Logic (RTL)

Direct-coupled transistor Logic (DCTL)
Integrated Injection Logic (I2L)
Diode Transistor Logic (DTL)
High-Threshold Logic (HTL)
Transistor-Transistor Logic (TTL)

Anita Agrawal
06-Aug-16 CS/EEE/INSTR F215 23
Non-Saturated Bipolar Logic families

Schottky TTL

Emitter-coupled Logic (ECL)

Anita Agrawal
06-Aug-16 CS/EEE/INSTR F215 24
Unipolar Logic families

PMOS

NMOS

CMOS

Anita Agrawal
06-Aug-16 CS/EEE/INSTR F215 25
Characteristics of Digital Logic families

Fan-out: The no. of standard loads that can be connected

to the output of the gate without degrading its normal
operation. Unit: number

Standard Load: The amount of current needed by an

input of another gate in the same logic family.

Anita Agrawal
06-Aug-16 CS/EEE/INSTR F215 26
 Anita Agrawal
06-Aug-16 CS/EEE/INSTR F215 27
Calculated from the ratio:

IOH/IIH or IOL/IIL

whichever is smaller

Anita Agrawal
06-Aug-16 CS/EEE/INSTR F215 28
Power Dissipation

It represents the amount of power needed by the gate.

It refers to the power delivered to the gate from the

power supply. (It does not include the power delivered
from another gate)

Unit: mW

Anita Agrawal
06-Aug-16 CS/EEE/INSTR F215 29
Calculated from :

PD(avg) = ICC(avg) x VCC where

ICC(avg) = (ICCH + ICCL ) / 2

Anita Agrawal
06-Aug-16 CS/EEE/INSTR F215 30
Propagation Delay

It is the average transition delay time for the signal to

propagate from the input to the output when the binary
signal changes in value.

Unit: ns.

Anita Agrawal
06-Aug-16 CS/EEE/INSTR F215 31
 Anita Agrawal
06-Aug-16 CS/EEE/INSTR F215 32
Noise Margin

It is the maximum noise voltage that can be added

to an input signal of a digital circuit without
causing an undesirable change in the circuit output.

Anita Agrawal
06-Aug-16 CS/EEE/INSTR F215 33
 5V 5V

2.4V
2V

0.8V
0.4V

0V 0V

Anita Agrawal
06-Aug-16 CS/EEE/INSTR F215 34