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Keywords BLF645, broadband
Abstract The BLF645 is a 100 W, 32 V LDMOS RF power push-pull transistor for
broadcast transmitter and industrial applications from HF to 1.4 GHz. This
application note describes a broadband amplifier that delivers more than
100 W from 10 MHz to 600 MHz.
NXP Semiconductors AN10953
BLF645 10 MHz to 600 MHz 120 W amplifier
Revision history
Rev Date Description
v.1 20110303 initial version
Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
AN10953 All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved.
1. Introduction
The BLF645 is a 100 W LDMOS RF power push-pull transistor for broadcast transmitter
and industrial applications in the HF to 1.4 GHz frequency range. This application note
describes a broadband amplifier which delivers more than 100 W from 10 MHz to
600 MHz.
019aaa994
AN10953 All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved.
2. Test summary
The RF performance described in Section 3 may be summarized as follows:
AN10953 All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved.
3. RF Performance
3.1 1-Tone CW
019aaa995
200
PL(M)
(W)
160
(1)
120 (2)
80
40
0
10 102 103
f (MHz)
IDq = 1.0 A
(1) VDS = 32 V
(2) VDS = 28 V
Fig 2. Peak output power at 3 dB compression as a function of frequency
019aaa996
30
Gp
(dB) (1)
26
(2)
22
18
14
10 102 103
f (MHz)
VDS = 28 V; Pi = 10 dBm
(1) IDq = 4.0 A
(2) IDq = 1.0 A
Fig 3. Small-signal power gain as a function of frequency
AN10953 All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved.
019aaa997
25 25
G
(dB) (%)
23 (1) 20
(2)
21 15
(3)
(4)
19 10
17 5
15 0
10 102 103
f (MHz)
IDq = 1.0 A; PL = 10 W
(1) gain; VDS = 32 V
(2) gain; VDS = 28 V
(3) efficiency; VDS = 28 V
(4) efficiency; VDS = 32 V
Fig 4. Gain and efficiency as a function of frequency
019aaa998
25 80
G
(dB) (%)
23 70
(1)
21 (2) 60
19 50
(3)
(4)
17 40
15 30
10 102 103
f (MHz)
AN10953 All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved.
019aaa999
24 70
G
(dB) (%)
(1)
22 (2) 50
(3)
20 30
(4)
(5)
(6)
18 10
0 40 80 120 160
PL (W)
AN10953 All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved.
019aab000
24 70
G
(dB) (%)
(1)
22 (2) 50
(3)
20 30
(4)
(5)
(6)
18 10
0 40 80 120 160 200
PL (W)
019aab001
0
IRL
(dB)
5
10
15
20
25
10 102 103
f (MHz)
AN10953 All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved.
019aab002
0
(2)
IMD
(dBc)
20
(3)
40
(1)
60
80
10 102 103
f (MHz)
Note that the measured 2nd harmonic levels are at the system test limit, so the actual
levels may be significantly lower.
AN10953 All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved.
3.2 2-Tone CW
019aab003
24 70
G
(dB) (%)
(1)
(2)
22 (3)
50
(4)
20 (5) 30
(6)
18 10
0 40 80 120 160 200
PL (W)
AN10953 All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved.
019aab004
0
IMD3
(dBc)
(7)
20 (8)
(4) (9)
(5)
(6)
40
(1)
(2)
(3)
60
38 42 46 50 54
PL (dBm)
VD = 28 V; f = 100 kHz
(1) IDq = 1.0 A; f = 20 MHz
(2) IDq = 1.0 A; f = 100 MHz
(3) IDq = 1.0 A; f = 500 MHz
(4) IDq = 2.0 A; f = 20 MHz
(5) IDq = 2.0 A; f = 100 MHz
(6) IDq = 2.0 A; f = 500 MHz
(7) IDq = 4.0 A; f = 20 MHz
(8) IDq = 4.0 A; f = 100 MHz
(9) IDq = 4.0 A; f = 500 MHz
Fig 11. 3rd order intermodulation distortion as a function of output power
AN10953 All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved.
019aab005
AN10953 All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved.
019aab006
0
IRL
(dB)
5
(1)
10
15
(2)
20
25
10 102 103
f (MHz)
019aab007
28
G
(dB)
(2)
24
(1)
20
16
12
8
10 102 103
f (MHz)
AN10953 All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved.
4. PCB information
C32
R115
D101
C108
C107 L101 C31
R117
R101
R103
C106
R116
R118
C5
U101
C4
C3
R102 C30
C102
C103
R114
C104
U103
L102
R2
R106
C12
C10
C11
C105
D102
U102
R112
R4
C20
R111
R108
E102
R015
R113
T4
C33
T2
R109
C101
C104
Q101
R1 L1
E101 R110
C23
C1 C22
C2 C24
C25
T3
T6 T7
C21
T1 R5
R3
C9
C8
C7
019aab008
(1) PCB is Taconic RF35; r = 3.5 F/m; height = 0.79 mm; Cu thickness = 35 m
(2) T4, T6, and T7 cores are bonded to the baseplate with a thermally-conductive adhesive such as Wakefield DeltaBond 152
Fig 15. PCB layout
AN10953 All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved.
4.1 RF circuit
C3 C5 C4
4.7 nF 100 nF 10 F
R2
20
1210 C22
R4 C20
T2 200 510 pF
510 pF T4
C1 input 25 4:1 20 W output 15 4:1 C23 J2
J1 1 Q1 T7 NF
4.7 nF
NF T1 3 4.7 nF
5 BLF645
output
input 4 C25 balun
C2
balun 2
T6 4.7 nF
4.7 nF T3
R5 C21 output 15 4:1
input 25 4:1 C24
200 510 pF
20 W 510 pF
R6 L1
R1 R3 10 8T +28 V @ 10 A GND
10 20 3W 18 AWG TP1 TP2
0.5 W 1210
VG VD
C10 C12 C12 C7 C9 C8 C31 C32 C30 C33
10 F 100 nF 4.7 nF 4.7 nF 100 nF 10 F 4.7 nF 100 nF 10 F 470 F
63 V
019aab009
AN10953 All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved.
AN10953 All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved.
VD
L101 U101
BLM21BD102 LT3010EMS8E
IN OUT
8 1
C108 R118 EN ADJ R116 C106 C107 R115
2.2 F 10.0 k 5 2 52.3 k 1 nF 1 F 1.10 k
GND: 4, 9 D101
HSMGC150
R117 green = power
10.0 k
5. Abbreviations
Table 4. Abbreviations
Acronym Description
ACPR Adjacent Channel Power Ratio
CCDF Complementary Cumulative Distribution Function
DPD Digital PreDistortion
IBW Integration BandWidth
LDMOS Laterally Diffused Metal-Oxide Semiconductor
MOSFET Metal Oxide Silicon Field Effect Transistor
PAR Peak-to-Average power Ratio
W-CDMA Wideband Code Division Multiple Access
AN10953 All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved.
6. Legal information
6.1 Definitions design. It is customers sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customers applications and
products planned, as well as for the planned application and use of
Draft The document is a draft version only. The content is still under
customers third party customer(s). Customers should provide appropriate
internal review and subject to formal approval, which may result in
design and operating safeguards to minimize the risks associated with their
modifications or additions. NXP Semiconductors does not give any
applications and products.
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of NXP Semiconductors does not accept any liability related to any default,
use of such information. damage, costs or problem which is based on any weakness or default in the
customers applications or products, or the application or use by customers
third party customer(s). Customer is responsible for doing all necessary
6.2 Disclaimers testing for the customers applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customers third party
Limited warranty and liability Information in this document is believed to
customer(s). NXP does not accept any liability in this respect.
be accurate and reliable. However, NXP Semiconductors does not give any
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completeness of such information and shall have no liability for the may be subject to export control regulations. Export might require a prior
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In no event shall NXP Semiconductors be liable for any indirect, incidental, Evaluation products This product is provided on an as is and with all
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contract or any other legal theory. entire risk as to the quality, or arising out of the use or performance, of this
Notwithstanding any damages that customer might incur for any reason product remains with customer.
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Right to make changes NXP Semiconductors reserves the right to make interruption, loss of use, loss of data or information, and the like) arising out
changes to information published in this document, including without the use of or inability to use the product, whether or not based on tort
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notice. This document supersedes and replaces all information supplied prior any other theory, even if advised of the possibility of such damages.
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Suitability for use NXP Semiconductors products are not designed,
all direct or general damages), the entire liability of NXP Semiconductors, its
authorized or warranted to be suitable for use in life support, life-critical or
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foregoing shall be limited to actual damages incurred by customer based on
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reasonable reliance up to the greater of the amount actually paid by customer
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damage. NXP Semiconductors accepts no liability for inclusion and/or use of
and disclaimers shall apply to the maximum extent permitted by applicable
NXP Semiconductors products in such equipment or applications and
law, even if any remedy fails of its essential purpose.
therefore such inclusion and/or use is at the customers own risk.
Applications Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no 6.3 Trademarks
representation or warranty that such applications will be suitable for the
specified use without further testing or modification. Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
AN10953 All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved.
7. Contents
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Test summary. . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 RF Performance . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.1 1-Tone CW . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.2 2-Tone CW . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.3 Alternative input matching . . . . . . . . . . . . . . . 12
4 PCB information. . . . . . . . . . . . . . . . . . . . . . . . 14
4.1 RF circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.2 Bias circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 17
6 Legal information. . . . . . . . . . . . . . . . . . . . . . . 18
6.1 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.2 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.3 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 18
7 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section Legal information.