Cspvi 161006153207

Rayat Shikshan Sansthas
KARMAVEER
BHAURAO PATIL
POLYTECHNIC,
SATARA
PLC Hardware &
Programming
Department Of Electronics And
Telecommunication Engineering
Control System and
PLC
EJ5G Subject Code: 17536
Third Year Entc
Amit Nevase
Lecturer,
Department of Electronics & Telecommunication
Engineering,
Karmaveer Bhaurao Patil Polytechnic, Satara
Objectives
The student will be able to:
Understand classifications of control system.
Understand Steady state, time response, and
frequency response analysis.
Analyze the Stability of control system using RH
criteria.
Understand the fundamentals and diff. Hardware
parts of PLC.
Draw ladder diagrams to program PLC

3/12/17 Amit Nevase 3
Teaching & Examination Scheme
Teaching Scheme Examination Scheme
PAPER
TH TU PR TH PR OR TW TOTAL
HRS
03 -- 02 03 100 50# --- 25@ 175
Two tests each of 25 marks to be conducted as per

the schedule given by MSBTE.
Total of tests marks for all theory subjects are to be
converted out of 50 and to be entered in mark sheet
under the head Sessional Work (SW).

Module I Introduction to Control
System
Introduction to Control systems
(4 Marks)
Control System Definition and Practical Examples
Classification of Control System : Open Loop and Closed Loop
Systems Definitions, Block diagrams, practical examples, and
Comparison, Linear and Non-linear Control System, Time
Varying and Time In-varying Systems
Servo System : Definition, Block Diagram, Classification (AC and
DC Servo System), Block diagram of DC Servo System.
Laplace Transform and Transfer Function
(4 Marks)
Laplace Transform : Signifiance in Control System
Transfer Function : Definition, Derivation of transfer functions
for Closed loop Control System and Open Loop Control System,
Differential Equations and transfer functions of RC and RLC
Circuit
Block
3/12/17 Diagram Algebra
Amit Nevase 5
Module II Time Response
Analysis
Time Domain Analysis
(4 Marks)
Transient and Steady State Response
Standard Test Inputs : Step, Ramp, Parabolic and Impulse, Need,
Significance and corresponding Laplace Representation
Poles and Zeros : Definition, S-plane representation
First and Second order Control System
(8 Marks)
First Order Control System : Analysis for step Input, Concept of
Time Constant
Second Order Control System : Analysis for step input, Concept,
Definition and effect of damping
Time Response Specifications
(8 Marks)
Time Response Specifications ( no derivations )
Tp, Ts, Tr, Td, Mp, ess
3/12/17 problems on time
Amit Nevase response
6
specifications
Module III Stability
Introduction to Stability
(4 Marks)
Definition of Stability, Analysis of stable, unstable,
critically stable and conditionally stable
Relative Stability
Root locations in S-plane for stable and unstable
system
Rouths Stability Criterion

(8 Marks)
Rouths Stability Criterion : Different cases and
conditions
Statement Method Amit Nevase
3/12/17 7
Module IV Control Actions
Process Control System

(4 Marks)
Process Control System Block diagram, explanation
of each block
Control Actions
(8 Marks)
Discontinuous Mode : On-Off Controller, Equation,
Neutral Zone
Continuous modes: Proportional Controller (offset,
proportional band), Integral Controllers, Derivative
Controllers output equations, corresponding
Laplace transforms, Response
3/12/17 Amit Nevase
of P, I, D controllers8

Module V PLC Fundamentals
Introduction
(4 Marks)
Evolution of PLC in automation, need and benefits of
PLC in automation
Block Diagram of PLC
(12 Marks)
Block diagram and description of different parts of
PLC -
CPU Function, Scanning cycle, speed of execution,
Power supply function,
Memory function , organization of ROM and RAM
Input modules function, different input devices
used with PLC and their uses
Output modules function,
3/12/17 Amit Nevase different output devices
9
Module VI PLC Hardware and
Programming
PLC Hardware
(8 Marks)
Discrete Input Modules Block diagram, typical wiring details,
Specifications of AC input modules and DC input modules.
Sinking and sourcing concept in DC input modules
Discrete Output Modules Block diagram, typical wiring details,
Specifications of AC output modules and DC output modules.
Analog Input and output modules : Block diagram, typical wiring
details and specifications
PLC Programming
(16 Marks)
I/O Addressing in PLC
PLC Instruction Set : Relay instructions, timer instructions,
counter instructions, data handling instructions, logical and
comparison instructions
PLC programming examples based on above instruction using
Ladder programming
Module-VI
PLC Hardware &
Programming
Specific Objectives
Explain the details of diff. I/O modules
of PLC.
Get familiar with the instruction set of
PLC system.
Develop PLC programming skills.

Programming
PLC Hardware
(8 Marks)
Discrete Input Modules Block diagram, typical wiring
details, Specifications of AC input modules and DC input
modules. Sinking and sourcing concept in DC input
modules
PLC Programming
(16 Marks)
PLC programming examples
3/12/17 based on above instruction using
Amit Nevase 13
Input Modules
Input modules serve as the link between field devices
and the PLCs CPU.
Each input module has a terminal block for attaching
input wiring from each individual field input device.
Typically input modules have either 8, 16 or 32 input
terminals.
The main function of an input module is to take the field
device input signal, convert it to a signal level that the
CPU can work with, electrically isolate it, and send the
signal, by the way of the backplane board, to the CPU.

Discrete Input Modules
The discrete input module is the most
common input interface used with
programmable controllers. Discrete input
signals from field devices can be either AC
or DC.

Discrete Input Modules
The most common types are listed below:
AC Input Modules DC Input Modules
24 VAC 24 V dc
48 VAC 48 V dc
120 VAC 10-60 V dc
240 VAC 120 V dc
120 Volts Isolated 230 V dc
240 Volts Isolated Sink/Source 5-50 V dc
24 VAC/DC 5/12 V dc TTL

Typical Wiring Details
Input Input
Modul Modul
e e
24 Volts
Common Common
230 Volts
Common Common
120 Volts

Block diagram of AC input module
Input Bridge Noise & Threshold Input

Optical
Signal Rectifier Debounce Detector Isolation
Logic CPU Status
Filter Table
LED

AC Input Module Specifications
Voltage: This is the operating voltage at 47
to 63 Hertz for the module.
Inputs: This indicates the number of inputs
the module has.

Points per common: This is the number of

input points that share the same common
connection. As an example, one 16 point
input module could have all input points
sharing one common, and a different 16 point
input module might have two groups of 8
input points. Each group of 8 would have its
own separate common.

Backplane Current Draw: Each module takes
power from the PLCs power supply to operate the
electronics on the module. This specification will
be used when calculating power supply loading.
Maximum signal delay: Signal delay is the time
it takes for the PLC to pick up the field input
signal, digitize it, and store it in the memory. This
specification is usually listed for signal turning on
and for a signal turning off.

Nominal input current: this is the current drawn
by an input point at nominal input voltage.
Maximum Inrush Current: this is the maximum
inrush current the module can handle.
Maximum off state current: this is the
maximum amount of current, typically from
leakage from a solid state input device, that a
module can accept while remaining in an OFF
state.

Block diagram of DC input module
+
Input Power Noise & Threshold Optical Input
SignalConversion Debounce Detector Isolation Logic CPU Status
- Filter Table
LED

DC Input Module Specifications
Maximum Off state current: This is the
maximum amount of leakage current
allowed in an input circuit from an input
device that will keep the input circuit in an
OFF state.

Sinking/Sourcing
Input
Device
+ +
Input Input
Module Module
- -
Input
Device
(a) (b)

Sinking/Sourcing
Output Output
Module Module
- +
Output Output
Load Load
(c) (d)

Programming
PLC Hardware
(8 Marks)
Discrete Output Modules Block diagram, typical wiring
details, Specifications of AC output modules and DC
output modules.
PLC Programming
(16 Marks)
PLC programming examples
3/12/17 based on above instruction using
Amit Nevase 27
Output Modules
Output modules serve as the link between the PLCs
microprocessor and hardware field devices.
Each output module has a terminal block for attaching
output wiring to go to each individual field output device.
Typical output modules have either 8, 16 or 32 output
terminals.
The output signal once received from the CPU, must be
stored before being sent to each output modules output
screw terminals.
The storage area for output signals is called the output
status file.
Discrete Output Modules
Much like discrete inputs, discrete outputs
are the most commonly used type.
Discrete output modules simply act as
switches to control output field devices.
They fall into two classifications: solid state
switching and relay output switching.

Common Discrete Output Modules
Discrete Output Modules
Solid State Outputs Relay Outputs

DC output Relay Output
AC output Modules
Modules modules
12, 24, 48 VAC TTL Level Relay Output
Isolated relay
120 VAC 12, 24, 48 V dc
output
230 VAC 120 V dc Relay output
230 V dc
24 V dc, sink
24 V dc, source
Typical Wiring Details of Output
Module
Output
Module
Output 2
Output 3
Output 4
Output 5
Load
120 VAC
Signal From
CPU operates switch COM
User supplied
Power for
Field devices

Block diagram of AC output Module
Fuse
Signal Latch Triac Controlled
Optical Filter
From Logic Switching Device
Isolation
CPU Circuit Circuit
LED

Block diagram of AC output Module

Solid State Output Switching
In solid state AC output module, a triac is

used to switch the AC high voltage and
current controlling the ON or OFF state of
the field hardware device. A triac is a solid
state device used to switch AC.

Relay Output Switching
Relay output modules are also known as contact or
dry contact outputs.
Even though relay output modules are used to switch
AC or DC loads, usually relay outputs are used to

switch small currents at low voltages, to multiplex
analog signals, and to interface control signals to
variable speed drives.
Relay output modules use actual mechanical relays,
one for each output point, to switch the output signal

from the output status file.
Relay Output Switching
Commo
n to L-1 L-2
other Outpu
points t
Modul
e
ON or OFF
Signal from
Output status
table
Fuse
Relay
Switchi
ng
Device
Block diagram of DC output module
Power Fuse
Signal Latch Transistor Controlled
Optical Filter
From Logic Switching Device
Isolation
CPU Circuit Circuit
LED

Specifications of DC output module
Sourcing Output Module Specifications
Operating Voltage 10/50 V dc
Number of Outputs 16
Output points per common 16
Backplane Current draw 0.280 amp at 5 V dc
ON= 0.1 ms
Maximum Signal Delay
OFF= 1.0 ms
Maximum OFF state leakage 1 mA
Minimum Load Current 1 mA
ON state voltage Drop 1.2 Volts at 10 amps

Programming
PLC Hardware
(8 Marks)
Analog Input and output modules : Block diagram,
typical wiring details and specifications
PLC Programming
(16 Marks)
Ladder programming
Analog Input Module
User
Connection
+
Input
A/D Opto Micro Backplan
Convert Isolation Process e CPU Status
er or Interface Table
VLSI
User
Connection
+
COM

Programming
PLC Hardware
(8 Marks)
PLC Programming
(16 Marks)
Ladder programming
I/O Addressing
The PLC has to be able to identify each
particular input and output. It does this by
allocating addresses to each input and
output.
With a small PLC this is likely to be just a
number, prefixed by a letter to indicate
whether it is an input or an output.

I/O Addressing
With larger PLCs that have several racks of input
and output channels, the racks are numbered.
With the Allen-Bradley PLC-5, the rack containing
the processor is given the number 0 and the
addresses of the other racks are numbered 1, 2, 3,
and so on, according to how setup switches are set.
Each rack can have a number of modules, and
each one deals with a number of inputs and/or
outputs.

I/O Addressing
I=Input Module
O=Output Number
X :X X X / X
X Terminal
Number
Rack
Number

Programming
PLC Hardware
(8 Marks)
PLC Programming
(16 Marks)
Ladder programming
Programming Languages
Ladder Diagram (LD):a graphical depiction of a

process with rungs of logic, similar to the relay
ladder logic schemes that were replaced by PLCs.
Sequential Function Charts (SFC): a
graphical depiction of interconnecting steps,
actions, and transitions.
Instruction List (IL): assembler type, text
based language for building small applications or
optimizing complex systems.
Programming Languages
Function Block Diagram (FBD): a

graphical depiction of process flow using
simple and complex interconnecting blocks.
Structured Text (ST): a high-level, text-
based language such as BASIC, C, or
PASCAL specifically developed for industrial
control applications.

PLC Ladder Programming
A very commonly used method of programming
PLCs is based on the use of ladder diagrams.
Writing a program is then equivalent to drawing
a switching circuit.
The ladder diagram consists of two vertical lines
representing the power rails.
Circuits are connected as horizontal lines, that
is, the rungs of the ladder, between these two
verticals.
In drawing a ladder diagram, certain conventions
are adopted
The vertical lines of the diagram represent
the power rails between which circuits are
connected. The power flow is taken to be
from the left-hand vertical across a rung.
Each rung on the ladder defines one
operation in the control process

are adopted
A ladder diagram is read from left to right and from
top to bottom.
Left Right
Power Flow
Power Power
Rail Rail
Rung
1
Rung
2
Rung
3
Rung
4
END End
Rung
The top rung is read from left to right.
Then the second rung down is read from left to right and so
on.
When the PLC is in its run mode, it goes through the entire
ladder program to the end, the end rung of the program
being clearly denoted,
3/12/17 and then promptly 50
Amit Nevase resumes at the
Scanning Ladder Diagram
Right Read the status of all

Left Power Flow Power the inputs & store
Power Rail memory
Rail
Rung
1
Read the inputs from
Rung memory & implement
2 the program, storing
Rung in the outputs in
3 memory
Rung
4
Update all the
outputs
END End
Rung
are adopted
Each rung must start with an input or inputs and
must end with at least one output. The term input
is used for a control action, such as closing the
contacts of a switch. The term output is used for a
device connected to the output of a PLC, such as
a motor. As the program is scanned, the outputs
are not updated instantly, but the results stored in
memory and all the outputs are updated
simultaneously at the end of the program scan

are adopted
Electrical devices are shown in their normal
condition. Thus a switch that is normally
open until some object closes it is shown as
open on the ladder diagram. A switch that is
normally closed is shown closed.

are adopted
A particular device can appear in more than
one rung of a ladder. For example, we might
have a relay that switches on one or more
devices. The same letters and/or numbers
are used to label the device in each
situation.

are adopted
The inputs and outputs are all identified by
their addresses; the notation used
depends on the PLC manufacturer. This is
the address of the input or output in the
memory of the PLC

Programming
PLC Hardware
(8 Marks)
PLC Programming
(16 Marks)
Ladder programming
Relay Type Instructions
Sr. Instructi
Description
No. on
1 XIC Examine if closed
2 XIO Examine if open
3 OTE Output Energize
4 OTL Output Latch
5 OTU Output Unlatch

Representation of Contacts and Coils
The ladder diagram language is basically a
symbolic set of instructions used to create the
controller program.
These ladder instruction symbols are arranged
to obtain the desired control logic that is to be
entered into the memory of the PLC.
Because the instruction set is composed of
contact symbols, ladder diagram language is
also referred to as contact symbology.
Representation of Contacts and Coils
Representations of contacts and coils are the basic
symbols of the logic ladder diagram instruction set.
The three fundamental symbols that are used to
translate relay control logic to contact symbolic logic
are
- Examine If Closed (XIC),
- Examine If Open (XIO),
- Output Energize (OTE).

Each of these instructions relates to a single bit of PLC
memory that is specified by the instructions address.

Fundamental Symbols
Examine If Closed (XIC) Examine If Open (XIO)
Figure : Relay Contact Figure : Relay Contact
Output Energize (OTE)
Figure : Relay Coil

Examine If Closed (XIC) Instruction
17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 I:012
I:012
04
Instruction is TRUE
17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 I:012
I:012
04
Instruction is FALSE
Examine If Closed (XIC) Instruction

Examine If Open (XIO) Instructions
17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 I:012
I:012
04
Instruction is TRUE
17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 I:012
I:012
04
Instruction is FALSE
Examine If Open (XIO) Instructions

Output Energize (OTE) Instruction
17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 O:013
17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 1 I:012
I:012 I:012 O:013
01 04 01
Figure : Output Energize (OTE) instruction - TRUE

17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 O:013
17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 1 I:012
I:012 I:012 O:013
01 04 01
Figure : Output Energize (OTE) instruction - FALSE


OTL and OTU Instructions
Instruct
Name Symbol Description
ion
OTL sets the bit to
"1" when the rung
becomes true and
Output L retains its state
OTL
Latch when the rung
loses continuity or
a power cycle
occurs.
OTU resets the bit
Output U to "0" when the
OTU
Unlatch rung becomes true
and retains it.
Programming
PLC Hardware
(8 Marks)
PLC Programming
(16 Marks)
PLC Instruction Set : Relay instructions, Timer instructions,
Ladder programming
Timer Instructions
Sr. Instructi
Name Description
No. on
Counts time-based intervals
1 TON On Delay Timer when the instruction is true.
2 TOF Off Delay Timer when the instruction is
false.
when the instruction is true
and retains the
3 RTO Retentive Timer accumulated value when
the instruction goes false or
when power cycle occurs.
Resets a retentive timers
4 RES Reset accumulated value to zero.

On Delay Timer Sequence
Input Timer
True
Rung Condition False
Time Period On Delay

Timed
Duration
True
On (Logic 1)
Timed Output Bit False
Off (Logic 0)
Preset Value= Accumulated Value

TON On Delay Timer Instruction
TON
TIMER ON DELAY
EN
Timer T4:0
Time Base 1:0 DN
Preset 15
Accumulated 0
The On delay timer operates such that when

the rung containing timer is true, the timer
timed out period commences.
At the end of the timer time out period, an
output is made active.
TON On Delay Timer Instruction
Timer number This number must come from the timer
file. In the example shown, the timer number is T4:0, which
represents timer file 4, timer 0 in that file. The timer address
must be unique for this timer and may not be used for any
other timer.
Time base The time base (which is always expressed in
seconds) may be either 1.0 s or 0.01 s. In the example
shown, the time base is 1.0 s.
Preset value In the example shown, the preset value is
15. The timer preset value can range from 0 through 32,767.
Accumulated value In the example shown, the
accumulated value is 0. The timers accumulated value
normally is entered as 0,Amit
3/12/17 although
Nevase it is possible to enter 73a
TON Instruction Control Word
Timer Element
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Word
EN TT DN Internal Use 0
Preset Value PRE 1
Accumulated Value ACC 2

TON Instruction Control Word
Enable (EN) bit The enable bit is true (has a status of 1)
whenever the timer instruction is true. When the timer
instruction is false, the enable bit is false (has a status of 0).
Timer-timing (TT) bit The timer-timing bit is true
whenever the accumulated value of the timer is changing,
which means the timer is timing. When the timer is not
timing, the accumulated value is not changing, so the timer-
timing bit is false.
Done (DN) bit The done bit changes state whenever the
accumulated value reaches the preset value. Its state
depends on the type of timer being used.

Off Delay Timer Sequence
Input Timer
True
Rung Condition False
Timed Period Off Delay

Timed
Duration
True
Timed Output Bit On (Logic 1) False

Off (Logic 0)
Preset Value= Accumulated Value

TOF Off Delay Timer Instruction
TOF
TIMER OFF DELAY
EN
Timer T4:0
Time Base 1:0 DN
Preset 15
Accumulated 0
The Off delay timer operation will keep the

output energized for a time period after the
rung containing the timer has gone false.

TOF Off Delay Timer Instruction
Timer number This number must come from the timer
file. In the example shown, the timer number is T4:0, which
represents timer file 4, timer 0 in that file. The timer address
must be unique for this timer and may not be used for any
other timer.
Time base The time base (which is always expressed in
seconds) may be either 1.0 s or 0.01 s. In the example
shown, the time base is 1.0 s.
Preset value In the example shown, the preset value is
15. The timer preset value can range from 0 through 32,767.
Accumulated value In the example shown, the
accumulated value is 0. The timers accumulated value
normally is entered as 0,Amit
3/12/17 although
Nevase it is possible to enter 78a
TOF Instruction Control Word
Timer Element
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Word
EN TT DN Internal Use 0
Preset Value PRE 1
Accumulated Value ACC 2

TOF Instruction Control Word
Enable (EN) bit The enable bit is true (has a status of 1)
whenever the timer instruction is true. When the timer
instruction is false, the enable bit is false (has a status of 0).
Timer-timing (TT) bit The timer-timing bit is true
whenever the accumulated value of the timer is changing,
which means the timer is timing. When the timer is not
timing, the accumulated value is not changing, so the timer-
timing bit is false.
Done (DN) bit The done bit changes state whenever the
accumulated value reaches the preset value. Its state
depends on the type of timer being used.

RTO Retentive Timer
RTO
RETENTIVE TIMER ON
EN
Timer T4:0
Time Base 1:0 DN
Preset 15
Accumulated 0
A retentive timer accumulates time whenever the

device receives power, and it maintains the current
time should power be removed from the device.
Once the device accumulates time equal to its preset
value, the contacts of the device change state.

RTO Timer Programmed Logic
PB1 RTO
RETENTIVE TIMER ON
EN
Timer T4:0
Time Base 1:0 DN
Preset 7
Accumulated 0
T4:2 PL
DN

83
Acc Value = Pre Value
---------------------------------------------------------------------------------
--------------------------------------------------------------------------------
7
6
5
4
Amit Nevase
--------------------------------------------------------------------------------
RTO Timer Sequence
--------------------------------------------------------------------------------
3
2
When rung condition goes false
1
Accumulated Value retained
0
--------------------------------------------------------------------------------
True
False
Off
Off
Off
On
On
On
Accumulated
PL Output
Timer T4:2
Time Input
Timer T4:2
Enable Bit
Done Bit
3/12/17
Value
RES Reset Instruction
Reset T4:2
RES
Because the retentive timer does not reset to 0 when the

timer is de-energized, the reset instruction RES must be
used to reset the timer.
The RES instruction given the same address (T4:2) as the
RTO.
When reset pushbutton closes, RES resets the
accumulated time to 0 and DN bit to 0, turning output off.

Programming
PLC Hardware
(8 Marks)
PLC Programming
(16 Marks)
Counter instructions, data handling instructions, logical and
Ladder programming
Counter Instructions
Sr. Instructi
Name Description
No. on
Increments the accumulated
value at each false-to-true
1 CTU Up counter transition and retains the
accumulated value when an
off/on power cycle occurs.
Decrements the accumulated
value at each false-to-true
2 CTD Down counter transition and retains the
accumulated value when an
on/off power cycle occurs.
High Speed Counts high-speed pulses from
3 HSC
Counter a high-speed input.
Resets a counters
4 RES Reset accumulated value to zero.

UP Counter Counting Sequence
Limit Switch Counter UP
Counter
Value
+4
ON
Accumulated Value= preset = output
OFF

CTU Up Counter Instruction
CTU
COUNT UP COUNTER
CU
Counter C5:0
Preset 7 DN
Accumulated 0
C5:0/CU C5:0/OV
Counter Enable Bit Overflow Status Bit
C5:0/DN C5:0
Counter Reset
RES
Counter Done Bit Instruction

89
--------------------------------------------------------------------------------
---------------------------------------------------------------------------------
PRE Value =7
7
--------------------------------------------------------------------------------
7
CTU Up Counter Sequence
6
6
5
Amit Nevase
5
4
4
3
3
2
2
TRUE 1
--------------------------------------------------------------------------------
FALSE
1
Accumulated
Count Up
3/12/17
DN Bit of
Counter
Reset
Input
Value
CTU UP Counter Instruction
Counter Number This number must come from the counter
fi le. In the example shown, the counter number is C5:0, which
represents counter file 5, counter 0 in that file. The address for
this counter should not be used for any other count-up counter.
Preset Value The preset value can range from 232,768 to
132,767. In the example shown, the preset value is 10.
Accumulated Value The accumulated value can also range
from 232,768 through 132,767. Typically, as in this example,
the value entered in the accumulated word is 0. Regardless of
what value is entered, the reset instruction will reset the
accumulated value to 0.

CTU UP Counter Instruction Control
Word
1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
C5:N Bit 14
5 3 2 1 0 9 8 7 6 5 4 3 2 1 0
Wor
C5:N: D O U
d CU CD
N V N
UA INTERNAL USE (not addressable)
0
0
Wor
C5:N:
d PRESET VALUE
1
1
Wor
C5:N:
d ACCUMULATED VALUE
2
2

Word
Count-Up (CU) Enable Bit The count-up
enable bit is used with the count-up counter and
is true whenever the count-up counter
instruction is true. If the count-up counter
instruction is false, the CU bit is false.
Done (DN) Bit The done bit is true whenever
the accumulated value is equal to or greater
than the preset value of the counter, for either
the count-up or the count-down counter.

Word
Overflow (OV) Bit The overflow bit is true
whenever the counter counts past its maximum
value, which is 32,767. On the next count, the
counter will wrap around to 32,768 and will
continue counting from there toward 0 on
successive false-to-true transitions of the count-up
counter.
Update Accumulator (UA) Bit The update
accumulator bit is used only in conjunction with an
external HSC (high-speed counter).
DOWN Counter Counting Sequence
Proximity Switch Counter Down
Counter
Value
-5
ON
Accumulated Value= Preset = output
OFF

CTD Down Counter Instruction
CTD
COUNT DOWN COUNTER
CD
Counter C5:0
Preset 7 DN
Accumulated 0
C5:0/CD C5:0/UN
Counter Enable Bit Underflow Status B
C5:0/DN C5:0
Counter Reset
RES
Counter Done Bit Instruction

96
--------------------------------------------------------------------------------
---------------------------------------------------------------------------------
CTD Down Counter Sequence
PRE Value
7
--------------------------------------------------------------------------------
1
6
2
5
Amit Nevase
3
4
4
3
5
2
6
TRUE 1
--------------------------------------------------------------------------------
7
FALSE
Count Down
Accumulated
3/12/17
DN Bit of
Counter
Reset
Input
Value
CTD Down Counter Instruction
Counter Number This number must come from the counter
fi le. In the example shown, the counter number is C5:0, which
represents counter file 5, counter 0 in that file. The address for
this counter should not be used for any other count-up counter.
Preset Value The preset value can range from 232,768 to
132,767. In the example shown, the preset value is 10.
Accumulated Value The accumulated value can also range
from 232,768 through 132,767. Typically, as in this example,
the value entered in the accumulated word is 0. Regardless of
what value is entered, the reset instruction will reset the
accumulated value to 0.

CTD Down Counter Instruction Control
Word
1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
C5:N Bit 14
5 3 2 1 0 9 8 7 6 5 4 3 2 1 0
Wor
C5:N: D O U
d CU CD
N V N
UA INTERNAL USE (not addressable)
0
0
Wor
C5:N:
d PRESET VALUE
1
1
Wor
C5:N:
d ACCUMULATED VALUE
2
2

Word
Count-Down (CD) Enable Bit The count-
down enable bit is used with the count-down
counter and is true whenever the count-down
counter instruction is true. If the count-down
counter instruction is false, the CD bit is false.
Done (DN) Bit The done bit is true whenever
the accumulated value is equal to or greater
than the preset value of the counter, for either
the count-up or the count-down counter.

Word
Underflow (UN) Bit The underflow bit
will go true when the counter counts below
32,768. The counter will wrap around to
132,767 and continue counting down
toward 0 on successive false-to-true rung
transitions of the count-down counter.
Update Accumulator (UA) Bit The
update accumulator bit is used only in
conjunction with an external HSC (high-
Programming
PLC Hardware
(8 Marks)
PLC Programming
(16 Marks)
counter instructions, Data handling instructions, logical and
Ladder programming
Data Handling Instructions
Sr. Instructi
Name Description
No. on
Moves the source value

1 MOV Move
to the destination.
Moves data from a

source location to a
2 MVM Masked Move
selected portion of the
destination.

MOV Instruction
MOV
MOVE
Source N7:30
Destination N7:20
The MOV instruction is used to copy data

from source word to destination word.

MOV Instruction
PB1 MOV
MOVE N7:30
Source N7:30
Destination N7:20
N7:20
When the rung is true, input switch A closed, the value stored at the
source address, N7:30, is copied into the destination address, N7:20.
When the rung goes false, input switch A opened, the destination
address will retain the value unless it is changed elsewhere in the
program.
The source value remains unchanged and no data conversion occurs.

MVM Instruction
The move with mask (MVM) instruction differs
slightly from the MOV instruction because a
mask word is involved in the move.
The data being moved must pass through the
mask to get to their destination address.
Masking refers to the action of hiding a
portion of a binary word before transferring it
to the destination address.

MVM Instruction
MVM
MASKED MOVE
Source B3:0
1010101010101010
Mask B3:1
FF0F
Destination B3:4
1010101011001010
The pattern of characters in the mask determines which
source bits will be passed through to the destination address.
The bits in the mask that are set to zero (0) do not pass data.
Only the bits in the mask that are set to one (1) will pass the
source data through to the destination.
Bits in the destination are not affected when the
corresponding bits in the mask are zero.
The MVM instruction is used to copy the desired part of a 16-
bit word by masking the rest of the value.
MVM Instruction
PB1 MVM
MASKED MOVE
Source B3:0
1010101010101010
Mask B3:1
FF0F
Destination B3:4
1010101011001010
1 0 1 0 1 0 1 0 1 0 1 0 1 Source
0 B3:0
1 1 1 1 1 1 0 0 0 0 1 1 1 Mask
1 FF0F
Destination B3:4 before instructi

0 0 1 1 0 0 1 1 0 0 1 1 0 0
went true
1 0 1 0 1 0 1 1 0 0 1 0 1Destination
0 B3:4 after instruction
went true
Programming
PLC Hardware
(8 Marks)
PLC Programming
(16 Marks)
counter instructions, data handling instructions, Logical and
Ladder programming
Logical Instructions
Sr. Instructi
Name Description
No. on
Perform Bitwise
1 AND Logical AND
AND operation
Perform Bitwise OR
2 OR Logical OR
operation
Perform Bitwise
3 XOR Logical XOR
XOR operation

Logical Instructions
Sr. Instructi
Name Description
No. on
Perform inversion of
4 NOT Inversion
given source
5 CLR Clear Clear destination

AND Logical AND Instruction
AND
BITWISE AND
Source A B3:0
Source B B3:1
Destination B3:2
The AND command is used to perform the logic AND
instruction on each bit of the value in source A with
each bit of the value of source B, storing the output
logic in the destination.
B3:0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0
B3:1 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 0
B3:2 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0

OR Logical OR Instruction
OR
BITWISE INCLUSIVE OR
Source A B3:0
Source B B3:1
Destination B3:2
The OR command is used to perform the logic OR
B3:0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0
B3:1 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 0
B3:2 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 0

XOR Logical XOR Instruction
XOR
BITWISE EXCLUSIVE OR
Source A B3:0
Source B B3:1
Destination B3:2
The XOR command is used to perform the logic XOR
B3:0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0
B3:1 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 0
B3:2 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0

NOT Inversion Instruction
NOT
NOT
Source B3:0
Destination B3:1
The NOT instruction is used to perform the NOT logic
on the value in the source, bit by bit. The output logic
value returned in the destination is the one's
complement or opposite of the value in the source.
B3:0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0
B3:1 1 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1

CLR Clear Instruction
CLR
CLEAR
Destination B3:1
The CLR instruction is used to set the destination value

of a word to zero.
B3:1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

Programming
PLC Hardware
(8 Marks)
PLC Programming
(16 Marks)
Comparison instructions
Ladder programming
Data Compare Instructions
Sr. Instructi
Name Description
No. on
Tests whether two

1 EQU Equal
values are equal.
Tests whether one

2 NEQ Not Equal value is not equal to a
second value.
Tests whether one

3 LES Less Than value is less than a
second value.

Data Compare Instructions
Sr. Instructi
Name Description
No. on
Tests whether one
value is
4 GRT Greater Than
greater than a second
value.
Tests whether one
Less Than or value is less than or
5 LEQ
Equal equal to a second
value.
Tests whether one
Greater Than or value is greater than or
6 GEQ
Equal equal to a second
value.
EQU Equal Instruction
EQU
EQUAL
Source A T4:0.ACC
Source B N7:40
The equal (EQU) instruction is an input

instruction that compares source A to
source B: when source A is equal to source
B, the instruction is logically true; otherwise
it is logically false.

NEQ Not Equal Instruction
NEQ
NOT EQUAL
Source A N7:5
Source B 25
The not equal (NEQ) instruction is an input

source B: when source A is not equal to
source B, the instruction is logically true;
otherwise it is logically false.

GRT Greater Than Instruction
GRT
GREATER THAN
Source A T4:0.ACC
Source B 200
The greater than (GRT) instruction is an

input instruction that compares source A to
source B: when source A is greater than
source B, the instruction is logically true;
otherwise it is logically false.

LES Less Than Instruction
LES
LESS THAN
Source A C5:10.ACC
Source B 350
The less than (LES) instruction is an input

source B: when source A is less than source
B, the instruction is logically true; otherwise
it is logically false.

GEQ Greater Than or Equal Instruction
GEQ
GREATER THAN OR EQUAL
Source A N7:55
Source B N7:12
The greater than or equal (GEQ) instruction

is an input instruction that compares source
A to source B: when source A is greater than
or equal to source B, the instruction is
logically true; otherwise it is logically false.

LEQ Less Than or Equal Instruction
LEQ
LESS THAN OR EQUAL
Source A C5:1.ACC
Source B 457
The less than or equal (LEQ) instruction is

an input instruction that compares source A
to source B: when source A is less than or
equal to source B, the instruction is logically
true; otherwise it is logically false.

Programming
PLC Hardware
(8 Marks)
PLC Programming
(16 Marks)
PLC programming examples based on above instruction
using Ladder programming
Ladder Diagram for AND Gate
Applied
Voltage
(a)
Input
A
Input Input Output
Input
A B
B
Output
(b)
(c)

Ladder Diagram for OR Gate
Output
Input
A
B
Input
B
Applied
Voltage (c)
(a)
Input
Output A
Input
A Input
B
Input
B
Output
(b) (d)
Ladder Diagram for NOT Gate
A
Applied
Voltage
(a)
Input
A
Input
Output
A
Output
(b)
(c)
Ladder Diagram for NAND Gate
Output Input
Input A
A
Input
Input B
B
Output
(a) (b)

Ladder Diagram for NOR Gate
Input
A
Output Input
Input Input
A B B
Output
(a) (b)

Ladder Diagram for Ex-OR Gate
Input
A
Output Input
Input Input
A B B
Output
Input Input
A B
(b)
(a)

Ladder Diagram for Ex-NOR Gate
Input
A
Output Input
Input Input
A B B
Output
Input Input
A B
(b)
(a)

Ladder diagram with Multiple
Outputs
Input Output A Input
Output
A
Output B
Output
B

Ladder diagram with Multiple Inputs and
Outputs
Input
A
Input
Output A
A
Input
B
Output B Output
A
Input B Output
B

Example 1
Draw Ladder diagram for given logic diagram
A
Y
B C
A C Y

Example 2
A Draw Ladder diagram for given logic diagra
C
D
A C Y
B D

Example 3
A
Y
B
C
A B Y

Example 4
Draw Ladder diagram for given logic diagr

A
B
C
D
A B Y
C D

Example 5
B
Y
A
A B Y

Example 6
A
Y
B
A C Y

Example 7
Draw Ladder diagram for given Boolean Expression

Y ABC D
A B C Y

Example 8

Y A( B CD )
C D A Y

Example 9

Y AB C
A B Y

Example 10

Y ( A B )CD
A C D Y

Example 11

Y ( ABC ) ( DEF )
A B C Y
D E F

Example 12

Y ( A B) ( A B C )
A B C Y

Example 13

Y ( ABC ) ( AB ) ( ABC )
A B C Y
A B C
A B

Example 14

Y A( B C ) B ( A C )
B A Y
A B

Example 15
Draw Ladder diagram for given Logic Table SW Lamp
1 1
0 0
SW Lamp

Example 16
Draw Ladder diagram for given Logic Table SW Lamp
0 1
1 0
SW Lamp

Example 17
w Ladder diagram for given Logic Table Lam Lam
SW1 SW2
p1 p2
0 0 1 0
0 1 0 0
1 0 0 0
SW1 SW2 Lamp 1 1 1 0 1
SW1 SW2 Lamp 2

Example 18
SW1 SW2
p1 p2
0 0 0 0
0 1 1 0
1 0 0 1
SW1 SW2 Lamp 1 1 1 0 0
SW1 SW2 Lamp 2

Example 19
SW1 SW2
p1 p2
0 0 0 0
0 1 1 1
1 0 1 1
SW1 SW2 Lamp 1 1 1 0 0
SW1 SW2 Lamp 2

Example 20
aw Ladder diagram for given Logic Table La La La
SW SW Lam
mp mp mp
1 2 p4
SW1 SW2 1 2 3
Lamp 1
0 0 1 0 0 0
0 1 0 1 0 0
SW1 SW2 Lamp 2
1 0 0 0 1 0
1 1 0 0 0 1
SW1 SW2 Lamp 3
SW1 SW2 Lamp 4

Example 21
Draw Ladder diagram to switch off three motors

sequentially at 5 seconds interval

SW TOF
EN
TIMER OFF DELAY
Timer T4:1
Time Base 1:0
Preset 5 DN
Accumulated 0
TOF
EN
TIMER OFF DELAY
Timer T4:2
Time Base 1:0
Example 21 Preset 10 DN
Accumulated 0
TOF
EN
TIMER OFF DELAY
Timer T4:3
Time Base 1:0
Preset 15 DN
Accumulated 0
T4:1/DN M1
T4:2/DN M2
T4:3/DN M3
Example 22
Draw Ladder diagram for 2 motor operations

for following conditions
1. Start push button starts motors M1 and M2
2. Stop push button stop motors M1 first and after

10 sec motor M2

Start Stop M1
I:0/0 I:0/1 O:0/0
TOF
TIMER OFF DELAY EN
Timer T4:1
Time Base 1:0
O:0/0 Preset 10 DN
Accumulated 0
T4:1/DN M2
O:0/1
Example 22

Example 23
Draw Ladder diagram for parking space

counter.

Enter SW CTU
COUNT UP COUNTER CU
Counter C5:1
I:0/0 Preset 150
DN
Accumulated 0
Exit SW CTD
COUNT DOWN COUNTER CD
Counter C5:2
I:0/1 Preset 150
DN
Accumulated 0
C5:1/DN
Lot Full Light
O:0/0
Reset C5:1
RES
Example 23

Example 24
Draw Ladder diagram for,
Three motors can be started automatically in

sequence with 20 sec time delay between
each motor startup when push button is
starts. Stops all motors when push button is
stops.

Start Stop M1
O:0/0
I:0/0 I:0/1
TON
TIMER ON DELAY EN
Timer T4:1
Time Base 1:0
O:0/0 Preset 20 DN
Accumulated 0
T4:1/DN
Example 24 M2
O:0/1
T4:1/DN TON
TIMER ON DELAY EN
Timer T4:2
Time Base 1:0
Preset 20 DN
Accumulated 0
T4:2/DN M3

O:0/2
Example 25
Draw Ladder diagram for 2 motors operation,
a. When start button is pushed motor M1 and

M2 starts
b. After 10 seconds motor M1 stops
c. Motor M2 stops 15 seconds after motor M1

has stopped
d. Both M1 and M2 will stop when push

button is pressed.
Start Stop T4:1/DN M1
O:0/0
I:0/0 I:0/1
T4:2/DN M2
Example 25
TON
TIMER ON DELAY EN
Timer T4:1
Time Base 1:0
O:0/0 Preset 10 DN
Accumulated 0
T4:1/DN TON
TIMER ON DELAY EN
Timer T4:2
Time Base 1:0
Preset 15 DN
Accumulated 0

Example 26
Draw Ladder diagram for 2 motors system,
a. Start switch starts Motor M1.
b. 10 seconds later Motor 2 Starts.
c. Stop switch stops Motor M1.
d. 15 seconds later Motor 2 Stops.

Start Stop M1
O:0/0
I:0/0 I:0/1
TON
TIMER ON DELAY EN
Timer T4:1
Time Base 1:0
O:0/0 Preset 10 DN
Accumulated 0
T4:1/DN T4:2/DN
M2
O:0/1
TOF
TIMER OFF DELAY EN
Timer T4:2
Time Base 1:0
O:0/0 Preset 15 DN
Accumulated 0
Example 26
Example 27
Draw Ladder diagram for 3 motors operation,
a. Start push button starts Motor M1.
b. When motor M1 is ON after 5 min M2 is ON

and M1 is OFF.
c. When M2 is ON after 10 min M3 is ON and

M2 is OFF.
d. When stop push button is pressed M3 is

OFF.
Start T4:1/DN M1
O:0/0
I:0/0 I:0/1
TON
TIMER ON DELAY EN
Timer T4:1
Time Base 1:0
O:0/0 Preset 300 DN
Accumulated 0
T4:1/DN T4:2/DN
M2
Example 27 O:0/1
TON
TIMER ON DELAY EN
Timer T4:2
Time Base 1:0
O:0/1 Preset 600 DN
Accumulated 0
T4:2/DN Stop M3

O:0/2
References
Programmable Logic
Controllers F. D. Petruzella
Introduction to
Programmable Logic
Controllers Gary Dunning
Programmable Logic
Controllers Jhon
Hackworth, Federic
Hackworth
Online Tutorials
https://
www.courses.psu.ed
u/e_met/e_met430_j
ar14/cgroup.html

Thank
You
Amit Nevase

Cspvi 161006153207

Caricato da

Informazioni sul documento

Titolo originale

Copyright

Formati disponibili

Condividi questo documento

Condividi o incorpora il documento

Opzioni di condivisione

Hai trovato utile questo documento?

Questo contenuto è inappropriato?

Copyright:

Formati disponibili

Cspvi 161006153207

Caricato da

Copyright:

Formati disponibili

Rayat Shikshan Sansthas

Understand classifications of control system.

Understand Steady state, time response, and

frequency response analysis.

Analyze the Stability of control system using RH

Understand the fundamentals and diff. Hardware

Draw ladder diagrams to program PLC

Teaching Scheme Examination Scheme

03 -- 02 03 100 50# --- 25@ 175

Two tests each of 25 marks to be conducted as per

3/12/17 Amit Nevase 4

Rouths Stability Criterion

Process Control System

Explain the details of diff. I/O modules

Get familiar with the instruction set of

Develop PLC programming skills.

3/12/17 Amit Nevase 12

3/12/17 Amit Nevase 14

The discrete input module is the most

common input interface used with

programmable controllers. Discrete input

signals from field devices can be either AC

3/12/17 Amit Nevase 15

120 VAC 10-60 V dc

240 VAC 120 V dc

120 Volts Isolated 230 V dc

240 Volts Isolated Sink/Source 5-50 V dc

24 VAC/DC 5/12 V dc TTL

3/12/17 Amit Nevase 17

Input Bridge Noise & Threshold Input

3/12/17 Amit Nevase 18

Voltage: This is the operating voltage at 47

to 63 Hertz for the module.

Inputs: This indicates the number of inputs

the module has.

3/12/17 Amit Nevase 19

Points per common: This is the number of

3/12/17 Amit Nevase 20

3/12/17 Amit Nevase 21

3/12/17 Amit Nevase 22

3/12/17 Amit Nevase 23

maximum amount of leakage current

allowed in an input circuit from an input

device that will keep the input circuit in an

3/12/17 Amit Nevase 24

3/12/17 Amit Nevase 25

3/12/17 Amit Nevase 26

3/12/17 Amit Nevase 29

Solid State Outputs Relay Outputs

3/12/17 Amit Nevase 31

3/12/17 Amit Nevase 32

3/12/17 Amit Nevase 33

In solid state AC output module, a triac is

3/12/17 Amit Nevase 34

dry contact outputs.

Even though relay output modules are used to switch

AC or DC loads, usually relay outputs are used to

Relay output modules use actual mechanical relays,

one for each output point, to switch the output signal

3/12/17 Amit Nevase 37

Output points per common 16

Backplane Current draw 0.280 amp at 5 V dc

Maximum OFF state leakage 1 mA