A Novel Space Vector Modulation Control Strategy for Three-leg Four-Wire

Voltage Source Inverters

E. Ortjohann1, A. Mohd1, N. Hamsic1, M. Lingemann1, W. Sinsukthavorn1, D. Morton2

1
UNIVERSITY OF APPLIED SCIENCES SOUTH WESTPHALIA/DIVISION SOEST
Lbecker Ring 2, D-59494, Soest, Germany
Tel.: +49 / (2921) 378-432, Fax: +49 / (2921) 378-433
E-Mail: Ortjohann@fh-swf.de
URL: http://www3.fh-swf.de/soest
2
BOLTON UNIVERSITY, DEANE ROAD, BOLTON, U.K.

Acknowledgements
This research work is supported by the FH3 Program of the German Bundesministerium fr Bildung und
Forschung administrated by the Arbeitsgemeinschaft industrieller Forschungsvereinigungen "Otto von
Guericke" e.V. (AiF). The Research and development of the application is done in cooperation with the
international industrial partners Ferrocontrol, VA TECH SAT and EXENDIS.

Keywords
Converter control, Modulation strategy, Voltage Source Inverters (VSI), Pulse Width Modulation
(PWM), Control methods for electrical systems.

Abstract
One of the desirable characteristics of inverters in three-phase systems is the ability to feed unbalanced
loads with voltage and frequency nominal values. This paper introduces an innovative control method in
combination with a three dimensional space vector modulation (3D-SVM) control strategy. It is able to
feed grids with unbalanced loads while reducing the switching frequency losses. The results from this
study show that the developed control scheme in combination with three-leg four-wire inverters can carry
out the grid feeding requirements under extreme unbalanced load conditions efficiently.

1. Introduction
Traditional sources of energy are supplying the vast majority of the energy demand in most countries. The
rapid growth of global climate change along with the fear of an energy supply shortage and limited fossil
fuel is making the global energy situation tends to become more complex. The increasing demand for
electric power than the offer, along with many developing countries lacking the resources to build power
plants and distribution networks, and the industrialized countries that face insufficient power generation
and greenhouse gas emission problem forces us to consider a better economical and environmental
friendly alternative. Renewable energy sources (RESs) such as wind turbines, solar panels and fuel cells
could be part of the solution [1].
However, all of these sources need power electronic converters (PECs) to connect them to the grid. These
units are multifunctional and should be well controlled to do many utility functions. An essential
component at the grid side of such systems is the inverter due to the wide range of functions it has to
perform. It has to convert the DC voltage to sinusoidal current for use by the grid in addition to act as the
interface between the Energy converting systems (ECSs), the load and the grid. It also has to handle the
variations in the electricity it receives due to varying levels of generation by the RESs, varying loads and
varying grid voltages.
In this paper, space vector modulation advanced control strategy based on symmetrical components in
combination with three-leg four-wire topology is presented and validated using simulation. It will be
shown that the developed control schemes in combination with three-leg four-wire inverters can perform
the feeding requirements of a grid under extreme unbalanced load conditions efficiently.

2. Three-phase Four-wire Inverter Topologies:

To articulate the control strategies in relation to power electronic devices a short introduction of the
different three-phase four-wire inverter topologies is given.
A. Three-leg four-wire voltage source inverters
Three-phase four-wire inverters (Three-phase inverters with neutral point) are an evolution from the
single-phase ones. Three half-bridge single-phase inverters joined together can be seen as a three-phase
four-wire inverter, see Fig. 1(a), where each output feeds one phase. This topology can be used to feed
balanced/unbalanced loads. In case of unbalanced loads, the sum of the output currents ia, ib, and ic will
not be zero and the neutral current will flow in the connection between the neutral point and the mid-point
of the capacitive divider [2-4]. To maintain a symmetrical voltage across the two capacitors an adequate
power electronics and voltage stage management are needed, this will not be taken further into discussion.
B. Four-leg voltage source inverters
The general power electronic topology of the four-legged inverter is shown in Fig. 1(b). The goal of the
three-phase four-leg inverter is to supply a desired sinusoidal output voltage waveform to the load for all
load conditions and transients. By tying the load neutral point to the mid-point of the fourth leg, it can
handle the neutral current caused by an unbalanced load. A balanced output voltage can be achieved due
to the tightly regulated neutral point. The additional neutral inductor Ln is optional. It can reduce
switching frequency ripple [5]. A four leg inverter can produce sixteen switching states. This enlarges the
space vector modulation to three-dimensional (3-D-SVM). For a four-leg voltage source inverter the
representation of the phase voltage space vectors is done in the ,, space.
The high unbalanced current flowing through the dc link capacitors of the three-leg four-wire inverter
requires higher capacitance [6, 7]. So, the four-leg inverter has small DC link capacitor as no zero
sequence current flow across the DC link capacitor and has an additional degree of freedom due to the 4th
leg [1, 4, 8]. However, compared with the four-leg inverter, the three-leg four-wire inverter has a lower
number of semiconductor switches and the control function can be built like three individual single line
inverters.
In general, three-leg inverters will use two-dimensional space vector modulation (2-D-SVM) while the
three-leg four-wire inverter and the four leg inverter will extend the space vector modulation to three-
dimensional (3-D-SVM) making the selection of the modulation vectors more complex. The 3-D-SVM of
three-leg with four-wire inverter differ from that of the four leg inverter. Nevertheless, the control
strategies are similar.

Fig. 1: (a) Three-leg inverter with a neutral point, (b) Four-leg inverter.
3. Sequence Decomposition
Symmetrical Sequence Decomposition (SSD) is used mainly in power electric fault analysis. In [9] a
controller based on symmetrical components for handling unbalanced conditions with a multi-level
inverter was introduced. In the present work, sequence decomposition is used in the implementation of the
four-wire (three-leg four-wire, four leg) inverter controller. The SSD is able to represent asymmetrical
three-phase signal as a sum of positive, negative and zero sequence. The positive and negative
components are three-phase symmetrical signals, while the zero sequence is a single-phase one. An
asymmetrical three-phase signals va, vb and vc (the following method applies to currents in exactly the
same way) can be decomposed into two symmetrical-three-phase-waves, the positive and the negative
components

{
v p = v a _ p , vb _ p , vc _ p } {
and vn = v a _ n , vb _ n , vc _ n } (1)

and the zero component v0. The asymmetrical signals can be arranged by the sums

va = va _ p + va _ n + v0 (2)
vb = vb _ p + vb _ n + v0 (3)
vc = vc _ p + vc _ n + v0 (4)

The general idea is shown in Fig. 2 (a). Therefore, voltage of each line is transformed by an ideal filter
into v and v components [10]. Then, a Park transformation is performed to get the vd and vq components
(see Fig. 2a). When this transformation process is done, each line is represented in detach dq-components.
These signals in the dq-plane can be interpreted as complex values:

V a _ dq = V a _ d + jVa _ q (5)
V b _ dq = Vb _ d + jVb _ q (6)
V c _ dq = Vc _ d + jVc _ q (7)

These asymmetrical complex dq-values for each line can be now decoupled by the use of SSD. The
relationship between the symmetrical dq-components corresponding to the three-phase asymmetrical dq
signals is given by equation (8):

V p _ dq 1 a a 2 V a _ dq
1 2
V n _ dq = 3 .1 a a .V b _ dq (8)
V 1 1 1 V c _ dq
0 _ dq
where
2 4
j j
a=e 3 and a 2 = e 3 (9)

The phasors are defined in a complex dq-plane. The back transformation into , and components is
easier since no transformation to the complex domain is needed. Summing up vp and vn as they are both
in the -plane, while taking into account that the negative component is rotating anticlockwise we get:

v = v p _ + vn _ (10)
v = v p _ vn _ (11)
v = v0 _ (12)
From the last equation it can be pointed out that the zero component v0_ equals the -component and both
of them are single-phase signals. The complete transformation starting from dq-plane of each line is
shown Fig. 2 (b).
The composed , and components can be used for the SVM to produce the pulse pattern for the power
electronic switches [5]. In the following section the introduced control strategy based on the symmetrical
components will be introduced.

Fig. 2: (a) Sequence decomposition, (b) Sequence composition.

4. Control Strategies for Asymmetrical Inverters

The control strategy of the three-phase asymmetrical grid forming inverter is described lengthy in [1, 11].
As a grid forming unit the inverter has to provide the voltage and the frequency of the grid. This is done as
following. The voltage and the current sensed values are transformed from the abc-frame to the positive-
negative-zero dq sequence components.
The controller block comprises current and voltage PI controllers for each component. Six controllers are
needed for the voltage and the current components of the load. For the controller only the d-component of
the positive sequence Vp_d_ref is considered. The other reference values are set to zero since the inverter has
to supply symmetrical three phase voltage. The output reference values from the control unit are
transformed to the -space and the SVM block uses them to calculate the pulse pattern for the switches.
Figure 3 (a), shows an inverter in grid forming mode for unbalanced loads.
The control functions are described as vectors according to the following definition:

V p _ d _ ref V p _ d _ act V p _ d I p _ d _ act

V p _ q _ ref V p _ q _ act V p _ q I p _ q _ act
V , V , V , I (13)
[V pn0 _ dq _ ref ] =
n _ d _ ref
[V pn0 _ dq ] =
n _d
[V pn0 _ dq _ act ] =
n _ d _ act
[ I pn 0 _ dq _ act ] =
n _ d _ act
Vn _ q _ ref Vn _ q _ act Vn _ q I n _ q _ act

V0 _ d _ ref V0 _ d _ act V0 _ d I 0 _ d _ act

V0 _ q _ ref V0 _ q _ act V0 _ q I 0 _ q _ act

In Figure 3(b), the controller layout is illustrated more clearly.

Fig. 3: (a) Inverter in grid forming mode for unbalanced loads, (b) Controller layout of asymmetrical grid
forming inverter.

The asymmetrical grid supporting unit has to supply the grid with a specified amount of power, which
might be active, reactive or a combination of both of them. Synchronization with the grid voltage is done
by the voltage reference angle which has to be generated using the transformation from the voltage on the
grid. The desired amount of power has to be set by a management unit. The power controller block
generates a reference signal for the current controller. The current controller is delivering a reference
voltage signal represented by positive, negative and zero sequence components. These reference values
have to be transformed (composed) to the -space vector and the SVM block uses them to calculate the
pulse pattern for the switches. Figure 4 (a), shows a P, Q-controlled Inverter in grid supporting mode for
unbalanced loads, where:

Pp _ ref Q p _ ref Pp _ act Q p _ act

,
[Ppn0 _ ref ] = Pn _ ref , [Q pn0 _ ref ] = Qn _ ref [Ppn0 _ act ] = Pn _ act , [Q pn0 _ act ] = Qn _ act (14)

P0 _ ref Q0 _ ref P0 _ act Q0 _ act

I p _ d _ act I p _ q _ act V p _ d V p _ q

[I pn0 _ d _ act ] = I n _ d _ act , [I pn0 _ q _ act ] = I n _ q _ act , [V pn0 _ d ] = Vn _ d , [V pn0 _ q ] = Vn _ q (15)

I 0 _ d _ act I 0 _ q _ act V0 _ d V0 _ q

Other control strategies can be implemented simply through real and imaginary components of the grid
current or the magnitude of the voltage and the active component of the power fed into the grid.
Obviously, in the case of asymmetrical grid-parallel unit, shown in figure 4 (b), the values that can be
controlled are the flow of the reactive power or reactive current to the grid. In comparison to the
asymmetrical grid supporting notable is the active power control using Vdc , where:

Pn _ ref Pn _ act
[Pn0 _ ref ] = , [Pn0 _ act ] = (16)
P0 _ ref P0 _ act

The introduced control functions can be easily extended to parallel operation mode. Several approaches
have been proposed to do this. However, this is out of the scope of this work.
Fig. 4: (a) P, Q-controlled Inverter in grid supporting mode for unbalanced loads, (b) Inverter in grid
parallel mode for unbalanced loads.

5. Space Vector Modulation for Three-leg Four-wire Inverters

Space vector modulation is based on vector selection in the (stationary) or in the dq0 (rotating)
reference frame. A set of three vectors va, vb and vc in the -frame can generate a normalized reference
vector Vref in the same plane using PWM-averaged approximation. The average reference vector can be
obtained by sequentially applying these vectors in a modulation period in accordance with:
TS T1 T2 TS
1 1 1 1 (17)
TS
0
V ref dt =
TS
V a dt +
0
TS
T1
V b dt +
TS V
T1 + T2
c dt

where TS is the modulation period and T1+T2 TS. Since Vref remains constant during the modulation
period, Eq. (17) can be approximated as:

V ref = da va + db vb + dc vc (18)

in which da, db and dc are the duty cycles of vectors va, vb and vc. In [12] a 3-D-SVM algorithm based on
generating a zero-vector was introduced. Still, the proposed algorithm has a drawback of stressing the
IGBTs unequally. In this paper, another SVM algorithm without using a zero-vector is launched. This
algorithm based on vectors compensation (Compensated Vectors Approach) is more practical as it is not
only stressing the IGBTs equally but less as well. The proposed SVM algorithm can be achieved through
the following steps:
1) Determining the switching combinations and the corresponding vectors.
2) Calculating the voltage drop related to each vector.
3) Identifying the position for each vector in the -space vector diagram.
4) Identifying the reference vector position.
5) Calculating the duty cycles.
6) Building a vector sequence.
7) Computing pulse patterns.

These steps are described in detail in the following:

Step-One, Two and Three
In similar way to two-level three-phase inverters, there are eight different switching combinations where
the output terminals will be connected to +1/2 or -1/2 of the input DC voltage. Unlike two-level three-leg
inverters none of these switching combinations is generating a zero voltage at the output terminals, which
complicate the implementation of its SVM. Table I presents the eight possible switching vectors and the
corresponding output voltages related to the DC-voltage as reference voltage. The switching vectors can
be represented in the -coordinates using Clarkes transformation.
Table I shows the normalized -values of each switching vector. The representation for these switching
vectors in -space is shown in Fig. 5. The vectors are taking place in layers according to the value of
their component. Three vectors (V2, V4 and V6) are located at the layer V =1/6 VDC. The vectors (V1, V3
and V5) are lying at the layer V =-1/6 VDC. The vectors V7 and V0 are located at the -axis at V =1/2 VDC
and V =-1/2 VDC respectively. The projection of the vectors in the -frame is shown in Fig. 5 which is
divided into six prisms.

Table I: Switching states, the corresponding output voltages and normalized

components of each switching vector
Normalized Output Normalized -
Switches Voltage Components
Vector
(On)
Va/VDC Vb/VDC Vc/VDC V/VDC V/VDC V/VDC V =
VDC
2

S4 S6 S2 V0 -1/2 0 -1/2 -1/2 -1/2 0

S1 S6 S2 V1 1/2 2/3 -1/6 -1/2 -1/2 0
1
V = VDC
6

S1 S3 S2 V2 1/2 1/3 1/6 1/2 -1/2 1/ 3 V = 0

S4 S3 S2 V3 -1/2 -1/3 -1/6 1/2 -1/2 1/ 3 1

V = VD C
6

S4 S3 S5 V4 -1/2 -2/3 1/6 1/2 1/2 0

S4 S6 S5 V5 -1/2 -1/3 -1/6 -1/2 1/2 1/ 3
V =
VDC
2

S1 S6 S5 V6 1/2 1/3 1/6 -1/2 1/2 1/ 3 Fig. 5: 3D-Space vectors.

S1 S3 S5 V7 1/2 0 1/2 1/2 1/2 0

Fig. 6 shows the six prisms in the -space. Each prism is divided into two tetrahedrons, upper and lower
tetrahedron. Each tetrahedron is characterized by three vectors.
Step Four: Reference Vector Position Identification
In view of the fact that twelve tetrahedrons exist, there are twelve possibilities for the reference vector
position. We can identify the position of the reference vector using the boundary planes limiting the
tetrahedron. Each tetrahedron is limited by three planes. The boundary planes can be determined by
means of the following linear equations:

E :
1
V = 0
(19)
71 3

E12 : V 3V + 4V = 0 (20)
E 27 :
3 1
V V = 0
(21)
6 6
E 23 : 2V + 2V = 0 (22)
E37 :
3 1
V + V = 0 (23)
6 6
E34 : V + 3V + 4V = 0 (24)

The zero-vector is compensated by the vectors V0 and V7, both lying against each other direction on the -
axis. The reference vector can be expressed as following:
 V ref = d a V a + db V b + d V c (25)

where for the upper tetrahedron (26) applies and for the lower tetrahedron (27) applies:

V c = V 7 and d = d 7 d 0 (26)
V c = V 0 and d = d 0 d 7 (27)

V DC
V = VDC VDC
2 V = V =
2 2

1
V = VDC 1 1
6 V = VDC V = VDC
6 6

V = 0
V = 0 V = 0

1 1
V = VDC V = VDC 1
6 6 V = V DC
6

VD C
V = VDC VDC
2 V = V =
2 2

VDC V DC
V = V = V DC
2 V =
2 2

1 1
V = VDC V = VDC 1
6 6 V = VDC
6

V = 0 V = 0 V = 0

1 1 1
V = VDC V = VDC V = VDC
6 6 6

V DC VDC
V = V = V =
VDC
2 2 2

Fig. 6: 3D prisms for three-leg four-wire inverters.

Step Five: Duty Cycles Calculation:
Once the target tetrahedron is defined the nearest three vectors are chosen. By normalizing the standard
vectors at the intermediate circuit voltage, the duty cycles in matrix form can be written as following:

d a V ref
1
d b = V [ v a v b v c ]
1
V ref (28)
d DC
V ref

The duty cycles for the vectors V7 and/or V0 can be determined according to the position of the reference
vector. For the upper tetrahedron using (29) and for the lower tetrahedron using (30):

1 (d a + d b ) + d
d7 = ; d 0 = d 7 d (29)
2
1 (d a + d b ) + d
d0 = ; d 7 = d 0 d (30)
2
Step-Six and Seven: Building Vector Sequence and Pulse Pattern Computation:
In order to reduce the current ripple, switching vectors adjacent to the reference vector should be selected
since they produce non-conflicting voltage pulses (same voltage polarity) [13]. Fig. 7 (c) shows the vector
sequence for the upper and lower tetrahedrons in each prism. An example for determining the switching
sequence for the first prism is shown in Fig. 7 (a). The pulse sequence can be achieved by comparing the
duty cycles with a carrier signal. The pulse sequence for phase a, b and c are shown in Fig. 7 (b) for the
same mentioned case.

Prism Sequence
1 v0-v1-v2-v7-v7-v2-v1-v0
2 v0-v3-v2-v7-v7-v2-v3-v0
3 v0-v3-v4-v7-v7-v4-v3-v0
4 v0-v5-v4-v7/-v7-v4-v5-v0
5 v0-v5-v6-v7-v7-v6-v5-v0
6 v0-v1-v6-v7-v7-v6-v1-v0

Fig. 7:(a) Steps for the modulation in the first prism, (b) Symmetric modulation in the first prism (c) ,The
vector sequence for the upper and lower tetrahedrons in each prism.

6. Simulation Results
To show the high quality of the new control scheme the system was tested under intense unbalanced load.
As a first testing case, a series resistive-inductive load was placed at phase-a with L=1 mH and R=10
and at phase-b a resistive load equal to 20 , while phase-c has an L=0.5 mH and R=30 ). The AC
output voltage is 315 V. With the proposed 3-D-SVM control method it is possible to achieve a balanced
three-phase sinusoidal voltage at the load, as shown in Fig. 8 (a). Table II shows the THD values for the
phase voltage and current for each phase. In the second case, a time variant resistive load is connected to
phase a. The loads at phase b and c are equal to 20 and 10 respectively. Fig.8 (b) shows the output
voltages. Table III shows the values for the phase voltage and current as well as the THD for each phase.

Fig. 8. (a) Three phase voltages, currents, neutral current, (b) Three phase voltages, currents, neutral
current and variable load values at phase-a.
Table II. THD for phase voltage, current in case of unbalanced load
Measurement
Phase
Voltage Voltage THD Current Current THD
Phase-a 315 0.96% 31.5 0.50%
Phase-b 315 1.06% 15.75 1.06%
Phase-c 315 1.18% 10.5 1.03%
 Table III: Phase voltage, current and THD in case of variable unbalanced load
Measurement
Phase Time(sec)
Voltage Current THD
0.0-0.1(sec) 312V 4.15 A 0.94%
Phase-a 0.1-0.2(sec) 314.09 V 6.22 A 1.23%
0.2-0.3(sec) 316.48V 12.68 A 1.14%
Phase-b 0.0-0.3(sec) 314.8 V 15.76 A 0.47%
Phase-c 0.0-0.3(sec) 315.4 V 31.3 A 0.36%

7. Conclusions
This paper introduces various control functions for three-leg four-wire inverters (This also apply to four
leg inverters). These functions are capable of feeding loads even under extreme unbalanced load
conditions. As a part of this control strategy the paper is presenting a new approach of SVM for three-leg
four-wire voltage-source inverters. The steps for the SVM implementation are identified. The switching
vectors, 3-D-SVM diagrams and the boundary planes equations, as well as the matrices for the duty cycles
and symmetric switching sequences are discussed in detail. Simulation results including different loads are
presented to validate the proposed novel space vector modulation control strategy for three-leg four-wire
voltage source inverters. These results show that the proposed SVM control schemes can carry out the
feeding requirements of unbalanced loads in a very efficient way.

References
[1]A. M. E. Ortjohann, N. Hamsic, D. Morton, O. Omari, "Advanced Control Strategy for Three-Phase Grid
Inverters with Unbalanced Loads for PV/Hybrid Power Systems," presented at 21th European PV Solar Energy
Conference, Dresden, 2006.
[2]O. Omari, "Conceptual Development of a General Supply Philosophy for Isolated Electrical Power Systems,"
vol. PhD. Soest, Germany: South Westphalia University of Applied Sciences, 2005.
[3]F. L. G. Seguier, Power Electronic Converters, DC-AC Conversion. Germany: Springer-Verlag, 1993.
[4]W. H. Said El-Barbari, "Digital Control of a Four Leg Inverter for Standalone Photovoltaic Systems with
Unbalanced Load," presented at IECON 2000. 26th Annual Confjerence of the IEEE, 2000.
[5]R. Zhang, "High performance power converter systems for nonlinear and unbalanced load/source,," in Faculty
of the Virginia Polytechnic Institute and State University, vol. PhD. Virginia, 1998.
[6]R. B. Zhang, D. Prasad, V.H. Mao, H. Lee, F.C. and Dubovsky, "A three-phase inverter with a neutral leg with
space vector modulation," Twelfth Annual Applied Power Electronics Conference and Exposition,, 1997.
[7]T. C. G. Maria Brucoli, "Fault Response of Inverter Dominated Microgrids," presented at 2nd International
Conference on Integration of Renewable and Distributed Energy Resources, Napa, California, USA, 2006.
[8] E.Ortjohann, A. Mohd, N.Hamsic, D.Morton, "Control and Representation of Three-Phase Asymmetrical Signals
Used by Modular Inverters to Feed Unbalanced Loads in Hybrid Power Systems," presented at The Great Wall
World Renewable Energy Forum (GWREF), Beijing, China, 2006.
[9]R. L. C. Hochgraf, "StatCom controls for operation with unbalanced voltages," IEEE transactions on power
delivery vol. 13, 1998.
[10]A. Engler, "Control of Parallel Operating Battery Inverters," presented at Photovoltaic Hybrid Power Systems
Conference, Aix-en-Provence, 2000.
[11] E. Ortjohann, D. Morton, A. Mohd, N. Hamsic, O. Omari, "Grid-Forming Three-Phase Inverters for Unbalanced
Loads in Hybrid Power Systems," presented at IEEE 4th World Conference on Photovoltaic Energy Conversion,
Waikoloa, Hawaii, 2006.
[12] E.Ortjohann, A. Mohd, N. Hamsic, A. Al-Diab, M.Lingemann, "Three-Dimensional Space Vector Modulation
Algorithm for Three-Leg Four-Wire Voltage Source Inverters," presented at the first International Conference on
Power Engineering, Energy and Electrical Drives (POWERENG,IEEE), Portugal, 2007.
[13]K. Z. D. Wang, " Relationship between Space-Vector Modulation and Three-Phase Carrier-Based PWM: A
Comprehensive Analysis," IEEE Transactions on Industrial Electronics, 2002.