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CANTOR 48 / 96
Technical
Manual
Lighting Technologies
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Lighting Technologies
MT 1070 1106.11.070
CANTOR
Technical Manual
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Technical Manual
Table of Content
Introduction to CANTOR Technical Manual 4
CPU board 4
Surface board 4
CANTOR APPENDIX 1 15
A. TEST CANTOR CPU CARD PCB 1264 Ve 1 15
1. First start-up 15
2. Start Test Program 15
3. Initialization of program (normal or test) 16
4. Tests CPU card 17
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Obviously the engineer should have an intimate knowledge of microprocessors and related
equipments (EPROM, RAM, VLSI, LOGIC GATES).
CPU board:
Schematics 3456.08.783 folio 1 to 4 PCB 1264
Surface board:
Schematics 3456.08.791 folio 1 & 2 PCB 1265 24 pots
Schematic 3456.08.800 PCB 1266 submaster
Schematic 3456.08.810 PCB 1267 crossfade
Schematic 3456.08.821 PCB 1268 key
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The most important is the CPU board; it contains all the computing intelligence of the
CANTOR.
The other PCBs are surface PCBs holding the human interface included in the desk (keys,
LEDs, potentiometers).
The CPU board makes the function which are linked to external world (DMX link,display...).
To work correctly, he needs 3 supply voltages given by the power supply SNP3034. These
supply voltages are :
- 15 volt around 300 ma, but you must add the lighting desk which can use 300 mA if a
BIGLITE lamp is used.
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1. CPU Z180
The CANTOR uses a Z180 central processing unit. This CPU includes all the possibilities of
the famous Z80 and also new additional features. The followings are used:
internal, external clock generator
a memory management unit (MMU) which allows the Z180 to access up to 1024 Kbytes
of physical memory partitioned in 3 blocks, but internal manipulations leave on a logical
64Kbytes space.
two channels direct memory access controller (DMAC)
two channels asynchronous serial communication interface (ASCI) with their own baud
rate generator
programmable timers
interrupt controller.
A quartz of 16Mhz is used to provide the clock signal at 8MHz. This master clock is also used
to give different timings to other devices.
The ASCI channel 1 of the CPU performs the serial line at 9600/2400 baud.
The internal ASCI clock generator cant be used for this purpose and needs an external
divider by 26 (U43) from main 8MHz clock.
On old version of PCB 1264, serial messages are sent trough U1 (MC1488) for transmission
and from U2 (MC1489) for reception.
New generation of PCB 1264 uses a RS232 driver MAX 252 or a NM 232 to isolate RS232
serial communications from main 12V supply; in this case maximum baud rate should be
limited to 9600 bauds.
Note that handshake signals coming from Z180 are buffered and supported by connector J1.
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When LLin is under (or falls below) approx. 1.3 volt the reset will be generated.
The reset timing is about 50 msec. During reset activity Vout is switched to the Lithium
backup battery and provides the memory supply.
The 10K (R126) pot adjusts the supply RESET level to be about 4,82 volts.
If jumper W3 at input WDI of MAX 696 is inserted the Watchdog feature occurs; if no
transitions are made at this input by the CPU after the 100 msec reset timeout period, the
Max 696 generates a 50msec reset pulse.
Leaving input WDI unconnected disables the watchdog feature.
The supply level of the lithium battery is checked on reset and a caution message will be sent
if found under 2.5 volt.
The transistor MOS Q6 switches the battery level on CPU request to ADC converter.
If needed the DUBOX connector P12 can replace a temporary defect battery and offers a
potential link to a 3 to 5 Volt range external backup supply voltage.
3.MEMORY
The CPU can use up to 128 Kbytes of EPROM shared by U41.
This EPROM can be from a 27C256 (32K X 8) to a 27C010 (128K X 8)and must have at least
a better access timing than 120 Nsec.
The position of the inserted EPROM and jumper W2 selects the capacity in use.
Normally 27C512 are chosen and W2 connect 2 to 3.
The RAM are build around one or two 55257 32kbytes static RAMs with an access time
better than 100Nsec.
These 128 Kbytes of RAM are battery backup saved during power down.
The typical consumption on the lithium battery is about 2 micro A which allows a life time of
more than 6 years typically.
The RAM memory decoder uses a special IC (U32) BCT2414 which feeds trough the RAMS
chip select decode from 5V or battery backup supply accordingly to the resets state.
Selection between EPROM and RAM are made with A17 on 128K boundaries.
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A. Watchdog
If W3 jumper is inserted a transition must occur at this input before every 100 msec
watchdog timeout, avoiding a general RESET state (see RESET). Normally the watchdog
feature is enabled and jumper W3 inserted.
D. 7 segment display
The latch U34 maintains 7 segments code reflecting current software loop in use ( for more
details see test operating chapter in appendix1).
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E. External lines
CANTOR uses 8 external input lines which can be polled by software. All these manual inputs
must be handled with care because they arent isolated from 5V main supply voltage.
However R25 to R30 protect inputs against dangerous voltage. State of external lines are
transferred to CPU trough the buffer U14 directly connected to CPU data bus. A modification
state can be obtained pulling these inputs near GND (e.g. connecting them to pin 9 of J5).
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LEDs MATRIX
All the LEDs of the surface board are encoded as a matrix of 5 lines and 23 columns. But
selection of the lighting LED is decoded and generated on the CPU board. The software must
select which line is activated writing to U5 latch. One of the darlington PNP transistors (Q7 to
Q11) supplies the respective LED line. Writing correct information on latches U6,U8,U10
selects in the line which LED must be activated. Latches are buffered by open collector
drivers ULN 2803 sinking about 30 mA per LED. To avoid supply shift due to LED lighting on
the PCB, an internal PCB 5V line feeds the power darlington transistors.
LCD DISPLAYS
Messages and selection requests are sent to user trough two LCD displays. Obviously these
LCD displays are mounted on surface board. Choice was made around dots matrix LCD unit
with Super Twisted High Contrast technology allowing a very large viewing angle range. LED
backlighting uses array of LED arranged on the viewing area allowing a high luminance
combined with a very long life time.
LCD selection and activation are generated on the PCB 1264 (CPU) but LCD displays are used
on :
PCB 1266 submaster which uses a 40 characters LCD display. Latch U6 hold LCD data
bus state named KB0 to KB7 while selection is made by latch U5 trough EDL1 signal.
Register selection and read/write operations are controlled by outputs P0 & P1 of latch
U10.Contrast can be fine adjusted by R82.
PCB 1267 crossfade which uses a 16 characters LCD display. Latch U6 holds LCD data
bus state named KB0 to KB7 while selection is made by latch U5 trough EDL2 signal.
Register selection and read/write operations are controlled by outputs P0 & P1 of latch
U10. Contrast can be fine adjusted by R83.
To avoid supply shift an optional 5V line can feed, if necessary, trough P10 & P11 the array of
LED backlighting which have the disadvantage to have a high consumption on 5V supply.
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AUDIO INPUT
This input is used when special effects must be in accordance with sound.
The audio input signal is connected to J6 ; left and right signal (if stereo) are summarized
before amplification. Impedance input is about 20Kohm. If balanced inputs are used,
connecting pin 5 or 3 to one phase of the input signal and using pin 4 or 1 as active phase
would perform the same as using a transformer.
The first stage of the audio interface is an automatic gain controller (AGC) which accepts a
level from 50mV to 50V. Transistor Q2 adjusts current level injected on amplifier stage AR2-A
to get an average output signal level.
Following AGC stage, the audio signal at correct level is buffered and fed to the ADC logic
conversion trough analog multiplexers U36.
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Keys matrix and LEDs matrix management (line and row selection) are generated on CPU
board (PCB 1264) and fed to all the surface board trough flat cable.
For potentiometer level acquisition theyre 2 solutions in use; it depends of the number of
potentiomers held by the board.
if few potentiometers are used, levels are directly sent to CPU board and selected by U36
(4051).This solution is used on:
- PCB 1267 crossfade
- PCB 1268 key
PCB holding too many potentiometers use on board a private analog multiplexers.
Address selection of multiplexers is generated on CPU board by latch U17; U35 (4515B)
generate the enable used by multiplexers on surface board. This solution is used on:
- PCB 1265 where the 24 potentiometers are selected by multiplexers U2,U4,U5.
- PCB 1266 where the 16 potentiometers are selected by multiplexers U1,U2.
All the potentiometers are supplied in 5V with a private line avoiding reading shift
perturbations and noise.
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Including all the functions seen later, this PCB has the additional feature of generating output
0-10V analog voltages. Each output voltage needs a sample and hold which maintains the
value to be generated during approximately 20 mSec. Software must after each main loop
actualize the new output voltages. Generation of one of these voltages needs 3 steps:
conversion of the digital value in the analog voltage with help of the DAC on CPU board;
AR3 adjusts level from 0-5 Volt to 0-10Volt output level.
This voltage is sent to the selected analog output with help of demultiplexers U1,U3,U6.
The selected output of demultiplexer then loads a 100 nF capacitor which holds the level
of the selected analog output. This voltage is buffered trough op amp TL084 to give up to
3 mA to external world. The voltages generated are also used to produce on green LEDs
the dimming state of the corresponding output. R29,R30,R31 can be modified (to 27K) to
configure analog output voltage to current without need of the optional PCB1284.
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The board holds the LCD 2 lines X 40 characters directly soldered on PCB with P3.
Additional connector dubox P2 supplies LCD backlighting.
The board holds the LCD 2 lines X 16 characters directly soldered on PCB with P3.
The board holds the RAM protect key directly soldered to PCB.
P1 :insertion of diode if voltage is selected which gives the ability to select multiple
outputs the highest
The analog outputs are then fed to a SOCAPEX 37 contacts connector. Pin 1 to 24 hold
respectively outputs 1 to 24; pin 25 to 37 are connected to ground.
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CANTOR APPENDIX 1
1. First start-up
Verify modifications on PCB according to part list 1139.67.001E.
Verify the Fuses F1 500 mA slow, and if necessary the fuse of power supply SNP3034.
Disconnect the AMP connector on the CPU board and chek the voltage :
between pin 1 & 2 : + 5.05 V
1 & 8 : + 15 V
1 & 6 : - 15 V
Verify V max between TP3 and TP4, it has to be approximatively 5 V
The intensity of the display can be adjusted by means of R133 and R134
Contrast of LCD : R82 Vcont1 (R83 Vcont2) sets contrast level of LCD 40 CHR (16 CHR).
Level of analog outputs : Adjust R85 to get 10 volt on analog outputs.
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0 On first instructions
1 After init of Z180 (MMU pages, counters...)
2 After control of Cold Start data
3 After initialization of DMA and SCC
4 After start of DMA
A SELECTION MENU
B TEST KEYS AND LEDS
C TEST POTENTIOMETERS AND AUDIO INPUT
D DISPLAY ROM AND RAM
E DISPLAY MEMORY CARD
F TEST RAM
G TEST ROM
H TEST EXTERNAL LINES
I VOLTAGE LEVEL OF CPU AND MEMORY CARD BATTERIES
T AUTOMATIC TEST
P TEST SERIAL INTERFACES
M READ CARD AT ADDRESS SELECTED BY POTENTIOMETERS
N WRITE CARD AT ADDRESS SELECTED BY POTENTIOMETERS
O GLOBAL TEST OF MEMORY CARD
P WRITE RAM ADDRESS SELECTED BY POTENTIOMETERS
Q OUTPUT A LINEAR RAMP TO 48 ANALOG OUTPUTS
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Pushing the clear (CL) key will exit the selected test and return to main menu.
b.Test potentiometers
All the potentiometers are divided in 3 pages continuously refreshed with the value of the
current potentiometer (0 to FE or FF).
Change page with UP and DOWN key.
Page 1 : - Gen Master
- flash
- speed effect
- master effect
- registers 1 to 12
- scene
- prepa
- speed transfer
- master A and B
- battery card
- not used
- audio input inverted level.
Note: Option P can be used to write continuously to a selected RAM address with help of
REG1 to REG4.
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e. Test RAM
Control if RAM(s) have better access time than 100 ns and are Low Power versions
(HITACHI,TOSHIBA,FUJITSU).
RAM is tested from 022000 to 027FFF.
On error the program restarts and shows the number of errors and the last fail location
address.
Number of cycles is shown.
Algorithm used for this test is:
- fill ram with 00, 01, .. 151, 00, 01...
- Control of content.
After a RAM Test you must perform a Cold Start
(RAM content is altered and no memory data will be saved)
(Push IN and CAN on power up)
Note: Option P can be used to write continuously to a selected RAM address with help of
REG1 to REG4.
f. Test EPROM
Check if EPROMs 27C010 have a better access times than 120 ns.
A checksum is computed from 00000 - 1FFFF.
The checksum is computed again, compared and displayed
The number of cycles and errors are displayed on LCD1.
h. Test batteries
LCD1 displays the voltage of :
- the CPU battery which must be higher than 2.5V (typical 3.1V)
- the external memory card battery which must be higher than 2V for correct datas retention.
All the serial interfaces are tested with 9600 Baud, 8 bits, no parity and 2 stop bits. AA
Hex are sent continuously
Software verify if AA hex are received on the 3 interfaces.
If an error or a time-out is found: displayed ERROR counter is incremented.
The tests are performed repetitively.
On RS232 link the line RTS and CTS are also used.
This is a cyclic test and its easy to synchronize a scope.
j. Automatic test
Cyclic test of EPROM, RAM and serial interfaces
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k. Backup Memory
Switch off the PCB and check the consumption of the RAM under battery backup.
Replace jumper W5 with an ammeter and test if current given by the battery is less than 4
micro Amp.
l. Consumption Test
Control current given on each power line (5V, 15, -15V).
Perform this test with different configurations for maximum power consumption.
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b. Test potentiometers
All the potentiometers are divided in 3 pages continuously refreshed with the value of the
current potentiometer (0 to FE or FF).
Change page with UP and DOWN key.
Page 1 : - S, P, SP (crossfader)
- MA, MB
- Battery card
- Audio input but in the inverted state (FF to 0)
- P1 to P12
Page 2 : - P29 to P36
- P13 to P24
- P37 to P40
Page 3 : - P41 to P48
- GM
- Flash
- Effect
- Register 1 to 12
- Speed effect.
c. Special care
PCB1265 : Verify with a scope some analog outputs; level must vary continuously from
0 to 10 V. Check if there is no high frequency oscillations (case of a TL084
which gives too much current)
PCB1266 : In case of problems with LCD 40 CHRs check if theres no shorts circuits
on P1
Check 5V supply of LCD ; it must be higher than 4.8V
-PCB1267 : Check 5V supply of LCD ; it must be higher than 4.8V
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Belgium
MT-1070-07h
N.V. ADB-TTV Technologies S.A.
(Group Headquarters)
Leuvensesteenweg 585,
B-1930 Zaventem
Tel : 32.2.709.32.11
Fax : 32.2.709.32.80
E-Mail : adb@adblighting.com
Deutschland
ADB GmbH
Dieselstrae 4,
D-63165 Mhlheim am Main
Tel : 49.6108.91.250
Fax : 49.6108.91.25.25
E-Mail : adblighting@t-online.de
France
ADB S.A.S.
Sales office:
168/170, boulevard Camlinat
F-92240 Malakoff
Tel : 33.1.41.17.48.50
Fax : 33.1.42.53.54.76
E-Mail : adb.fr@adblighting.com
Factory & group logistics centre:
Zone industrielle Rouvroy
F-02100 Saint-Quentin
Tel : 33.3.23.06.35.70
Fax : 33.3.23.67.66.56
E-Mail : adb.fr@adblighting.com
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