July 2011 MOS Model, level 40

1 MOS Model, level 40

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MOS Model, level 40 July 2011

1.1 Introduction

The Silicon On Isolator (SOI) Field-Effect Transistor (FET) is a semiconductor device whose
operation is achieved by modulation of the resistance of a thin silicon layer (channel). The
modulation of the resistance is controlled by the gate voltage and handle wafer (box) voltage.
These devices are often used as a load in high voltage MOS devices. This long channel SOI
FET model is special developed to describe the drift region of LDMOS and EPMOS devices.
When the n-channel FET transistor equations are used for p-channel FET transistors, the sign
of the terminal potentials, terminal currents and terminal charges must be changed.

1.1.1 Survey of modeled effects

Accumulation/depletion at the surface

Accumulation/depletion at the box

Pinch off mode

Velocity saturation in the channel

Gate charge model

Self-heating

Box charge model

Different temperature scaling for RON and VSAT

Include temperature scaling for RSAT.

Not included in the model

Short channel effects

Subthreshold currents

Inversion at the surface at high negative gate voltages

Inversion at the box at high negative box voltages

Noise model.

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1.2 Parameters and constants

1.2.1 Parameters and clipping

Parameter list

The parameters are listed below.

Parameter Units Description

LEVEL - Model level, must be set to 40
PARAMCHK - Level of clip warning info *)
RON Ohmic resistance at zero bias
RSAT Space charge resistance at zero bias
VSAT V Critical drain-source voltage for hot carriers
PSAT Velocity saturation coefficient
VP V Pinch off voltage at zero gate and handle wafer voltages
VP 0 no depletion and/or accumulation in the channel
TOX m Gate oxide thickness
TOX > 0 SOI FET device
TOX 0 No depletion/accumulation at the gate
DCH m-3 Doping level channel
Box oxide thickness
TBOX m TBOX 0 No depletion/accumulation at the box
CGATE F Gate capacitance at zero bias
CBOX F Handle wafer capacitance at zero bias
TAUSC s Space charge transit time of the channel
ACH Temperature coefficient restivity of the channel
ACHMOD Parameter to switch to extended temperature scaling
ACHRON Temperature coefficient of ohmic resistance at zero bias
ACHVSAT Temperature coefficient of critical drain-source voltage
for hot carriers
ACHRSAT Temperature coefficient of space charge resistance at
zero bias
TREF C Reference temperature

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July 2011 MOS Model, level 40

Parameter Units Description

DTA C Temperature offset to the ambient temperature
MULT Multiplication factor
PRINT- Flag to add scaled parameters to the OP output
SCALED

*) See Appendix D for the definition of PARAMCHK.

The additional parameters for the model including self-heating are listed below.

Parameter Units Description

RTH o
C/W Thermal resistance
CTH J/oC Thermal capacitance
ATH Thermal coefficient of the thermal resistance

Parameter MULT
This parameter may be used to put several devices in parallel. The following parameters are
multiplied by MULT :

CGATE CBOX CTH

Divided by MULT are:

RON RSAT RTH

Default and clipping values

The default values and clipping values as used for the MOS level 40 model are listed below.

Parameter
name Units Default Clip low Clip high
LEVEL - 40 - -
PARAMCHK - 0 - -
RON 1.00 1e-2 -
RSAT 1.00 1e-2 -
VSAT V 10.00 1.00 10-6 -
PSAT 1.00 0.1 -

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Parameter
name Units Default Clip low Clip high
VP V -1.00 -1.0 -
TOX m -1.00 -1.0 0.0001
DCH m-3 1.00 1021 1.00 1011 1.00 1029
TBOX m -1.00 -1.00 0.0001
CGATE F 0.00 0.0 -
CBOX F 0.00 0.0 -
TAUSC s 0.00 0.0 -
ACH 0.00 - -
ACHMOD 0.00 0 1
ACHRON 0.00 - -
ACHVSAT 0.00 - -
ACHRSAT 0.00 - -
TREF C 25 -273.0 -
DTA C 0.00 - -
MULT 1.00 0.0 -
PRINT-
SCALED 0 - -

The default values and clipping values of the additional parameters for the model including
self-heating (see section 1.4) are listed below.

Parameter Units Default Clip low Clip high

Name
RTH o
C/W 300.0 0.000 -
CTH J/oC 3.0109 0.000 -
ATH 0.0 - -

1.2.2 Model constants

19
q = 1.6021918 10 C

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July 2011 MOS Model, level 40

10
si = 1.036 10 CVm

11
ox = 3.453 10 CVm

--k- = 0.86171 10 4 V K
q

8
v = 10

2
q = 10

3
V 0 = 10

The default reference temperature TREF for parameter determination is 25 C.

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1.3 Model equations

1.3.1 Equivalent circuit and equations

A full description of the long channel SOI FET model is given below.

Gate

Qgs Q gd

Ids

Source Drain
Qds

Qbs Qbd

Substrate
Figure 1: Equivalent Circuit of an SOI FET

1.3.2 Temperature effects

The actual simulation temperature is denoted by TEMP (in oC). The temperature at which the
parameters are determined is TREF (in oC).

Conversions to Kelvins

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T K = TEMP + DTA + 273.15 + V dT (1.1)

T amb = TEMP + DTA + 273.15 (1.2)

T RK = TREF + 273.15 (1.3)

TK
T N = ---------
- (1.4)
T RK

Thermal Voltage

V T = --- T K
k
(1.5)
q

On resistance and saturation voltage

ACHRON
RON T = RON T (1.6)

ACHVSAT
VSAT T = VSAT T (1.7)

ACHRSAT
RSAT T = RSAT T (1.8)

Thermal resistance

T amb ATH
RTH T = RTH ------------ (1.9)
T RK

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1.3.3 Model preprocessing

Parameter dependent constants DC part

if TBOX 0 : CBOX = 0
if TOX 0 : CGATE = 0
if TOX 0 & TBOX 0 : VP = 0

For both TOX and TBOX less than or equal to zero, the pinch off voltage Vp = 0.

When VP 0 only equations 1.24, 1.41, 1.43, 1.54, 1.55, 1.107 and 1.108 are used. In this
case the charges Qb and Qg are equal zero.

TBOX > 0 : kb = 2 si q DCH (1.10)

TBOX 0 : kb = 0

TOX > 0 : kg = 2 si q DCH (1.11)

TOX 0 : kg = 0

k ox = 2 si q DCH (1.12)

si q DCH TBOX 2
V box = -------------------------------- ---------------- (1.13)
2 ox

si q DCH TOX 2
V ox = -------------------------------- ------------ (1.14)
2 ox

k b VP
Q bp = ---------------------------------------------------
- (1.15)
VP + V box + V box

k g VP
Q gp = ----------------------------------------------
- (1.16)
VP + V ox + V ox

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Q soi = Q bp + Q gp (1.17)

ox
TOX > 0 : C ox = ------------
TOX
(1.18)

TOX 0 : C ox = 0

ox
TBOX > 0 : C box = ----------------
TBOX
(1.19)

TBOX 0 : C box = 0

si q DCH
C soi = -------------------------------
- (1.20)
Q soi
2
V m = ( VP + V box + VP + V ox ) (1.21)

Q soi Q soi
V g sw = ---------- ---------
- + 2 V box (1.22)
k ox k ox

Q soi Q soi
V b sw = ---------- ---------
- + 2 V ox (1.23)
k ox k ox

RSAT T
VR sat = VSAT T ------------------ (1.24)
RON T

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1.3.4 Model evaluation

Drain and source voltage

V d V s: sign = 1

V d1 = V d

V s1 = V s

V d < V s: sign = 1

V d1 = V s

V s1 = V d

Pinch-off voltage

TBOX 0 : V p = VP + V g (1.25)

TOX 0 : V p = VP + V b (1.26)

TBOX 0 , TOX 0 VP = 0 (1.27)

TOX > 0 & TBOX > 0 :

V g V b > V g SW :

C ox 2
a g = ------------------ (1.28)
2 C box

C ox C ox 2 Vg
b g = 1 + ----------
- + ---------- + a g -------------- (1.29)
C box C soi V box

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2 C box C box 2 C ox C ox V g
c g = ------------------ + ----------- + ----------- + ---------- ----------- +
C soi C soi C box C soi V box
C ox
------------------ Vg 2 Vb
----------- + ----------- (1.30)
2 C box V box V box

2 cg
V p = V box --------------------------------------------------- (1.31)
2
bg + bg 4 ag cg
V g V b < V bSW :

C box 2
a b = ---------------- (1.32)
2 C ox

C box C box 2 Vb
b b = 1 + ----------
- + ----------- + a b -------------- (1.33)
C ox C soi V ox

2 C ox C ox 2 C box C box V b
- + ---------- + ----------- + ----------- --------- +
c b = ---------------
C soi C soi C ox C soi V ox
C box V b 2 V g
---------------
- --------- + --------- (1.34)
2 C ox V ox V ox

2 cb
V p = V ox -------------------------------------------------- (1.35)
2
bb + bb 4 ab cb
V g V b V b sw & V g V b V g sw :

V bb = V b V box (1.36)

V gg = V g V ox (1.37)

2 2
( V gg V bb ) + 2 V m ( V gg + V bb ) + V m
Vp = -----------------------------------------------------------------------------------------------------
- (1.38)
4 Vm

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Source and drain voltage including pinch-off and velocity saturation

1 2
if V P > 0 & V p 0 :V sp = --- V s1 + V p ( V s1 V p ) + v (1.39)
2

1 4 V s1 V p v
if V P > 0 & V p > 0 : V sp = --- -----------------------------------------------------------------------
- (1.40)
2 2
V + V p + ( V s1 V p ) + v
s1

V P 0 : V sp = V s1 (1.41)

2 2
V P > 0 : V c = VSAT T + V p V sp VSAT T + ( V p V sp ) (1.42)

V P 0 : V c = VSAT T (1.43)

( V d 1 V s1 ) V c
V dp = V sp + ---------------------------------------------------------------------------
- (1.44)
PSAT ( V V ) PSAT + Vc PSAT
d1 s1

Integration boundary voltages

V sp < V b : V dp < V b : V ab = V dp
V dp V b : V ab = V b

V sp V b : V ab = V sp

V sp < V g : V dp < V g : V ag = V dp

V dp V g : V ag = V g

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V sp V g : V ag = V sp

Current increase due to accumulation at the handle wafer

1 2 2 C box
V sp < V b : I b1 = --- { ( V b V sp ) ( V b V ab ) } -------------------------------
2 Q soi RON T
(1.45)

V sp V b : I b1 = 0

Current reduction due to depletion at the handle wafer

( V dp V b ) V box
V dp V b : Y dpb = ----------------------------------------------------------------
- (1.46)
1 + 1 + ( V dp V b ) V box

( V ab V b ) V box
Y abb = ----------------------------------------------------------------
- (1.47)
1 + 1 + ( V ab V b ) V box

32 2 2 3 3
2 k b V box Y dpb Y abb Y dpb Y abb
I b2 = -------------------------------- ----------------------------
- + ----------------------------- (1.48)
Q soi RON T 2 3
V dp < V b : I b2 = 0

Current increase due to accumulation at the gate

1 C box
V sp < V g : 2 2
I g 1 = --- { ( V g V sp ) ( V g V ag ) } ------------------------------- (1.49)
2 Q soi RON T

V sp V g : I g1 = 0

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Current reduction due to depletion at the gate

( V dp V g ) V ox
V dp V g : Y dpg = --------------------------------------------------------------
- (1.50)
1 + 1 + ( V dp V g ) V ox

( V ag V g ) V ox
Y agg = --------------------------------------------------------------
- (1.51)
1 + 1 + ( V ag V g ) V ox

32 2 2 3 3
2 k g V ox Y dpg Y agg Y dpg Y agg
I g2 = -------------------------------- ----------------------------
- + ----------------------------- (1.52)
Q soi RON T 2 3
V dp < V g : I g2 = 0

Total ohmic current

V dp V sp
VP > 0 : I ohm = -----------------------
- + I b1 + I b2 + I g 1 + I g 2 (1.53)
RON T

V dp V sp
VP 0 : I ohm = -----------------------
- (1.54)
RON T

Total current including velocity saturation

V d 1 V dp
I ds = sign I ohm 1 + -----------------------
- (1.55)
VR sat

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July 2011 MOS Model, level 40

1.3.5 Substrate charge model

If TBOX 0 then V b1 = Vb = Vb = Vb = Vb = Vb = Vb = 0
2 3 4 5 6 7

V b1 : accumulation part q b

V b2 : depletion part q b
2
V b3 : accumulation part q b
V b4 : depletion part q b
2

V b5 : accumulation part q b times accumulation part qg

V b6 : depletion part q b times accumulation part qg
V b7 : depletion part q b times depletion part qg

4
( V p V sp ) V dp V sp
F c = ---------------------------------------------------------------
4
------------------------------------
4 V +V
-
( V p V sp ) + ( VP 100 ) 0 dp V sp
(1.56)

1 1 2 2
V sp < V b : V b1 = -------------------------------- --- { ( V b V sp ) ( V b V ab ) } (1.57)
I ohm RON T 2

C box 3 3
V b3 = ------------------------------------------------------ { ( V b V ab ) ( V b V sp ) } (1.58)
3 Q soi I ohm RON T

V sp V b : V b1 = 0; V b3 = 0

32 2 2 3 3
2 k b T box V box Y dpb Y abb Y dpb Y abb
V dp V b : V = -----------------------------------------------
- ----------------------------- + ----------------------------- (1.59)
b2 ox I ohm RON T 2 3

2 2 3 3 4 4
2 k b T box V box Y dpb Y abb Y dpb Y abb
V b4 = ----------------------------------------------------------- ----------------------------
- + -----------------------------(1.60)
Q soi ox I ohm RON T 3 4

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V dp < V b : V b2 = 0
V b4 = 0

V g & V b > V sp : V g < V b: V ai = V ag

V g V b: V ai = V ab

2
( V b V ai ) ( V b V sp )
2

( V g V b ) --------------------------------------------------------------- +
C ox 2
V b5 = ----------------------------------------------- (1.61)
Q soi I ohm RON T 3 3

( V b V ai ) ( V b V sp )
---------------------------------------------------------------
3

V g or V b V sp : V b5 = 0

V dp V b & V sp < V g & V b < V g :

( V ag V b ) V box
Y agb = ----------------------------------------------------------------
- (1.62)
1 + 1 + ( V ag V b ) V box

52 2 2 3 3
2 k b C ox T box V box V g V b Y agb Y abb Y agb Y abb
V b6 = ------------------------------------------------------------- ------------------- ----------------------------
- + -----------------------------
Q soi ox I ohm RON T V box 2 3

3 3 4 4 5 5
Y agb Y abb Y agb Y abb Y agb Y abb
2 ----------------------------- + 3 ----------------------------- + ----------------------------- (1.63)
3 4 5

V dp V g & V sp < V b & V g < V b :

( V ab V g ) V ox
Y abg = --------------------------------------------------------------
- (1.64)
1 + 1 + ( V ab V g ) V ox

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52 2 2 3 3
2 k g V ox V b V g Y agg Y abg Y agg Y abg
V b6 = ----------------------------------------------- ------------------- ----------------------------
- + -----------------------------
Q soi I ohm RON T V ox 2 3

3 3 4 4 5 5
Y agg Y abg Y agg Y abg Y agg Y abg
2 ----------------------------- + 3 ----------------------------- + ----------------------------- (1.65)
3 4 5

V g & V b < V sp or V g & V b > V dp : V b6 = 0

V g & V b < V dp : V g > V b V ad = V ag

Vg Vb V ad = V ab

( V ad V b ) V box
Y adb = ----------------------------------------------------------------
- (1.66)
1 + 1 + ( V ad V b ) V box

( V ad V g ) V ox
Y adg = --------------------------------------------------------------
- (1.67)
1 + 1 + ( V ad V g ) V ox

V g V b V ox + V box
Z 0 = ---------------------------------------------------- (1.68)
2

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k g k b T box
----------------------------------------------------------------
Q soi RON T C box I ohm

( V ox V box ) [ ( Y dpb Y dpg ) ( Y adb Y adg ) ]

+ V box Y dpb [ Y dpb ( 1 + Y dpb ) + Y dpg ( 3 + 3 Y dpb + Y 2dpb ) ]

1 2
--- V box V ox V box Y adb [ Y adb ( 1 + Y adb ) + Y adg ( 3 + 3 Y adb + Y adb ) ]
4
+V Y [ Y ( 1 + Y ) + Y ( 3 + 3 Y + Y
2
) ]
ox dpg dpg dpg dpb dpg dpg
exact 2
Vb 7 = V ox Y adg [ Y adg ( 1 + Y adg ) + Y adb ( 3 + 3 Y adg + Y adg ) ]

2 V box ( 1 + Y dpb ) + V ox ( 1 + Y dpg )

z 0 ln -------------------------------------------------------------------------------------------------
V box ( 1 + Y adb ) + V ox ( 1 + Y adg )
2 2 3 3
32 Y dpb Y adb Y dpb Y adb
2 V box V ox ----------------------------- + -----------------------------
2 3
2 2 3 3
32 Y dpg Y adg Y dpg Y adg
2 V ox V box -----------------------------
- + ------------------------------
2 3

(1.69)

k g k b T box
------------------------------------------------------------
ox Q soi RON T I ohm
2 2 3 3
1 V dp V ad V dp V ad
------------------------------------- ( V dp V ad ) [ V b V g ] ------------------------- [ V g + V b ] + ------------------------
- +
4 V box V ox 2 3

( V dp V ad ) [ V b V g ( V g V box + V b V ox ) ]
appro
Vb 7 =
V 2 V 2
------------------------
dp ad 2 2
- [ V g V box + V b V ox + 2 V b V g ( V box + V ox ) ] +
2
1 3
-
3 2 V dp V ad
------------------------------------------------ 3
16 ( V box V ox ) ------------------------- [ V ( 2 V
3 g box + V ox ) + V b ( V box + 2 V ox ) ]
4
V dp V 4ad
------------------------- [ V box + V ox ]
4

(1.70)

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July 2011 MOS Model, level 40

2 2 2 2
V box ( Y dpb + Y adb ) + V ox ( Y dpg + Y adg )
Y sw = --------------------------------------------------------------------------------------------------------
2
(1.71)
V 0 ( V box + V ox )

2
( 1 + 2 V o ) Y sw
Sw = -----------------------------------------
2
- Vo (1.72)
1 + Y sw

exact
Sw > 1 : V b7 = Vb 7 (1.73)

appr
Sw < 0 : V b7 = Vb 7 (1.74)

Sw 0 & Sw 1 : Vb 7 = Sw Vb exact
7
appr
+ ( 1 Sw ) Vb 7 (1.75)

V g or V b V dp : Vb 7 = 0

Q b x = CBOX ( V b1 + V b2 + V b3 + V b4 + V b5 + V b6 + V b7 ) (1.76)

TBO X 0: Q by = 0

TBO X > 0

V sp + V dp V sp + V dp
V b ------------------------ : Q b = CBOX V b -----------------------
-
2 y 2
(1.77)

V sp + V dp
CBOX k b ------------------------ Vb
V sp + V dp 2
V b < ------------------------ : Q b y = ------------------------------ ----------------------------------------------------------------------------------
2 C box V sp + V dp
------------------------ V b + V box + V box
2
(1.78)

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Cb fix = 0.01 CBOX + MULT 10 (1.79)

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Q b = 0.99 Q b z + Cb fix { V b ( V d + V s ) 2 } (1.80)

If F c 0 or ( V dp V sp ) 1.0e 4 then Q b z = Q b y (1.81)

else if F c 1 then Q b z = Q b x (1.82)

else if F c < 1 then Q b z = Q b y + F c ( Q b x Q b y ) (1.83)

Qb s = 0.5 Qb (1.84)

Qb d = 0.5 Qb (1.85)

1.3.6 gate charge model

If TOX 0 then V g 1 = V g 2 = V g 3 = V g 4 = V g 5 = V g 6 = V g 7 = 0

If ( V dp V sp ) > 1.0e 4 and F c > 0 :

2 2
( V g V sp ) ( V g V ag )
V sp < V g : V g1 = ----------------------------------------------------------------
- (1.86)
2 I ohm RON T
3 3
C ox ( V g V sp ) ( V g V ag )
V g3 = ----------------------------------------------- ----------------------------------------------------------------- (1.87)
Q soi I ohm RON T 3

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: V g1 = 0

( V sp V g )m

V g3 = 0

32 2 2 3 3
V dp V g : 2 k g T ox V ox Y dpg Y agg Y dpg Y agg
V g2 = ---------------------------------------------- ----------------------------
- + ----------------------------- (1.88)
ox I ohm RON T 2 3

2 2 3 3 4 4
V ox 2 k g T ox Y dpg Y agg Y dpg Y agg
V g4 = ----------------------------------------------------------- ----------------------------
- + -----------------------------
Q soi ox I ohm RON T 3 4

(1.89)

V dp < V g : V g2 = 0

V g4 = 0

If ( C box > 0 and Cox > 0 )

C box
V g = ----------- ( V b + V b + V b )
5 C ox 5 6 7

otherwise Vg = 0 (1.90)
5

Q g x = CGATE ( V g 1 + V g 2 + V g 3 + V g 4 + V g 5 ) (1.91)

T O X 0: Q gy = 0

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TO X > 0 :

V sp + V dp V sp + V dp
V g ------------------------ : Q g y = CGATE -----------------------
- V g (1.92)
2 2

V sp + V dp
V sp + V dp CGATE k g ------------------------ V g
V g < ------------------------ :Q g y
2
= --------------------------------- -----------------------------------------------------------------------------
2 C ox V sp + V dp
------------------------ V g + V ox + V ox
2
(1.93)

17
Cg fix = 0.01 CGATE + MULT 10 (1.94)

Q g = 0.99 Q g z + Cg fix { V g ( V d + V s ) 2 } (1.95)

If F c 0 or ( V dp V sp ) 1.0e 4 then Q g z = Q g y (1.96)

else if F c 1 then Q g z = Q g (1.97)

x

else if F c < 1 then Q g z = Q g y + F c ( Q g x Q g y ) (1.98)

Qg s = 0.5 Qg (1.99)

(1.100)

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( Qg d = 0.5 Qg )m

1.3.7 Space charge in the channel

Critical current for hot-carriers

VP > 0 :
V g V sp : Q gs = C ox ( V g V sp ) (1.101)

V sp V g
V g < V sp : Q gs = k g ------------------------------------------------------------- (1.102)
V sp V g + V ox + V ox

V b V sp : Q bs = C box ( V b V sp ) (1.103)

V sp V b
V b < V sp : Q bs = k b ------------------------------------------------------------------ (1.104)
V sp V b + V box + V box

Q spx = 1 + ( Q gs + Q bs ) Q soi (1.105)

2
VSAT T Q spx + Q spx + q
I hc = ------------------ -------------------------------------------- (1.106)
RON T 2

VP 0 :

I hc = VSAT T RON T (1.107)

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1 ( 2 PSAT )
I ds 2 PSAT
---------
Q ds = sign TAUSC I hc 1 + - 1 (1.108)
I hc

1
Q d = --- ( Q b + Q g ) + Q ds (1.109)
2

1
Q s = --- ( Q b + Q g ) Q ds (1.110)
2

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July 2011 MOS Model, level 40

Numerical Adaptations

To implement SOI FET Model, level 40 in a circuit simulator, care must be taken of the
numerical stability of the simulation program. The functions as well as their derivatives
should be continuous at any bias condition that may occur during the iteration cycle.

Numerical Problems and Solutions

Fc must be set to zero when Iohm gets close to zero or even negative. This prevents divisions
by zero in the substrate charge model.

1.3.8 Numerical Adaptation

To implement the model in a circuit simulator, care must be taken of the numerical stability
of the simulation program. A non-existent conductance, Gmin, is connected between the
nodes DS. The value of the conductance is 10-15 [1/].

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1.4 Self-heating

1.4.1 Equivalent circuit

Self-heating is part of the model. It is defined in the usual way by adding a self-heating net-
work (see figure 2) containing a current source describing the dissipated power and both a
thermal resistance RTH and a thermal capacitance CTH.

dT
Material ATH
Si 1.3
Ge 1.25
Pdiss
RTHT CTH GaAs 1.25
AlAs 1.37
InAs 1.1
InP 1.4
GaP 1.4
SiO2 0.7

Figure 2: On the left, the self-heating network, where the node voltage VdT is used in the
temperature scaling relations. Note that for increased flexibility the node dT is
available to the user. On the right are parameter values that can be used for Ath.

The resistance and capacitance are both connected between ground and the temperature node
dT. The value of the voltage VdT at the temperature node gives the increase in local tempera-
ture, which is included in the calculation of the temperature scaling relation (1.1), see section
1.3.2 on page 8.

For the value of Ath we recommend using values from literature that describe the temperature
scaling of the thermal conductivity. For the most important materials, the values are given in
figure 2, which is largely based on Ref. [ 1], see also [ 2].

For example, if the value of VdT is 0.5V, the increase in temperature is 0.5 degrees Celsius.

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1.4.2 Model equations

The total dissipated power is a sum of the dissipated power of each branch of the equivalent
circuit and is given by:

P diss = I DS V DS

The total dissipation applies for the geometrical model (mnt1, mpt2, mos40t3).

1.4.3 Usage
Below a Pstar example is given to illustrate how self-heating works.

q Example
Title: example self-heating 40;

circuit;
mnt_1(Vd, Vg, Vs, 0, dt) level=40, Rth=1e6,Cth=1e-9;
R_1 ( Vdd, Vd) 100;
R_2 ( Vgg, Vg) 1k;
R_3 ( Vs, 0) 100;
e_SRC_2 (Vgg ,net101) 5;
e_SRC_1 ( Vdd, 0) 1;
e_SRC_3 ( net101, 0) 0;
end;

dc;
print: vn(dt), op(pdiss.mnt_1);
end; run;

result:
DC Analysis.
VN(DT) = 24.764E+00
Pdiss.MNT_1 = 24.764E-06

The voltage on node dT is 24.764e+0 V, which means that the local temperature is increased
by 24.764e+0 oC.

1.Pstar model name.

2.Pstar model name.
3.Spectre/ADS model name.

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1.5 DC operating point output

The DC operating point output facility gives information on the state of a device at its opera-
tion point. Besides terminal currents and voltages, the magnitudes of linearized internal ele-
ments are given. In some cases meaningful quantities can be derived which are then also
given (e.g. u). The objective of the DCOP-facility is twofold:

Calculate small-signal equivalent circuit element values.

Open a window on the internal bias conditions of the device and its basic capabilities (e.g.
u).

Below the printed items are described. Cx(y) indicates the derivate of the charge Q at terminal
x to the voltage at terminal y, when all other terminals remain constant.

Quantity Equation Description

Level 40 Model level

Ids Ids Drain Source current
Vds Drain Source voltage
Vgs Gate Source voltage
Vbs Bulk Source voltage
Vp Vp Channel pinch-off voltage
gm dIds/dVg Transconductance
gmb dIds/dVb Bulk transconductance
gds dIds/dVd Output conductance
Qg Gate charge
Cgd -dQg/dVd Gate charge dependence on drain voltage
Cgg dQg/dVg Gate charge dependence on gate voltage
Cgs -dQs/dVs Gate charge dependence on source voltage
Cgb -dQg/dVb Gate charge dependence on bulk voltage
Qb Bulk charge

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Cbd -dQb/dVd Bulk charge dependence on drain voltage

Cbg -dQb/dVg Bulk charge dependence on gate voltage
Cbs -dQb/dVs Bulk charge dependence on source voltage
Cbb +dQb/dVb Bulk charge dependence on bulk voltage
Qd Drain charge
Cdd +dQd/dVd Drain charge dependence on drain voltage
Cdg -dQd/dVg Drain charge dependence on gate voltage
Cds -dQd/dVs Drain charge dependence on source voltage
Cdb -dQd/dVb Drain charge dependence on bulk voltage
Qs Source charge
Csd -dQs/dVd Source charge dependence on drain voltage
Csg -dQs/dVg Source charge dependence on gate voltage
Css +dQs/dVs Source charge dependence on source voltage
Csb -dQs/dVb Source charge dependence on bulk voltage
u gm/gds Transistor gain
Rout 1/gds Small signal output resistance
Vearly Ids/gds Equivalent Early voltage
Iohm Iohm Drain source current excluding velocity saturation
Ihc Ihc Critical current for velocity saturation

The additional operating point output for the model including self-heating (see section 1.4),
is listed in the table below.

Quantity Equation Description

Tk Tk Actual temperature including self-heating

Pdiss Pdiss Power dissipation

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When the parameter PRINTSCALED is set to 1, the device parameter set after geometrical
and temperature scaling is added to the OP output:

Quantity Description

RONT Ohmic resistance at zero bias

RSATT Space charge resistance at zero bias
VSATT Critical drain-source voltage for hot carriers
PSAT Velocity saturation coefficient
VP Pinch off voltage at zero gate and substrate voltages
TOX Gate oxide thickness
DCH Doping level channel
TBOX Box oxide thickness
CGATE Gate capacitance at zero bias
CBOX Wafer capacitance
TAUSC Space charge transit time of the channel

Remarks:

When Vds<0, gm and gmb are calculated with drain and source terminals interchanged (see
section on Channel Type Declarations). The terminal voltages and IDS keep their sign..

The signs of Vp follow the conventions of the model parameter set. The parameter set is
always assumed to correspond to an n-channel device..

MULT is a scaling parameter that multiplies all currents and charges by the value of
MULT. This is equivalent to putting MULT (a number) MOS transistors in parallel. And as a
consequence MULT effects the operating point output.

A non-existent conductance, Gmin, is connected between the nodes DS. This conductance
Gmin does not influence the DC-operating point.

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1.6 Simulator specific items

1.6.1 Pstar syntax

n channel : mn_n (d,g,s,b) level=40, <parameters>
p channel : mp_n (d,g,s,b) level=40, <parameters>
n channel self-heating : mnt_n (d,g,s,b,dt) level=40, <parameters>
p channel self-heating : mpt_n (d,g,s,b,dt) level=40, <parameters>

n : occurrence indicator
<parameters> : list of model parameters

d,g,s,b and dt are drain, gate, source, bulk and self-heating terminals respectively.

1.6.2 Spectre syntax

n channel : model modelname mos40 type=n <modpar>
componentname d g s b modelname <inpar>
p channel : model modelname mos40 type=p <modpar>
componentname d g s b modelname <inpar>
n channel self-heating : model modelname mos40t type=n <modpar>
componentname d g s b dt modelname
<inpar>
p channel self-heating : model modelname mos40t type=p <modpar>
componentname d g s b dt modelname
<inpar>

modelname : name of model, user defined

componentname : occurrence indicator
<modpar> : list of model parameters
<inpar> : list of instance parameters

d,g,s,b and dt are drain, gate, source, bulk and self-heating terminals respectively.

3 Note
Warning! In Spectre, use only the parameter statements type=n or type=p. Using any other
string and/or numbers will result in unpredictable and possibly erroneous results.

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1.6.3 ADS syntax

n channel : model modelname mos40 gender=1 <modpar>
modelname:componentname d g s b <instpar>
p channel : model modelname mos40 gender=0 <modpar>
modelname:componentname d g s b <instpar>
n channel self-heating : model modelname mos40t gender=1 <modpar>
modelname:componentname d g s b dt <instpar>
p channel self-heating : model modelname mos40t gender=0 <modpar>
modelname:componentname d g s b dt <instpar>

modelname : name of model, user defined

componentname : occurrence indicator
<modpar> : list of model parameters
<instpar> : list of instance parameters

d,g,s,b and dt are drain, gate, source, bulk and self-heating terminals respectively.

1.6.4 The ON/OFF condition for Pstar

The solution for a circuit involves a process of successive calculations. The calculations are
started from a set of initial guesses for the electrical quantities of the nonlinear elements. A
simplified DCAPPROX mechanism for devices using ON/OFF keywords is mentioned in [3].
By default the devices start in the default state.
Nu

n-channel p-channel
Default ON OFF Default ON OFF
VDS 2.0 2.0 2.0 VDS -2.0 -2.0 -2.0
VGS -2.0 -2.0 -4.0 VGS 2.0 2.0 4.0
VSB 0.0 0.0 -2.0 VSB 0.0 0.0 +2.0

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1.6.5 The ON/OFF condition for Spectre

Nu

n-channel
OFF Triode Saturation Subthreshold Reverse Forward Breakdown
VDS 0.0 0.75 1.25 0.0 0 0 0
VGS 0.0 2.0 1.25 0.0 0 0 0
VSB 0.0 0.0 0.0 0.0 0 0 0

Nu

p-channel
OFF Triode Saturation Subthreshold Reverse Forward Breakdown
VDS 0.0 -0.75 -1.25 0.0 0 0 0
VGS 0.0 -2.0 -1.25 0.0 0 0 0
VSB 0.0 0.0 -1.25 0.0 0 0 0

1.6.6 The ON/OFF condition for ADS

n-channel p-channel
Default Default
VDS 0 VDS 0
VGS 0 VGS 0
VSB 0 VSB 0

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1.7 References

[1] V. Palankovski R. Schultheis and S. Selberherr, Modelling of power hetero-

junction bipolar transistor on gallium arsenide,IEEE Trans. Elec. Dev., vol 48, pp.
1264-1269, 2001. Note: the paper uses = 1.65 for Si, but = 1.3 goves a better fit:
also, k300 for GaAs is closer to 40 than to the published value of 46 (Palankovski,
personal communication).
[2] Sze, S.M., Physics of semiconductor devices, 2nd edition, John Wiley & Sons,
Inc., New York, 1981
[3] Pstar User Manual.

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A Hyp functions

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hyp1

0 X

1 2 2
Figure 3: hyp 1 ( x ; ) = --- ( x + x + 4 )
2

x0

hyp2

0 x0 x

Figure 4: hyp 2 ( x ; x 0 ; ) = x hyp 1 ( x x 0 ; )

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xo+hyp1(-xo;)

hyp3

0 x0 x

Figure 5: hyp 3 ( x ; x 0 ; ) = hyp 2 ( x ; x 0 ; ) hyp 2 ( 0 ; x 0 ; ) for = ( x 0 )

hyp4

-hyp1(-xo;) xo x

Figure 6: hyp 4 ( x ; x 0 ; ) = hyp 1 ( x x 0 ; ) hyp 1 ( x 0 ; )

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x0

hyp5

0 xo x

2
Figure 7: hyp 5 ( x ; x 0 ; ) = x 0 hyp 1 x 0 x ----- , for = ( x 0 )
x0

The hypm-function:

x y
hypm [ x, y;m ] = ----------------------------------------------------
- (1.111)
2m 2 m 1 (2 m)
(x +y )
setlength{unitlength}{0.40900pt} begin{picture}(1500,900)(0,0) enrm hinlines drawline[-50](264,158)(1436,158) hinlines drawline[-50](264,158)(264,787) hicklines path(264,158)(264,178)
hicklines path(264,787)(264,767) put(264,113){makebox(0,0){0}} hicklines path(264,158)(1436,158)(1436,787)(264,787)(264,158) put(45,472){makebox(0,0)[l]{shortstack{hyp

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B Spectre Specific Information

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Imax, Imelt, Jmelt parameters

Introduction
Imax, Imelt and Jmelt are Spectre-specific parameters used to help convergence and to pre-
vent numerical problems. We refer in this text only to the use of Imax model parameter in
Spectre with SiMKit devices since the other two parameters, Imelt and Jmelt, are not part of
the SiMKit code. For information on Imelt and Jmelt refer to Cadence documentation.

Imax model parameter

Imax is a model parameter present in the following SiMKit models:
juncap and juncap2
psp and pspnqs (since they contain juncap models)

In Mextram 504 (bjt504) and Modella (bjt500) SiMKit models, Imax is an internal parameter
and its value is set through the adapter via the Spectre-specific parameter Imax.
The default value of the Imax model parameter is 1000A. Imax should be set to a value which
is large enough so it does not affect the extraction procedure.

In models that contain junctions, the junction current can be expressed as:

I = I s exp ------------------ 1
V
(1.112)
N TD

The exponential formula is used until the junction current reaches a maximum (explosion)
current Imax.

V exp l
I max = I s exp ----------------- 1
N TD-
(1.113)

The corresponding voltage for which this happens is called Vexpl (explosion voltage). The
voltage explosion expression can be derived from (1):

I max
V exp l = N TD log ---------- + 1 (1.114)
Is

For V > V exp l the following linear expression is used for the junction current:

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Is V exp l
I = I max + ( V V exp l ) ------------------ exp ------------------ (1.115)
N TD N TD

Region parameter
Region is an Spectre-specific model parameter used as a convergence aid and gives an esti-
mated DC operating region. The possible values of region depend on the model:

For Bipolar models:

subth: Cut-off or sub-threshold mode
fwd: Forward
rev: Reverse
sat: Saturation.
off1

For MOS models:
subth: Cut-off or sub-threshold mode;
triode: Triode or linear region;
sat: Saturation
1
off

For PSP and PSPNQS all regions are allowed, as the PSP(NQS) models both have a MOS
part and a juncap (diode). Not all regions are valid for each part, but when e.g. region=for-
ward is set, the initial guesses for the MOS will be set to zero. The same holds for setting a
region that is not valid for the JUNCAP.

For diode models:

fwd: Forward
rev: Reverse
brk: Breakdown
off1

Model parameters for device reference temperature in Spectre

This text describes the use of the tnom, tref and tr model parameters in Spectre with SiMKit
devices to set the device reference temperature.
1.Off is not an electrical region, it just states that the user does not know in what state the
device is operating

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A Simkit device in Spectre has three model parameter aliases for the model reference temper-
ature, tnom, tref and tr. These three parameters can only be used in a model definition, not as
instance parameters.

There is no difference in setting tnom, tref or tr. All three parameters have exactly the same
effect. The following three lines are therefore completely equivalent:

model nmos11020 mos11020 type=n tnom=30

model nmos11020 mos11020 type=n tref=30
model nmos11020 mos11020 type=n tr=30

All three lines set the reference temperature for the mos11020 device to 30 C.

Specifying combinations of tnom, tref and tr in the model definition has no use, only the
value of the last parameter in the model definition will be used. E.g.:

model nmos11020 mos11020 type=n tnom=30 tref=34

will result in the reference temperature for the mos11020 device being set to 34 C, tnom=30
will be overridden by tref=34 which comes after it.

When there is no reference temperature set in the model definition (so no tnom, tref or tr is
set), the reference temperature of the model will be set to the value of tnom in the options
statement in the Spectre input file. So setting:

options1 options tnom=23 gmin=1e-15 reltol=1e-12 \

vabstol=1e-12 iabstol=1e-16
model nmos11020 mos11020 type=n

will set the reference temperature of the mos11020 device to 23 C.

When no tnom is specified in the options statement and no reference temperature is set in the
model definition, the default reference temperature is set to 27 C.
So the lines:

options1 options gmin=1e-15 reltol=1e-12 vabstol=1e-12 \

iabstol=1e-16
model nmos11020 mos11020 type=n

will set the reference temperature of the mos11020 device to 27 C.

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The default reference temperature set in the SiMKit device itself is in the Spectre simulator
never used. It will always be overwritten by either the default "options tnom", an explicitly
set option tnom or by a tnom, tref or tr parameter in the model definition.

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C OvervoltageSpecification

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Overvoltage warnings in SiMKit

Introduction
Overvoltage flagging is signalling that a (terminal) voltage is outside a specified safe range.
A warning will be given when the conditions for giving a warning are fulfilled.

Simple checks for overvoltage have been added to the following models: mos903, mos1100,
mos1101, mos1102, mos2002, mos2003, mos3100, mos4000, psp102, psp103.
The checks are done on terminal voltages of the models.

There are many ways to define overvoltage. For a general overvoltage flagging solution Ver-
ilog-A should be used.

Extra parameters for overvoltage flagging

A set of extra parameters has been added to the mos models mos903, mos1100, mos1101,
mos1102, mos2002, mos2003, mos3100, mos4000, psp102, psp103.

Table 1:

Name Unit Default Description

VBOX V 0.0 Oxide breakdown voltage.
Checking will be done if VBOX > 0
VBDS V 0.0 Drain-source breakdown voltage
Checking will be done if VBDS > 0
TMIN s 0.0 Ovcheck tmin value

For mos models the safe region is:

V gs < VBOX and V gd < VBOX and V ds < VBDS

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enter msg
VBOX

leave msg

Ovcheck: two terminal dummy model

A (dummy) two-terminal model ovcheck has been implemented that can be used to check if
the voltage between the two terminals is within or without a so called safe region.
The model parameters are:

Name Unit Default Description

VLOW V 0.0 Lower bound of safe region
VHIGH V 0.0 Upper bound of safe region
Checking will be done when VHIGH > VLOW
TMIN s 0.0 Ovcheck tmin value

For the ovcheck model the safe region is:

VLOW V t1 V t2 VHIGH , where t1 is the first and t2 is the second terminal.

Functionality

In Spectre and Pstar

At the end of a DC analysis or in a transient analysis after each time step a check wil be done
if the device is inside or outside the safe region.
A warning is given whenever the device enters or leaves the safe region.

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In Spectre only
To prevent too many warnings in a Spectre transient analysis the model parameter TMIN has
been introduced. If the time between leaving and entering the safe region is less than the
TMIN value no warning is given.
Because of the TMIN parameter a warning cannot be issued when leaving the safe region. A
warning is given when the device enters the safe region again. This warning includes the time
and the voltage when the safe region was exited.At the end of the transient warnings are
given for devices that are still out of the safe range.
In Pstar TMIN may be specified as a model parameter, but it will be ignored.

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D Parameter PARAMCHK

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Parameter PARAMCHK
Introduction
All models have the parameter PARAMCHK. It is not related to the model behavior, but has
been introduced control the clip warning messages. Various situations may call for various
levels of warnings. This is made possible by setting this parameter.

PARAMCHK model parameter

This model parameter has been added to control the amount of clip warnings.

PARAMCHK < 0 No clip warnings

PARAMCHK 0 Clip warnings for instance parameters (default)

PARAMCHK 1 Clip warnings for model parameters

PARAMCHK 2 Clip warnings for electrical parameters at initialisation

PARAMCHK 3 Clip warnings for electrical parameters during evaluation.

This highest level is of interest only for selfheating jobs,
where electrical parameters may change dependent on
temperature.

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E Bibliography

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Bibliography April 2008

[1] Sze, S.M., Physics of semiconductor devices, 2nd edition, John Wiley & Sons,
Inc., New York, 1981
[2] Muller, R.S. and Kamins, T.I., Device electronics for integrated circuits, 2nd
edition, John Wiley & Sons, Inc., New York, 1986
[3] Ong D.G., Modern MOS Technology: Processes, Devices and Design, McGraw-
Hill Book Company, 1984
[4] Tsividis Y.P., Operation and modelling of the MOS Transistor, McGraw-Hill
Book Company, 1987
[5] Paolo Antognetti, Giuseppe Massobrio, Semiconductor Device Modeling with
SPICE, McGraw-Hill, 1988.
[6] Dileep A. Divekar, FET Modeling for Circuit Simulation, Kluwer Academic
Publishers, 1988
[7] Laurence W. Nagel, Spice2: A computer program to simulate semiconductor
circuits, University of California, Berkeley, 1975
[8] PSpice manual, MicroSim Corporation, January 1989
[9] Pstar User Manual.
[10] J.J.A. Hegge, Model Specification of MOS level 1 Spice model (Metal Oxide
Semiconductor Transistor), version 2, January 1991.
[11] Andrei Vladimirescu, Sally Liu, The simulation of MOS integrated circuits
using SPICE2, Univ. of Cal. Berkeley, 1980
[12] N. Vossenstijn, G.J. Mulder, Model specification of a Junction Field Effect
Transistor, CFT-CAD-E, 1990
[13] Y. Tsividis, G. Masetti, Problems in precision of the MOS transistor for analog
applications, IEE trans. CAD, 1983
[14] K.A. Sakallah, Yao-Tsung Yen, S. Greenberg, The Meyer model revisited:
explaining and correcting the charge nonconservation problem, Proceedings IEEE
ICCAD, 1987
[15] P.B.L. Meijer, Meijer model for Meyer model
[16] SPICE version 2G6 source code, Dep. Elec. Eng. and Comput. Sci., Univ. of
California Berkeley, March 15, 1983.

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[17] Klaassen, F.M., Compact models for circuit simulation, Springer, Vienna,
chapter 7: Models for the enhancement - type MOSFET (1989)
[18] Klaassen, F.M., Compact models for circuit simulation, Springer, Vienna,
chapter 6: MOSFET - physics (1989)
[19] Wright, G.T., Physical and CAD models for the VLSI mosfet, IEEE Trans. on
Electron Devices, vol ED-34, page 823 (1987)
[20] Oh, S.Y., Ward D.E. and Dutton R.W., Transient analysis of MOS transistors/,
IEEE Journal Solid-State Circuits, Vol. SC-15, page 636 (1980)
[21] Sevat, M.F., On the channel charge division in MOSFET modeling, Digest
technical papers ICCAD-87, Santa Clara CA, page 208 (1987)
[22] Ir. C. Kortekaas, Description and users guide of the MOS interconnect capaci-
tance extractor; MICE 2.0/, Nat. Lab Technical note 1988
[23] Ir. C. Kortekaas, Junction capacitance- and current description for simulator
models/, Nat. Lab. Technical Note 1988
[24] H. Elzinga, Extending INTCAP/LOCAL with lateral capacitances between
non-overlapping PS-INS, IN-PS and INS-IN layers, RNR-46/92-IX-044, 17-09-1992
[25] Bittel und Sturm, Rauschen, Springer, page 241, (1971)
[26] Ir. A. v. Steenwijk, Private communication, (1994)
[27] R.M.D.A. Velghe and D.B.M. Klaassen, First official parameter set for MOS
Model 9.02 for the C150DM2 process, Nat. Lab. Report 6689
[28] A.J. Scholten and D.B.M. Klaassen, Geometrical scaling of 1 in MOS Model
9, Nat. Lab. Report 6992
[29] A.J. Scholten and D.B.M. Klaassen, Anomalous geometry dependence of
source/drain resistance in narrow-width MOSFETs, Proc. IEEE 1998 Int. Confer-
ence on Microelectronic Test Structures Vol. II, March 1998
[30] Kwok K. Hung et al., IEEE Trans El. Dev. Vol. 37, No. 3, March 1990
[31] Kwok K. Hung et al., IEEE Trans El. Dev. Vol. 37, No. 5, May 1990
[32] A.J. Scholten and D.B.M. Klaassen, New 1/f noise model in MOS Model 9,
level 903, Nat.Lab Unclassified Report, NL-UR 816/98
[33] R. van Langevelde, MOS Model 11, Level 1100 NL-UR 2001/813, 2001.

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internet: http://www.semiconductors.philips.com/Philips_Models.
[34] R. van Langevelde, A.J. Scholten and D.B.M. Klaassen, MOS Model 11, Level
1101 NL-UR 2002/802, 2002.
internet: http://www.semiconductors.philips.com/Philips_Models.
[35] R. van Langevelde, A Compact MOSFET Model for Distortion Analysis in
Analog Circuit Design, PhD Thesis, TU Eindhoven, Eindhoven 1998.
Available on request. Write to: Ronald.van.Langevelde@philips.com
[36] R. van Langevelde and F.M. Klaassen, An Explicit Surface-Potential Based
MOSFET Model for Circuit Simulation, Solid-State Electron., Vol. 44, pp. 409-418,
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