Experiment 5

Assembler Directives and Memory Ac-

cess Instructions

Lab Objective

1. Study different assembler directives

2. Load and store instructions to transfer data items between ARM registers and memory

Assembler Directives

Every program to be executed by a computer is a sequence of statements that can be read by

the humans. An assembler must differentiate between the statements that will be converted
into executable code and that instruct the assembler to perform some specific function.

Assembler directives are commands to the assembler that direct the assembly process. Assem-
bler directives are also called pseudo opcodes or pseudo-operations. They are executed by the
assembler at assembly time not by the processor at run time. Machine code is not generated
for assembler directives as they are not directly translated to machine language. Some tasks
performed by these directives are:

1. Assign the program to certain areas in memory.

2. Define symbols.
3. Designate areas of memory for data storage.
4. Place tables or other fixed data in memory.
5. Allow references to other programs.

ARM assembler supports a large number of assembler directives but in this lab manual we will
discuss only some important directives which are required for this lab.

AREA Directive

AREA directive allows the programmer to specify the memory location to store code and data.
Depending on the memory configuration of your device, code and data can reside in different
areas of memory. A name must be specified for an area directive. There are several optional

40
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comma delimited attributes that can be used with AREA directive. Some of them are disscussed
below.

Attribute Explanation
CODE Contains machine instructions. READONLY is the default.
DATA Contains data, not instructions. READWRITE is the de-
fault.
READONLY Indicates that this area should not be written to.
READWRITE Indicates that this area may be read from or written to.
NOINIT Indicates that the data area is initialized to zero. It contains
only reservation directives with no initialized values.

AREA Example , CODE, READONLY ; An example code s e c t i o n .

; u s e r code

ENTRY and END Directives

The first instruction to be executed within an application is marked by the ENTRY directive.
Entry point must be specified for every assembly language program. An application can contain
only a single entry point and so in a multi-source module application, only a single module will
contain an ENTRY directive.

This directive causes the assembler to stop processing the current source file. Every assembly
language source module must therefore finish with this directive.
AREA MyCode , CODE, READONLY
ENTRY ; Entry p o i n t f o r t h e a p p l i c a t i o n

Start

; u s e r code

END ; I n f o r m s t h e a s s e m b l e r about t h e end o f a s o u r c e f i l e

EXPORT and IMPORT Directives

A project may contain multiple source files. You may need to use a symbol in a source file that
is defined in another source file. In order for a symbol to be found by a different program file,
we need to declare that symbol name as a global variable. The EXPORT directive declares a
symbol that can be used in different program files. GLOBAL is a synonym for EXPORT.

The IMPORT directive provides the assembler with a name that is not defined in the current
assembly.
AREA Example , CODE, READONLY
IMPORT User Code ; Import t h e f u n c t i o n name from
; other source f i l e .
EXPORT DoAdd ; Export t h e f u n c t i o n name
42 CHAPTER 5. ASSEMBLER DIRECTIVES AND MEMORY ACCESS INSTRUCTIONS

; t o be used by e x t e r n a l
; modules .
DoAdd ADD R0 , R0 , R1

ARM, THUMB Directives

The ARM directive instructs the assembler to interpret subsequent instructions as 32-bit ARM
instructions. If necessary, it also inserts up to three bytes of padding to align to the next word
boundary. The ARM directive and the CODE32 directive are synonyms.

The THUMB directive instructs the assembler to interpret subsequent instructions as 16-bit
Thumb instructions. If necessary, it also inserts a byte of padding to align to the next halfword
boundary.

In files that contain a mixture of ARM and Thumb code Use THUMB when changing from ARM
state to Thumb state. THUMB must precede any Thumb code. Use ARM when changing from
Thumb state to ARM state. ARM must precede any ARM code.
AREA ChangeState , CODE, READONLY
ARM
; This s e c t i o n s t a r t s i n ARM s t a t e
LDR r0 ,= s t a r t +1 ; Load t h e a d d r e s s and s e t t h e
; least significant bit
BX r0 ; Branch and exchange i n s t r u c t i o n s e t s

; Not n e c e s s a r i l y i n same s e c t i o n
THUMB ; F o l l o w i n g i n s t r u c t i o n s a r e Thumb
start MOV r1 ,#10 ; Thumb i n s t r u c t i o n s

ALIGN Directive

Use of ALIGN ensures that your code is correctly aligned. By default, the ALIGN directive
aligns the current location within the code to a word (4-byte) boundary. ALIGN 2 can also be
used to align on a halfword (2-byte) boundary in Thumb code. As a general rule it is safer to
use ALIGN frequently through your code.

PRESERVE8 Directive

The PRESERVE8 directive specifies that the current file preserves 8-byte alignment of the stack.
LDRD and STRD instructions (double-word transfers) only work correctly if the address they
access is 8-byte aligned. If your code preserves 8-byte alignment of the stack, use PRESERVE8
to inform the linker. The linker ensures that any code that requires 8-byte alignment of the stack
is only called, directly or indirectly, by code that preserves 8-byte alignment of the stack.
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Data Reservation Directives (DCB, DCD, DCW)

ARM assembler supports different data definition directives to insert constants in assembly
code. This directive allows the programmer to enter fixed data into the program memory and
treats that data as a permanent part of the program. Different variants of these directives
are:

1. DCB (Define Constant Byte) to define constants of byte size.

2. DCW (Define Constant Word) allocates one or more halfwords of memory, aligned on
two-byte boundaries.
3. DCD (Define Constant Data) allocates one or more words of memory, aligned on four-byte
boundaries.
data DCD 0, 0, 0 ; D e f i n e s 3 words i n i t i a l i z e d t o z e r o s

SPACE Directive

The SPACE directive reserves a zeroed block of memory. ALIGN directive must be used to
align any code following a SPACE directive.
AREA MyData , DATA, READWRITE
data1 SPACE 255 ; d e f i n e s 255 b y t e s o f z e r o e d s t o r e

Memory Access Instructions

ARM is a load/store architecture. It does not support memory to memory data processing
operations. All data processing operations are executed in the registers i.e., data values needed
for an operation must be moved into registers before using them. We need instructions that
interact with memory to move data from memory to registers and vice versa. ARM has three
sets of instructions which interact with main memory.

1. Single register data transfer (LDR/STR)

2. Block data transfer (LDM/STM)
3. Single Data Swap (SWP)

In this lab manual we will discuss only single register data transfer and also different addressing
modes that that can be used to move the contents from memory to registers and vice versa.

Single Register Data Transfer

The basic data transfer instructions supported by ARM assembler can load and store different
size of data from and to the memory respectively.
44 CHAPTER 5. ASSEMBLER DIRECTIVES AND MEMORY ACCESS INSTRUCTIONS

THUMB ; Marks t h e THUMB mode o f o p e r a t i o n

; Data V a r i a b l e s a r e d e c l a r e d i n DATA AREA ;

AREA MyData , DATA, READWRITE

X SPACE 2 ; 2 bytes f o r variable X are reserved in

; memory a t 0 x20000000
data SPACE 2 ; 2 b y t e s f o r v a r i a b l e data i s d e c l a r e d
; i n memory

; The u s e r code ( program ) i s p l a c e d i n CODE AREA ;

AREA | . t e x t | , CODE, READONLY, ALIGN=2

ENTRY ; ENTRY marks t h e s t a r t i n g p o i n t o f

; t h e code e x e c u t i o n

EXPORT main

main
; User code s t a r t s from t h e next l i n e ;

MOV R0 , #0x2D
MOV R1 , #0x40

LDR R2 , =data ; Load t h e a d d r e s s o f data v a r i a b l e i n R2

ADD R0 , R0 , R1
STR R0 , [ R2 ] ; S t o r e t h e c o n t e n t s o f R0 t o t h e
; a d d r e s s l o a d e d i n R2
STOP
B STOP ; I n f i n i t e l o o p t o STOP

ALIGN

END ; End o f t h e program , matched with ENTRY keyword

LDR instruction can also be used to load any constant in the registers. It can construct any
32-bit numeric constant in a single instruction. It can be used to generate constants that are
out of range of the MOV and MVN instructions.

THUMB ; Marks t h e THUMB mode o f o p e r a t i o n

; Data V a r i a b l e s a r e d e c l a r e d i n DATA AREA

AREA MyData , DATA, READWRITE

Result SPACE 4 ; 4 bytes reserved f o r variable Result

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; The u s e r code ( program ) i s p l a c e d i n CODE AREA ;

AREA | . t e x t | , CODE, READONLY, ALIGN=2

ENTRY ; ENTRY marks t h e s t a r t i n g p o i n t o f

; t h e code e x e c u t i o n

EXPORT main

main
; User code s t a r t s from t h e next l i n e ;

LDR R1 , =0x458C3 ; Loads t h e v a l u e 0 x458C3 i n R1

; which i s out o f r a n g e o f MOV i n s t r u c t i o n
LDR R2 , =0xA8261
LDR R4 , =R e s u l t ; Load t h e a d d r e s s o f v a r i a b l e
; r e s u l t i n R4

MOV R0 , #0

MUL R3 , R1 , R2
LSRS R3 , #9 ; L o g i c a l s h i f t r i g h t with f l a g s update
STR R3 , [ R4 ] ; S t o r e t h e c o n t e n t s o f R3 t o memory
; a d d r e s s a l r e a d y l o a d e d i n R4

STOP
B STOP
END

These instructions provide the most flexible way to transfer single data items between an ARM
register and memory. The data item may be a byte, a 16-bit half-word, a 32-bit word or a
64-bit double word. An optional modifier should be added to access the appropriate data type.
Following table shows the data types available and their ranges.

type Data Type Range

32-bit word 0 to 232 1 or 231 to 231 1
B unsigned Byte 0 to 28 1
SB Signed Byte 27 to 27 1
H unsigned Halfword 0 to 216 1
SH Signed Halfword 215 to 215 1
D Double word 0 to 264 1 (two registers used)

In the following example Byte data type is used

THUMB ; Marks t h e THUMB mode o f o p e r a t i o n

; Data V a r i a b l e s a r e d e c l a r e d i n DATA AREA ;

AREA MyData , DATA, READWRITE

High DCB 0 ; 1 byte r e s e r v e d f o r v a r i a b l e High

46 CHAPTER 5. ASSEMBLER DIRECTIVES AND MEMORY ACCESS INSTRUCTIONS

Low DCB 0 ; 1 byte r e s e r v e d f o r v a r i a b l e Low

R e s u l t DCB 0 ; 1 byte r e s e r v e d f o r v a r i a b l e R e s u l t
R e s u l t 1 DCD 0 ; 4 bytes reserved f o r v a r i a b l e Result1

; The u s e r code ( program ) i s p l a c e d i n CODE AREA ;

AREA | . t e x t | , CODE, READONLY, ALIGN=2

ENTRY ; ENTRY marks t h e s t a r t i n g p o i n t o f

; t h e code e x e c u t i o n

EXPORT main

main
; User code s t a r t s from t h e next l i n e ;

LDR R0 , =High
LDR R1 , =Low
LDR R2 , =R e s u l t
LDR R5 , =R e s u l t 1

MOV R3 , #0x5
MOV R4 , #0x8

LSL R3 , #4 ; S h i f t t h e l o w e r n i b b l e t o upper n i b b l e o f t h e l e a s t
; s i g n i f i c a n t byte
STRB R3 , [ R0 ]
STRB R4 , [ R1 ]

ORR R3 , R3 , R4 ; S e t l o w e r f b i t s o f R3 e q u a l t o l o w e r f o u r b i t s o f R4
STRB R3 , [ R2 ]
STR R3 , [ R5 ] ; Takes 32 b i t s t o s t o r e t h e r e s u l t

ALIGN

STOP
B STOP
END

Now, in the following example we will consider different addressing modes we can use to access
the memory using load and store instructions.

THUMB ; Marks t h e THUMB mode o f o p e r a t i o n

; Data V a r i a b l e s a r e d e c l a r e d i n DATA AREA ;

AREA MyData , DATA, READWRITE

data SPACE 4 ; 4 b y t e s r e s e r v e d f o r v a r i a b l e data

; The u s e r code ( program ) i s p l a c e d i n CODE AREA ;

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AREA | . t e x t | , CODE, READONLY, ALIGN=2

ENTRY ; ENTRY marks t h e s t a r t i n g p o i n t o f

; t h e code e x e c u t i o n

EXPORT main

main
; User code s t a r t s from t h e next l i n e ;

MOV R0 , #0x4A8
MOV R1 , #0x761
MOV R4 , #0x8D
MOV R3 , #0x0C

SUB R1 , R1 , R0

; O f f s e t Addressing

LDR R2 , =data ; Load t h e a d d r e s s o f data i n R2

STR R1 , [ R2 ] ; S t o r e t h e 32 b i t c o n t e n t s o f R1 r e g i s t e r a t
; t h e a d d r e s s l o a d e d i n R2 . The c o n t e n t s o f
; R1 d o e s not change

STR R1 , [ R2 , #4] ; A word i n r e g i s t e r R1 i s s t o r e d a t memory

; a d d r e s s c a l c u l a t e d by adding t h e o f f s e t t o
; R2 . The c o n t e n t s o f R2 d o e s not change

STR R1 , [ R2 , R3 ] ; S t o r e t h e c o n t e n t s o f R1 a t memory a d d r e s s
; c a l c u l a t e d by adding v a l u e i n t h e b a s e
; r e g i s t e r R2 t o t h e v a l u e i n t h e r e g i s t e r R3 .
; Both R2 and R3 remain unchanged .

STR R1 , [ R2 , R3 , LSL #2] ; S t o r e t h e 32 b i t v a l u e i n R1 t o t h e memory

; a d d r e s s c a l c u l a t e d by adding t h e a d d r e s s i n
; b a s e r e g i s t e r R2 t o t h e v a l u e o b t a i n e d by
; s h i f t i n g t h e c o n t e n t s o f R3 towards l e f t
; by 2 b i t s . R2 and R3 remain unchanged .

; Posti n d e x A d d r e s s i n g

LDR R2 , =data ; Load t h e a d d r e s s o f data i n R2

STR R1 , [ R2 ] , #12 ; Contents o f R1 w i l l be s t o r e d i n memory a t
; t h e a d d r e s s l o a d e d i n R2 . R1 i s updated with
; new a d d r e s s a f t e r adding t h e c o n s t a n t ,
; s p e c i f i e d , to i t .

STR R4 , [ R2 ] , #24

; Prei n d e x A d d r e s s i n g
48 CHAPTER 5. ASSEMBLER DIRECTIVES AND MEMORY ACCESS INSTRUCTIONS

LDR R2 , =data ; Load t h e a d d r e s s o f data i n R2

STR R1 , [ R2 , # 3 2 ] ! ; 32 b i t word i n R1 w i l l be s t o r e d i n memory

; a t an a d d r e s s c a l c u l a t e d by adding 16 t o t h e
; a d d r e s s l o a d e d i n R2 . The c o n t e n t s o f R2
; a l s o g e t updated with t h i s new a d d r e s s

STOP
B STOP
END