Practical Instruction Manual CS234 Digital Systems Lab

Verification of De Morgans law

EXP NO. 2 Date:__/__/____
for two Variables

OBJECTIVE
To verify the De Morgans Law for two variables 1. A + B= A . B 2. A . B=A + B
COMPONENTS & EQUIPMENTS REQUIRED

Digital IC Trainer Kit, ICs-7400, 7408, 7404, 7402, 7432,

THEORY

De Morgans law states that the complement of sum of two variables is equal to the product of
their individual complements

Law 1 for two variable: A + B= A . B

De Morgans law also states that the complement of product of two variables is equal to the
sum of their individual complements

Law 2 for two variable: A . B=A + B

To verify Law 1 we implement the logic circuit for Y 1=A + B , Y 2= A . B and check
whether the outputs are same.

To verify Law 2 we implement the logic circuit for Y 1= A . B , Y 2= A+ B and check

whether the outputs are same.

CIRCUIT DIAGRAMS

Circuit diagram for verifying Law 1 Circuit diagram for verifying Law 2

MES College of Engineering & Technology, Dept. of Electronics &

Kunnukara, Ernakulam Communication Engineering
Practical Instruction Manual CS234 Digital Systems Lab

PROCEDURE

a) Check the ICs using Digital IC Tester and place the ICs on Digital IC Trainer Kit.

b) Connect VCC and Ground to respective pins of IC Trainer Kit.

c) Set up the circuits as shown above

d) Connect the inputs to the input switches provided in the IC Trainer Kit.

e) Check the conditions of output LEDs and connect the outputs to the terminals of Output
LEDs.

f) Apply various combinations of inputs according to the truth table and observe condition
of LEDs.

EXPECTED OUPUTS & OBSERVATIONS

Expected Outputs & Observations of Circuit diagram for verifying Law 1

Inputs Expected Output Observations

A B Y 1=A + B Y 2= A . B Y1 Y2
0 0 1 1
0 1 0 0
1 0 0 0
1 1 0 0

Expected Outputs & Observations of Circuit diagram for verifying Law 2

Inputs Expected Output Observations

A B Y 1= A . B Y 2= A+ B Y1 Y2
0 0 1 1
0 1 1 1
1 0 1 1
1 1 0 0

RESULTS AND DISCUSSIONS

DeMorgans Laws for two variables were verified by using the circuit set up by logic gates.

MES College of Engineering & Technology, Dept. of Electronics &

Kunnukara, Ernakulam Communication Engineering