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5 4 3 2 1 L4 NC/FB0805 STB12V D12 L35 2 1 +12V 2 3
5
4
3
2
1
L4
NC/FB0805
STB12V
D12
L35
2
1
+12V
2
3
L28
MIC12V
MIC12V
FB0805
C96
10U/1A_SMD
C95
Q3
15.7mA-19mA
RS1K_SMD
8550
100UF/25V
100UF/25V
R10
10K
R9
BR1
P+5V
GB206
1K/0805
R7
10K
FB7
FB
R8
STANDBY
1
2
1
STBY
STBY
D
D
4K7
Q2
C1
3904
101
L2
EEL19
1mH/0.05A/6X8
T2
1
12
D15
L30
+
EC1
EC3
+
5V
+5V
10uF/400V
R163
C99
2
1
L36
1206
P+5V
P+5V
10uF/400V
C87
10UH/2A
BC11
C39
BC6
100K/0.5W
222/1KV
0.8A-1.3A
SR360
2
1
1000UF/16V
0.1UF
470UF/16V
L6
NC/FB0805
0.1UF
GND
2
11
4.7U/1A_0805
L3
GND
D16
3
2
A+5V
USB/DIGI AUDIO/RGBCVBS/IR
Q4
RS1K_SMD
8050/DIP
R11
STB12V
3
1K/0805
R3
100R/0805
10
F+
F+
AC:200mA-1.4mA
4
DC:140mA-93mA
R4
U10
20
TNY-275PN
9
GND
R154
8
+
5
0R/0.5W/1206
C
C
EC4
C97
C106
10uF/25V
R20
F2
100UF/35V
0.1UF
STB-25V
T2AL/250V
1K
R21
Q7
D13
10K
7
3
2
F-
F-
BT8550
C98
AC:200mA-1.4mA
RS1K_SMD
R152
100UF/35V
Z2
DC:140mA-93mA
2K
L8
NC/FB0805
7.5V/1W_SMD
510R/0805
D14
CON2
L5
L7
NC/FB0805
R22
L1
6
2
1
STB-25V
ON/OFF Button(SW)
-12V
P-12V
C109
P-12V
C101
10UH/1A_SMD
C102
C94
FB0805
RS1K_SMD
0.1UF
Z1
11mA-19mA
R23
100UF/50V
100UF/50V
100UF/25V
12V/1W_SMD
10K
Q5
2
3
5551
Q6
5401
R19
3
2
10K
CON1
R13
~AC100-240V INPUT VOLTAGE
STB12V
10K
R18
100K
B
B
U12 PC817
R5
4
1
100
R150
5V
4
1
680R
+5V
3
2
3
2
R153
R79
R6
1K
4.7K
100K
C104
R151
1K
0.1UF
IC1
1
TL431
Ajacent to relevant component demoting specific
R149
Y1
component shall be replaced only by the
4.7K
specitied in the circuit for safety reasons
component
222/400V
Note:Damage rquring service,unplug this produce
from the wall oulet and refer servicing
to qualifled service presonal when
A
A
replacement parts are required sure
the service
technician has used replacement parts specified
by the manufactruer or have the same
characteristics,as the original
parts Unauthorized substitution may result in
fire,electric shock or other hazards
upon
Design:
MODEL: DV5312
TITLE:
AC TO DC
completion of any service or repairs this
product,Ask the service thechnician to perform
safety check to determinw that product is in
proper operatin condition
Checked:
PART NO.:
DWG NO.:DV5312-YL01-03
Apprd:
SHEET:
1 OF
5
VER: A
EMC PART
SHEN ZHEN MTC MULTIMEDIA CO.,LTD
5
4
3
2
1
1
1
2
3
2
3
1
2
1
2
1
2
1
2
4
4
7
1
S
EN
6
2
S
BP
5
S
34
DS
2
3
1
1
1
2
3
1
1
5 4 3 2 1 CVBS_C CVBS CVBS_C P+12V P+12V FS1: H=RGB L=CVBS C148 J1
5
4
3
2
1
CVBS_C
CVBS
CVBS_C
P+12V
P+12V
FS1: H=RGB L=CVBS
C148
J1
150pF
AUDIO 6CH
R207
FS2 FS3
SCART CFG
1K2
00
4:3
TP7
1
LMAIN-OUT
01
TV
16:9/TV
R248
CON12
R247
Cr/YC-Y_OUT
TP80
10
16:9
Y_R_V
Cr/YC-Y
Cr/YC-Y_OUT
CVBS
7
1
Y_R_V
YUV-Y
TP79
R202
D
D
2
Cb/YC-C_OUT
TP78
C132
0R
TP8
1K5
3
NC
RGB/CVBS
TP77
150pF
2
RMAIN-OUT
4
CVBS
TP76
5
16:9/TV
TP75
R1
6
TP83
22
7
LMAIN-OUT
1
Q24
8
LMAIN-OUT
FS2
RMAIN-OUT
BT3904
TP9
9
RMAIN-OUT
3
SL-OUT
9PIN/2.0
P+5V
CVBS_G_Y
YUV-Y
CVBS_G_Y
TP73
TP72
C143
8
150pF
1
Q1
R176
TP13
FS3
BT3904
75R
4
SR-OUT
R249
R250
1
Q23
C_B_U
Cb/YC-C
Cb/YC-C_OUT
LMAIN-OUT
TP14
FS1
C_B_U
BT3904
5
CEN-OUT
NC
C138
0R
RGB/CVBS
150pF
9
TP12
TP11
R234
TP19
TP10
6
LFE-OUT
4K7
TP17
TP67
P+5V
TP48
Y_C_CVBS
TP49
SCART config circuit
TP50
C174
TP47
150pF
C
C
R230
R229
R204
R239
10K
10K
10K
2.2K
CON3
-25V
1
-25V
F+
2
F-
F-
3
F+
4
J3
AV4
P+5V
5
P+5V
DATA
6
R205
75R
FPC_DOUT
CLK
7
R201
75R
FPC_CLK
8
STB
R192
75R
Cr/YC-Y_OUT
1
FPC_STB
TP3
IRRCV
9
IRRCV
9PIN/2.0
C158
C193
C194
C195
J2
101
101
101
101
COAX_SPDIF
2
TP4
5
7
CVBS
TP20
Cr/YC-Y
2
1
Cb/YC-C
TP22
YUV-Y
3
TP23
TP5
4
3
6
Cb/YC-C_OUT
4
TP6
SVIDEO&CVBS
B
B
TP81
TP82
D5V
R210
C121
CON13
S/PDIF_OUT
1
Q22
0.1uF
S/PDIF_OUT
Close to Q22
R217
OPTICAL_SPDIF
1
BT3904
56R
P+5V
D5V
2
3
2R/0805
3PIN/2.0
R164
33R
R214
27R
C153
R155
COAX_SPDIF
56R
0.1uF
R14
C152
22R
A
22pF
A
Design:
MODEL: DV5312
TITLE:
JACK+VIDEO+SCART
Checked:
PART NO.:
DWG NO.:DV5312-YL01-03
Apprd:
SHEET:
5 OF
5
VER: A
SHEN ZHEN MTC MULTIMEDIA CO.,LTD
5
4
3
2
1
2
3
2
3
2
3
8
9
2
3
5
6
5 4 3 2 1 TP1 TP18 TP2 TP71 TP70 CON10 MIC12V 1 MIC12V 2
5
4
3
2
1
TP1
TP18
TP2
TP71
TP70
CON10
MIC12V
1
MIC12V
2
D
MIC1
D
3
R254
47K
4
MIC2
5
5P/2.0
R220
43K
R218
2.2K
MIC1
R262
R311
0R
LRIN
C128
160pF
APWM_L-
2K7
C163
-12VA
1.5nF
U7A
MIC2
R263
2
LM4558
2K7
R221
43K
1
R199
1K
LMAIN-OUT
LMAIN-OUT
R271
D1
D2
3
APWM_L+
R272
NC/4148
NC/1K
NC/4148
+12VA
R186
0R/NC
R252
R251
MUTE
1
Q27
C131
47K
10K
BT3904
1nF
2K2
DSPVCC33
R257
47K
R273
R243
43K
R242
2.2K
NC/1K
C123
160pF
APWM_R-
MIC_VOCAL
R12
MIC_VOCAL
NC/0R
C192
-12VA
U7B
1.5nF
LM4558
6
R219
43K
7
R231
1K
RMAIN-OUT
RMAIN-OUT
R274
5
APWM_R+
1K/NC
+12VA
R232
R198
R255
10K
MUTE
1
Q25
C124
47K
BT3904
1nF
2K2
C
C
R290
47K
DSPVCC33
R285
43K
R281
2.2K
ADCVCC33
C216
160pF
APWM_SL-
-12VA
R269
R309
NC/10K
C219
U8A
U11
NC/0R
1.5nF
2
LM4558
R280 1k
1
14
R286
43K
1
SL-OUT
DVDD
DGND
AIN
2
13
AMCLK
3
AIN
AMCLK
APWM_SL+
SDOUT
MCLK
ABCLK
3
12
ALRCLK
ABCLK
ALRCLK
BCLK
LRCLK
R282 2K2
4
11
+12VA
R292
MUTE
1
Q32
C217
FMT
NOHP
5
10
R310
DSPVCC33
FB6
FB
ADCVCC33
R288
10K
BT3904
1nF
CAP
AGND
6
9
ADCVCC33
0R
47K
VREF
AVDD
+12VA
7
8
LRIN
R260
33R
P+12V
P+12V
RIN
LIN
+ C211
C212
+ C208
+ C209
CE2632
C198
C229
C228
+
C206
100U/16V
104
C200
104
10U/16V
10u/16V
0.1uF
0.1uF
0.1uF
47uF/16V
R289
47K
R284
43K
R278
C214
160pF
APWM_SR-
2.2K
-12VA
R261
33R
P-12V
P-12V
-12VA
C278
U8B
1.5nF
6
LM4558
C184
C226
C227
+
R277 1k
R283
43K
7
C201
SR-OUT
5
0.1uF
0.1uF
0.1uF
47uF/16V
APWM_SR+
R279 2K2
MUTE
1
+12VA
R291
Q31
R287
BT3904
10K
47K
C215
1nF
R253
4.7K
R43
3.3K
1
Q28
+
B
MUTE_CTL
BT3904
C197
B
MUTE_CTL
10uF/16V
P-12V
P-12V
AMUTE or MUTE_CTL:
R306
47K
Hi:
Mute.
+12V
D5V
D23
LL4148
R301
43K
R297
2.2K
1
2
2
3
C222
160pF
APWM_CEN-
-12VA
R182
100K
Q29
R159
C225
BT8550
100K
1.5nF
U9A
R200
10K
2
LM4558
R296 1K
R302
43K
1
CEN-OUT
Q20
BT8550
3
APWM_CEN+
2
3
MUTE
R298
+12VA
R308
MUTE
1
Q34
R304
10K
BT3904
C223
C231
47K
2K2
1nF
R258
100uF/16V
R256
D22
47K
R259
100K
LL4148
2K
R305
47K
C196
R300
43K
R294
2.2K
47uF/25V
C220
160pF
APWM_LFE-
C224
-12VA
1.5nF
6
U9B
R299
43K
7
LM4558
LFE-OUT
5
APWM_LFE+
R293
R295
+12VA
1K
MUTE
1
Q33
R303
R307
BT3904
C221
47K
10K
2K2
1nF
A
A
Design:
MODEL: DV5312
TITLE:
AUDIO+KARAOKE
Checked:
PART NO.:
DWG NO.:DV5312-YL01-03
Apprd:
SHEET:
4 OF
5
VER: A
SHEN ZHEN MTC MULTIMEDIA CO.,LTD
5
4
3
2
1
+
-
1
2
2
3
+
-
1
1
+
-
12
1
2
+
-
+
-
8
4
8
4
8
4
8
4
8
4
8
4
+
-
2
3
2
3
2
3
2
3
2
3
2
3
5 4 3 2 1 DSPVCC33 R175 + C179 4.7R 100uF/16V Q26 1 R181 220R
5
4
3
2
1
DSPVCC33
R175
+
C179
4.7R
100uF/16V
Q26
1
R181
220R
LD_DVD
8550
OPU
HD65PS
Others
DSPVCC33
R175: 3.3R
4.7R
D
D
R189: 3.3R
4.7R
BEMF
OPU
HD65PS Others
R189
+
C178
Current Type(Default)
R221: 3.3R
4.7R
4.7R
100uF/16V
R224: 3.3R
4.7R
C136
C146
C141
C130
470P
R177
CN201 is used for Sanyo/Samsung/Sony OPUs
1nF
1nF
470P
SP_M-
SPDL_SENS-
SPDL_SENS-
R161=300R, for HOP1200W only
2K
Q21
1
R167
220R
LD_CD
8550
include arima , R161=0R
DVDLD
1
2
R161
DSPVCC33
CON14
OPU_HFM
R216
2R/0805
R222
P+5V
24Pin OPU connector
C134
1R
D24
4148
0R
CDLD
1nF
24
R202=300R, for HOP1200W only
VR_DVD
+ C230
1
2
GND-LD
23
DVDLD
VR_CD
220uF/16V
DVD-LD
22
D21
4148
NC
21
OPU_HFM
HFM
20
OPU5V
R168
MD
2.1V
19
CDLD
VC1
R15
33R
SP_MOT-
SPDL_SENS+
CD-LD
VC
SPDL_SENS+
18
VR_DVD
2K
VR-DVD
17
VR_CD
PDIC Control:
VR-CD
16
DVD=LOW
NC
15
RF_E
CD=HIGH
E
RFA5V
14
OPU5V
VCC
13
VC1
2.1V
VC(VREF)
12
P+5V
GND/PD
11
R317
PDIC Control:
RF_F
F
10
3.3K
DVD=LOW
RF_B
B
9
RF_A
CD=HIGH
A
8
RF
RF
7
CD_DVD
D18
CD/DVD_SW
CD_DVD
6
Q37
1N4002
RF_D
D
5
8550
1N4002
RF_C
C
4
TACT-
T-
D19
3
TACT+
1
T+
2
FACT+
C147
C166
1
2
F+
C
1
FACT-
0.1uF
0.1uF
+
C188
C
F-
47uF/16V
3V3_DRV
0R
1
Q36
1V8_DRV 0R
1
Q35
R223
8550
R226
8550
1
DSPVCC33
DSPVCC18
Q38
8550
R224
R227
20K 1%
4K3 1%
U5
Close to motor driver.
AM5888S
(value) is for AM5888s
3V3_FB
1.25V
1V8_FB
1.25V
FOCUS_S
28
CON9
1 VINFC
STBY
DRVSB
DSPVCC33
3V3_DRV
27
VC2
R225
R228
2 CFCERR1(TRB_1)
BIAS
24
TACT-
TP60
FOCUS_S
12K 1%
10K
TR-
FOCUS_S
23
TACT+
TP88
SLED_S
1V8_FB
26
TRACK_S
SLED_S
TR+
3 CFCERR2(REGO2)
VINTK
22
FACT-
TP59
TRACK_S
FO-
TRACK_S
21
FACT+
TP87
SPDL_S
SLED_S
25
1V8_DRV
R160
R165
FO+
SPDL_S
4 VINSL+
CTKERR1(TRB_2)
20
MD_DVD
TP58
1K 1%
33K
MD(DVD)
19
OPU_HFM
TP86
3V3_FB
24
VCC/NC
5 VINSL-(REGO1)
CTKERR2(NC)
18
VR_DVD
TP57
VR(DVD)
17
CLOSE
23
SPDL_S
GND(DVD)
CLOSE
6 VOSL(FWD)
VINLD
16
DVDLD
TP56
LD(DVD)
15
CDLD
TP85
OPEN
22
OPEN
LD(CD)
7 VNFFC(REV)
PREGND
14
VR_CD
TP55
R240
VR(CD)
P+5V
13
C129
1K 1%
GND(CD)
12
MD_CD
TP54
0.1uF
MD(CD)
11
R17
0R
CD_DVD
P+5V
21
NC/SEL
CD_DVD
8 VCC
PVCC2
10
RF
RF
V-RF
9
RF_C
LOAD-
20
RF_C
V-C
9 PVCC1(LOAD-)
VNFTK(NC)
8
RF_B
+
RF_B
V-B
7
RF_A
C175
C156
LOAD+
19
RF_A
V-A
10 PGND(LOAD+)
PGND(VCC2)
6
RF_D
220uF/16V
0.1uF
RF_D
V-D
5
RF_F
SL_MOT+
18
SP_M-
RF_F
V-F
11 VOSL-(VOSL+)
VOLD-
4
RF_E
RF_E
V-E
3
OPU5V
TP61
SL_MOT-
17
SP_MOT+
Vcc
12 VOSL+(VOSL-)
VOLD+
2
VC1
TP39
Vs
B
B
1
FACT-
13 16
TACT-
GND
VOFC-
VOTK-
FACT+
15
TACT+
14 VOFC+
VOTK+
24P/0.5
TP46
TP62
TP51
MD_DVD
TP63
TP52
MD_CD
TP64
R236
TP53
CON7
NC
TP84
R185
SL-
1
SL_MOT-
TP68
NC
SL+
2
SL_MOT+
TP69
HOMESW
3
HOMESW
TP27
VR_CD
R244
100R
GND
4
SP+
5
SP_MOT+
TP40
SP-
6
SP_MOT-
TP41
VR_DVD
R245
100R
6P 2.0: SLED & SPINDLE Con
R187
R235
100R
DSPVCC33
100R
CON8
5
LOAD+
TP42
LOAD+
4
LOAD-
TP44
LOAD-
3
OUTSW
2
TP65
R172
R162
R197
GND
1
4.7K
4.7K
4.7K
INSW
HOMESW
HOMESW
5p 2.0: TRAY_Con
IN_OUT_SW
IN_OUT_SW
INSW
INSW
TP66
A
A
Design:
Checked:
5
4
3
2
1
Apprd:
26
GND
25
GND
23
23
29
GND
30
GND1
23
23
12
23
23
5 4 3 2 1 Important power supply! Note: While using different OPU, use the
5
4
3
2
1
Important power supply!
Note: While using different OPU,
use the same parameter for
FB1
R206
51K
VDDPWM
DSPVCC33
AM5888S
FB
R213
51K
While using AM5888S
R209
22K
C133
+
C185
104
100uF/16V
R211
51K
Close to Vaddis!
FOCUS_S
R206
51K
FOCUS_S
TRACK_S
R213
51K
TRACK_S
FB5
SPDL_S
R209
22K
VDD1AFE
Crystal
SPDL_S
SLED_S
R211
51K
FB
FB3
SLED_S
VDDAFE
Use it to connect the shell of the crystal with ground.
DSPVCC33
FB
C164
C159
C161
C160
D
Flash speed <= 70 nS.
If plan to use 90ns Flash, it needs to be verified by s/w.
+
PH1
D
1
.
1nF
1nF
27nF
27nF
C155
C125
C186
10nF
104
100uF/16V
OSCOUT
C135
33pF
U2
MEMADD15
1
48
MEMADD16
C181
1nF
A15
A16
MEMADD14
2
47
FB4
A14
BYTE#
VCCQ
MEMADD13
3
46
C168
1nF
RF
VDDDAC
A13
GND
RF
DSPVCC33
MEMADD12
4
45
MEMDAT15
FB
A12
DQ15
MEMADD11
5
44
MEMDAT7
C142
A11
DQ7
MEMADD10
6
43
MEMDAT14
+
C187
R158
33pF
A10
DQ14
MEMADD9
7
42
MEMDAT6
C127
1M
100uF/16V
A9
DQ6
MEMADD8
8
41
MEMDAT13
104
Y4
A8
DQ13
MEMADD19
R195
0R
9
40
MEMDAT5
Close to Vaddis!
27.000MHz
NC
A19
DQ5
10
39
MEMDAT12
A20
DQ12
TP181
TP182
MEMWR#
11
38
MEMDAT4
FB2
FB
WE#
DQ4
RESET#
12
37
FLASHVCC
VDDPLL
OSCIN
C137
33pF
FLASHVCC
RP#
VCC
DSPVCC18
FLASHVCC
13
36
MEMDAT11
DSPVCC18
VPP
NC
DQ11
14
35
MEMDAT3
C150
C183
+
C180
WP#
NC
DQ3
R194
NC
15
34
MEMDAT10
104
104
100uF/16V
Close to Vaddis!
DSPVCC33
A19
RY/BY#
DQ10
MEMADD18
16
33
MEMDAT2
A18
DQ2
MEMADD17
17
32
MEMDAT9
A17
DQ9
MEMADD7
18
31
MEMDAT1
A7
DQ1
MEMADD6
19
30
MEMDAT8
Close to Pin37 of U15
A6
DQ8
MEMADD5
20
29
MEMDAT0
U1A
A5
DQ0
MEMADD4
21
28
MEMRD#
A4
OE#
MEMADD3
22
27
A3
GND
DSPVCC33
MEMADD2
23
26
MEMCS0#
A2
CE#
MEMADD1
24
25
MEMADD0
A1
A0
SST39VF800
R16
390 Ohm 1%
MEMDAT2
1
156
Close to
MEMDAT[2]
GNDDACBS2
[39VF400/800/160]
MEMDAT10
2
155
MEMDAT[10]/GPIO[0]
RSET
Vaddis
R241
Flash select
R195
R194
MEMDAT3
3
154
C_B_U
MEMDAT[3]
DAC1
C_B_U
D20
4k7
DSPVCC33
R188
0R
FLASHVCC
MEMDAT11
4
153
VDDDAC
MEMDAT[11]/GPIO[1]
VDDDAC
LL4148
Intel
NC
0R
MEMDAT4
5
152
Y_R_V
MEMDAT[4]
DAC2
Y_R_V
MEMDAT12
6
151
CVBS_C
MEMDAT[12]/GPIO[2]
DAC3
CVBS_C
RESET#
AMD/SST
0R
NC
P+5V
R169
NC/0R
MEMDAT5
7
150
VDDDAC
MEMDAT[5]
VDDDAC
MEMDAT13
8
149
CVBS_G_Y
MEMDAT[13]/GPIO[3]
DAC4
CVBS_G_Y
+
C191
MEMDAT6
9
148
MEMDAT[6]
GNDDAC_D
10uF/16V
MEMDAT14
10
147
Y_C_CVBS
MEMDAT[14]/GPIO[4]
DAC5
Y_C_CVBS
11
146
OSCIN
GNDC
MEMDAT7
Vaddis 9
XIN
12
145
OSCOUT
UART:
MEMDAT[7]
XO
MEMDAT15
13
144
VDDPLL
For customer model, please just keep
MEMDAT[15]
VDDPLL
14
143
VDDC
GNDPLL
test point close to Vaddis.
15
RESET#
ZR36962
142
VDDP
RESET#
MEMADD16
16
141
MEMADD[16]
GNDC
C
CON6
17
140
DUPRD1
R191
10K
MUTE_CTL
C
MEMCS1#/GPIO[5]
VDDC
MUTE_CTL
2
1
FCU_SCLK
TP24
MEMADD15
18
139
DUPRD1
TP38
2
1
MEMADD[15]
GPIO[48]/DUPRD1
4
3
DSPVCC33
TP25
MEMADD14
19
138
DUPTD1
DUPTD1
R2
1K5
FS3
4
3
MEMADD[14]
GPIO[47]/DUPTD1
FS3
MEMDAT13
ADD FOR (D)
6
5
MEMDAT12
TP32
MEMADD13
20
137
DUPRD0
DUPRD0
R203
10K
FS2
TP36
6
5
MEMADD[13]
GPIO[46]/DUPRD0
FS2
FCU_IRQ
8
7
MEMADD12
21
136
DUPTD0
DUPTD0
R180
180R
FS1
TP37
8
7
MEMADD[12]
GPIO[45]/PWMCO[5]/DUPTD0
FS1
10
9
FCU_RST
TP43
MEMADD11
22
135
DSPVCC33
10
9
MEMADD[11]
VDDP
DSPVCC33
12
11
FCU_CS2#
TP45
MEMADD10
23
134
IRRCV
MUX GPIOs
12
11
MEMADD[10]
IGPIO[44]
IRRCV
FCU_WAIT#
14
13
FCU_CS3#
TP33
MEMADD9
24
133
FPC_DOUT
TP35
14
13
MEMADD[9]
GPIO[43]/TDO
FPC_DOUT
R26
16
15
MEMADD8
25
132
FPC_CLK
16
15
MEMADD[8]
GPIO[42]/TCK
FPC_CLK
10K
MEMWR#
26
131
FPC_STB
MEMWR#
GPIO[41]/TDI/NMI
FPC_STB
C191
SD/MMC/MS
MEMADD18
27
130
INSW
MEMADD[18]/GPIO[6]
GPIO[40]
INSW
+
RESET#
MEMADD17
28
129
CD_DVD''
CD_DVD
10uF/16V
MEMADD[17]
GPIO[39]
CD_DVD
MEMADD7
29
128
DRVSB
FB8
C279
R25
MEMADD[7]
GPIO[38]
DRVSB
Q8
C2
MEMADD6
127
IN_OUT_SW
MBW2012-221
1nF
1
30
MEMADD[6]
IGPIO[37]/TMS/NMI
IN_OUT_SW
BT3904
31
126
CLOSE
4k7
GNDC
GPIO[36]
CLOSE
0.1UF
MEMADD5
32
125
OPEN
D20
MEMADD[5]
GPIO[35]
OPEN
MEMADD4
33
124
HOMESW
R24
4148
MEMADD[4]
GPIO[34]/RAMCKE/SPDIFIN
HOMESW
MEMADD3
34
123
AIN
MEMADD[3]
GPIO[33]/AIN/SPDIFIN
AIN
15K
35
122
S/PDIF_OUT
VDDP
GPIO[32]/SPDIFO
S/PDIF_OUT
MEMADD2
36
121
ABCLK
CON5
MEMADD[2]
GPIO[31]/ABCLK
ABCLK
FCU_IORD#
R157
0R
MEMADD1
37
120
ALRCLK
MEMADD[1]
GPIO[30]/ALRCLK
ALRCLK
MEMADD19
38
119
1
MEMADD[19]/IGPIO[7]
VDDP
39
118
R270
AMCLK
2
USBVDD
GPIO[29]/AMCLK
AMCLK
FCU_IOWR#
R156
0R
USB_DP
40
117
33R
USBDP/GPO[67]
GNDC
USB_DN
41
116
APWM_L-
2PIN/2.0
USBDN/GPO[68]
GPIO[28]/AOUT[0]/APWM0-
APWM_L-
42
115
APWM_L+
USBGND
GPIO[27]/APWM0+
APWM_L+
RAMADD4
43
114
APWM_R-
RAMADD[4]
GPIO[26]/AOUT[1]/APWM1-
APWM_R-
RAMADD3
44
113
APWM_R+
RAMADD[3]
GPIO[25]/APWM1+
APWM_R+
RAMADD5
45
112
APWM_SL-
RAMADD[5]
GPIO[24]/AOUT[2]/APWM2-
APWM_SL-
46
111
APWM_SL+
VDDIP
IGPIO[23]/APWM2+
APWM_SL+
47
110
EEPROM
GNDC
GNDAPWM
RAMADD2
48
109
APWM_SR-
RAMADD[2]
GPIO[22]/AOUT[3]/APWM3-
APWM_SR-
RAMADD6
49
108
APWM_SR+
U6
RAMADD[6]
GPIO[21]/APWM3+
APWM_SR+
RAMADD1
50
107
APWM_CEN-
RAMADD[1]
GPIO[20]/APWM4-
APWM_CEN-
RAMADD7
51
106
APWM_CEN+
8
1
DSPVCC33
RAMADD[7]
GPIO[19]/PWMCO[5]/APWM4+
APWM_CEN+
VCC
A0
52
105
7
2
VDDC
VDDAPWM
WP
A1
6
3
SCL
A2
DSPVCC33
R179
5
4
SDA
GND
VDDAPWM
R246
4R7
R178
C154
2K
DSPVCC33
2K
104
NC/24C02
+
C177
MEMADD1
C126
100uF/16V
I2C_CLK
0.1uF
I2C_DAT
R212
1K
Close to pin 105
BOOTSEL
JP1
B
B
Play
OPEN
Download
CLOSE
JP1
NC
TP31
TP29
TP30
R183
56R
CON4
500mA for device
P+5V
P+5V
4
PCLK
USB_DN
3
CON11
USB_DP
2
C139
P+5V
1
TP26
1
DUPTD0
NC/5PF
2
TP28
DUPRD0
3
R238
R237
2.0X4USB
TP34
4
15K
15K
Close to
4PIN/2.0
Vaddis
ADD FOR STB REALLY
R170
10K
DSPVCC33
RAMCKE
DSPVCC33
C171
C151
C167
C199
C165
C122
C169
C202
C170
104
104
104
104
104
104
104
104
104
+
C173
220uF/16V
SDRAM3.3V
DSPVCC18
C145
C157
C162
C144
104
104
104
104
+
C189
SDRAM configuration:
220uF/16V
1X16Mbit: CS0# = Low;
U4
U3
16Mbit: K4S161622C-TC/L70
NM
A
[64Mbit:K4S641632H-UC70]
1X64Mbit: CS1# = Low; CS0#=BA1
SDRAM speed <=7ns
Tras <=44.4ns
Trp <=22.2ns
A
SDRAM3.3V
Design:
MODEL: DV5312
TITLE: DSP+SDRAM+FLASH
Checked:
PART NO.:
DWG NO.:DV5312-YL01-03
Apprd:
SHEET:
2 OF
5
VER: A
SHEN ZHEN MTC MULTIMEDIA CO.,LTD
5
4
3
2
1
1
2
1
.
1
.
IPCLK
25
26
VDD
VSS
RAMADD3
24
27
RAMADD4
A3
A4
RAMADD2
23
28
RAMADD5
A2
A5
RAMADD1
22
29
RAMADD6
RAMADD0
53
208
A1
A6
RAMADD[0]
VDDP
RAMADD0
21
30
RAMADD7
RAMADD8
54
207
MEMDAT9
A0
A7
RAMADD[8]
GPIO[9]/MEMDAT[9]
RAMADD10
20
31
RAMADD8
RAMADD10
55
206
MEMDAT1
A10/AP
A8
RAMADD[10]
MEMDAT[1]
RAMBA
19
32
RAMADD9
56
205
MEMDAT8
BA
A9
VDDP
GPIO[8]/MEMDAT[8]
RAMCS0-
18
33
57
204
MEMDAT0
CS
NC
GNDC
MEMDAT[0]
RAMRAS-
17
34
RAMADD9
58
203
MEMRD#
RAS
CKE
RAMADD[9]
MEMRD#
RAMCAS-
16
35
PCLK
RAMADD11
59
202
MEMCS0#
CAS
CLK
RAMADD[11]/GPO[64]
MEMCS0#
RAMWE-
15
36
RAMDQM
RAMCS0-
60
201
MEMADD0
WE
UDQM
RAMCS0#
MEMADD[0]
RAMDQM
14
37
RAMBA
61
200
LDQM
NC
RAMBA
GPIO[63]/MEMCS2#
13
38
RAMCS1-
62
199
FCU_IORD#
VDDQ
VDDQ
RAMCS1#/GPO[65]
GPIO[62]/FCU_IORD#
RAMDAT7
12
39
RAMDAT8
RAMRAS-
63
198
FCU_IOWR#
DQ7
DQ8
RAMRAS#
GPIO[61]/FCU_IOWR#
RAMDAT6
11
40
RAMDAT9
RAMCAS-
64
197
FCU_SCLK
DQ6
DQ9
RAMCAS#
GPIO[60]/FCU_SCLK
10
41
65
196
FCU_CS2#
VSSQ
VSSQ
VDDP
GPIO[59]/FCU_CS2#
RAMDAT5
9
42
RAMDAT10
66
195
FCU_CS3#
DQ5
DQ10
GNDC
GPIO[58]/FCU_CS3#
RAMDAT4
8
43
RAMDAT11
RAMWE-
67
194
FCU_WAIT#
DQ4
DQ11
RAMWE#
GPIO[57]/FCU_WAIT#
7
44
RAMDQM
68
193
FCU_RST
VDDQ
VDDQ
RAMDQM
GPIO[56]/FCU_RST
RAMDAT3
6
45
RAMDAT12
69
192
FCU_IRQ
DQ3
DQ12
GNDPCLK
IGPIO[55]/FCU_IRQ
RAMDAT2
5
46
RAMDAT13
IPCLK
70
191
DQ2
DQ13
PCLK
GNDC
4
47
71
190
VSSQ
VSSQ
VDDPCLK
VDDC
RAMDAT1
3
48
RAMDAT14
RAMDAT8
72
189
R190
100R
I2C_DAT
DQ1
DQ14
RAMDAT[8]
IGPIO[54]/PWMCO[5]
RAMDAT0
2
49
RAMDAT15
RAMDAT7
73
188
R184
100R
I2C_CLK
DQ0
DQ15
RAMDAT[7]
GPIO[53]/PWMCO[4]
1
50
RAMDAT9
74
187
SLED_PWM
VDD
VSS
RAMDAT[9]
GPIO[52]/PWMCO[3]
RAMDAT6
75
186
SPDL_PWM
RAMDAT[6]
GPIO[51]/PWMCO[2]
76
185
VDDP
GNDPWM
77
184
TRACK_PWM
GNDC
GPIO[50]/PWMCO[1]
RAMDAT10
78
183
VDDPWM
RAMDAT[10]
VDDPWM
RAMDAT5
79
182
FOCUS_PWM
RAMDAT[5]
GPIO[49]/PWMCO[0]
RAMDAT11
80
181
LD_DVD
RAMDAT[11]
DVD_LD
LD_DVD
RAMDAT4
81
180
LD_CD
RAMDAT[4]
CD_LD
LD_CD
RAMDAT12
82
179
MD_DVD
RAMDAT[12]
DVD_MD
MD_DVD
RAMDAT3
83
178
MD_CD
RAMDAT[3]
CD_MD
MD_CD
84
177
VDDAFE
VDDP
VDDSAFE
1
54
85
176
VDD
VSS
GNDC
GNDREF
RAMDAT0
2
53
RAMDAT15
RAMDAT13
86
175
RESOUT
R233
15.4K 1%
DQ0
DQ15
RAMDAT[13]
RESOUT
3
52
RAMDAT2
87
174
VREF
C182
0.1uF
VDDQ
VSSQ
RAMDAT[2]
VREF
RAMDAT1
4
51
RAMDAT14
88
173
VC
DQ1
DQ14
VDDC
VC
VC
RAMDAT13RAMDAT2
5
50
RAMDAT14
89
172
DQ2
DQ13
RAMDAT[14]
GND1AFE
6
49
RAMDAT1
90
171
VSSQ
VDDQ
RAMDAT[1]
H
RAMDAT3
7
48
RAMDAT12
RAMDAT15
91
170
MIC_VOCAL
DQ3
DQ12
RAMDAT[15]
G
MIC_VOCAL
RAMDAT4
8
47
RAMDAT11
RAMDAT0
92
169
DQ4
DQ11
RAMDAT[0]
GNDAFE
9
46
93
168
RF_F
VDDQ
VSSQ
VDDP
F
RF_F
RAMDAT5
10
45
RAMDAT10
STBY
94
167
SPDL_SENS+
DQ5
DQ10
STBY
RAMDQM2/RAMCKE/GPO[66]
K
SPDL_SENS+
RAMDAT6
11
44
RAMDAT9
95
166
RF_E
DQ6
DQ9
GNDC
E
RF_E
12
43
RAMCKE
96
165
SPDL_SENS-
VSSQ
VDDQ
RAMCKE/SDI_PSC/GPIO[10]
J
SPDL_SENS-
RAMDAT7
13
42
RAMDAT8
OK_DET
97
164
RF_D
DQ7
DQ8
GPAIO/IGPIO[11]
D
RF_D
14
41
98
163
RF_C
VDD
VSS
APWM7+/GPIO[12]
C
RF_C
RAMDQM
15
40
99
162
VDDAFE
DQML
NC
APWM7-/GPIO[13]
VDDAFE
RAMWE-
16
39
RAMDQM
100
161
RF_B
WE#
DQMH
APWM6+/GPIO[14]
B
RF_B
RAMCAS-
17
38
PCLK
101
160
RF_A
CAS#
CLK
APWM6-/GPIO[15]
A
RF_A
RAMRAS-
18
37
APWM_LFE+
102
159
VDD1AFE
RAS#
CKE
APWM_LFE+
APWM5+/GPIO[16]
VDD1AFE
RAMCS1-
19
36
APWM_LFE-
103
158
RFN
CS#
NC
APWM_LFE-
APWM5-/GPIO[17]
RFN
RAMBA
20
35
RAMADD11
104
157
RFP
BA0
A11
AIN/SPDIFIN/IO[18]
RFP
RAMCS0-
21
34
RAMADD9
BA1
A9
RAMADD10
22
33
RAMADD8
A10
A8
RAMADD0
23
32
RAMADD7
A0
A7
RAMADD1
24
31
RAMADD6
A1
A6
RAMADD2
25
30
RAMADD5
A2
A5
RAMADD3
26
29
RAMADD4
A3
A4
27
28
VDD
VSS
R173
75R 1%
R215
75R 1%
R208
75R 1%
R174
75R 1%
R193
75R 1%
1
2
1
2
2
3
5 4 3 2 1 线路图 原理框图 D D FLASH SDRAM 16M 1*16M/4*16M CD ARIMA
5
4
3
2
1
线路图
原理框图
D
D
FLASH
SDRAM
16M
1*16M/4*16M
CD
ARIMA
+12V
PH681
DSP
S-VIDEO/CVBS OUTPUT
VIDEO PORT
MOTOR-DRIVER
+5V
C
ZR36962
C
D5888S
U5
YUV OUTPUT
VIDEO PORT
T2
U1
EEL19
+1.8V
PWM POWER
AC IN
TNY275PN
DIGTAL COAXIAL OUTPUT
COAXIAL PORT
100-240V
+3.3V
IC1
USB1.1 INPUT
USB PORT
R
L
+5V
OPERATIONAL AMPLIFIER
VFD DRIVER
5.1CH AUDIO OUTPUT
NJM4558
B
B
-21V
AUDIO PORT
U7/U8/U9
VFD
DISPLAY
A
A
Design:
MODEL: DV5312
TITLE: DSP+SDRAM+FLASH
Checked:
PART NO.:
DWG NO.:DV5312-YL01-03
Apprd:
SHEET:
1 OF
1
VER: A
SHEN ZHEN MTC MULTIMEDIA CO.,LTD
表格编号: QR-RD-016A
5
4
3
2
1
5 4 3 2 1 D D TITLE: Cover page Design: MODEL: DV5312(ZORAN) C Checked:
5
4
3
2
1
D
D
TITLE: Cover page
Design:
MODEL: DV5312(ZORAN)
C
Checked:
PART NO.:
DWG NO.:DV5312-YL01-03
C
Apprd:
SHEET: 6 pages
VER: A
SHEN ZHEN MTC MULTIMEDIA CO.,LTD
表格编号: QR-RD-016A
B
B
A
A
5
4
3
2
1

TNY274-280

®

TinySwitch-III Family

Energy Efficient, Off-Line Switcher with Enhanced Flexibility and Extended Power Range

Switcher with Enhanced Flexibility and Extended Power Range Product Highlights Lowest System Cost with Enhanced
Switcher with Enhanced Flexibility and Extended Power Range Product Highlights Lowest System Cost with Enhanced

Product Highlights

Lowest System Cost with Enhanced Flexibility

• Simple ON/OFF control, no loop compensation needed

• Selectable current limit through BP/M capacitor value

- Higher current limit extends peak power or, in open frame applications, maximum continuous power

- Lower current limit improves efficiency in enclosed adapters/chargers

- Allows optimum TinySwitch-III choice by swapping devices with no other circuit redesign

• Tight I 2 f parameter tolerance reduces system cost

- Maximizes MOSFET and magnetics power delivery

- Minimizes max overload power, reducing cost of transformer, primary clamp & secondary components

• ON-time extension – extends low line regulation range/ hold-up time to reduce input bulk capacitance

• Self-biased: no bias winding or bias components

• Frequency jittering reduces EMI filter costs

• Pin-out simplifies heatsinking to the PCB

• SOURCE pins are electrically quiet for low EMI

Enhanced Safety and Reliability Features

• Accurate hysteretic thermal shutdown protection with automatic recovery eliminates need for manual reset

• Improved auto-restart delivers <3% of maximum power in short circuit and open loop fault conditions

• Output overvoltage shutdown with optional Zener

• Line under-voltage detect threshold set using a single optional resistor

• Very low component count enhances reliability and enables single-sided printed circuit board layout

• High bandwidth provides fast turn on with no overshoot and excellent transient load response

• Extended creepage between DRAIN and all other pins improves field reliability

EcoSmart ® – Extremely Energy Efficient

• Easily meets all global energy efficiency regulations

• No-load <150 mW at 265 VAC without bias winding, <50 mW with bias winding

• ON/OFF control provides constant efficiency down to very light loads – ideal for mandatory CEC regulations and 1 W PC standby requirements

Applications

• Chargers/adapters for cell/cordless phones, PDAs, digital cameras, MP3/portable audio, shavers, etc.

+ + DC Output - Wide-Range HV DC Input D EN/UV BP/M TinySwitch-III S -
+
+
DC
Output
-
Wide-Range
HV DC Input
D
EN/UV
BP/M
TinySwitch-III
S
-
PI-4095-082205

Figure 1. Typical Standby Application.

OUTPUT POWER TABLE

 
 

230 VAC ±15%

85-265 VAC

PRODUCT 3

 

Peak or

 

Peak or

Adapter 1

Open

Adapter 1

Open

 

Frame 2

Frame 2

TNY274 P or G

6 W

11

W

5

W

8.5 W

TNY275 P or G

8.5 W

15

W

6

W

11.5

W

TNY276 P or G

10

W

19

W

7

W

15

W

TNY277 P or G

13

W

23.5

W

8

W

18

W

TNY278 P or G

16

W

28

W

10

W

21.5

W

TNY279 P or G

18

W

32

W

12

W

25

W

TNY280 P or G

20

W

36.5

W

14

W

28.5

W

Table 1. Notes: 1. Minimum continuous power in a typical non- ventilated enclosed adapter measured at 50 °C ambient. Use of an external heatsink will increase power capability 2. Minimum peak power capability in any design or minimum continuous power in an open frame design (see Key Application Considerations). 3. Packages:

P: DIP-8C, G: SMD-8C. See Part Ordering Information.

• PC Standby and other auxiliary supplies

• DVD/PVR and other low power set top decoders

• Supplies for appliances, industrial systems, metering, etc.

Description

TinySwitch-III incorporates a 700 V power MOSFET, oscillator, high voltage switched current source, current limit (user selectable) and thermal shutdown circuitry. The IC family uses an ON/OFF control scheme and offers a design flexible solution with a low system cost and extended power capability.

TNY274-280 BYPASS/ DRAIN MULTI-FUNCTION (D) (BP/M) REGULATOR 5.85 V LINE UNDER-VOLTAGE 115 µA 25 µA
TNY274-280
BYPASS/
DRAIN
MULTI-FUNCTION
(D)
(BP/M)
REGULATOR
5.85 V
LINE UNDER-VOLTAGE
115 µA
25 µA
FAULT
BYPASS PIN
PRESENT
UNDER-VOLTAGE
+
AUTO-
RESTART
-
COUNTER
5.85 V
CURRENT
4.9 V
V
I LIMIT
LIMIT STATE
RESET
6.4 V
MACHINE
CURRENT LIMIT
COMPARATOR
ENABLE
JITTER
CLOCK
1.0 V + V T
THERMAL
DC MAX
SHUTDOWN
OSCILLATOR
ENABLE/
1.0 V
UNDER-
S
Q
VOLTAGE
(EN/UV)
R
Q
LEADING
EDGE
BLANKING
SOURCE
(S)
PI-4077-013106
+
-

Figure 2. Functional Block Diagram.

Pin Functional Description

DRAIN (D) Pin:

This pin is the power MOSFET drain connection. It provides internal operating current for both start-up and steady-state operation.

BYPASS/MULTI-FUNCTION (BP/M) Pin:

This pin has multiple functions:

1.

It

is the connection point for an external bypass capacitor

for the internally generated 5.85 V supply.

2.

It

is a mode selector for the current limit value, depending

on the value of the capacitance added. Use of a 0.1 µF

capacitor results in the standard current limit value. Use of

a

1 µF capacitor results in the current limit being reduced to

that of the next smaller device size. Use of a 10 µF capacitor

results in the current limit being increased to that of the next larger device size for TNY275-280.

3.

It

provides a shutdown function. When the current into the

bypass pin exceeds 5.5 mA, the device latches off until the BP/M voltage drops below 4.9 V, during a power down. This can be used to provide an output overvoltage function

P Package (DIP-8C) G Package (SMD-8C) EN/UV 1 8 S BP/M 2 7 S 6
P Package (DIP-8C)
G Package (SMD-8C)
EN/UV
1
8
S
BP/M
2
7
S
6
S
D
4
5
S

PI-4078-080905

Figure 3. Pin Configuration.

with a Zener connected from the BP/M pin to a bias winding supply.

ENABLE/UNDER-VOLTAGE (EN/UV) Pin:

This pin has dual functions: enable input and line under-voltage sense. During normal operation, switching of the power

TNY274-280

MOSFET is controlled by this pin. MOSFET switching is terminated when a current greater than a threshold current is drawn from this pin. Switching resumes when the current being pulled from the pin drops to less than a threshold current. A modulation of the threshold current reduces group pulsing. The threshold current is between 60 µA and 115 µA.

The EN/UVpin also senses line under-voltage conditions through an external resistor connected to the DC line voltage. If there is no external resistor connected to this pin, TinySwitch-III detects its absence and disables the line under-voltage function.

SOURCE (S) Pin:

This pin is internally connected to the output MOSFET source for high voltage power return and control circuit common.

TinySwitch-III Functional Description

TinySwitch-III combines a high voltage power MOSFET switch with a power supply controller in one device. Unlike conventional PWM (pulse width modulator) controllers, it uses a simple ON/OFF control to regulate the output voltage.

The controller consists of an oscillator, enable circuit (sense and logic), current limit state machine, 5.85 V regulator, BYPASS/ MULTI-FUNCTION pin under-voltage, overvoltage circuit, and current limit selection circuitry, over- temperature protection, current limit circuit, leading edge blanking, and a 700 V power MOSFET. TinySwitch-III incorporates additional circuitry for line under-voltage sense, auto-restart, adaptive switching cycle on-time extension, and frequency jitter. Figure 2 shows the functional block diagram with the most important features.

Oscillator The typical oscillator frequency is internally set to an average of 132 kHz. Two signals are generated from the oscillator: the

600

500

400

300

200

100

0

V DRAIN 136 kHz 128 kHz PI-2741-041901
V
DRAIN
136
kHz
128
kHz
PI-2741-041901

0

Figure 4. Frequency Jitter.

5

Time (µs)

10

maximum duty cycle signal (DC MAX ) and the clock signal that indicates the beginning of each cycle.

The oscillator incorporates circuitry that introduces a small amount of frequency jitter, typically 8 kHz peak-to-peak, to minimize EMI emission. The modulation rate of the frequency jitter is set to 1 kHz to optimize EMI reduction for both average and quasi-peak emissions. The frequency jitter should be measured with the oscilloscope triggered at the falling edge of the DRAIN waveform. The waveform in Figure 4 illustrates the frequency jitter.

Enable Input and Current Limit State Machine The enable input circuit at the EN/UV pin consists of a low impedance source follower output set at 1.2 V. The current through the source follower is limited to 115 µA. When the current out of this pin exceeds the threshold current, a low logic level (disable) is generated at the output of the enable circuit, until the current out of this pin is reduced to less than the threshold current. This enable circuit output is sampled at the beginning of each cycle on the rising edge of the clock signal. If high, the power MOSFET is turned on for that cycle (enabled). If low, the power MOSFET remains off (disabled). Since the sampling is done only at the beginning of each cycle, subsequent changes in the EN/UV pin voltage or current during the remainder of the cycle are ignored.

The current limit state machine reduces the current limit by discrete amounts at light loads when TinySwitch-III is likely to switch in the audible frequency range. The lower current limit raises the effective switching frequency above the audio range and reduces the transformer flux density, including the associated audible noise. The state machine monitors the sequence of enable events to determine the load condition and adjusts the current limit level accordingly in discrete amounts.

Under most operating conditions (except when close to no-load), the low impedance of the source follower keeps the voltage on the EN/UV pin from going much below 1.2 V in the disabled state. This improves the response time of the optocoupler that

is usually connected to this pin.

5.85 V Regulator and 6.4 V Shunt Voltage Clamp The 5.85 V regulator charges the bypass capacitor connected to the BYPASS pin to 5.85 V by drawing a current from the voltage on the DRAIN pin whenever the MOSFET is off. The BYPASS/MULTI-FUNCTION pin is the internal supply voltage node. When the MOSFET is on, the device operates from the energy stored in the bypass capacitor. Extremely low power consumption of the internal circuitry allows TinySwitch-III to operate continuously from current it takes from the DRAIN pin. A bypass capacitor value of 0.1 µF is sufficient for both high frequency decoupling and energy storage.

PI-4098-082305

TNY274-280

In addition, there is a 6.4 V shunt regulator clamping the BYPASS/MULTI-FUNCTION pin at 6.4 V when current is provided to the BYPASS/MULTI-FUNCTION pin through an external resistor. This facilitates powering of TinySwitch-III externally through a bias winding to decrease the no-load consumption to well below 50 mW.

BYPASS/MULTI-FUNCTION Pin Under-Voltage The BYPASS/MULTI-FUNCTION pin under-voltage circuitry disables the power MOSFET when the BYPASS/MULTI- FUNCTION pin voltage drops below 4.9 V in steady state operation. Once the BYPASS/MULTI-FUNCTION pin voltage drops below 4.9 V in steady state operation, it must rise back to 5.85 V to enable (turn-on) the power MOSFET.

Over Temperature Protection The thermal shutdown circuitry senses the die temperature. The threshold is typically set at 142 °C with 75 °C hysteresis. When thedietemperaturerises abovethis thresholdthepowerMOSFET is disabled and remains disabled until the die temperature falls by 75 °C, at which point it is re-enabled. A large hysteresis of 75 °C (typical) is provided to prevent overheating of the PC board due to a continuous fault condition.

Current Limit The current limit circuit senses the current in the power MOSFET. When this current exceeds the internal threshold (I LIMIT ), the power MOSFET is turned off for the remainder of that cycle. The current limit state machine reduces the current limit threshold by discrete amounts under medium and light loads.

The leading edge blanking circuit inhibits the current limit comparator for a short time (t LEB ) after the power MOSFET is turned on. This leading edge blanking time has been set so that current spikes caused by capacitance and secondary-side rectifier reverse recovery time will not cause premature termination of the switching pulse.

300

200

100

0

10

5

0

V DRAIN V DC-OUTPUT
V
DRAIN
V
DC-OUTPUT

0

2500

5000

Time (ms) Figure 5. Auto-Restart Operation.

Auto-Restart In the event of a fault condition such as output overload, output short circuit, or an open loop condition, TinySwitch-III enters into auto-restart operation. An internal counter clocked by the oscillator is reset every time the EN/UV pin is pulled low. If the EN/UV pin is not pulled low for 64 ms, the power MOSFET switching is normally disabled for 2.5 seconds (except in the case of line under-voltage condition, in which case it is disabled until the condition is removed). The auto-restart alternately enables and disables the switching of the power MOSFET until the fault condition is removed. Figure 5 illustrates auto-restart circuit operation in the presence of an output short circuit.

In the event of a line under-voltage condition, the switching of the power MOSFET is disabled beyond its normal 2.5 seconds until the line under-voltage condition ends.

Adaptive Switching Cycle On-Time Extension Adaptive switching cycle on-time extension keeps the cycle on until current limit is reached, instead of prematurely terminating after the DC MAX signal goes low. This feature reduces the minimum input voltage required to maintain regulation, extending hold-up time and minimizing the size of bulk capacitor required. The on-time extension is disabled during the startup of the power supply, until the power supply output reaches regulation.

Line Under-Voltage Sense Circuit The DC line voltage can be monitored by connecting an external resistor from the DC line to the EN/UV pin. During power-up or when the switching of the power MOSFET is disabled in auto- restart, the current into the EN/UV pin must exceed 25 µA to initiate switching of the power MOSFET. During power-up, this

is accomplished by holding the BYPASS/MULTI-FUNCTION

pin to 4.9 V while the line under-voltage condition exists. The BYPASS/MULTI-FUNCTION pin then rises from 4.9 V to

5.85Vwhenthelineunder-voltageconditiongoesaway.Whenthe

switching of the power MOSFET is disabled in auto-restart mode and a line under-voltage condition exists, the auto-restart counter is stopped. This stretches the disable time beyond its normal 2.5 seconds until the line under-voltage condition ends.

The line under-voltage circuit also detects when there is no external resistor connected to the EN/UV pin (less than ~1 µA into the pin). In this case the line under-voltage function is disabled.

TinySwitch-III Operation

TinySwitch-III devices operate in the current limit mode. When enabled, the oscillator turns the power MOSFET on at the beginning of each cycle. The MOSFET is turned off when the current ramps up to the current limit or when the DC MAX limit is reached. Since the highest current limit level and frequency of

a TinySwitch-III design are constant, the power delivered to the

TNY274-280

load is proportional to the primary inductance of the transformer and peak primary current squared. Hence, designing the supply involves calculating the primary inductance of the transformer for the maximum output power required. If the TinySwitch-III is appropriately chosen for the power level, the current in the calculated inductance will ramp up to current limit before the DC MAX limit is reached.

Enable Function TinySwitch-III senses the EN/UV pin to determine whether or

V EN

CLOCK

DC MAX

I DRAIN

V DRAIN

V EN CLOCK DC MAX I DRAIN V DRAIN PI-2749-082305
V EN CLOCK DC MAX I DRAIN V DRAIN PI-2749-082305

PI-2749-082305

Figure 6. Operation at Near Maximum Loading.

V EN

CLOCK

DC MAX

I DRAIN

V DRAIN

V EN CLOCK DC MAX I DRAIN V DRAIN PI-2667-082305
V EN CLOCK DC MAX I DRAIN V DRAIN PI-2667-082305

PI-2667-082305

Figure 7. Operation at Moderately Heavy Loading.

not to proceed with the next switching cycle. The sequence of cycles is used to determine the current limit. Once a cycle is started, it always completes the cycle (even when the EN/UV pin changes state half way through the cycle). This operation results in a power supply in which the output voltage ripple is determined by the output capacitor, amount of energy per switch cycle and the delay of the feedback.

The EN/UV pin signal is generated on the secondary by comparing the power supply output voltage with a reference voltage. The EN/UV pin signal is high when the power supply output voltage is less than the reference voltage.

In a typical implementation, the EN/UV pin is driven by an optocoupler. The collector of the optocoupler transistor is connected to the EN/UV pin and the emitter is connected to the SOURCE pin. The optocoupler LED is connected in series with a Zener diode across the DC output voltage to be regulated. When the output voltage exceeds the target regulation voltage level (optocoupler LED voltage drop plus Zener voltage), the optocoupler LED will start to conduct, pulling the EN/UV pin low. The Zener diode can be replaced by a TL431 reference circuit for improved accuracy.

ON/OFF Operation with Current Limit State Machine The internal clock of the TinySwitch-III runs all the time. At the beginning of each clock cycle, it samples the EN/UV pin to decide whether or not to implement a switch cycle, and based on the sequence of samples over multiple cycles, it determines the appropriate current limit. At high loads, the state machine sets the current limit to its highest value. At lighter loads, the state machine sets the current limit to reduced values.

V EN

CLOCK

CLOCK

DC

MAX

I DRAIN

I DRAIN

V DRAIN

V EN CLOCK DC MAX I DRAIN V DRAIN PI-2377-082305

PI-2377-082305

Figure 8. Operation at Medium Loading.

PI-2348-030801

PI-2383-030801

PI-2395-030801

TNY274-280

V EN

CLOCK

CLOCK

DC

MAX

I DRAIN

I DRAIN

V DRAIN

V EN CLOCK DC MAX I DRAIN V DRAIN PI-2661-082305

PI-2661-082305

Figure 9. Operation at Very Light Load.

At near maximum load, TinySwitch-III will conduct during nearly all of its clock cycles (Figure 6). At slightly lower load, it will “skip” additional cycles in order to maintain voltage regulation at the power supply output (Figure 7). At medium loads, cycles will be skipped and the current limit will be reduced (Figure 8). At very light loads, the current limit will be reduced even further (Figure 9). Only a small percentage of cycles will occur to satisfy the power consumption of the power supply.

The response time of the ON/OFF control scheme is very fast compared to PWM control. This provides tight regulation and excellent transient response.

200

100

0

10

5

0

400

200

0

V DC-INPUT V BYPASS V DRAIN
V
DC-INPUT
V
BYPASS
V
DRAIN

0

1

Time (ms)

2

Figure 10. Power-Up with Optional External UV Resistor (4 M) Connected to EN/UV Pin.

200

100

0

10

5

0

400

200

0

V DC-INPUT V BYPASS V DRAIN PI-2381-1030801
V
DC-INPUT
V
BYPASS
V
DRAIN
PI-2381-1030801

0

1

Time (ms)

2

Figure 11. Power-Up Without Optional External UV Resistor Connected to EN/UV Pin.

200

100

0

400

300

200

100

0

V DC-INPUT V DRAIN
V
DC-INPUT
V
DRAIN

0

.5

Time (s)

1

Figure 12. Normal Power-Down Timing (without UV).

200

100

0

400

300

200

100

0

V DC-INPUT V DRAIN
V
DC-INPUT
V
DRAIN

0

2.5

Time (s)

5

Figure 13. Slow Power-Down Timing with Optional External (4 M) UV Resistor Connected to EN/UV Pin.

TNY274-280

Power Up/Down The TinySwitch-III requires only a 0.1 µF capacitor on the BYPASS/MULTI-FUNCTION pin to operate with standard current limit. Because of its small size, the time to charge this capacitor is kept to an absolute minimum, typically 0.6 ms. The time to charge will vary in proportion to the BYPASS/MULTI- FUNCTION pin capacitor value when selecting different current limits. Due to the high bandwidth of the ON/OFF feedback, there is no overshoot at the power supply output. When an external resistor (4 M) is connected from the positive DC input to the EN/UV pin, the power MOSFET switching will be delayed during power-up until the DC line voltage exceeds the threshold (100 V). Figures 10 and 11 show the power-up timing waveform in applications with and without an external resistor (4 M) connected to the EN/UV pin.

Under startup and overload conditions, when the conduction time is less than 400 ns, the device reduces the switching frequency to maintain control of the peak drain current.

During power-down, when an external resistor is used, the power MOSFET will switch for 64 ms after the output loses regulation. The power MOSFET will then remain off without any glitches since the under-voltage function prohibits restart when the line voltage is low.

Figure 12 illustrates a typical power-down timing waveform. Figure 13 illustrates a very slow power-down timing waveform as in standby applications. The external resistor (4 M) is connected to the EN/UV pin in this case to prevent unwanted restarts.

No bias winding is needed to provide power to the chip because it draws the power directly from the DRAIN pin (see

Functional Description above). This has two main benefits. First, for a nominal application, this eliminates the cost of a bias winding and associated components. Secondly, for battery charger applications, the current-voltage characteristic often allows the output voltage to fall close to zero volts while still delivering power. TinySwitch-III accomplishes this without a forward bias winding and its many associated components. For applications that require very low no-load power consumption (50 mW), a resistor from a bias winding to the BYPASS/ MULTI-FUNCTION pin can provide the power to the chip. The minimum recommended current supplied is 1 mA. The BYPASS/MULTI-FUNCTION pin in this case will be clamped at 6.4 V. This method will eliminate the power draw from the DRAIN pin, thereby reducing the no-load power consumption and improving full-load efficiency.

Current Limit Operation Each switching cycle is terminated when the DRAIN current reaches the current limit of the device. Current limit operation provides good line ripple rejection and relatively constant power delivery independent of input voltage.

BYPASS/MULTI-FUNCTION Pin Capacitor The BYPASS/MULTI-FUNCTION pin can use a ceramic capacitor as small as 0.1 µF for decoupling the internal power supply of the device.Alarger capacitor size can be used to adjust the current limit. For TNY275-280, a 1 µF BP/M pin capacitor will select a lower current limit equal to the standard current limit of the next smaller device and a 10 µF BP/M pin capacitor will select a higher current limit equal to the standard current limit of the next larger device. The higher current limit level of the TNY280 is set to 850 mA typical. The TNY274 MOSFET does not have the capability for increased current limit so this feature is not available in this device.

TNY274-280 C5 2.2 nF 250 VAC L2 D7 VR1 BYV28-200 T1 Ferrite Bead 3.5 ×
TNY274-280
C5
2.2 nF
250 VAC
L2
D7
VR1
BYV28-200
T1
Ferrite Bead
3.5 × 7.6 mm
+12 V, 1 A
P6KE150A
NC
8
J3
C10
C11
100 µF
D1
D2
R2
1000 µF
1
25
V
25 V
J4
1N4007
1N4007
100 Ω
6
F1
RTN
J1
3.15 A
C4
C1
C2
R1
10 nF
6.8 µF
22 µF
1 kΩ
3
R7
1 kV
400 V
400 V
20 Ω
4
85-265
RV1
VAC
275 VAC
D5
2
D6
1N4007GP
R5*
UF4003
J2
3.6 MΩ
D3
D4
5
1N4007
1N4007
L1
VR2
C6
1 mH
1N5255B
VR3
1 µF
28
V
BZX79-C11
60 V
11 V
R3
47 Ω
*R5 and R8 are optional
components
1/8 W
R6
390
R8*
1/8 W
21
kΩ
C7 is configurable to adjust
U1 current limit, see circuit
description
1%
U2
D
PC817A
EN/UV
BP/M
S
S
R4
TinySwitch-III
C7
2 kΩ
U1
100 nF
1/8 W
TNY278P
50 V

PI-4244-021406

Figure 14. TNY278P, 12 V, 1 A Universal Input Power Supply.

Applications Example

The circuit shown in Figure 14 is a low cost, high efficiency, flyback power supply designed for 12 V, 1 A output from universal input using the TNY278.

The supply features under-voltage lockout, primary sensed output overvoltage latching shutdown protection, high efficiency (>80%), and very low no-load consumption (<50 mW at 265 VAC). Output regulation is accomplished using a simple zener reference and optocoupler feedback.

The rectified and filtered input voltage is applied to the primary winding of T1. The other side of the transformer primary is driven by the integrated MOSFET in U1. Diode D5, C2, R1, R2, and VR1 comprise the clamp circuit, limiting the leakage inductance turn-off voltage spike on the DRAIN pin to a safe value. The use of a combination a Zener clamp and parallel RC optimizes both EMI and energy efficiency. Resistor R2 allows the use of a slow recovery, low cost, rectifier diode by limiting the reverse current through D5. The selection of a slow diode also improves efficiency and conducted EMI but should be a glass passivated type, with a specified recovery time of 2 µs.

The output voltage is regulated by the Zener diode VR3. When the output voltage exceeds the sum of the Zener and optocoupler

LED forward drop, current will flow in the optocoupler LED. This will cause the transistor of the optocoupler to sink current. When this current exceeds the ENABLE pin threshold current the next switching cycle is inhibited. When the output voltage falls below the feedback threshold, a conduction cycle is allowed to occur and, by adjusting the number of enabled cycles, output regulation is maintained. As the load reduces, the number of enabled cycles decreases, lowering the effective switching frequency and scaling switching losses with load. This provides almost constant efficiency down to very light loads, ideal for meeting energy efficiency requirements.

As the TinySwitch-III devices are completely self-powered, there is no requirement for an auxiliary or bias winding on the transformer. However by adding a bias winding, the output overvoltage protection feature can be configured, protecting the load against open feedback loop faults.

When an overvoltage condition occurs, such that bias voltage exceeds the sum of VR2 and the BYPASS/MULTIFUNCTION (BP/M) pin voltage (28V+5.85V), current begins to flow into the BP/M pin. When this current exceeds 5 mA the internal latching shutdown circuit in TinySwitch-III is activated. This condition is reset when the BP/M pin voltage drops below 2.6 V after removal of the AC input. In the example shown, on opening the loop, the OVP trips at an output of 17 V.

TNY274-280

For lower no-load input power consumption, the bias winding may also be used to supply the TinySwitch-III device. Resistor R8 feeds current into the BP/M pin, inhibiting the internal high voltage current source that normally maintains the BP/M pin capacitor voltage (C7) during the internal MOSFET off time. This reduces the no-load consumption of this design from 140 mW to 40 mW at 265 VAC.

Under-voltage lockout is configured by R5 connected between the DC bus and EN/UV pin of U1. When present, switching

is inhibited until the current in the EN/UV pin exceeds 25 µA.

This allows the startup voltage to be programmed within the normal operating input voltage range, preventing glitching of the output under abnormal low voltage conditions and also on removal of the AC input.

In addition to the simple input pi filter (C1, L1, C2) for differential mode EMI, this design makes use of E-Shield™ shielding techniques in the transformer to reduce common mode EMI displacement currents, and R2 and C4 as a damping

network to reduce high frequency transformer ringing. These techniques, combined with the frequency jitter of TNY278, give excellent conducted and radiated EMI performance with this design achieving >12 dBµV of margin to EN55022 Class

B conducted EMI limits.

For design flexibility the value of C7 can be selected to pick one

of

the 3 current limits options in U1. This allows the designer

to

select the current limit appropriate for the application.

Standard current limit (I LIMIT ) is selected with a 0.1 µF BP/M pin capacitor and is the normal choice for typical enclosed adapter applications.

When a 1 µF BP/M pin capacitor is used, the current limit is reduced (I LIMITred or I LIMIT -1) offering reduced RMS device currents and therefore improved efficiency, but at the expense of maximum power capability. This is ideal for thermally challenging designs where dissipation must be minimized.

When a 10 µF BP/M pin capacitor is used, the current limit is increased (I LIMITinc or I LIMIT +1), extending the power capability for applications requiring higher peak power or continuous power where the thermal conditions allow.

Further flexibility comes from the current limits between adjacent TinySwitch-III family members being compatible. The reduced current limit of a given device is equal to the standard current limit of the next smaller device and the increased current limit is equal to the standard current limit of the next larger device.

Key Application Considerations

TinySwitch-lll Design Considerations

Output Power Table The data sheet output power table (Table 1) represents the minimum practical continuous output power level that can be obtained under the following assumed conditions:

1. The minimum DC input voltage is 100 V or higher for 85 VAC input, or 220 V or higher for 230 VAC input or 115 VAC with a voltage doubler. The value of the input capacitance should be sized to meet these criteria for AC input designs.

2. Efficiency of 75%.

3. Minimum data sheet value of I 2 f.

4. Transformer primary inductance tolerance of ±10%.

5. Reflected output voltage (V OR ) of 135 V.

6. Voltage only output of 12 V with a fast PN rectifier diode.

7. Continuous conduction mode operation with transient K P * value of 0.25.

8. Increased current limit is selected for peak and open frame power columns and standard current limit for adapter columns.

9. The part is board mounted with SOURCE pins soldered to a sufficient area of copper and/or a heatsink is used to keep the SOURCE pin temperature at or below 110 °C.

10. Ambient temperature of 50 °C for open frame designs and 40 °C for sealed adapters.

*Below a value of 1, K P is the ratio of ripple to peak primary current. To prevent reduced power capability due to premature termination of switching cycles a transient K P limit of ≥0.25 is recommended. This prevents the initial current limit (I INIT ) from being exceeded at MOSFET turn on.

For reference, Table 2 provides the minimum practical power delivered from each family member at the three selectable current limit values. This assumes open frame operation (not thermally limited) and otherwise the same conditions as listed above. These numbers are useful to identify the correct current limit to select for a given device and output power requirement.

Overvoltage Protection The output overvoltage protection provided by TinySwitch-III uses an internal latch that is triggered by a threshold current of approximately 5.5 mA into the BP/M pin. In addition to an internal filter, the BP/M pin capacitor forms an external filter providing noise immunity from inadvertent triggering. For the bypass capacitor to be effective as a high frequency filter, the capacitor should be located as close as possible to the SOURCE and BP/M pins of the device.

TNY274-280

 

OUTPUT POWER TABLE

 
   

230 VAC ±15%

   

85-265 VAC

 

PRODUCT

I LIMIT -1

I

LIMIT

I

LIMIT +1

I LIMIT -1

I

LIMIT

I

LIMIT +1

TNY274 P or G

9

10.9

 

9.1

7.1

 

8.5

 

7.1

TNY275 P or G

10.8

 

12

 

15.1

8.4

 

9.3

 

11.8

TNY276 P or G

11.8

15.3

 

19.4

9.2

 

11.9

 

15.1

TNY277 P or G

15.1

19.6

 

23.7

11.8

15.3

 

18.5

TNY278 P or G

19.4

 

24

 

28

15.1

18.6

 

21.8

TNY279 P or G

23.7

28.4

 

32.2

18.5

 

22

 

25.2

TNY280 P or G

28

32.7

 

36.6

21.8

25.4

 

28.5

Table 2. Minimum Practical Power at Three Selectable Current Limit Levels.

For best performance of the OVP function, it is recommended that a relatively high bias winding voltage is used, in the range of 15 V-30 V. This minimizes the error voltage on the bias winding due to leakage inductance and also ensures adequate voltage during no-load operation from which to supply the BP/M pin for reduced no-load consumption.

Selecting the Zener diode voltage to be approximately 6 V above the bias winding voltage (28 V for 22 V bias winding) gives good OVP performance for most designs, but can be adjusted to compensate for variations in leakage inductance. Adding additional filtering can be achieved by inserting a low value (10 to 47 ) resistor in series with the bias winding diode and/or the OVP Zener as shown by R7 and R3 in Figure 14. The resistor in series with the OVP Zener also limits the maximum current into the BP/M pin.

Reducing No-load Consumption As TinySwitch-III is self-powered from the BP/M pin capacitor, there is no need for an auxillary or bias winding to be provided on the transformer for this purpose. Typical no-load consumption when self-powered is <150 mW at 265 VAC input. The addition of a bias winding can reduce this down to <50 mW by supplying the TinySwitch-III from the lower bias voltage and inhibiting the internal high voltage current source. To achieve this, select the value of the resistor (R8 in Figure 14) to provide the data sheet DRAIN supply current. In practice, due to the reduction of the bias voltage at low load, start with a value equal to 40% greater than the data sheet maximum current, and then increase the value of the resistor to give the lowest no-load consumption.

Audible Noise The cycle skipping mode of operation used in TinySwitch-III can generate audio frequency components in the transformer. To limit this audible noise generation the transformer should be designed such that the peak core flux density is below 3000 Gauss (300 mT). Following this guideline and using the standard transformer production technique of dip varnishing

practically eliminates audible noise. Vacuum impregnation of the transformer should not be used due to the high primary capacitance and increased losses that result. Higher flux densities are possible, however careful evaluation of the audible noise performance should be made using production transformer samples before approving the design.

Ceramic capacitors that use dielectrics such as Z5U, when used

in clamp circuits, may also generate audio noise. If this is the

case, try replacing them with a capacitor having a different dielectric or construction, for example a film type.

TinySwitch-lll Layout Considerations

Layout See Figure 15 for a recommended circuit board layout for TinySwitch-III.

Single Point Grounding

Useasinglepointgroundconnectionfromtheinputfiltercapacitor

to the area of copper connected to the SOURCE pins.

Bypass Capacitor (C BP )

The BP/M pin capacitor should be located as near as possible

to the BP/M and SOURCE pins.

Primary Loop Area The area of the primary loop that connects the input filter capacitor, transformer primary and TinySwitch-III together should be kept as small as possible.

Primary Clamp Circuit

A clamp is used to limit peak voltage on the DRAIN pin at turn

off. This can be achieved by using an RCD clamp or a Zener (~200 V) and diode clamp across the primary winding. In all cases, to minimize EMI, care should be taken to minimize the circuit path from the clamp components to the transformer and TinySwitch-III.

TNY274-280

TOP VIEW Input Filter Capacitor Y1- Capacitor HV DC INPUT T r a n s
TOP VIEW
Input Filter
Capacitor
Y1-
Capacitor
HV DC
INPUT
T
r
a
n
s
f
S
S S S
o
r
C BP
m
e
TinySwitch-III
r
EN/UV BP/M D
Opto-
coupler
DC
OUT
Maximize hatched copper
areas (
) for optimum
+
-
-
+

heatsinking

Output Filter Capacitor
Output Filter
Capacitor

PI-4278-013006

Figure 15. Recommended Circuit Board Layout for TinySwitch-III with Under-Voltage Lock Out Resistor.

Thermal Considerations The four SOURCE pins are internally connected to the IC lead frame and provide the main path to remove heat from the device. Therefore all the SOURCE pins should be connected to a copper area underneath the TinySwitch-III to act not only as a single point ground, but also as a heatsink. As this area is connected to the quiet source node, this area should be maximized for good heatsinking. Similarly for axial output diodes, maximize the PCB area connected to the cathode.

Y-Capacitor The placement of the Y-capacitor should be directly from the primary input filter capacitor positive terminal to the common/ return terminal of the transformer secondary. Such a placement will route high magnitude common mode surge currents away from the TinySwitch-III device. Note – if an input π (C, L, C) EMI filter is used then the inductor in the filter should be placed between the negative terminals of the input filter capacitors.

Optocoupler Place the optocoupler physically close to the TinySwitch-III to minimizing the primary-side trace lengths. Keep the high current, high voltage drain and clamp traces away from the optocoupler to prevent noise pick up.

Output Diode For best performance, the area of the loop connecting the secondary winding, the output diode and the output filter capacitor, should be minimized. In addition, sufficient copper area should be provided at the anode and cathode terminals of the diode for heatsinking. A larger area is preferred at the quiet cathode terminal. A large anode area can increase high frequency radiated EMI.

TNY274-280

Quick Design Checklist

As with any power supply design, all TinySwitch-III designs should be verified on the bench to make sure that component specifications are not exceeded under worst case conditions. The following minimum set of tests is strongly recommended:

1. Maximum drain voltage – Verify that V DS does not exceed 650 V at highest input voltage and peak (overload) output power. The 50 V margin to the 700 V BV DSS specification gives margin for design variation.

2. Maximum drain current –At maximum ambient temperature, maximum input voltage and peak output (overload) power, verify drain current waveforms for any signs of transformer saturation and excessive leading edge current spikes at

startup. Repeat under steady state conditions and verify that the leading edge current spike event is below I LIMIT(Min) at the end of the t LEB(Min) . Under all conditions, the maximum drain current should be below the specified absolute maximum ratings. 3. Thermal Check – At specified maximum output power, minimum input voltage and maximum ambient temperature, verify that the temperature specifications are not exceeded for TinySwitch-III, transformer, output diode, and output capacitors. Enough thermal margin should be allowed for part-to-part variation of the R DS(ON) of TinySwitch-III as specified in the data sheet. Under low line, maximum power, a maximum TinySwitch-III SOURCE pin temperature of 110 °C is recommended to allow for these variations.

TNY274-280

 

ABSOLUTE MAXIMUM RATINGS (1,5)

 

DRAIN Voltage DRAIN Peak Current: TNY274

-0.3

Lead Temperature (4)

260 °C

400

V to 700 V (750) mA (2)

TNY275

560

(1050) mA (2) (1350) mA (2) (1650) mA (2) (1950) mA (2)

Notes:

TNY276

720

1. All voltages referenced to SOURCE, T A = 25 °C.

TNY277

880

2. The higher peak DRAIN current is allowed while the DRAIN voltage is simultaneously less than 400 V.

TNY278

1040

TNY279

1200 (2250) mA (2) 1360 (2550) mA (2) -0.3 V to 9 V 100 mA

3. Normally limited by internal circuitry.

TNY280

EN/UV Voltage EN/UV Current BP/M Voltage Storage Temperature Operating Junction Temperature (3)

4. 1/16 in. from case for 5 seconds.

5. Maximum ratings specified may be applied one at a time, without causing permanent damage to the product. Exposure to Absolute Maximum Rating conditions for extended periods of time may affect product reliability.

 

-0.3

V to 9 V

-65

°C to 150 °C °C to 150 °C

-40

 

THERMAL IMPEDANCE

Thermal Impedance: P or G Package:

(θ JA )

(θ JC ) (1)

70 °C/W (2) ; 60 °C/W (3) 11 °C/W

Notes:

1. Measured on the SOURCE pin close to plastic interface.

2. Soldered to 0.36 sq. in. (232 mm 2 ), 2 oz. (610 g/m 2 ) copper clad.

3. Soldered to 1 sq. in. (645 mm 2 ), 2 oz. (610 g/m 2 ) copper clad.

   

Conditions

       

Parameter

Symbol

SOURCE = 0 V; T J = -40 to 125 °C See Figure 16 (Unless Otherwise Specified)

Min

Typ

Max

Units

CONTROL FUNCTIONS

 

Output Frequency in Standard Mode

 

T J = 25 °C See Figure 4

 

Average

124

132

140

 

f

OSC

Peak-Peak Jitter

 

8

 

kHz

Maximum Duty

DC

 

S1 Open

62

65

 

%

Cycle

 

MAX

EN/UV Pin Upper Turnoff Threshold Current

I

DIS

 

-150

-115

-90

µA

EN/UV Pin

   

I EN/UV = 25 µA

1.8

2.2

2.6

 

Voltage

V

EN

I EN/UV = -25 µA

0.8

1.2

1.6

V

 

I S1

EN/UV Current > I DIS (MOSFET Not Switching) See Note A

 

290

 

µA

   

TNY274

 

275

360