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Index
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
System Overview
Safety Design Considerations
System Architecture
System configuration
System Highlights
Relay Logic Description
Hardware Description
a. Processor Module
b. Multi-function Module
c. Analog Input Module
d. Signal Conditioning Module
e. Status Input Module
f.
Relay Output Module
g. Display Module
h. Power Supply Module
Software Architecture and Description
Interconnection Details
a.
FDCS Unit to Terminal SB
b.
FDCS Unit to Display unit
c.
FDCS Unit to Signal conditioning unit
d.
Signal Conditioning Unit to SB Terminal
e.
FDCS Unit to PC
Wiring Details for FDCS-9648 of WAG-7 Locomotive
List of Input/Outputs
Trouble shooting Procedure of FDCS 9648
Operation of the Display panel
Fault Messages
Page 1 of 69
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1. System Overview
Existing electric locomotives working on Indian Railways are having conventional
control and interlocking of its different circuits for its safe operation. These are
achieved through an array of Electro-mechanical and Electro-pneumatic relays
and contractors. Such relay-based control involves a large amount of cabling and
a number of interlocking contacts and interconnections, which are not only
maintenance intensive but are unreliable too.
Interlocking of relays inside the loco was used to have some predefined
sequence of operation for proper operation of the different functional blocks of
the loco. For this purpose, interlocking of the relays are used to derive some
combinatorial, sequential and delay logic circuits Other than this, the purpose of
the relays is to ensure the safety of the loco against malfunctioning of the various
electrical equipments due to their different modes of failures. Further, failure of
the relay contacts often makes the situation more complicated.
In the existing loco, in case of any fault, it is very difficult to locate the actual root
cause. This not only increases the down-time of the locos, its servicing and
maintenance also becomes difficult. Identification of the exact fault condition and
its correct maintenance is important to maintain the healthy condition of loco.
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2. Design Considerations
The heart of the system is obviously the microprocessor, which acquires the
status of the relays and some analog parameters, processes the information and
issues control outputs to operate and control the various electrical equipments
inside the loco. The purpose of the loco is to run passenger or goods train from
one location to another. Hence, safety of the passengers is one of the prime
considerations for all the interlocking, be it derived through relays or through
electronics & software. Failure to ensure its safe operation may also lead to loss
of property.
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Thus considering both safety and availability of the equipment, the architecture
adapted in the present system is 2-out-of-2 operations with full hardware
redundancy in the input and processor level. Output drive is combined for both
since it would the same relay or contactor. However, each of the subsystem has
its own redundancy and testability to ensure its individual function. Normal
operation will be carried out based on 2-out-of-2 voting in taking all the logic
processing and vital decisions. However, in case of a failure in one set of
hardware, the second set would continue its operation but with an alarm,
ensuring a certain degree of safety.
3.
System Architecture
The basic architecture adapted for the Fault Diagnostic and Control System is
shown in Fig. I. Each individual processor has its own digital and analog input
cards. Each status input is read by each processor through two separate optoisolators to ensure the correctness of input data individually through dual
redundancy. Correctness of analog inputs is assured by feeding of the same
signal through multiple paths using separate hardware. Outputs of both the
processors are combined in the output card to drive the external relays.
The Multi-function card gives the synchronization pulse to run the two processors
in collusion. It also has the necessary selection logic to select the processor,
which will download all the necessary information to the display units based on
the keyboard interaction. It also drives the safety relay, which will ensure the
Page 4 of 69
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safety of the system under the worst-case condition of multiple failures in the
system by withdrawing the power to drive some of the vital external relays of the
loco.
All the status inputs are available in the form of 110 VDC input for ON condition
and no voltage for OFF condition. Analog voltages are available in very high
voltage, which are attenuated in the signal-conditioning box and then fed to the
analog module. Six TM currents are sensed through the voltage drop at shunt of
Traction Motor by means of low voltage. Isolation amplifiers are used for feeding
each input to the processor after proper scaling. All the outputs are driven by
solid-state switch with short-circuit protection to drive the external relays with
110VDC. Elaborate testability at the output has been kept to ensure the integrity
of the output status.
Each of the two processors interfaces to the I/O modules through separate I/O
bus so that in case one of failure of one of the busses, the other can still continue
with the operation. Communication between the two processors is carried out
through inter-processor communication bus to carry out the voting process. The
processors have individual health lines which are also interchanged to
crosscheck the proper functioning of the system. One USB port is provided in
each CPU card to download the data to USB memory device or Pen Drive.
The system uses two display units to prompt the various status and alarm
conditions of the loco. A 40 alphanumeric character x 4 lines LCD display unit is
used for this purpose. It also has two segments 7-SEG Display to display the
current notch position. Five numbers of keys are provided to enable the user to
browse through the status and fault condition of the loco.
receives +110V power from LOCO battery i.e. from wire no. 700. This unit has a
built in power supply module to convert +110V to +5V and +12V.
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+110V DC
PSU-A
PSU-B
Analog
Input
DIODE OR-ing
+5V
Display
Unit 1
Analog
Input
+12V
TM CURRENT
SENSING
MODULE - A
Display Bus A
CPU-A
I/O
Bus
A
Display
Bus.
Signal
Conditio
ning
Module.
MultiFunction
Card.
Sync.
IPC
Comm.
Bus
TM CURRENT
SENSING
MODULE - B
Input Module
Interface
A
Input
Scanner
CPU-B
Display
Unit 2
I/O
Bus
External
Status
Input
Interface
B
B
Display Bus B
Output Module
Interface
A
Control
Outputs.
Output
Driver.
Interface
B
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4. SYSTEM CONFIGURATION
The system contains three separate sub-racks, which are fitted inside the main
cabinet. The lowest sub-rack contains two Processor cards, one Multifunction
card, one Analog Input cards and two Power Supply card. In the middle sub-rack
there are eight Input cards, out of these one is redundant card and one is spare
card. All the external input wires are routed from the backplane to the terminating
19/17 pin circular (bayonet type) connectors mounted on the cabinet. The
uppermost sub-rack houses five output cards, out of these three for 48 O/P, one
is redundant and one is s spare output card, which are common for both the A &
B processors. The uppermost sub-rack also has one card called filter card. All
the external output wires are similarly extended from the backplane to the 19 pin
circular connectors placed on the cabinet. The front side of the cabinet is a
detachable door. The door is also provided with a lock to protect the system from
unauthorized access. The rear side of the cabinet is having four M12 nuts to fit
the system to AC2 panel wall.
Normally the FDCS can accept 128 digital inputs (96 I/P for 6 I/P card, 16 I/P for
one Redundant I/P card, 16 for one spare I/P card) and 12 analog inputs and can
drive up to 80 digital outputs (48 O/P for 3 O/P card, 16 O/P for one Redundant
O/P card, 16 for one spare O/P card). The inputs enter to the FDCS through 7
no. of 19 pin allied connectors (one is redundant) and outputs goes out from the
system through 4 no of 19 pin allied connectors (one is redundant). A 3-pin
bayonet type connector is used for 110V DC power supply. The connectors are
fitted on the topside of the cabinet. The cables for inputs/outputs used are 19
core PTFE insulated 90% shielded type of 1 sq. mm. Outer jacketing of FRLS
material is of suitable grade. One end of the cables is terminated to the allied
connector and other end is terminated at 2.5 sq. mm cable lugs for M5 terminal
stud with loco cable number of ferrules. The cables used for power inputs are of
3 sq. mm are of suitable grade. The interconnection of various connectors of
FDCS main cabinet, display units, and signal conditioning box, Traction Motor
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Each FDCS system consists of one signal-conditioning box. In this box there is
one signal-conditioning card. High voltage analog inputs are terminated on the
card through 6-way M5 terminal strip, which is fitted one side of the box. The
voltages are down converted to 2.0V. These down voltage signals pass through
10-pin allied connector to FDCS main system, which is, fitted another side of the
box.
Each FDCS system consists of two traction motor current sensing box. In this
box there is one traction motor current sensing card. Low voltage (range between
45mV to 75mV) analog inputs are terminated on the card through 6-way and 2way M5 terminal strip, which is fitted at side of the box. The voltages are
converted to 1.0V. These voltage signals pass through 10-pin allied connector to
FDCS main system, which is, fitted another side of the box.
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O
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T
P
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T
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T
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Page 9 of 69
Page 10 of 69
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OP
RDT
OP1
OP2
OP3
OP
SPR
INP
RDT
INP5
INP6
INP
SPR
DISP
1
SIG
CON
TM
1
TM
2
INP1
INP2
INP3
INP4
DISP
2
Page 11 of 69
PW
R
Date 27/12/07
Time 12:30
Insert BL Key
MENU
ACK
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ENTER
Page 12 of 69
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Signal Conditioning
Unit (in mm)
TM Current
Sensing Unit
(in mm)
102
62
180
180
385
46
210
210
NA
150 X 30
NA
NA
900(including connector)
180 (total)
Width
305
Breadth
Viewing
Area
Height
5.
System Highlights
Elaborate testability and dual hardware redundancy at all levels including the
processor for high degree of safety.
All Inputs and Outputs are optically isolated for protection against high
voltage, surges, transients and ground faults.
Total CMOS design for reduced power consumption and better MTBF.
Non Volatile Fault Memory stores last 512 events with all back ground data,
which can be retrieved sequentially through the display unit.
Provision of USB port in the Control Unit to download fault history from
system to USB storage device or pen drive.
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6.1
Current from overhead is controlled by means of two pantographs, PT-1 and PT2. These are operated by hand-operated switch ZPT-1 & ZPT-2.Compressed air
pressure is used to connect and disconnect the pantograph from the overhead
high tension wire.
To raise the pantograph in CAB-1 or CAB-2, the corresponding two relays VEPT1 or VEPT-2 are energized, depending on the status of the switch ZPT-1 or ZPT-2.
In position O of the two switches ZPT-1 & ZPT-2, both the pantographs are
OFF, i.e. VEPT-1 & VEPT-2 are not energized.
6.2
The battery charger is fed from the supply of ARNO/Static converter. The charger
unit provides 110V DC and a load of 20 amps. A relay QV-61 has been provided
across the charger, indicating its working. As long as charger is ON, QV-61 is
energized and the signaling lamp LSCHBA remains OFF.
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in its path then DJ will be tripped resulting disconnection of power feeding from
the 25 KV HT overhead.
CONDITIONS OF CLOSSING DJ:
1.
2.
After this, Q45 have to be ON. The conditions required for this are:
a. BP1DJ closed
b. BL1DJ/BL2DJ closed
c. ZPT1/ZPT2 closed (Alternately BV closed) and
d. BL1RDJ/BLR2DJ pressed and released as soon as LSDJ OFF.
3.
A. For ARNO based Loco :Now Q118 is to be energized. For this, the conditions required are:
a. C118 must be de-energized,
b. Blower motors must be OFF so that C105, C106, C107 de-energized,
Q46 de-energized (between-notch relay) and
c. GR within 0 to 5 Notches.
B. For Static Converter based Loco:Now Q118 is to be energized. For this, the conditions required are:
a. Blower motors must be OFF so that C105, C106, C107 de-energized,
Q46 de-energized (between-notch relay) and
b. GR within 0 to 5 Notches.
4.
5. A. For ARNO based Loco :As Q44 and Q45 are ON and QCVAR OFF (Arno not started), C118 will
be energized closing the Arno starting contactor and introducing the arno
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starting phase by R118 and so Q30 will be ON. And Q44 will be latched
through Q30.
B. For Static Converter based Loco:As QV60 is in OFF condition, through NC contact of QV60, SI will get ON.
It causes 440V A.C feed in wire no. 991 and 993 i.e. output of SI, by which
Q30 gets on via resistance RQ30. Thus Q44 will be latched through Q30.
6. A. For ARNO based Loco :As C118 energized, DJ starting coil EFDJ will be energized. On opening of
C118 (after ARNO starting) EFDJ will be de-energized but DJ will be hold
by MTDJ.
B. For Static Converter based Loco:As Q45 is energized, DJ starting coil EFDJ will be energized through NC
contact of DJ and N/O contact of Q45 (This N/O contact gets closed in this
condition). As EFDJ is energized, NC contact of DJ will open. Hence
EFDJ will be de-energized but DJ will be hold by MTDJ.
7. The number of protection relays, such as QOA, QLA, QLM, QOP-1, QOP2, QRSI-1, QRSI-2 and QPDJ should be closed.
8. When Blower motors are ON after DJ closing, C105, C106, C107 will be
energized, so the NC chain of the above 3 relays in the path of Q118 will
be opened. Since Q118 is a time lag relay, it will be dropped after 5 sec,
so that the path remains closed till the chain of protective relays QVMT-1,
QVMT-2, QVRH, QVSL-1, QVSL-2, QPH, QCVAR close the alternate
path.
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Tripping of DJ:
TRIPPING OF DJ INSTANTANEOUSLY.
A)
1.
Through tripping of the relay QOA for ARNO based Loco and QSIT for
SI based Loco.
B)
2.
Through tripping of the relay QLA for ARNO based Loco only.
3.
4.
5.
6.
7.
8.
For ARNO based Loco: - Q30 is the ARNO voltage condition relay. It remains
picking up between 215V - 260V AC.
For SI based Loco: - Q30 is the Aux. Rectifier Side voltage condition relay of
Static Inverter. It remains picking up between 400V 460V A.C
2.
OVERRIDING
OPERATION
OF
DJ
OVER
RECTIFIER
BLOWER
PROTECTION RELAYS:
For bypassing any of the contacts QVSI-1/QVSI-2, it is necessary to put the
handle of HVSI-1 and HVSI-2 in the O or 3 position.
C)
Q118 drops out after delay of 5 seconds and opens energizing circuit of relay
Q44 which trips the main circuit breaker after a further delay of 0.6 second
following any of the following faults.
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6.4. A.
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2.
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Normally, the relay Q44 is switched by the contact of Q45, if the GR is not
there in between two notches (stuck at notch faults) and Q118 has picked
up.
3.
On closing of Q44 and Q45 the ARNO starting contactor coil C118 gets
energized to generate a phase difference between the voltage and current
for starting the ARNO which is a single phase induction motor.
4.
6.4. B.
contactors
of
the
blower
motors
may
be
energized
Page 19 of 69
if
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The starting of the motors for the traction motor blower and the
transformer oil cooler are in the following sequence.
1.
2.
3.
keeping the disconnecting switch for oil cooler blower motor HVRH
in position 1 or 3. Coil of C107 gets energized and transformer oil
cooling blower motor gets started.
4.
When the relay C107 is energized, the time delay relay QTD105
gets energized after a time delay of 5 seconds and its contact
energized the coil C105 if the disconnecting switch for traction
motor blower no.1 HVMT-1 is in 1 or 3 position and also
energized the time delay relay QTD106 after a delay of 5 seconds.
The contact of QTD106 energized the relay C106 if the
disconnecting switch for traction motor blower no.2 HVMT-2 is in 1
or 3 position. The relay C105 & C106 latches the contacts by the
self-contact C105 and C106.
5.
For WAG-7 Loco having Static Inverter has C108 relay also. If
C145 is in ON condition and C107 in OFF condition only then C108
will be energized. In WAP-4 Loco, C108 is not available.
Note:
Driver can switch off the blower motor contactors C107, C105, and C106 by
directly putting the disconnecting switches HVRH, HVMT-1 and HVMT-2 in
position 0 or 2 respectively.
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started, the relay for unloaded valve Q119 is under energized condition through a
chain of NC contacts of C101, C102, C103 and the N/O contact of Q119 make
unloaded valves VEUL1-3 energized. Unloaded valves are electro-pneumatic
valves work to avoid the backpressure of the delivery pipe at the time of starting of
compressors. First C101 and C103 are energized which results opening of path for
Q119 coil. The path of C102 is closed through N/C contact of Q119. So C102 starts
after dropping of Q119. The purpose of unloaded valves is served through the 5
time lag of Q119.
O8
VEUL
5sec
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6.8
The traction motor double reverser J1J2, pneumatically controlled, connects the
exciting windings of the motor in such a way that these carry current in one
direction or in the other thus enabling the locomotive to run in either direction.
6.8.1 OPERATION OF TRACTION BRAKING REVERSER IN RUNNING
POSITION
1) Main circuit breaker DJ must be closed.
2) Tap Changer GR must be in position O (zero)
3) The selected position of the MP must be coincide with the corresponding
operating position of the switches CTF[R]/CTF [B]
4) Supervision takes place via the auxiliary contacts of reversers J1 J2.
6.8.2 OPERATION OF TRACTION BRAKING REVERSER IN BRAKING
POSITION
1) Main circuit breaker DJ must be closed.
2) Tap Changer GR must be in position O (zero)
3) The selected position of the MP must be coincide with the corresponding
operating position of the switches CTF[R]/CTF [B]
4) Supervision takes place via the auxiliary contacts of reverser
Page 22 of 69
6.8.3 OPERATION
OF
TRACTION
MOTOR
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DOUBLE
REVERSER
IN
FORWARD DIRECTION
1) Main circuit breaker DJ must be closed.
2) Tap Changer GR must be in position O (zero)
3) The selected position of the reversing drum MPJ must be coincide with the
corresponding operating position of the switches J1J2 [F]/J1J2 [R]
4)
Supervision takes place via the auxiliary contacts of reverser CTF[R]/CTF [B].
6.8.4 OPERATION
OF
TRACTION
MOTOR
DOUBLE
REVERSER
IN
REVERSE DIRECTION
1) Main circuit breaker DJ must be closed.
2) Tap Changer GR must be in position O (zero)
3) The selected position of the reversing drum MPJ must be coincide with the
corresponding operating position of the switches J1J2 [F]/J1J2 [R]
4)
Supervision takes place via the auxiliary contacts of reverser CTF[R] CTF [B].
The traction/braking switch CTF1-3 with pneumatic control connects the
power circuits of motors for traction or braking. Both J1-2 and CTF1-3 can
be changed over the 0 position of GR.
6.9
NOTCHING IN LOCO
Inside the Loco, the main transformer (primary fed by 25 KV) comprises
one autotransformer with 32 taps (called notches) and a step down
transformer with two separate secondary. The primary of the step-down
transformer is connected to one of 32 taps of the autotransformer by
means of 32-step tap changer GR, which is driven by a pneumatic
servomotor SMGR. The passage from one tap of transformer to another
takes place on load.
When GR value is increasing it is called notch-up of the loco and when
decreasing it is called notch-down. Notching is held during running
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Tap changer down valve SMGRVE2 DOWN is energized both for the
running braking drum MP at running and braking position, provided
1. ZSMS must be in position 1(ON).
2. ZSMGR is ON.
3. GR is in 1 to 32 in any of the valid position.
4. Notch to notch relay Q52 and slip protection relay Q51 must
not be energized.
5. The relay Q50 must be closed.
B)
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To ensure safety, there exists the arrangement of auto regression i.e. tap
changer automatically comes to zero from any high notch value. Auto regression
occurs in case of ARNO over voltage or wheel slip or fall in brake
Pipe pressure monitored by air brake governor as follows:
a. In case of ARNO over voltage, auto regression occurs via Q20
b. In case of wheel slip, auto regression occurs via Q48.
c. In case of fall in brake pipe pressure, auto regression occurs via
QRS relay which causes energizing of Q51 and so auto
regression.
d. If relay Q50 is de-energized in any case then auto regression
Takes place via Q50.
6.10. BRAKE FAIL PROTECTION VALVE IP (MECHANICAL BRAKE)
IP valve is generally used for braking when normal brake fails to work properly. It
is generally electrically operated mechanical brake. Operation of IP valve is
controlled by FDCS. It is Output22 of FDCS. If Out22 is in ON condition, IP valve
is in de-energized condition hence no braking. If Out22 is in OFF condition, IP
valve is in energized condition hence mechanical brake come in to work.
This Output will ON if
1. Q30 is ON or CTF is in Braking side and
2. MP in Braking side or Input73 (GR 0_5 for WAG-7, GR 11_32 for WAP-4)
is in ON condition.
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For WAP-4 type Locomotive there are two more shunting contactor also named
Sx41 and Sx42.
By pressing switch ZQWC, the weight transfer relay QWC can be energized in
J1J2 [FOR] or J1J2 [REV] condition for notch value 0-10, thus activating O20 and
O21 (S13-S63).
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DJ
ON
OFF
OFF
ON
b. LSCHBA (GREEN):
Lamp LSCHBA will be ON as soon as the driver inserts the BL key. On
closing DJ, lamp LSCHBA extinguishes after picking up of the relays QV-61
and QCVAR on completion of starting of the ARNO.
c. LSGR (GREEN):
The lamp LSGR indicates whether the tap changer GR is at position 0 or
away from that position. The relay QV62 should be ON if GR is at zero
position. The lamp LSGR is switched on by the way of the contacts of QV62.
d. LSB (YELLOW):
The lamp LSB is switched ON by the relay QV64, which in turn is energized
by the contact of the relay Q50, which is normally closed. The lamp will be
OFF if the Q50 is in ON condition.
e. LSP (RED):
If signaling checking lamp switch BPT-1or BPT-2 switch is pressed or wheel
slip relay Q48 is closed, then LSP glows.
Page 27 of 69
f.
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LSRSI (YELLOW):
7.
Hardware Description
The system is provided with three motherboards, which are fitted at the backside
of three sub racks. The cards are plugged to the motherboard through EURO
connectors. To ensure the correct insertion of cards, mechanical polarization is
provided at the backplane by positioning the EURO connectors at different level
for different cards. The advantage with this arrangement is that the same types of
cards are interchangeable and at the same time the insertion of a card at wrong
slot is prevented.
The system consists of two processor cards with a common set of Input Cards,
both analog and digital, and common Output and Multi-function Card set. The
power supply card provides power to both the processor sub-systems.
Each of the Digital Input Cards accommodates 16 external inputs. Three such
Input cards support altogether 128 inputs. For both the processors, altogether
eight input cards are there with complete dual hardware redundancy. Out of
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these eight input card one is redundant and one is spare. The system presently
uses 80 inputs and the rest are available for future expansion of its functionality.
The analog card interfaces to 12 external analog inputs. Each of the analog
inputs have optical isolation amplifier to protect the system from harmful external
high voltage.
The system has five output cards. Out of these five output cards, one is
redundant and one is spare. Each output card drives 16 outputs through solidstate FET switches. Each switch can drive typically 3 Amps from 110Vdc supply
for driving external relays. Again each of the switches is also provided with short
circuit protection so that in case of accidental overload or external short-circuit
the switch is tripped to protect the switches. Altogether five output cards are
provided in the system to support 80 outputs, out of which, 40 outputs are used
at present. The rest are there for future expansion.
The multifunction card provides the synchronization clock to both the processors.
It also processes the health signal of the two processors, which is used to arm
the output drives of the output module. The combined health signal is also used
to drive a safety relay, which provides 110V power to the first two output cards
driving most of the vital relays. In case of a critical fault, the processors go to a
safe state by withdrawing the health signals, which in turn trips the safety relay to
remove the power from the first two output cards for driving the corresponding
outputs.
The system has two power supply card. One is spare. User can switch on any
power supply card or both. The power supply unit produces the requisite +5Vdc
and +12Vdc power for the system from the 110Vdc power supply. It has two
separate controllers for generating those outputs. Switched-mode technology is
used to increase the efficiency of the power supply and thus produce less heat
inside the cabinet.
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Each FDCS system has two display panels; one is placed in the front cab and
the other in the rear cab. The system communicates with each panel through an
RS485 communication link. Whenever an alarm comes in the relay logic, it is
displayed to both display panels. The display unit of the cab, which contains the
BL key, will give audio annunciation to draw the attention of the driver. The audio
buzzer gets deactivated after getting acknowledgement from the user through the
key ACK. The minor alarms are displayed only for 6 sec without any audio
annunciation. The user can browse through the status of inputs and outputs
with the help of five keys on the keyboard. Also the faults (if exists) can be
viewed one by one on the display panel. The present notch value is always
displayed on the 7 segment LED.
The FDCS system has got the feature of logging of status and faults that can be
downloaded to a USB mass storage device. With the help of a history buffer in
the memory unit of CPU, the system is enabling to download last 512 faults each
with background data.
Description of each individual module is given below.
7. a
PROCESSOR CARD
1. Card Name:
PROCESSOR CARD
2. Card No.:
P09/FDCS01
3. Card Requirement: This is the heart of the FDCS containing the CPU and
all its associated input & output interfaces. It controls the entire hardware,
processes all digital and analog data and based on input data, it issues the
corresponding output command.
4. Functional Capacity
Processor
RAM space
- 32K bytes
EPROM space
- 64K bytes
Clock Frequency
- 8MHz
Page 30 of 69
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Built-in internal & external watchdog with real time task monitor to keep
the system continuously on track.
USB support.
A number of alarms LEDs are there in the processor card, which display alarm
for different conditions of the processor and its related hardware. Definitions of
the alarm LED are as follows.
A
A. System OK. (Green)
C
D
G
H
Page 31 of 69
USB
PORT
Stesalit Limited
7. b. MULTIFUNCTION CARD
1. Card Name:
Multifunction Card
2. Card No.:
P09/FDCS12
3. Card Requirement: This card accommodate various hardware for both the
Processor module and Interface hardware for Main
System and the Display modules.
4. Functional Capacity:
Power shutdown switch for Output card 1 and 2 where driver of the vital
outputs are exists.
2. Card No.:-
P09/FDCS02
3. Card Requirement: - This card accepts the various inputs with double
modular hardware redundancy.
4. Functional Capacity: - Each Digital Input card contains 16 digital inputs. The
System has 8 input card out of these 1 is redundant and 1 is spare card. The
system has a provision of 128 digital inputs, which are distributed to both the
Processor card.
Page 32 of 69
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7. d. OUTPUT CARD
1. Card Name:
Output Card
2. Card No.:
P09/FDCS11
Page 33 of 69
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3. Card Requirement: This card drives various high voltage relays through
P-channel MOSFET.
4. Functional Capacity: - Each Output card contains 16 outputs. The system
has five output card out of these one is redundant and one is spare. The
system has a provision of 80 outputs.
5. Functional Description of the Output card:
The system has a provision for 80 digital outputs. All outputs are optically
isolated. The system is a two out of two system i.e. two processor will work
simultaneously and in case of failure of one the other will take the whole
responsibility of the system.
Output data from the two-processor cards are first latched on individual
buffers. This is crossed checked by the individual processor through
feedback ports. The data is then passed through an OR gate to combine
the activation signals from the individual processor. A second stage of
feedback is provided from this stage. This ORed output is used to drive
opto-isolators, which in turn switch ON the MOSFET for driving the external
relay.
The driver circuit is short circuit current protected. The current protection is
achieved by considering the resistance drop due to over current flowing in
the input side, as a result a thyristor will be ON, which pulls the gate to the
high voltage towards source; hence put the FET into cut-off. A Zener diode
is used between source and gate of the FET, to protect gate to source
break down, due to some fault in the circuit.
The output latches are armed with the health line of the processors
extended through the backplane. In case of any failure in a processor subsystem, the processor identifies the fault and goes to a safe state where it
Page 34 of 69
Stesalit Limited
negates the health line. In the output card, this negation of the health line
forces the output drive of the faulty processor to the OFF state. The system
would then continue its operation with the help of the other processor subsystem.
2. Card No.:
P09/FDCS07
3. Card Requirement: This card converts power from 70V-135V input power
supply to +5V and +12V for the operation of FDCS.
4. Functional Capacity: Input Voltage
- 110V nominal
(70V to 135V)
Stesalit Limited
from the 110V signal earth. They are also mutually isolated from each other.
Optically isolated feedback is used for voltage stabilization, maintaining the
ground isolation.
Elaborate alarm monitoring circuit is used to raise alarms if the voltage goes
beyond certain limits. The input voltage is also monitored to be within a
specified limit, beyond which the switching regulator is switched off raising
over voltage or under voltage alarm. The output voltages are also required
to be within a specified limit beyond which alarms would be generated. The
two CPU cards monitor all the PSU alarms.
There are four testing points and seven alarm LEDs
in the each PSU card as shown in figure.
A. PSU ON (Green)
C
Q
R
E
F
G
7.3
The system has a provision of 12-analog inputs. Out of 12-analog inputs, four
channels are used at present and the rest is kept open for future. Out of these
four, three of them are for A.C inputs to measure the phase voltages of the
ARNO and one is DC high voltage input (1000V) coming from the traction motor.
Page 36 of 69
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External high voltage analog inputs, scaled down by signal conditioning unit and
low voltage analog input, scaled up by TM Current sensing unit are taken through
a differential amplifier stage in the Analog input card. Thus the effect of any
difference in analog ground potential (ANGND) would be cancelled out. The
swing of analog signals, from the output of differential amplifier, is kept within
+5V and GND. This voltage is fed to the CPU card through the analog interface
card for A/D conversion. There are pots with each analog channel to adjust the
gain to the proper value. These are accessible from the front for trimming if
required. The front panel of the analog module is shown below
7.4
High voltage analog inputs are terminated on the card and are down converted.
The 1000V dc is down converted to 2.0V first by simple resistance drop. The 3
inputs for 3 phases AC, high voltages are first rectified and then the rectified
output is down converted by resistance drop.
The Analog Module transfers the external analog signal through optical amplifiers
to isolate the signals from dangerous external voltages. Each of the analog
sections is powered by separate isolated power supplies so that none of the
external voltages have any mutual relationship. The isolated power supplies are
generated by four sets of switching regulators working from 12Vdc of the main
system. This power is taken with the help of the circular connector connecting the
signal-conditioning unit with the main unit.
7.5
Six Traction Motor shunt voltage are terminated on the card and are up
converted. The almost 75mV D.C voltage is up converted or amplified to a level
of almost 1V by differential amplifier.
The Analog Module transfers the external analog signal through optical amplifiers
to isolate the signals from dangerous external voltages. Each of the analog
Page 37 of 69
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7. h. DISPLAY CARD
1. Card Name:
Display Card
2. Card No.:
P09/FDCS09
3. Card Requirement: This card display various faults, input output status,
notch position. By using the keyboard, which is attached with it, the user
can see the fault history, current fault, I/O status etc. In the Display
Module there is a power supply card which generates +5V and +12V from
110V.
4. Functional Capacity
Processor
RAM space
- 32K bytes
EPROM space
- 64K bytes
Clock Frequency
- 8MHz
Input Voltage
- +110V nominal
Output Voltage
Protection
Efficiency
Input
Output
- Short circuit
- Better than 75% at nominal
Page 38 of 69
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7.7
DISPLAY MODULE
The card is housed in the Display Unit. In an FDCS system two display units are
required for two cabins. The main component of the card is an 80196KC
microcontroller, which actually drives two 7-segment LEDs, one 40character X
4lines LCD display and a buzzer.
Serial communication with the main controller is done in RS485 standard with
ground isolation.
8. Software Architecture
Microprocessor Based Control and Fault Diagnostic System is a dual processor
redundant system. Normally it works in 2-out-of-2 mode i.e. two processor are
working simultaneously in conjunction to each other. In case of failure of any of
the processor or its sub-system, the other processor will take up the whole
responsibility of the system, indicating an alarm that the system is working with
one processor. Integrity of the system will then be ensured through the built-in
testability with the various functional blocks.
It is a system, where apart from its basic purpose of monitoring the inputs and
controlling the outputs, safety is an important issue. A good level of safety and
reliability is achieved by managing the redundancy of both hardware and
software stage. With such a tightly coupled system, synchronization of the two
processors is a big issue. The synchronizer hardware in the multi-function card
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Stesalit Limited
gives the synchronizing clock to both the CPUs. Each of the processors takes the
synchronization information from the synchronizer and does the same specified
task at a particular instant of time.
In case of two out of two system, inter processor communication at various
stages is the heart of the system to ensure the safety and reliability. Information
acquired by each processor along with its processed outputs is interchanged to
ascertain the validity. In case of any mismatch, the faulty unit is isolated from the
system by forcing the software to a fail-safe core where it switches OFF all the
corresponding outputs and withdraws the health signal. The other processor
would then carry out the processing and control the outputs individually.
All the vital and time critical jobs are performed in a 10 msec periodic task,
invoked by the synchronizer. This task is basically an 8-step state machine. The
job of reading the inputs, processing the data for validity and relay status and
outputting the data is distributed among the 8 states in such a way that the
processor gets ample time to carry out other jobs. The cycle time to complete the
state machine is thus 80 msec. which is consistent with the response time of the
external relays.
Each of the processor cards reads the inputs through two separate optoisolators. It also receives additional two sets of data from the adjacent processor
through inter-processor communication. Thus each processor at a certain point
of time has four data for the same input. The validity of data is derived from these
four data sets to give a very high integrity of data. The logic used to validate the
data is given in the table shown below.
Page 40 of 69
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INPUT COMBINATION.
A
B
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
DATA
0
0
0
0*
0
0*
0*
1
0
0*
0*
1
0*
1
1
1
ALARM
SELFA
SELFB
/ADJ.B
/ADJ.A
0
0
0
1
0
1
0
0
1
0
0
0
0
0
1
0
1
0
0
0
0
0
1
0
0
0
0
1
0
1
0
0
FATAL
ALARM
0
0
0
1
0
1
1
0
0
1
1
0
1
0
0
0
=> Status of these data cannot be derived from these states. However, the
output is treated as OFF which is a safer state.
In case of output, the system uses OR-ing logic to feed the particular output. A
number of hardware feedbacks are taken to ensure the correctness of the output.
The software first cross-checks the equality of the output state derived from the
input status. If the equality does not hold good for a certain time out period
(typically 400 msec.), the total system would go to a safe state, since in 2-out-of2 voting, the system cannot decide who is correct.
Integrity of the output is checked against three levels of feedback and in case of
any mismatch, the respective processor would go to safe state. The various
tasks that the software would perform are given below.
Page 41 of 69
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Page 42 of 69
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Page 43 of 69
9.
Stesalit Limited
CSU1
LOCOMOTIVE TERMINAL
SB In AC2 Panel
6
CSU2
10
19
19
19
19
19
19
19
SIGNAL
CONDITIONING
UNIT in AC2
Panel
19
10
DISPLAY
UNIT NO. 1
FOR CAB A
10
Page 44 of 69
10
DISPLAY
UNIT NO. 2
FOR CAB B
Stesalit Limited
FDCS
LUG
Wire
Allied Connector
Connector type
on FDCS Unit
Connector type on
Cable
Digital Input 0 to 15
No.
Of
Pins
19
97B3102R-22-14P
Digital Input 16 to 31
19
97B3102R -2214PW
Digital Input 32 to 47
19
97B3102R-22
14PX
Digital Input 48 to 63
19
97B3102R-2214PY
Digital Input 64 to 79
19
97B3102R -2214PZ
6m length 19
Core shielded Teflon
wire (1 sq. mm dia each)
6m length 19
Core shielded Teflon
wire (1 sq. mm dia each)
6m length 19
Core shielded Teflon
wire (1 sq. mm dia each)
6m length 19
Core shielded Teflon
wire (1 sq. mm dia each)
6m length 19
Core shielded Teflon
wire (1 sq. mm dia each)
19
97B3102R - 20 29P
19
97B3102R-2029PW
19
97B3102R-2029PZ
Digital Output 0 to 15
19
97B3102F-2214S
6m length 19
Core shielded Teflon
wire (1 sq. mm dia each)
6m length 19
Core shielded Teflon
wire (1 sq. mm dia each)
6m length 19
Core shielded Teflon
wire (1 sq. mm dia each)
6m length 19
Core shielded Teflon
wire (1 sq. mm dia each)
Page 45 of 69
Signal Name
Digital Output 16 to 31
No.
Of
Pins
19
Digital Output 32 to 47
19
Digital Output 48 to 63
19
19
110V DC Power
Supply
Connector type
on FDCS Unit
Stesalit Limited
Connector type on
Cable
97B3102F-2214SW
6m length 19
Core shielded Teflon
wire (1 sq. mm dia each)
6m length 19
Core shielded Teflon
wire (1 sq. mm dia each)
6m length 19
Core shielded Teflon
wire (1 sq. mm dia each)
6m length 19
Core shielded Teflon
wire (1 sq. mm dia each)
6m length 3
Core shielded Teflon
wire (1 sq. mm dia each)
No. Of
Pins
10
10
No. Of
Pins
3
Connector type
on FDCS Unit
97B3102R-10-SL
3P
97B3102R-10-SL
3P
Connector type
on Cable
Display Unit side
97B3102F-10-SL
3S SB side: 2.5mm
Lugs
FDCS Unit side
97B3102F-10-SL
3S SB side: 2.5mm
Lugs
Page 46 of 69
Stesalit Limited
No. Of
Pins
10
Connector type
on FDCS Unit
97B3102R-18-1S
Connector type on
Cable
FDCS Unit side
97B3102R-18-1P
Signal Cond. Unit side
97B3102R-18-1P
No. Of
Pins
Connector type
on Cable
Connector
type on Sig.
Conditioning
Unit
Terminals
Terminal
provided
by CLW
TM Armature Voltage,
Battery
Terminals
Terminal
provided
by CLW
2.5m length 10
Core shielded
Teflon wire (1 sq.
mm dia each)
2.5m length 10
Core shielded
Teflon wire (1 sq.
mm dia each)
No. Of
Pins
Connector
type on
FDCS Unit
97B3102R18-8PW
No. Of
Pins
TM Current1, 2, 3
&4
Connector
type on SB
Terminal
provided by
CLW
2.5m length
Teflon
Wire (3 sq. mm
dia each)
No. Of
Pins
8
Connector type
on FDCS Unit
97B3102R-188PZ
Page 47 of 69
Stesalit Limited
No. Of
Pins
Connector type
on TM Current
Sensor Unit 1
Connector type
on Cable
Connector
type on SB
TM Current 5, 6, 7
&8
Terminals
Terminal
provided by
CLW
2.
A.
Input No.
Name Of Input
I-0
I-1
I-2
I-3
I-4
I-5
I-6
I-7
I-8
I-9
I-10
I-11
I-12
I-13
I-14
I-15
BP1DJ/BLDJ
BP2DJ/BLRDJ
QVMT1
QVMT2
QVRH
ZPT1_2
ZPT1_1
HVMT1_1
HVMT1_2
HVMT2_1
HVMT2_2
HVRH_1
HVRH_2
QVSI1/HVSI1
QVSI2/HVSI2
BLVMT
Screen Display
Name
BLDJ
BLRDJ
QVMT1
QVMT2
QVRH
ZPT1_2
ZPT1_1
HVMT1_1
HVMT1_2
HVMT2_1
HVMT2_2
HVRH_1
HVRH_2
Q/H_VSI1
Q/H_VSI2
BLVMT
Page 48 of 69
Cable type
and
Length in
meter
2.5m length
Teflon Wire (3
sq. mm dia
each)
Pin No.
Wire No.
SB No.
N1-A
N1-B
N1-C
N1-D
N1-E
N1-F
N1-G
N1-H
N1-J
N1-K
N1-L
N1-M
N1-N
N1-P
N1-R
N1-S
021
024
025
026
027
030
029
036
037
038
039
040
041
042
043
070
SB-1
SB-1
SB-1
SB-1
SB-1
SB-1
SB-1
SB-1
SB-1
SB-1
SB-1
SB-1
SB-1
SB-1
SB-1
SB-1
B.
Input No.
I-16
I-17
I-18
I-19
I-20
I-21
I-22
I-23
I-24
I-25
I-26
I-27
I-28
I-29
I-30
I-31
C.
Stesalit Limited
Name Of Input
ASMGR (B.N.)
BLCP/BLCPD
C101_3 FB
GR-0
GR-0_31
QPH/HPH
QVSL1/HVSL1
C105_FB
ASMGR (O.N.)
QVSL2/HVSL2
MP+ (R, B)
MPJ (FOR)
J1,J2 (FOR)
MP (+N-) R
MP- (R, B)
CTF (RUN)
Pin No.
W2-A
W2-B
W2-C
W2-D
W2-E
W2-F
W2-G
W2-H
W2-J
W2-K
W2-L
W2-M
W2-N
W2-P
W2-R
W2-S
Wire No.
072
074
075
076
077
078
079
061
082
080
093
091
095
096
097
100
SB No.
SB-1
SB-1
SB-1
SB-1
SB-1
SB-1
SB-1
SB-1
SB-1
SB-1
SB-1
SB-1
SB-1
SB-1
SB-1
SB-1
Pin No.
X3-A
X3-B
X3-C
X3-D
X3-E
X3-F
X3-G
X3-H
X3-J
X3-K
X3-L
X3-M
X3-N
X3-P
X3-R
X3-S
Wire No.
092
212
213
105
107
121
123
124
125
126
150
151
230
155
156
162
SB No.
SB-2
SB-2
SB-2
SB-2
SB-2
SB-2
SB-2
SB-2
SB-2
SB-2
SB-2
SB-2
SB-2
SB-2
SB-2
SB-2
Input No.
I-32
I-33
I-34
I-35
I-36
I-37
I-38
I-39
I-40
I-41
I-42
I-43
I-44
I-45
I-46
I-47
Name Of Input
MPJ (REV)
CTF (BRK)
MP (+,N,-) B
DJ_FB
J1,J2 (REV)
ZQWC
MPS (1-4)
MPS (2-4)
MPS (3-4)
MPS (4-4)
PVEF
PSA
BPQD
RGEB
SWC
QF & QE
Page 49 of 69
D.
Input No.
I-48
I-49
I-50
I-51
I-52
I-53
I-54
I-55
I-56
I-57
I-58
I-59
I-60
I-61
I-62
I-63
E.
Stesalit Limited
Name Of Input
BL
QOA/QSIT*
QOP1
QOP2
QRSI1
QRSI2
QLM
BV
C106_FB
ZSMGR
ZSMS
RSI
HMCS
L1 to L6_FB
HMCS & QD
C118 (N/C)/ QCON*
Pin No.
Y4-A
Y4-B
Y4-C
Y4-D
Y4-E
Y4-F
Y4-G
Y4-H
Y4-J
Y4-K
Y4-L
Y4-M
Y4-N
Y4-P
Y4-R
Y4-S
Wire No.
142
017
046
047
048
049
050
122
062
128
120
170
058
028
153
018
SB No.
SB-2
SB-2
SB-2
SB-2
SB-2
SB-2
SB-2
SB-3A
SB-3A
SB-3A
SB-3A
SB-3A
SB-3A
SB-3A
SB-3A
SB-3A
Pin No.
Wire No.
SB No.
N5-A
019
SB-3A
N5-B
N5-C
N5-D
N5-E
N5-F
N5-G
N5-H
N5-J
N5-K
N5-L
N5-M
N5-N
N5-P
N5-R
N5-S
052
060
068
059
SB-3A
Page 50 of 69
SB-3A
NOT IN WAP
200
973
149
157
SB-3A
SB-2B
SB-3A
219
216
217
218
203
SB-2A
SB-2A
SB-2A
SB-2A
SB-2A
F.
Input No.
I-80
I-81
I-82
I-83
I-84
I-85
I-86
I-87
I-88
I-89
I-90
I-91
I-92
I-93
I-94
I-95
G.
Stesalit Limited
Name Of Input
LOCO SEL 1
LOCO SEL 2
LOCO SEL 3
LOCO SEL 4
MU_FB
BPEMS-1&2
Q49_FB
Pin No.
A
B
C
D
E
F
Wire No.
B700
700
B237
067
SB No.
WAG ONLY
WAG ONLY
Input No.
Name Of Input
I-96 (I-14)
I-97 (I-21)
I-98 (I-22)
I-99 (I-25)
I-100 (I-49)
I-101 (I-50)
I-102 (I-51)
I-103 (I-52)
I-104 (I-53)
I-105 (I-54)
I-106 (I-64)
I-107 (I-63)
I-108 (I-48)
I-109 (I-15)
I-110 (I-17)
I-111
BVSI1 / HVSI1
QPH / HPH
QVSL1/HVSL1
QVSL2/HVSL2
QOA / QSIT
QOP1
QOP2
QRSI1
QRSI2
QLM
QLA/SI INT FAULT
QCON / C118-N/C
BL
BLVMT
BLCP / BLCPD
Screen Display
Name
Q/H_CSI1
Q/H_PH
Q/H_VSL1
Q/H_VSL2
QOA QSIT
QOP1
QOP2
QRSI1
QRSI2
QLM
QLA
C118_NC/QCON*
BL
BLVMT
BLCPD
Page 51 of 69
Pin No.
Wire No.
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
S
043
078
079
080
017
046
047
048
049
050
019
018
142
070
074
SB No.
I.
Output No.
Name Of Output
O-0
O-1
O-2
O-3
O-4
O-5
O-6
O-7
O-8
O-9
O-10
O-11
O-12
O-13
O-14
O-15
DJ
C118/BLSI*
VEPT1
VEPT2
DJ
C107
C106
C105
C101, C103
VEUL
J1,J2 (FOR)
J1,J2 (REV)
CTF (RUN)
CTF (BRK)
VE (UP)
C145
J.
Stesalit Limited
Screen Display
Name
DJ
C118 / BLSI
VEPT1
VEPT2
DJ
C107
C106
C105
C101_3
VEUL
J_FOR
J_REV
CTF_RUN
CTF_BRK
VE_UP
C145
Pin No.
Wire No.
SB No.
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
S
044
035
055
056
044
083
084
085
086
087
108
109
111
112
110
114
SB-3
SB-3
SB-3
SB-3
SB-3
SB-3
SB-3
SB-3
SB-3
SB-3
SB-3
SB-3
SB-3
SB-3
SB-3
SB-3
Pin No.
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
S
Wire No.
113
115
129
130
131
132
166
165
164
163
143
133
171
172
173
174
SB No.
SB-3
SB-3
SB-3
SB-3
SB-3
SB-3
SB-3
SB-3
SB-3
SB-3
SB-3
SB-4
SB-4
SB-4
SB-4
SB-4
Output No.
O-16
O-17
O-18
O-19
O-20
O-21
O-22
O-23
O-24
O-25
O-26
O-27
O-28
O-29
O-30
O-31
Name Of Output
VE (DN)
EVPHGR
Sx1
Sx2
Sx31
Sx32
IP
VESA2
VEF
VESA1
L1, L2, L3
L4, L5, L6
LSDJ
(R)
LSCHBA (G)
LSGR
(G)
LSB
(Y)
Page 52 of 69
K.
Stesalit Limited
Output No.
Name Of Output
O-32
O-33
O-34
O-35
O-36
O-37
O-38
O-39
O-40
O-41
O-42
O-43
O-44
O-45
O-46
O-47
LSP
(R)
LSRSI
(Y)
Sx41
Sx42
LSGROUP (R)
LSOL
(Y)
LSFL
SON (ALARM)
Q51_52 FB_MU
QFL
LSDBR
(Y)
Screen Display
Name
LSP
LSRSI
Sx41
Sx42
LS_GRP
LSOL
LSFL
SON
Q51_52 FB_MU
QFL
LSDBR
Q49_MU
FL_LP
C102
C108
Q49_MU
FL_LP
C102
C108
Pin No.
Wire No.
SB No.
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
S
175
176
144
145
235
210
232
177
SB-4
SB-4
WAP ONLY
WAP ONLY
WAG ONLY
SB-4
SB-4
SB-4
WAG ONLY
SB-4
SB-4
SB-4
WAG ONLY
SB-4
WAG ONLY
WAG ONLY
236
234
Name Of Output
O-48 (O-0)
O-49 (O-1)
O-50 (O-2)
O-51 (O-3)
O-52 (O-0)
O-53 (O-5)
O-54 (O-6)
O-55 (O-7)
O-56 (O-8)
O-57 (O-16)
O-58 (O-10)
O-59 (O-11)
O-60 (O-12)
O-61 (O-26)
O-62 (O-14)
O-63 (O-27)
DJ
C118/BLSI*
VEPT1
VEPT2
DJ
C107
C106
C105
C101, C103
VE (DN)
J1,J2 (FOR)
J1,J2 (REV)
CTF (RUN)
L1,L2,L3
VE (UP)
L4,L5,L6
Screen Display
Name
DJ
C118 BLSI
VEPT1
VEPT2
DJ
C107
C106
C105
C101,C103
VE_DN
J_FOR
J_REV
CTF_RUN
L1_3
VE_UP
L4_6
Page 53 of 69
Pin No.
Wire No.
SB No.
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
S
044
035
055
056
044
083
084
085
086
113
108
109
111
143
110
133
SB-3
SB-3
SB-3
SB-3
SB-3
SB-3
SB-3
SB-3
SB-3
SB-3
SB-3
SB-3
SB-3
SB-3
SB-3
SB-4
Stesalit Limited
Pin No.
Wire No.
A
B
C
D
H
I
J
TX P
TX N
RX P
RX N
GROUND
GROUND
GROUND
Pin No.
Wire No.
A
B
C
D
H
I
J
TX P
TX N
RX P
RX N
GROUND
GROUND
GROUND
Pin No.
Wire No.
ANG1 TM
ANG2 BAT
ANG3 W
ANG4 AUX
ANG5 AUX
+12V
AGND
A
B
C
D
E
H
J
AI1
AI2
AI3
AI4
AI5
+12V
ANGND
Pin No.
Wire No.
ANG6 TM CURRENT 1
ANG7 TM CURRENT 2
ANG8 TM CURRENT 3
ANG9 QE
+12V
AGND
A
B
C
D
G
H
AI6
AI7
AI8
AI9
+12V
ANGND
Page 54 of 69
Pin No.
Wire No.
ANG6 TM CURRENT 4
ANG7 TM CURRENT 5
ANG8 TM CURRENT 6
ANG9 - SPARE
+12V
AGND
A
B
C
D
G
H
AI10
AI11
AI12
SPR
+12V
ANGND
Pin Number
1
2
3
4
5
6
7
Wire Number
991
991
991
993
A17
SGND
Pin Number
1
2
3
4
5
6
Wire Number
196
197
208
209
206
207
Pin Number
1
2
3
4
5
6
Wire Number
214
215
247
248
249
250
Page 55 of 69
Stesalit Limited
Stesalit Limited
NAME
I/P NUMBER
NAME
I-112
Q20
I-136
QVLSOL
I-113
Q30
I-137
GR 0-1
I-114
Q44
I-138
GR 0-5
I-115
Q45
I-139
GR 0-10
I-116
Q46
I-140
GR 6-32
I-117
Q48
1-141
GR 20-32
I-118
Q49
I-142
QSVM (SI)
I-119
Q50
I-143
Q120
I-120
Q51
I-144
QD1
I-121
Q52
I-145
QD2
I-122
I-146
QE
I-123
Q118
I-147
QF1
I-124
Q119
I-148
QF2
I-125
Q121
I-149
I-126
QV60
I-150
I-127
QV61
I-151
I-128
QV62
I-152
I-129
QV63
I-153
I-130
QV64
I-154
I-131
QCVAR
I-155
I-132
QRS
I-156
I-133
QTD105
I-157
I-134
QTD106
I-158
I-135
QWC
I-159
Page 56 of 69
Stesalit Limited
NO
Are all ok?
YES
Check the CPU LEDs
YES
SYSTEM IS
OK
Is Sys Ok
LED ON?
NO
YES
Check PSU
Card
Is PSU alarm
LED ON?
NO
Is 2/2
LED ON?
NO
YES
Is Display
LED ON?
YES
Page 57 of 69
YES
Is Error in I/P
LED ON?
Change Digital
Input Card
NO
YES
Is Error in OP
LED ON?
Change Output
Card
NO
Is Error in
Analog I/P
LED ON?
YES
Change Analog
Input Card
NO
Is Shut
Down
LED ON?
YES
NO
SYSTEM IS
OK
Page 58 of 69
Stesalit Limited
Stesalit Limited
YES
Is PSU
ON
PSU IS
OK
NO
Is IP Over
voltage LED
ON?
YES
Lower the
Input Voltage
YES
Increase the
Input Voltage
NO
Is IP Under
voltage LED
ON?
NO
Is +5V Over
voltage LED
ON?
YES
NO
Is +5V Under
voltage LED
ON?
YES
Change the
PSU card
NO
Is +12V Over
voltage LED
ON?
YES
NO
Is +12V Under
voltage LED
ON?
YES
NO
Page 59 of 69
Stesalit Limited
Check the corresponding Output Logic and then check O/P cards LED
Is
LED ON?
NO
Change the
corresponding O/P card
Available
NOT OK
YES
Check Voltage
at BD panel
NOT AVAILABLE
Check Wiring
bet. BD Panel &
FDCS Coupler
OK
Page 60 of 69
Stesalit Limited
Check the corresponding Input switch and then check I/P cards LED
Is
LED ON?
YES
Not Available
NOT OK
NO
Check Voltage
at BD panel
AVAILABLE
Check Wiring
bet. BD Panel &
FDCS Coupler
OK
TIME:
*****************MAIN MENU******************
1. VEHICLE DIAGNOSTIC
2. PROCESS INFORMATION
The shows the current cursor position. To select an option move the cursor
UP or DOWN position.
Page 61 of 69
Stesalit Limited
To see the VEHICLE DIAGNOSTIC information, press the ENTER key, then the
display screen will be shown like the follows
DATE:
LOCO OK
1 ISOLATION INFORMATION
2 CURRENT FAULT INFORMATION
3 FAULT HISTORY
TIME:
Now if the PROCESS INFORMATION option is selected then the display screen
is shown as follows
1 Input/Output Display
2 Parameter Setting
3 Test Mode.
LOCO OK
10101010 10101010
10101010 10101010
10101010 00000000
TIME:
10101010
10101010
00000000
Here the first digit is showing the status of the Digital Input 0,the second digit is
showing the Digital Input 1. A 1 shows that the input is in OFF state (Low),
whereas a 0 shows that the input is in ON state (High). Now by scrolling the
screen with the help of UP DOWN key the various input status individually can be
shown.
Page 62 of 69
Stesalit Limited
One card inputs are defined in two screens. Each screen has 8 inputs like:
1st screen of card-1
DIGITAL INPUT
BLDJ
=_
QVMT2
=_
1st line
2nd line 3 inputs
3rd line 3 inputs
4th line 2 inputs
ZPT1_1
=_
BLRDJ
QVRH
=_
CARD-1_1
QVTM1
=_
HVMT1_1 =_
ZPT1_2
=_
=_
1st line
2nd line 3 inputs
3rd line 3 inputs
4th line 2 inputs
HVMT1_2
HVRH_1
Q/H_VSI2
CARD-1_2
=_
=_
=_
HVMT2_1
HVRH_2
BLVMT
=_
=_
=_
HVMT2_2 =_
Q/H_VSI1 =_
All the digital inputs are shown in the same format for display.
1st line
2nd line 3 outputs
3rd line 3 outputs
4th line 2 outputs
DJ
VEPT2
C106
CARD-1_1
=_
=_
=_
C118 /BLSI =_
DJ
=_
C105
=_
VEPT1
C107
=_
=_
DIGITAL OUTPUT
C101_3
J_REV
VE_UP
CARD-1_2
=_
=_
=_
VEUL
=_
CTF_RUN =_
C145
=_
J_FOR
=_
CTF_BRK =_
All the digital outputs are shown in the same format for display.
Q44
Q49
Q118
Page 63 of 69
=_
=_
=_
Screen-1
Q45
=_
Q50
=_
Q119
=_
ELIMINATED RELAYS
Q120
=_
QBI
=_
QD2
=_
QF1
=_
QTD105 =_ QTD106 =_
ELIMINATED RELAYS
QV62
=_
QV63
QWC
=_
=_
Stesalit Limited
QCVAR =_
QF2
=_
QV60 =_
QV64
Screen-2
QD1
=_
QRS
=_
QV61
=_
Screen-3
=_ QVSOL =_
ANALOG Voltage
TM Currents
TM-1 = ____ A
TM-4 = ____ A
TM-2 = ____ A
TM-5 = ____ A
TM-3 = ____A
TM-6 = ____A
Note: Once any above operation is selected system will prompt for password
which is to be entered. It should be possible to set desired parameters.
Password: 123456
Password should be in 6 digits which will be settable from left to right by
the UP or DOWN keys. (UP key = incremented and DOWN key =
Page 64 of 69
Stesalit Limited
LOCO OK
10101010 10101010
10101010 10101010
10101010 00000000
TIME:
10101010
10101010
00000000
Here the first digit is showing the status of the Digital Input 0,the second digit is
showing the Digital Input 1. A 1 shows that the input is in OFF state (Low),
whereas a 0 shows that the input is in ON state (High). Now by scrolling the
screen with the help of UP DOWN key the various input status individually can be
shown.
2.
3.
4.
Signal Condition
C118 Feedback contact
found open before
energizing DJ
C118 Feedback contact
found closed while DJ is
being energized
No OHE at the time of DJ
closing (BLRDJ is ON)
OHE Power fail while
Running
Action By
System
5.
DJ Tripping due to
QOP 1(Earth Fault)
6.
DJ Tripping due to
QOP 2 (Earth Fault)
7.
Page 65 of 69
S. No.
Signal Condition
Stesalit Limited
8.
DJ Tripping due to
QRSI 1 (Over Current in
Rectifier 1)
9.
DJ Tripping due to
QRSI 2 (Over Current in
Rectifier 2)
10.
11.
DJ Tripping due to
QVSL 1 (SL 1 Blower)
12.
DJ Tripping due to
QVSL 2 (SL 2 Blower)
13.
DJ Tripping due to
QVMT1 (MT 1 Blower)
14.
DJ Tripping due to
QVMT 2 (MT 2 Blower)
15.
16.
17.
18.
19.
DJ Tripping due to GR
Stuck
20.
Action By
System
S. No.
Signal Condition
Stesalit Limited
Action By
System
22.
23.
24.
25.
26.
27.
21.
28.
29.
30.
34.
35.
32.
31.
33.
Page 67 of 69
S. No.
Signal Condition
Stesalit Limited
Action By
System
36.
37.
38.
39.
40.
Display Communication
fail with other CAB
41.
HVMT 1 is in Position 0
42.
HVMT 2 is in Position 0
43.
HVSI 1 is in Position 0
44.
HVSI 2 is in Position 0
HVSI 2 in Position 0
L4 L5 L6 Cut Off Half Power available
45.
46.
47.
48.
49.
50.
51.
Page 68 of 69
S. No.
Signal Condition
52.
53.
54.
GR Stuck on notches
DJ Tripped via C107
Feedback Fail when DJ
is energized
DJ Tripped via C106
Feedback Fail when DJ
is energized
Stesalit Limited
Action By
System
57.
58.
59.
Communication with
Display in CAB 2 Failed
60.
Communication with
Display in CAB 1 Failed
BPAR restored
SI shutdown
See front panel of SI
55.
56.
61.
62.
63.
64.
65.
Page 69 of 69