LAB 5

Design & Implementation of half adder & subtractor

using Universal Gates

5.1

5.2

5.3

OBJECTIVES
To become familiar with the IC 7400 series XOR gate and its Truth
Table.
Use of above IC in implementation of HALF ADDER.
To become familiar with the IC 7400 series NAND gate and its Truth
Table.
To become familiar with the IC 7404 series INVERTER gate and its Truth
Table.
Use of above ICs in implementation of HALF SUBTRACTOR.
MATERIALS NEEDED
7400 IC XOR gate
7400 IC NAND gate
7404 IC
Vcc=5volts or DC power supply
Advance logic trainer board
Connecting Wires
SUMMARY OF THEORY

The half adder adds two single binary digits A and B. It has two outputs, sum (S) and carry (C). The
carry signal represents an overflow into the next digit of a multi-digit addition. The value of the sum
is 2C + S. The simplest half-adder design, pictured on the right, incorporates an XOR gate for S and
an AND gate for C. With the addition of an OR gate to combine their carry outputs, two half adders
can be combined to make a full adder.

The half adder adds two input bits and generates a carry and sum, which are the two outputs of a
half adder. The input variables of a half adder are called the augend and addend bits. The output
variables are the sum and carry.

The half-subtractor is a combinational circuit which is used to perform subtraction of two bits. It has
two inputs, X (minuend) and Y (subtrahend) and two outputs D (difference) and B (borrow).
An important point worth mentioning is that the half substractor diagram aside implements (b-a) and
not (a-b) as borrow is calculated from equation

This important difference should be noticed.

Verify the gates.

Make the connections as per the circuit diagram.
Switch on VCC and apply various combinations of input according to truth table.
Note down the output readings for full adder Sum carry bit for different
Combinations of inputs verify their truth tables.
All the connections should be made properly.
IC should not be reversed.

5.3.1 HALFADDER
Ahalfadderhastwoinputsforthetwobitstobeaddedandtwooutputsonefromthe
sumSandotherfromthecarrycintothehigheradderposition.Inhalfaddercircuit,carry
signalfromtheadditionofthelesssignificantbitssumfromtheXORGatethecarryoutfrom
the AND gate.
BOOLEAN EQUATION:

A B = S (For Sum)

A .B = C (For Carry)

INPUTS

OUTPUT

S =A B

C = A.B

Table 6-1 Truth Table of Half Adder

Figure 6-1 Implementation of Half Adder

5.3.2 HALFSUBTRACTOR
Thehalf subtractor is constructedusing XOR& AND Gate. The halfsubtractor has two
inputandtwo outputs.Theoutputsaredifferenceandborrow.Thedifferencecanbeapplied
using XOR Gate, borrow output can be implemented using an NAND Gate and an
inverter.
BOOLEAN EQUATIONS:

X Y = S (For Difference) X/. Y = B (For Borrow)

INPUTS

OUTPUT

S =X Y

B = X/. Y

Table 6-2 Truth Table of Half Subtractor

Figure 6-2 Implementation of Half Subtractor