PW062XS3 V1.2

PW062XS3
Version :1.2
The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed,
reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd.PAGE:1
PW062XS3
TECHNICAL
SPECIFICATION
CONTENTS
NO.
ITEM
PAGE
Cover
Contents
Application
Features
Mechanical Specifications
Mechanical Drawing of TFT-LCD module
Input / Output Terminals
Pixel Arrangement
Absolute Maximum Ratings
Electrical Characteristics
Power Sequence
17
10
Optical Characteristics
17
11
Handling Cautions
21
12
Reliability Test
22
13
Block Diagram
23
14
Packing
24
PW062XS3
1. Application
This technical specification applies to 6.2 color TFT-LCD module, PW062XS3
The applications of the panel are car TV, portable DVD, GPS, multimedia applications and others AV system.
2. Features
. Amorphous silicon TFT-LCD panel with Back-Light unit.
. Pixel in stripe configuration
. Compatible with NTSC and PAL system
. Slim and compact
. Up / Down and Left / Right Image Reversion
. Support multi display mode
(If you use this mode, you must use PVI-1004Ds timing controller (made by PVI))
3. Mechanical Specifications
Parameter
Screen Size
Display Format
Active Area
Pixel Pitch
Pixel Configuration
Outline Dimension
Weight
Back-light
Surface Treatment
Display mode
Specifications
6.2 (diagonal)
480X(R,G,B) X 234
137.52 (H)77.22 (V)
0.342(H)0.33 (V)
Stripe
154.4 (W)92.6 (H)5.90 (D)
13610
CCFL.1 tube
Anti-Glare
Normally white
Unit
Inch
Dot
mm
mm
mm
g
PW062XS3
4. Mechanical Drawing of TFT-LCD Module
PW062XS3
5.Input / Output Terminals
LCD Module Connector
FPC Down Connect , 26 Pins , Pitch : 0.5 mm
Pin No Symbol I/O
Description
1
Ground for logic circuit
GND
2
I
Supply voltage of logic control circuit for scan driver
VCC
3
VGL
Negative power for scan driver
4
I
Positive power for scan driver
VGH
Remark
STVD
I/O
Vertical start pulse
Note 5-1
STVU
I/O
Vertical start pulse
Note 5-1
CKV
Shift clock for scan driver
U/D
Up / Down scan control input
OEV
Output enable control for scan driver
10
11
VCOM
VCOM
I
I
Common electrode driving signal

Common electrode driving signal
Note 5-8
12
L/R
Left / Right control
Note 5-2
13
MOD
14
OEH
Output enable control for data driver
15
STHL
I/O
Start pulse for horizontal scan line
Note 5-2
16
STHR
I/O
Start pulse for horizontal scan line
Note 5-2
17
18
19
20
21
22
23
24
25
26
CPH3
CPH2
CPH1
VDD1
GND
VR
VG
VB
VDD2
AVSS
I
I
I
I
I
I
I
I
I
Sampling and shifting clock for data driver

Supply voltage of logic control circuit for data driver
Ground for logic circuit
Alternated video signal (Red)
Alternated video signal (Green)
Alternated video signal (Blue)
Supply voltage for analog circuit
Ground for analog circuit
Note 5-1
Sequential sampling and simultaneous sampling setting
Note 5-1
U/D
Vcc
GND
STVD
Input
Output
STVU
output
input
scanning direction
down to up
up to down
STHR
output
input
scanning direction
left to right
right to left
Note 5-2
R/L
VDD1
GND
STHL
Input
Output
PW062XS3
The definitions of Note 5-1,5-2
U /D (P IN 8 )= L o w R /L (P IN 1 2 )= H ig h
U /D (P IN 8 )= H ig h R /L (P IN 1 2 )= L o w
Note 5-3 : VCC TYP.+3.3V

Note 5-4 : VGL TYP.-12V
Note 5-5 : VGH TYP.+17V
Note 5-6 : VDD2 TYP.+5V
Note 5-7 : VDD1 TYP.+3.3V
Note 5-8: VCOM TYP.6 VP-P
6. Pixel Arrangement
R G B RG B R G B
R GB RG B
R GB
1 st Line
R G B
R G B
2 nd Line
R G B
3 rd Line
1 st Pixel
480 th Pixel
1 Pixel = R G B
R G B
232 th Line
RG BR G B
R G B
233 th Line
R G B RG B R G B
234 th Line
R G B
R G B
PW062XS3
7. Absolute Maximum Ratings
The followings are maximum values , which if exceeded, may cause faulty operation or
damage to the unit.
Parameter
Symbol
VDD1
MIN.
-0.3
MAX.
+5.8
Unit
V
VDD2
-0.3
+7.0
VCC
-0.3
+6.0
VGH-VGL
-0.3
+40.0
H Level VGH
-0.3
+25.0
L Level VGL
-16
+0.3
Supply Voltage For Source Driver
Supply Voltage For Gate Driver
Remark
8. Electrical Characteristics
8-1) Recommended Driving condition for TFT-LCD panel
Parameter
Supply Voltage For Source Driver
Supply Voltage For Gate Driver
Symbol
MIN.
Typ.
Analog
VDD2
+4.5
+5.0
+5.5
+3.0
+3.3
+3.6
Logic
VDD1
+4.5
+5.0
+5.5
Depend on T/C signal

V voltage
VGH
+15
+17
+19
VGL DC
VGL AC
-13.0
-12
+6.0
-11
+3.0
+3.3
+3.6
+4.5
+5.0
+5.5
-----
+3.6
2.5
+4.0
-
V
V
Logic
ViAC
ViDC
Analog Signal input Level

(VR , VG , VB)
Digital input voltage
Digital output voltage
VCC
MAX. Unit
Remark
V DC Component of VGL
VP-P AC Component of VGL
V Depend on T/C signal
H level
VIH
0.7 V DD1
---
VDD1
L level
VIL
-0.3
---
0.3 VDD1
H level
VOH
0.7 V DD1
---
L level
VOL
-0.3
---
VDD1
0.3 VDD1
VCOM AC
---
+6.0
---
VCOM DC
---
1.5
---
voltage
V
VP-P AC Component of VCOM
VCOM Voltage
V
DC Component of VCOM
Note 8-1
Note 8-1 : PVI strongly suggests that the VCOM DC level shall be adjustable , and the adjustable level
range is 1.5V1V , every modules VCOM DC level shall be carefully adjusted to show a best
image performance.
PW062XS3
8-2) Recommended driving condition for back light
Parameter
Lamp voltage
Lamp current
Lamp frequency
Starting voltage (25)
(Reference Voltage)
Symbol
VL
IL
PL
Min.
500
3
30
Typ.
550
6
43
Max.
600
8
80
Unit
Vrms
MA
KHz
Remark
IL=6mA
Note 8-2
Note 8-3
Vs
720
830
Vrms
Note 8-4
Note 8-2 : In order to satisfy the quality of B/L , no matter use what kind of inverter , the output lamp
current must between Min. and Max. to avoid the abnormal display image caused by B/L.
Note 8-3 : The waveform of lamp driving voltage should be as closed to a perfect sine wave as possible.
Note 8-4 : The "Max of kick off voltage" means the minimum voltage of inverter to turn on the CCFL. and it
should be applied to the lamp for more than 1 second to start up. Otherwise the lamp may not be turned
on.
8-3)Back Light driving

Back Light Connector : JST BHSR-02VS-1, Pin No. : 2 , Pitch : 3.5 mm
Pin No
1
2
Symbol
VL1
VL2
Description
Input terminal (Hi voltage side)
Input terminal (Low voltage side)
Remark
Note 8-5
Note 8-5 : Low voltage side of back light inverter connects with Ground of inverter circuits.
8-4) Power Consumption

Parameter
Supply current for Gate Driver (Hi level)
Supply current for Gate Driver (Low level)
Supply current for Source Driver(Digital)
Supply current for Source Driver(Analog)
Supply current for Gate Driver (Digital)
LCD Panel Power Consumption
Back Light Lamp Power Consumption
Symbol
IGH
IGL
IDD1
IDD2
ICC
Conditions TYP.
0.09
VGH +17V
1.11
VGL -12V
VDD1+3.3V 5.0
VDD2+5.0V 5.0
VCC+3.3V 0.02
65
3.30
MAX
0.11
1.13
8.0
8.0
0.026
99
-
Ta= 25
Remark
Unit
mA
mA VEE center voltage
mA
mA
mA
mW
Note 8-6
W
Note 8-7
Note 8-6 : The power consumption for back light is not included
Note 8-7 : Back light lamp power consumption is calculated by ILVL.
PW062XS3
8-5) Timing Characteristics Of Input Signals
Characteristics
Rising time
Falling time
High and low level pulse width
CPH pulse duty
STH setup time
STH hold time
STH pulse width
STH period
OEH pulse width
Sample and hold disable time
OEV pulse width
CKV pulse width
Clean enable time
Horizontal display start
Horizontal display timing range
STV setup time
STV hold time
STV pulse width
Horizontal lines per field
Vertical display start
Vertical display timing range
VCOM rising time
VCOM falling time
VCOM delay time
RGB delay time
Symbol
tr
tf
tCPH
tCWH
tSUH
tHDH
tSTH
tH
tOEH
tDIS1
tOEV
tCKV
tDIS2
tSH
tDH
tSUV
tHDV
tSTV
tV
tSV
tDV
trCOM
tfCOM
tDCOM
tDRGB
Min.
9.2
30
20
20
61.5
400
400
256
-
Typ.
9.6
50
1
63.5
1.40
7.43
18
31.75
9.0
0
480
262
3
234
-
Max.
10
10
10.0
70
65.5
1
268
5
5
3
1
Unit
ns
ns
MHZ
%
ns
ns
tCPH
s
s
s
s
s
s
tCPH/3
tCPH/3
ns
ns
tH
tH
tH
tH
s
s
s
s
Remark
CPH1~CPH3
CPH1~CPH3
STHR,STHL
STHR,STHL
STHR,STHL
STHR,STHL
OEH
OEV
CKV
STVU,STVD
STVU,STVD
STVU,STVD
PW062XS3
10%
tr
90%
90%
tf
10%
8-6) Signal Timing Waveforms
CPH3
(L)
CPH2
(L)
CPH1
STHL(R)
50%
tCWH
50%
tCPH
tSUH
tSTH
tHDH
g
n
i
m
i
t
k
c
o
l
c
g
n
i
l
p
m
a
S
1
8
.
g
i
F
Fig. 8-2 Horizontal display timing range
CPH1
Output
(STHR/STHL)
Input
(STHL/STHR)
tDH
PW062XS3
VIAC
Fig. 8-3 (a) Horizontal timing
White
VGL DC
VGL
Blank
V(R,G,B) VIDC
VCOM DC
VCOM
CLK
OEV
STH2(1)
OEH
(HSY)
Black
1H
VIA
tH
White
Blank
Black
VGL AC
VCOM AC
PW062XS3
V(R,G,B)
VGL DC
VGL
VCOM
CLK
OEV
STH2(1)
OEH
(HSY)
Fig. 8-3 (b) Detail horizontal timing
Note : The falling edge of OEV should be synchronized with the falling edge of OEH
tDRGB
trCOM
tDIS2
tOEV
10%
90%
50%
tOEH
tDCOM
tCKV
tDIS1
1H
VGL AC
tSTH
90%
10%
tfCOM
PW062XS3
Fig. 8-4 Vertical shift clock timing
CKV
STVU(D)
tSUV
1H
tCKV
tHDV
PW062XS3
PW062XS3
VCOM (Even field)
VCOM (Odd field)
STVU
(VSY)
(HSY)
V(R,G,B)
Display on panel first line
Fig. 8-5 (a) Vertical timing (From Up to Down)
tsv
Vertical timing (From up to down)
PW062XS3
VCOM (Even field)
VCOM (Odd field)
STVD
(VSY)
(HSY)
V(R,G,B)
Display on panel first line
Fig. 8-5 (b) Vertical timing (From Down to Up)
tsv
Vertical timing (From down to up)
PW062XS3
9. Power on Sequence
The Power on Sequence only effect by VCC,VSS,VDD,VGL and VGH, the others do not care.
VGH
VDD,VCC
VSS(0V)
VGL
OFF
OFF
ON
T1
T3
Logic signal
RGB-Video signal
T2
T4
1) 10msT1<T2
2) 0ms<T3T410ms
10. Optical Characteristics

10-1) Specification
Ta = 25
Parameter
Horizontal
Viewing Angle
Vertical
Contrast Ratio
Response time
Rise
Fall
Brightness
White Chromaticity
Uniformity
Lamp Life Time
Symbol
21,22
12
11
CR
Tr
Tf
L
x
y
U
Condition
CR10
At optimized
Viewing angle
=0
=0
=0
+25
MIN.
45
10
30
TYP. MAX. Unit

50
deg
15
deg
35
deg
200
350
300
0.28
0.30
60
15
25
350
0.31
0.33
75
30
50
0.34
0.36
-
30000
Remarks
Note 10-1
Note 10-2
ms
Note 10-4
ms
cd/
Note 10-3
%
Note 10-5
hr
PW062XS3
Note 10-1 : The definitions of viewing angles
Note 10-2 : CR
Luminance when Testing point is White

Luminance when Testing point is Black
(Testing configuration see 8-2 )
Contrast Ratio is measured in optimum common electrode voltage.
Note 10-3 : 1.Topcon BM-7(fast) luminance meter 1field of view is used in the testing (after
20~30 minutes operation).
2.Lamp current : 6 mA
3.Inverter model : TDK-347.
Note 10-4 : The definition of response time:

W hite
Black
W hite
100%
90%
Brightness
10%
0%
Tr
Tf
PW062XS3
Note 10-5 : The uniformity of LCD is defined as
U=
The Minimum Brightness of the 9 testing Points

The Maximum Brightness of the 9 testing Points
Luminance meter : BM-5A or BM-7 fast (TOPCON)

Measurement distance : 500 mm +/- 50 mm
Ambient illumination : < 1 Lux
Measuring direction : Perpendicular to the surface of module
The test pattern is white (Gray Level 63).
1/6
2/6
2/6
1/6
1/6
2/6
2/6
1/6
PW062XS3
10-2) Testing configuration
BM-7(fast)
Caution: 1. Environmental illumination1 lux
2. Before test CR, Vcom voltage must
be adjusted carefully to get the best
500mm
CR.
R,G,B signal
input
Pattern
generator
LCD
Backlight
LCD Display
Testing Point
Pattern A
Testing Point
Pattern B
R, G, B Waveform of Pattern A at Testing Point
RGB
waveform
63.6us
Vcom
63.6us
R, G, B Waveform of Pattern B at Testing Point

63.6us
63.6us
RGB
waveform
Vcom
RGB Signal Level

=4.0 Vp-p(white to black)
PW062XS3
11. Handling Cautions
11-1) Mounting of module
a) Please power off the module when you connect the input/output connector.
b) Please connect the ground pattern of the inverter circuit surely. If the connection is not perfect, some
following problems may happen possibly.
1.The noise from the backlight unit will increase.
2.The output from inverter circuit will be unstable.
3.In some cases a part of module will heat.
c) Polarizer which is made of soft material and susceptible to flaw must be handled carefully.
d) Protective film (Laminator) is applied on surface to protect it against scratches and dirt. It is recommended
to peel off the laminator before use and taking care of static electricity.
11-2) Precautions in mounting
a) Wipe off water drops or finger grease immediately. Long contact with water may cause discoloration or
spots.
b) TFT-LCD module uses glass which breaks or cracks easily if dropped or bumped on hard surface. Please
handle with care.
c) Since CMOS LSI is used in the module. So take care of static electricity and earth yourself when handling.
11-3) Others
a) Do not expose the module to direct sunlight or intensive ultraviolet rays for many hours.
b) Store the module at a room temperature place.
c) The voltage of beginning electric discharge may over the normal voltage because of leakage current from
approach conductor by to draw lump read lead line around.
d) If LCD panel breaks, it is possibly that the liquid crystal escapes from the panel.
Avoid putting it into eyes or mouth. When liquid crystal sticks on hands, clothes or feet.
Wash it out immediately with soap.
e) Observe all other precautionary requirements in handling general electronic components.
PW062XS3
12. Reliability Test
No.
1
Test Item
High Temperature Storage Test
Test Condition
Ta = +80, 240 hrs
Low Temperature Storage Test
Ta = -30, 240 hrs
HighTemperature Operation Test
Ta = -80, 240 hrs
Low Temperature Operation Test
Ta = -20, 240 hrs
5
6
High Temperature & High Humidity

Operation Test
Thermal Cycling Test
(non-operating)
Vibration Test
(non-operating)
Shock Test
(non-operating)
Electrostatic Discharge Test

(non-operating)
Ta = +60, 90%RH , 240 hrs

-20 +70, 200Cycles
30 min
30 min
Frequency : 10 ~ 55 HZ
Amplitude : 1 mm
Sweep time : 11 mins
Test Period : 6 Cycles for each direction of X, Y, Z
100G , 6ms
Direction : X , Y , Z
Cycle : 3 times
200pF , 0
200V
1 time / each terminal
Ta: ambient temperature
Note : The protective film must be removed before temperature test.

[Criteria]
Under the display quality test conditions with normal operation state, there should be no change which may
affect practical display function.
PW062XS3
13. Block Diagram
L C D Panel
V D riv e r
(G a te)
H D riv e r
(S o u rc e)
In p u t
In v e rte r
B a c k -lig h t
PW062XS3
14. Packing
PW062XS3
Revision History
Rev.
0.1
Issued
Date
Aug 22, 2005
Revised
Contents
1.0
Sep 22, 2005
1.1
Oct 06, 2005
1.2
Oct 07, 2005
Release version
Modify
Page44.Mechanical Drawing of TFT-LCD Module
Modify
Page2212.Reliability Test
HTST+70 LTST-20 LTOT0
Change
HTST+80 LTST-30 HTOT-80 LTOT-20
Add
Page44.Mechanical Drawing of TFT-LCD Module
a.Ground line length
b.Screw size M2*2.0mm
Preliminary

PW062XS3 V1.2

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PW062XS3

Mechanical Drawing of TFT-LCD module

Input / Output Terminals

Absolute Maximum Ratings

Vertical start pulse

Vertical start pulse

Shift clock for scan driver

Up / Down scan control input

Output enable control for scan driver

Common electrode driving signal

Left / Right control

Output enable control for data driver

Start pulse for horizontal scan line

Start pulse for horizontal scan line

Sampling and shifting clock for data driver

Sequential sampling and simultaneous sampling setting

Note 5-3 : VCC TYP.+3.3V

Supply Voltage For Source Driver

Supply Voltage For Gate Driver

Supply Voltage For Gate Driver

Depend on T/C signal

Analog Signal input Level

8-3)Back Light driving

8-4) Power Consumption

8-6) Signal Timing Waveforms

Fig. 8-2 Horizontal display timing range

Fig. 8-3 (a) Horizontal timing

Fig. 8-3 (b) Detail horizontal timing

Fig. 8-4 Vertical shift clock timing

VCOM (Even field)

VCOM (Odd field)

Display on panel first line

Fig. 8-5 (a) Vertical timing (From Up to Down)

Vertical timing (From up to down)

VCOM (Even field)

VCOM (Odd field)

Display on panel first line

Fig. 8-5 (b) Vertical timing (From Down to Up)

Vertical timing (From down to up)

10. Optical Characteristics

TYP. MAX. Unit

Luminance when Testing point is White

Note 10-4 : The definition of response time:

The Minimum Brightness of the 9 testing Points

Luminance meter : BM-5A or BM-7 fast (TOPCON)

R, G, B Waveform of Pattern A at Testing Point

R, G, B Waveform of Pattern B at Testing Point

RGB Signal Level

Low Temperature Storage Test

Ta = -30, 240 hrs

HighTemperature Operation Test

Ta = -80, 240 hrs

Low Temperature Operation Test

Ta = -20, 240 hrs

High Temperature & High Humidity

Electrostatic Discharge Test

Ta = +60, 90%RH , 240 hrs

Ta: ambient temperature

Note : The protective film must be removed before temperature test.

Sep 22, 2005

Oct 06, 2005

Oct 07, 2005

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