Ch10slides PDF

Chapter 10
Input Filter Design

10.1
10.2
10.3
10.4
10.5
Introduction
10.1.1
Conducted EMI
10.1.2
The Input Filter Design Problem
Effect of an Input Filter on Converter Transfer Functions
10.2.1
Discussion
10.2.2
Impedance Inequalities
Buck Converter Example
10.3.1
Effect of Undamped Input Filter
10.3.2
Damping the Input Filter
Design of a Damped Input Filter
RfCb Parallel Damping
10.4.1
10.4.2
RfLb Parallel Damping
10.4.3
RfLb Series Damping
10.4.4
Cascading Filter Sections
10.4.5
Example: Two Stage Input Filter
Summary of Key Points
Fundamentals of Power Electronics
Chapter 10: Input Filter Design
10.1.1 Conducted Electromagnetic Interference

(EMI)
Input current ig(t) is pulsating:
Buck converter example

ig
ig(t)
+
vg(t) +
1
2
DTs
Ts
Approximate Fourier series of ig(t):
i g(t) = DI +
2I sin
k = 1 k
kD cos kt
High frequency current harmonics of substantial amplitude are injected

back into vg(t) source. These harmonics can interfere with operation of
nearby equipment. Regulations limit their amplitude, typically to values
of 10 A to 100 A.
Addition of Low-Pass Filter

ig 1
L
+
iin(t)
0
Lf
iin
ig(t)
vg(t) +
Cf
0
0
DTs
Ts
t
Input filter
Magnitudes and phases of input current harmonics are modified by

input filter transfer function H(s):
i in(t) = H(0)DI +
k=1
H(kj) 2I sin kD cos kt + H(kj)

k
The input filter may be required to attenuate the current harmonics by

factors of 80 dB or more.
Electromagnetic Compatibility
Ability of the device (e.g. power supply) to:
function satisfactorily in its electromagnetic environment
(susceptibility or immunity aspect)
without introducing intolerable electromagnetic disturbances (emission
aspect)
EMC
Emission
Radiated
Susceptibility
Conducted
Radiated
Conducted
Electrostatic
Discharge
Harmonics
EMI
4
Conducted EMI
Spectrum
analyzer
Test result: spectrum of the voltage across a standard impedance in the LISN
AC line source
iac(t)
vac(t)
pload(t) = VI = Pload
i2(t)
ig(t)
LISN
EMI
filter
vg(t)
AC/DC rectifier
+
C
vC(t)
Energy storage
capacitor
+
DC/DC
converter
v(t)
i(t)
load
Regulated
DC output
Earth ground
Sample of EMC regulations that include limits on radiofrequency emissions:

European Community Directive on EMC: Euro-Norm EN 55022 or
55081, earlier known as CISPR 22
National standards: VDE (German), FCC (US)
LISN
R1 5 50H L1
C1
AC line source
RN
50
RN
50
1F
C1
Device under test
1F
Measurement points
0.1F
CN
0.1F
CN
R1 5
50H L1
LISN: Line Impedance

Stabilization Network, or
artificial mains network
Purpose: to standardize
impedance of the power source
used to supply the device under
test
Spectrum of conducted
emissions is measured across
the standard impedance (50
above 150kHz)
LISN example
An Example of EMI Limits

EN 55022 Class B limits
70 dBV
Quasi-peak
60 dBV
1mV
631V
Average
50 dBV
316V
200V
40 dBV
100 kHz
100V
1 MHz
10 MHz
100 MHz
Frequency range:
150kHz-30MHz
Class B: residential
environment
Quasi-peak/Average: two
different setups of the
measurement device
(such as narrow-band
voltmeter or spectrum
analyzer)
Measurement bandwidth:
9kHz
Differential and Common-Mode EMI

Spectrum
analyzer
Test result: spectrum of the voltage across a standard impedance in the LISN
pload(t) = VI = Pload
AC line source
+
ig(t)
iac(t)
vac(t)
LISN
EMI
filter
vg(t)
AC/DC rectifier
i2(t)
C
vC(t)
DC/DC
converter
v(t)
i(t)
load
Regulated
DC output
Earth ground
Differential-mode EMI currents
Common-mode EMI currents
Differential mode EMI: input current waveform of the PFC. Differential-mode

noise depends on the PFC realization and circuit parameters.
Common-mode EMI: currents through parasitic capacitances between high
dv/dt points and earth ground (such as from transistor drain to transistor heat
sink). Common-mode noise depends on: dv/dt, circuit and mechanical layout.
10.1.2 The Input Filter Design Problem

A typical design approach:
1. Engineer designs switching regulator that meets specifications
(stability, transient response, output impedance, etc.). In
performing this design, a basic converter model is employed, such
as the one below:
Converter model
i
1:D
(no input filter)

(buck
converter
example)
Vg d
vg +
Id
Input Filter Design Problem, p. 2

2. Later, the problem of conducted EMI is addressed. An input filter is
added, that attenuates harmonics sufficiently to meet regulations.
3. A new problem arises: the controller no longer meets dynamic
response specifications. The controller may even become unstable.
Reason: input filter changes converter transfer functions
Converter model
Input filter
1:D
Converter
ac model is
modified by
input filter
Lf
vg +
Vg d
Cf
Id
d
10
Input Filter Design Problem, p. 3

|| Gvd ||
40 dB
30 dB
Gvd
|| Gvd ||
20 dB
10 dB
0 dB
Gvd
10 dB
180
360
100 Hz
Effect of L-C input

filter on control-tooutput transfer
function Gvd (s),
buck converter
example.
Dashed lines:
original magnitude
and phase
Solid lines: with
addition of input
filter
540
10 kHz
1 kHz
f
11
10.2 Effect of an Input Filter

on Converter Transfer Functions
H(s)
vg
Input
filter
Converter
Zo(s)
Control-to-output transfer function is
Gvd (s) =
v(s)
d(s)
Zi(s)
T(s)
Controller
v g(s) = 0
12
Determination of Gvd(s)
Gvd (s) =
v(s)
d(s)
Converter
v g(s) = 0
v
Zo(s)
vg(s) source short circuit
Gvd(s)
Zo(s) = output impedance of

input filter
d
We will use Middlebrooks Extra Element Theorem to show that the input
filter modifies Gvd (s) as follows:
Gvd (s) = Gvd (s)
Z o(s) = 0
13
1+
Z o(s)
Z N (s)
1+
Z o(s)
Z D(s)
How an input filter changes Gvd(s)

Summary of result
Gvd (s) = Gvd (s)
Gvd (s)
Z o(s) = 0
Z o(s) = 0
1+
Z o(s)
Z N (s)
1+
Z o(s)
Z D(s)
is the original transfer function, before addition of input filter
Z D(s) = Z i(s)
d(s) = 0
Z N (s) = Z i(s)
v(s) o 0
is the converter input impedance, with d set to zero

is the converter input impedance, with the output v
nulled to zero
(see Appendix C for proof using EET)
14
Design criteria for basic converters

Table 10.1 Input filter design criteria for basic converters
ZN(s)
Converter
R2
D
Buck
Boost
Buckboost
ZD(s)
R
D2
D R 1 sL2
D R
2
D 2R
1 + s L + s 2LC
R
sL
D2
1 + sRC
1 + s L2 + s 2 LC2
D
D R
15
sL
1 + sRC
1 + s L2 + s 2 LC2
D
D R
D 2R
D2
1 + sRC
2
D 2R 1 sDL
D
D 2R
Ze(s)
sL
D2
10.2.2 Impedance Inequalities
Gvd (s) = Gvd (s)
The correction factor
1+
Z o(s)
Z N (s)
1+
Z o(s)
Z D(s)
Z o(s) = 0
1+
Z o(s)
Z N (s)
1+
Z o(s)
Z D(s)
shows how the input filter modifies the

transfer function Gvd (s).
The correction factor has a magnitude of approximately unity provided

that the following inequalities are satisfied:
Z o < Z N , and
Zo < ZD
These provide design criteria, which are relatively easy to apply.

16
Effect of input filter on converter output

impedance
A similar analysis leads to the following inequalities, which guarantee
that the converter output impedance is not substantially affected by the
input filter:
Z o < Z e , and
Zo < ZD
The quantity Ze is given by:
Ze = Zi
v=0
(converter input impedance when the output is shorted)
17
10.2.1 Discussion
H(s)
vg
Input
filter
Converter
Zo(s)
Zi(s)
T(s)
Controller
Z N (s) = Z i(s)
v(s) o 0
is the converter input impedance, with the output v

nulled to zero
Note that this is the same as the function performed by an ideal

controller, which varies the duty cycle as necessary to maintain zero
error of the output voltage. So ZN coincides with the input impedance
when an ideal feedback loop perfectly regulates the output voltage.
18
When the output voltage is perfectly regulated

i g(t)
Closed-loop
voltage regulator
Ts
+
vg(t)
Ts
Pload
If losses are negligible, then

the input port i-v
characteristic is a power sink
characteristic, equal to Pload:
i g(t)
vg(t)
Ts
Ts
i g(t)
Ts
For a given load

characteristic, the output
power Pload is independent of
the converter input voltage
= Pload
vg(t)
Quiescent
operating
point
i g(t)
Ts
= Pload
Incremental input resistance

is negative, and is equal to:
slope =
Ig
Ts
2
Ig
= M
Vg
R
R2
M
(same as dc asymptote of ZN)
Vg
vg(t)
Ts
19
Negative resistance oscillator

It can be shown that the closed-loop converter input impedance is
given by:
T(s)
1 = 1
1
+ 1
Z i(s) Z N (s) 1 + T(s) Z D(s) 1 + T(s)
where T(s) is the converter loop gain.

At frequencies below the loop crossover frequency, the input
impedance is approximately equal to ZN, which is a negative
resistance.
When an undamped or lightly damped input filter is connected to the
regulator input port, the input filter can interact with ZN to form a
negative resistance oscillator.
20
10.3 Buck Converter Example

10.3.1 Effect of undamped input filter
Input filter
Lf
Buck converter
with input filter
Converter
L
30 V
100 H
330 H
Vg
Cf
470 F
100 F
D = 0.5
Small-signal model
Input filter
Lf
Converter model
+
330 H
vg +
1:D
Vg d
Cf
Id
470 F
Zo(s) Zi(s)
L
+
100 H
100 F
21
Determination of ZD
L
1:D
Z D(s) = 12 sL + R || 1
sC
D
ZD(s)
40 dB
30 dB
1
2 LC
1.59 kHz
1
2RC
530 Hz
fo =
f1 =
R = 12
D2
L
D2
|| ZN ||
20 dB
10 dB
1
D 2C
R0 /D 2
Q=R
0 dB
100 Hz
|| ZD ||
1 kHz
C = fo = 3 9.5 dB
L
f1
10 kHz
f
22
Determination of ZN
vtest(s)
i test(s)
io0
1:D
+
Z N (s) =
vo0
Vg d
itest
vtest
ZN(s)
vs o 0
Id
vo0
Hence,
Solution:
i test(s) = Id (s)
vtest(s) =
Z N (s) =
Vg d (s)
D
23
Vg d(s)
D
Id(s)
= R2
D
Zo of undamped input filter

40 dB
Qf
30 dB
Lf
20 dB
Cf
Zo(s)
|| Zo ||
10 dB
0 dB
Z o(s) = sL f || 1
sC f
10 dB
R0 f =
L f
ff =
20 dB
100 Hz
Lf
= 0.84
Cf
1
= 400 Hz
2 L f C f
1
C f
1 kHz
No resistance, hence poles are undamped (infinite Q-factor).

In practice, losses limit Q-factor; nonetheless, Qf may be very large.
24
Design criteria
Z o < Z N , and
Zo < ZD
40 dB
Qf
30 dB
f1 = 530 Hz
fo = 1.59 kHz
12
L
D2
|| ZN ||
20 dB
10 dB
|| Zo ||
1
D 2C
0 dB
10 dB
|| ZD ||
R0 /D 2
Q=3
R0f
L f
1
C f
ff = 400 Hz
20 dB
100 Hz
1 kHz
10 kHz
25
Can meet
inequalities
everywhere
except at
resonant
frequency ff.
Need to damp
input filter!
Resulting correction factor

10 dB
Zo
ZN
Z
1+ o
ZD
1+
0 dB
10 dB
0
Zo
ZN
180
Z
1+ o
ZD
1+
100 Hz
1 kHz
360
10 kHz
26
Resulting transfer function

|| Gvd ||
40 dB
30 dB
Gvd
|| Gvd ||
Dashed lines: no
input filter
20 dB
10 dB
0 dB
Gvd
Solid lines:
including effect of
input filter
10 dB
180
360
100 Hz
540
10 kHz
1 kHz
f
27
10.3.2 Damping the input filter

Undamped filter:
Two possible approaches:

Lf
Lf
Cf
Cf
Rf
Zo(s)
Rf
Lf
Cf
28
Addition of Rf across Cf
To meet the requirement Rf < || ZN ||:
Lf
R f < R2
D
Cf
Rf
The power loss in Rf is Vg2/ Rf,

which is larger than the load power!
Lf
A solution: add dc blocking

capacitor Cb.
Rf
Cf
Choose Cb so that its impedance is

sufficiently smaller than Rf at the
filter resonant frequency.
Cb
29
Damped input filter

|| Zo ||, with large Cb
Lf
Rf
Rf
R0f
Cf
L f
Cb
30
ff
1
C f
Design criteria, with damped input filter

40 dB
f1 = 530 Hz
30 dB
fo = 1.59 kHz
12
L
D2
|| ZN ||
20 dB
1
D 2C
10 dB
R0 /D 2
Q=3
|| Zo ||
Rf = 1
0 dB
10 dB
R0f
L f
20 dB
100 Hz
|| ZD ||
1
C f
ff = 400 Hz
1 kHz
10 kHz
f
31
Resulting transfer function

|| Gvd ||
40 dB
30 dB
Gvd
|| Gvd ||
Dashed lines: no
input filter
20 dB
10 dB
0 dB
Gvd
0
Solid lines:
including effect of
input filter
10 dB
90
100 Hz
180
10 kHz
1 kHz
f
32
10.4 Design of a Damped Input Filter

Rf Cb Parallel Damping
Rf Lb Series Damping
Lf
v1
Lb
v2
Rf
Lf
Rf
Cf
Cb
v1
+
Cf
v2
Rf Lb Parallel Damping
Lb
Rf
Lf
v1
Cf
Size of Cb or Lb can become

very large
v2
Need to optimize design
33
Dependence of || Zo || on Rf
Rf Lb Parallel Damping
30 dB
Original undamped
filter (Qf = )
20 dB
Suboptimal damping
(Qf = 5Qopt )
10 dB
Zo
R0 f
Undamped
filter (Qf = 0)
Suboptimal damping
(Qf = 0.2Qopt )
For this
example,
n = Lb/L = 0.516
Optimal damping
(Qopt = 0.93)
0 dB
-10 dB
-20 dB
-30 dB
0.1
10
f
fo
34
10.4.1 RfCb Parallel Damping

Lf
+
v1
Rf
v2
Cf
Cb
35
Filter is damped by Rf
Cb blocks dc current from
flowing through Rf
Cb can be large in value,
and is an element to be
optimized
Optimal design equations

Rf Cb Parallel Damping
Define
n=
Cb
Cf
The value of the peak output impedance for the optimum design is
Zo
= R0 f
mm
2 2+n
n
where R0f = characteristic impedance

of original undamped input filter
Given a desired value of the peak output impedance, can solve above
equation for n. The required value of damping resistance Rf can then be
found from:
2 + n 4 + 3n
Rf
Qopt =
=
R0 f
2n 2 4 + n
The peak occurs at the frequency
fm = f f
2
2+n
36
Example
Buck converter of Section 10.3.2
n=
R 20 f
2
Z o mm
1+
1+4
Zo
2
mm
R 20 f
= 2.5
2 + n 4 + 3n
R f = R0 f
2n 2
4+n
= 0.67
20 dB
|| Zo ||
Undamped
10 dB
Comparison of designs
Optimal damping
achieves same peak
output impedance, with
much smaller Cb.
Suboptimal
damping
Cb = 4700 F
Rf = 1
0 dB
10 dB
Optimal
damping
Cb = 1200 F
Rf = 0.67
20 dB
30 dB
100 Hz
1 kHz
10 kHz
f
37
Summary
Optimal R-Cd damping
Basic results
Qopt = R =
R0
Z mm
=
R0
+
R
v1
v2
C
Cd
Does not degrade HF attenuation

No limit on || Z ||mm
Cd is typically larger than C
2 + n 4 + 3n
2n 2 4 + n
100
2 2+n
n
10
with
n=
Z o mm
Ro
Cd
C
R0 =
L
C
0.1
0.1
n=
38
10
Cd
C
Ld
+
L
v1
Optimal R-Ld damping
Z mm
=
R0
v2
30 dB
Basic results
Qopt =
Original undamped
filter (Q = )
20 dB
n 3 + 4n 1 + 2n
2 1 + 4n
Suboptimal damping
(Q = 5Qopt )
10 dB
Z mm
R0
2n 1 + 2n
Undamped
filter (Q = 0)
Suboptimal damping
(Q = 0.2Qopt )
Optimal damping
(Qopt = 0.93)
0 dB
-10 dB
with
-20 dB
optimum value of R
Qopt =
R0
n=
Ld
L
R0 =
-30 dB
0.1
10
f
f0
L
C
39
Discussion:
Optimal R-Ld damping
Ld
+
L
v1
v2
30 dB
Ld is physically very small

A simple low-cost approach to
damping the input filter
Degradation of HF
filter attenuation
20 dB
Disadvantage: Ld degrades highfrequency attenuation of filter, by

the factor
Z mm
R0
10 dB
L =1+ 1
n
L||L d
0 dB
Basic tradeoff: peak output

impedance vs. high-frequency
attenuation
-10 dB
Example: the choice n = 1 (Ld = L)

degrades the HF attenuation by 6
dB, an leads to peak output
impedance of
mm
0.1
10
Ld
L
= 6 R0
40
Ld
Optimal R-Ld
series damping
R
v1
R0
n
= 1+
n
R
Z mm
=
R0
v2
Basic results
Qopt =
Does not degrade HF attenuation

Ld must conduct entire dc current
2 1+n 4+n
2 + n 4 + 3n
2 1+n 2+n
n
Peak output impedance cannot be

reduced below 2 R 0
100
with
L
n= d
L
R0 =
Z mm
R0
10
L
C
Qopt
1
0.1
41
n=
10
Ld
L
Chapter
10: Input Filter Design
10.4.4 Cascading Filter Sections

Cascade connection of multiple L-C filter sections can achieve a
given high-frequency attenuation with much smaller volume and
weight
Need to damp each section of the filter
One approach: add new filter section to an existing filter, using new
design criteria
Stagger-tuning of filter sections
42
Addition of filter section
vg
Additional
filter
section
Za
Zi1
Existing
filter
+
Zo v
test
itest
How the additional filter section changes the output impedance of the
existing filter:
Z (s)
1+ a
Z N1(s)
modified Z o(s) = Z o(s) Z (s) = 0
a
Z (s)
1+ a
Z D1(s)
Z N1(s) = Z i1(s)
v test(s) o 0
43
Z D1(s) = Z i1(s)
i test(s) = 0
Design criteria
vg
Additional
filter
section
Za
Zi1
Existing
filter
+
Zo v
test
itest
Z N1(s) = Z i1(s)
Z D1(s) = Z i1(s)
v test(s) o 0
i test(s) = 0
(with filter output port short-circuited)

(with filter output port open-circuited)
The presence of the additional filter section does not substantially

alter the output impedance Zo of the existing filter provided that
Z a < Z N1
and
Z a < Z D1
44
10.4.5 Example
Two-Stage Input Filter
Requirements: For the same
buck converter example,
achieve the following:
n2L2
R2
L2
80 dB of attenuation at 250 kHz
L1
vg +
Section 1 to satisfy Zo
impedance inequalities as
before:
n1L1
R1
C2
C1
Section 2
Zo
Section 1
40 dB
30 dB
1
2 LC
1.59 kHz
1
2RC
530 Hz
fo =
f1 =
R = 12
D2
L
D2
|| ZN ||
20 dB
10 dB
1
D 2C
R0 /D 2
Q=R
0 dB
100 Hz
|| ZD ||
1 kHz
C = fo = 3 9.5 dB
L
f1
10 kHz
f
45
Section 2 impedance inequalities

n2L2
R2
L2
vg +
n1L1
R1
L1
C2
Za
Zi1
+
C1
vtest
itest
Section 2
Section 1
To avoid disrupting the output impedance Zo of section 1, section 2

should satisfy the following inequalities:
Z a < Z N1 = Z i1
Z a < Z D1 = Z i1
output shorted
= R1 + sn 1L 1 ||sL 1
1 + R + sn L ||sL
=
1
1 1
1
output open-circuited
sC 1
46
Plots of ZN1 and ZD1

|| ZD1 ||
20 dB
0 dB
|| ZN1 ||
|| Za ||
20 dB
90
ZN1
45
Za
45
90
1 kHz
ZD1
10 kHz
100 kHz
47
1 MHz
Section 1 output impedance inequalities

30 dB
|| ZD ||
|| ZN ||
20 dB
fo
Cascaded
sections 1 and 2
10 dB
Section 1
alone
0 dB
-10 dB
-20 dB
1 kHz
10 kHz
48
100 kHz
Resulting filter transfer function

20 dB
|| H ||
0 dB
-20 dB
-40 dB
-60 dB
-80 dB
80 dB
at 250 kHz
-100 dB
-120 dB
1 kHz
10 kHz
49
100 kHz
1 MHz
Comparison of single-section and

two-section designs
Lf
330 H
vg
Rf
Cf
470 F
0.67
Cb
1200 F
R2
0.65
n2L2
R1
2.9 H
1.9
L2 5.8 H
vg +
n1L1
15.6 H
L1 31.2 H
C2
11.7 F
50
C1
6.9 F

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Chapter 10

Input Filter Design

Fundamentals of Power Electronics

Chapter 10: Input Filter Design

10.1.1 Conducted Electromagnetic Interference

Buck converter example

Approximate Fourier series of ig(t):

High frequency current harmonics of substantial amplitude are injected

Chapter 10: Input Filter Design

Addition of Low-Pass Filter

Magnitudes and phases of input current harmonics are modified by

H(kj) 2I sin kD cos kt + H(kj)

The input filter may be required to attenuate the current harmonics by

Chapter 10: Input Filter Design

Chapter 10: Input Filter Design

Sample of EMC regulations that include limits on radiofrequency emissions:

Chapter 10: Input Filter Design

Device under test

LISN: Line Impedance

Fundamentals of Power Electronics

Chapter 10: Input Filter Design

An Example of EMI Limits

Fundamentals of Power Electronics

Chapter 10: Input Filter Design

Differential and Common-Mode EMI

Differential mode EMI: input current waveform of the PFC. Differential-mode

Fundamentals of Power Electronics

Chapter 10: Input Filter Design

10.1.2 The Input Filter Design Problem

(no input filter)

Fundamentals of Power Electronics

Chapter 10: Input Filter Design

Input Filter Design Problem, p. 2

Chapter 10: Input Filter Design

Input Filter Design Problem, p. 3

Effect of L-C input

Chapter 10: Input Filter Design

10.2 Effect of an Input Filter

Control-to-output transfer function is

Fundamentals of Power Electronics

Chapter 10: Input Filter Design

vg(s) source short circuit

Zo(s) = output impedance of

Gvd (s) = Gvd (s)

Fundamentals of Power Electronics

How an input filter changes Gvd(s)

Gvd (s) = Gvd (s)

is the original transfer function, before addition of input filter

is the converter input impedance, with d set to zero

(see Appendix C for proof using EET)

Fundamentals of Power Electronics

Chapter 10: Input Filter Design

Design criteria for basic converters

Fundamentals of Power Electronics

Chapter 10: Input Filter Design

10.2.2 Impedance Inequalities

Gvd (s) = Gvd (s)

The correction factor

shows how the input filter modifies the

The correction factor has a magnitude of approximately unity provided

These provide design criteria, which are relatively easy to apply.

Chapter 10: Input Filter Design

Effect of input filter on converter output