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Abstract Dynamic average-value models (AVM) for linecommutated rectifier circuits are generally formulated in a
state-space form and hence are straightforward to implement in
state-variable-based simulation languages. In nodal-analysisbased languages, however, developing AVMs requires additional
effort to reformulate the models and interface them with the
external circuit networks. This paper proposes an averagedcircuit model for representing three-phase line-commutated
rectifier in nodal-analysis-based simulation languages. The
model derivation and its interface with the network are
presented. The proposed model is verified against a detailed
switch-level implementation of the system.
I.
INTRODUCTION
GVn = I h .
(1)
2318
!"
Ldc
Lc
ebs
rdc
S3
vab_s
=>?
S4
S5
S6
Rload
vdc
Lc
ecs
i qs = i qs ,com + i qs,cond ,
#
=>?
S2
ias
S1
Lc
eas
!"
vas
!"
idc
2 3 idc
iqs,com =
iqs,cond =
ids,com =
3 vqs
[ (
4 Lce
2 3 idc
( )]
5
5
sin 6 + sin 6
2 3 idc
3 vqs
[ ( ) (
)]
[ ( )
)]
7
5 ,
sin 6 sin + 6
5
5
cos 6 cos 6
[sin (2 ) 4 sin + 2 ],
4 Lce
[ (
2 3 idc
( )]
5
7 ,
cos + 6 cos 6
where is the so-called commutation angle defined as
ids,cond =
(4)
(5)
(6)
(7)
A. State-Space Model
Let us consider the three-phase line-commutated rectifier
system depicted in Fig. 2. The dynamic average model for this
system is typically considered for Mode 1 where each
switching interval is divided into two sub-intervals, namely
commutation and conduction [16]. For the purpose of
derivation, the ac variables are represented in the so-called
qd converter reference frame in which the d-axis component
of the input voltage is identically zero [6]. Also, it is assumed
that the dc bus current does not change within a switching
interval [6]. Following the approach set forth in [6], the
dynamics of the dc bus may be represented by the following
state equation
3 3
3
vqs rdc + Lc e idc vdc , (2)
2 Lc e idc
3 vqs
(8)
B. Averaged-Circuit Model
Equations (2)-(8) represent a state-space average-value
model for the switching circuit of Fig. 2. This has been
illustrated in the block diagram of Fig 3. In this figure, the ac
and dc networks are connected through a nonlinear timeinvariant block which replaces the switching network of Fig.
2. The inputs to this block are the qd components of the ac
input voltage and the voltage of the dc bus. The outputs
include the dc-bus current and the qd components of the ac
phase currents.
Ldc + 2 Lc
didc
=
dt
= cos 1 1
x=
x (x , v , )
i
= g (x , v
,
)
2319
1
Req
idc (t ) =
3 3
v qs (t ) v dc (t ) + ih,dc (t ) ,
(9)
2 Lrec
,
t
(10)
where
Req = Rrec +
Rrec = rdc +
Lce ,
Lrec = Ldc + 2 Lc .
(11)
Here, the discretization time step is denoted by t .The socalled history term, ih, dc (t ) , is a function of the network
variables at the previous time step. In particular,
2R
ih, dc (t ) = 1 rec idc (t t )
Req
(12)
1 3 3
+
vqs (t t ) vdc (t t ) .
Req
between the ac network and the input port of the AVM in each
phase. The resistor must be chosen sufficiently large to reduce
the interfacing error. The value of the compensating current
source at each time step is then calculated as
icomp _ x (t ) =
V x (t t )
,
rz
(13)
L )
L )
(
,
L )
illustrated in Fig. 5.
+
2320
@?
@?
[2]
[5]
[6]
[7]
@?
@?
[10]
[12]
[14]
[13]
=I
[9]
[11]
[8]
parameters:
e = 2 60 rad s
=I
System
[4]
APPENDIX
[3]
CONCLUSION
[1]
V.
[15]
2321
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