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IEEE PEDS 2005

Analysis, design and implementation of an active


clamp flyback converter
Bor-Ren Lin, Huann-Keng Chiang and Kao-Cheng Chen
Departnent ofElectrical Engineering
National Yunlin University of Science and Technology
Yunlin 640, Taiwan, ROC

Abstract-This paper presents the detailed circuit


operation, mathematical analysis, and design example of
the active clamp flyback converter. The auxiliary switch
and clamp capacitor are used in the flyback converter to
recycle the energy stored in the transformer leakage in
order to minimize the spike voltage at the transformer
primary side. Therefore the voltage stress of main switch
can be reduced. The active clamped circuit can also help
the main switch to turn on at ZVS using the switch output
capacitor and transformer leakage inductance. First the
circuit operation and mathematical analysis are provided.
The design example of active clamp flyback converter is
also presented. Finally the experimental results based on a
120W prototype circuit are provided to verify the system

David Wang
Mean Well Enterprises Co., Ltd.
No. 28, Wu-Chuan 3rd Road, Wu Ku Ind. Park,
Taipei Hsien 248, Taiwan, ROC
and implementation of a 120W active clamp flyback converter
is presented in this paper to achieve zero voltage switching
(ZVS) for main switch. With the auxiliary switch, clamp
capacitor and resonant circuit, the surge energy stored at the
leakage inductance can be recycled by the active clamp circuit.
The voltage stress at the main switch is also reduced. The
circuit operation and mathematical analysis are provided in the
paper. A design example is also included in the paper. Finally
the experimental results based on a 120W prototype circuit are
provided in the paper to verify the effectiveness of the active

clamp flyback converter.


Lr

performance.

Keyworcs-flyback converter, active clamp, zero voltage

INTRODUCTION
The flyback converters are widely used in the conventional
switching mode power supplies to supply low power and low

I.

output voltage. The transformer in the flyback converter is


used to achieve circuit isolation and energy storage. The
switch in the flyback converter is operatpd at hard switching.
Therefore the voltage and current stress of switch suffered
from the transformer leakage inductance is very high. These
high peak voltage and current will result in the low efficiency
and high switching losses. The conventional passive clamp
circuit can be used to reduce the energy stored in the leakage
inductance using the clamp resistor. Therefore the voltage
stress of switch can be reduced. However the total efficiency
of converter is not greatly improved. The resonant flyback
converters [1-3] were proposed to increase the system
efficiency and reduce the switching losses at the main switch.
However, the voltage stress at the switch is too high in the
resonant flyback converters especially for the high input dc
voltage. The active clamp technique has been proposed [4-6]
to absorb the surge energy stored in the leakage inductance
and suppress the voltage stress at the switch by using the
active clamp circuit. The clamp capacitor was assumed to be a
constant voltage source. The effect of the clamp capacitor on
the flyback converter stability was presented in [7].
Although the active clamp flyback converter has been
presented for several years, the detailed system analysis with
mathematical equations is not presented. The analysis, design

0-7803-9296-5/05/$20.00 2005 IEEE

LS+
Icam
Cd.mpT'm

switching

vvmp
l

tCo veut

Lepa|E

Fig.l1Circuit configuration ofthe active clamp flyback converter.


II. SYSTEM ANALYSIS
Fig. 1 shows thie circuit configuration of the active clamp
flyback converter. The magnetizing inductance is represented
as Lm. The resonant inductance Lr is the sum of transformer
leakage inductance and external inductance. The resonant
capacitance Cr is equal to the parallel combination of the
parasitic capacitance of main switch Smain and auxiliary switch
Stx The auxiliary switch Saux and clamp capacitor Cciamp
represent the active clamp circuit to recycle absorb the surge
energy due to the leakage inductance so as to reduce the
voltage stress of main switch Sm," The resonant capacitance
C, and inductance L, are resonant to achieve ZVS operation
for main switch Smai ,. Before the system analysis, some
assumptions are made as: (1) The resonant period generated
by the clamp capacitance Cciamp and resonant inductance Lr is
greater than tu off time of main switch; (2) The resonant
inductance is less than magnetizing inductance (Lr<Lm); (3)
the
All semiconductors (switches and diodes) are ideal;
converter is operated in the continuous conduction mode; (5)
the energy stored in the resonant inductance is greater than
energy stored in the resonant capacitance in order to achieve
ZVS operation for main switch.

(4)

424

Figs. 2 and 3 give the main waveforms and eight operation


states of the converter. In the steady state, the voltage-second
product when main switch or body diode is turned on equals
the voltage-second product when both main switch and body
diode are turned off. Therefore one can obtain the clamp
capacitor voltage
Vciamp = Vj, 1 D V=
(1)
V,,..,
III

vGlut

VG+nV

I I I

J.

(d) interval 4 (t3-t4)


I

ill

I-+Wj

DDr

L
v,,..
C.
L~~~~~~~~~~~~~~~~~~V.........W;

'i

..

M f

__L___ L

(e) interval75 (t-t5)

VC,I
D,

Vi, 0=_

LS S ,
VCI

l___It_l_T_

Da~ ~ ~ ~ ~ ~ ~ ~

(f) interval 6 (t5-t6)

r|.,,

(g) interval 7 (t6t7)


1d

.141t
II tt3

Ijg-

5ts t7t4It

14

+iDI

Fig. 2 Main waveforms of the active clamp flyback converter.

L_

(h) interval 8 (t-to)


Fig.

Mainwaveformsofth_ activ
(a) interval I
IgL;

clamp flyback converter.

time interval switch


is turned
(to t):Sa,, In isthisturned
S,,,,,n
on
and
switch
off.
Therefore
the
resonant
(to-tb) vclam
across
switch
is
zero
=
capacitor
voltage
(
(t)
p~
~
VCr
0 ). The
~~~~~~~~rasome
rmaysd
Smain
Interval I

transformer primary side

input voltage Vpr,,(t) V,

~~~~~~~~~~expressedas:

(b) interval 2 (t,-t2)

+I 1 L

v...p
+

(c) interval 3 (t2-t3)

*,",

voltage is approximately equal

to

and the primary side current is

(2)
LLm(t)lLr(t)lLm(tO)+ L n (t-to)
_ 4 -The secondary side diode Do is turned off. In this interval the
1 .dinput energy is stored in the magnetizing inductance L,,. The
clamp capacitor voltage is equal to nV, and the clamp
capacitor current i,camp(t) = 0. This interval ends (t=11) when
main switch is turned off and the primary current at t=t1 is
iLr (tl) = iLm (t0 ) + L + (tl -to).

Fig. 3 Eight time intervals during one PWMperiod of the active


425~~~m

Interval 2 (t, - td: This interval starts at time t=t1 when main
switch Smain is turned off. The parasitic capacitance of main
switch is charged from OV to Vin+V1,,,p =V-,+nV,. The
resonant circuit is composed of capacitor Cr, L and Lm. The
resonant capacitor voltage and resonant inductor current are
expressed as:
VCr(t) = Vin (1- COS(wi (t-tl))) +Lr(t)ZIsin(z(t- t1)),

iLr (t) = iL, (tl) cos[ct (t- t )] + -" sin(at (t - t )) (3)


s

= i/
where a2/
vt

Vpr( =-v

I
z = I Lm + r
(4)
+Lr)
Cr (Lm+Lr
Cr
In the circuit operation, the magnetizing current is operated in
the CCM mode. Therefore iL=iL,,, is always positive in this
interal. Therefore the time interval in this state must be less
than one fourth of resonant period. The resonant capacitance is
very small and capacitor voltage is charged quickly. The
resonant capacitor and inductor current are approximately
given as:
VCr (t) = Vin (1- cos(a (t -tl))) + iLr (ti )Z1 sin(aX (t-t )) as:
(5)
(tt) )
iLr (t] )ZI a)] (t t=

cr

) *'I +

v,.ntl)l+(0iQ11)
z-n , (t tl )
-

(t3 td:
4 At time t1t3 the primary side voltage Vp,
so that the secondary diode D0 is tumed on. The

equals -nV0

Lr ensure ZVS operationCcia,mp


resonant. In order to
for auxiliary
switch, the auxiliary switch should be tumed on before i,camp
goes to negative. The energy stored in the magnetizing
inductance is transferred to output load. The magnetizing
current Is decreased and expressed as:
(11)
iLm(t) = iLm (t3)-(t-13)
resonant inductance

and clamp capacitance

begin to

Lm
The clamp capacitor voltage and leakage current are expressed

Vciamp (t) = n Vo-(n VO- Vclamp (13)) cos(w3 (t1- 3))


+ Lr (t3 )Z3 sin(o (t t3))

iDm (t) = lLr(t) = iLr (11 )cos[i (t- l )]+ insin(c, (t-t,))
=iL(t

The

LT

(10)
Lm + Lr
This interval is ended when the transformer primary voltage
Vpl equals -nV, at time t=t3. In this moment the clamp
capacitor voltage Vclamp equals nV0(Jm + Lr)lLm and
secondary side diode conducts.
Interval 4

where

and Z2
=a
d Ze
(
L

v.

iL,r (tl ) +

t~t

VJ + nV- (n0- Vciamp(13 )) cos(3 (t -t3))

Vcr(t) =

(6)

+ 'L, (t3)Z3 sin(a -(t1-13)) )


( n Vo V a (t3

t) 'L
In
this
time
(nJK=
Vmp(3)sin(w3(t - 0))(2
( L() Z3
In this time intervalamp
interval the resonant capacitor VCr is less- than
Vi,+nV0 so that no current flows through auxiliary switch
+'Lr(,3) Cos(w3 (t-t3))
=
0.
is
The
voltage
still
equal
to
clamp
capacitor
nVo.
iclamp(t)
. The
an Z LIC
. . . where as3=1
The transformer primary winding voltage is
side current is given as:
=LrVtl)
Cr (t- t)
(7) secondary
(13)
iDo(t) = n(iLm(t) -Lr( ))
Vpri(t)=Vin
The auxiliary switch is turned on in this interval to ensure the
This time inte l is eZVS turn-on operation. This interval is ended when the clamp
Vcr equals Vi1+nV0 at time t=12. Therefore this time interval current is zero.
can be expressed as:
Interval 5 (t4- ts): The system analysis in this interval is the
(Vin
same as in interval 4 except the clamp capacitor current is
nVo)Cr
+
-tl
(8)
At12 =2t2
reversed. This interval is ended when the auxiliary switch is
iLr (tl)
Interval 3 (t2 t): At time t2 the resonant capacitor voltage turned off.
Vcr equals to Vcr=Vin+ Vciamp so that the body diode across Interval 6 (tS- t4): At time t=t5 the auxiliary switch is tumed
auxiliary switch is turned on. The secondary side diode is still off. In this interval the secondary side diode Do still turns on
turned off. The energy stored in the inductors Lm and Lr is and Vpr =-n V. The magnetizing current is
nVm
released to charge clamp capacitor in this interval. Since the
Lm
clamp capacitance CcIamp is much larger than resonant
capacitance Cr. Therefore almost the magnetizing current is TThe nlegative current iL, will discharge capacitor voltage VC,.
o chrge
lampcapaitor.The
crren and
The resonant circuit is formed by the resonant inductance Lr
cor current
used toused
charge
capacitor. The inducor
clamp
and parasitic capacitance Cr. The capacitor voltage
and
Vclamp (t) = nV0 co(w2 (t -1t2 )) + iLr (t2 )Z2 sin(w2 (t -1t2 )),
inductor current iLr, are expressed as:

clampcapactonVot are2t gt2iven t2as:

Vc.

VCr (t) =

(t- t2))
iclamp (t) iLr (t) = iL, (t2 ) COS2 (t-t2 )]--sin(w2
Z 2
Vcr (t) = Vi, + nV0 COS(@2 (t- t2)) + iL, (t2 )Z2 sin(.2 (t t2)) (9)
=

426

Vin

+ n

VO

(VJn

nV

Vcr (t5 )) cos(w4

+ iLr (tS )Z4 sin(a)4 (t-t5))

(t-ts))

iLr(t) = iLr(t5)

cos(cu^(t t5))
-

+ (Vin + n V

VCrCr())OS()4 (t- t5)


4~
t5

(15)

The clamped
and iclamp(t) =0 The
capacitor voltage
secondary side diode current is expressed as:

and Z4

where w4 =1 / ~J57

Vciamp(t) =lnV

/Lr / Cr

iDo (t) = n(iLm (t) - iLr (t))

(16)

To ensure the ZVS of the main switch, the energy stored in Lr


must be greater than the energy stored in Cr. The following
condition must hold:
(17)
VCr (t) Vin + n Vo > iLr (tS )Z4
This interval is ended when Vcr=O
Interval 7 (t6- t): At time t=t6 the resonant capacitor voltage
Vcr=O and the anti-parallel diode across main switch is turned
on. The transformer primary voltage Vpri (t) = -n V0 and the

magnetizing current 1Lm(t) = Lm(t6) -

Lm

(t - t6)

The

voltage across leakage inductor VL, equals Vi,+nV, and the


leakage inductor current is linearly increased.
(18)
(V + nV0)

lLr(t)=ir(t6)+-

(t-t6)

n0n(

-n Vn

The

diDo

(19)

dt
Lr
Lr
Lm
The secondary side diode current iDO,(t)=n(iL,(t)-iL,(t)).
The clamped capacitor voltage Vcjamp-nVo and icja,p=0. Before
the inductor current iLr is positive, the main switch is turned on
to ensure ZVS operation. This interval is ended when main
switch is tumed on.
Interval 8 (t7 t0): This interval starts when the main switch is
tumed on at time t=t7. The transformer secondary side current
iL- is decreasing and the leakage inductor current iLr is
increasing. At time 1=t0 the transformer secondary side current
iDo=O and this interval is ended. In this interval the main
voltage and current in the circuit are expressed as:
Vpri (t) = -nV0, Vcr (t) =O, Vciamp (t) = nVO,

lLr(t) = Lr(t7)+

(VYn +nVO)
L

(t-t7),

1Lm (t) = iLm (t7) -~(t


Lm -t7), ciCamp (t) = 0.

(20)

III. CIRCUiT DESIGN PROCEDURE


One assumed that the maximum duty cycle of active clamp
flyback converter is Dmax. The tum ratio between the
transformer primary side and secondary side is equal to
n=

N- Vin,nmn
V0

N2

Dmax
Il-Dmax

-=rjLrCclamp

Ccmp

clamp

(21)

=[(1-DminVin)Ts]2
iZ2L

(26)

The voltage stress of rectifier diode at the transformer


secondary side is

Vin ma27
ma
nDO max = inoma + V0

The peak secondary diode current is expressed as:


2P

'D

o(

max

(27)

(28)

The output filter capacitance CO is expressed as:

Dmax Po

V0
V. AVO
where AVO is output voltage ripple.

(29)

IV. DESIGN EXAMPLE


The system parameters of the design circuit are:
- input ac voltage range Vs,wjs: 90V-130V
-

nV

Smain,p

From Figs. 2 and 3 the clamp capacitor and leakage inductor


are resonant about half of period. Therefore the half of the
resonant period is approximately equal to the turn-off time of
mainswitch
=
(25)
(I-Di,VnTW
2
where Dmin Vin=(DmaxVinmin)lVmax,min. Therefore the clamp
capacitance can be obtained as:

with

The transformer secondary side current is decreased with


negative current slope
+ Vi+nV

If the clamp capacitance is large enough, the voltage across


The voltage stress of
the resonant inductance can be neglected.
main switch is approximately equal to
i max + n VO + 1Lr (t3 )Z3
(22)
Smain, max Vin,
The peak current of main switch is expressed as:
P D +
(23)
ISmain,p =
DmaxTsw
7 fVn,min D
Lmax
where T, is the switching period. To ensure the ZVS
operation for main switch, the energy stored in the resonant
inductance must be greater than the energy stored in the
resonant capacitance.
Cr (Vinmax + n VO
(24)
L2>
12

outputvoltage VO= 12V

Po=120W

- rated output power


frequencyf> 0.85
=150 kHz
switching
-- circuit
efficiency
il
- Output voltage ripple A VO=0. IV.
The ETD-39 core with Bmax=2000G and Ae=1.25cm2 was used
as an isolation transformer. The designed maximum duty cycle
Dmax is equal to 0.45. The tum ratio between the transformer
primary side and secondary side is equal to
n=

N, Vin,min Dmax

N2

V0

l -Dmax

8 . The voltage stress of main

switch is Vsmain ,m== 130V + 8.12 = 280V


The
magnetizing inductance of the transformer is designed as

427

Lm=524#uH. The peak current of main switch is Ismainjp=32A.


The voltage stress of the secondary side diode is VD,O,maX=35 V.
The peak secondary diode current is IDp=36.3A. The selected
resonant frequency by L, and C, is 1MHz. To ensure ZVS
operation, the delay time (td) between intervals 6 and 7 is
tj=1!(4f,)=250ns. The MOSFETs IRFP460 are used for main
and auxiliary switches in the adopted converter. The Coss of

IEFP460 is about 500pF. Therefore the equivalent

Tek

-. -

-_

Vsaugs

resonant i

capacitor C, is approximately equal to 1.5nF. The selected


resonant inductor L, is about 17,UH. The clamp capacitance
Cd_P=O. 1 8,uF.

V. EXPERIMENTAL RESULTS
A 120W prototype circuit was built and tested in the
laboratory. The system parameters of converter are shown in
section IV. Fig. 4 shows the experimental prototype circuit of
active clamp flybacj converter. Fig. 5 shows the experimental
waveforms of the gate-to-source voltages of main switch and
auxiliary switch and the drain-to-source voltage of main
switch. There is a time delay between the auxiliary switch
turn-off and main switch turn-on to ensure main switch turnon at ZVS. Fig. 6 gives the experimental waveforms of gate
signals of main switch VSma,n gs and auxiliary switch VSags and
transformer primary voltage vp,,. When main switch is turned
on, the transformer primary side voltage is equal to Vj,. If the
main switch is turned off, the primary side voltage equals nVo=-96V. Fig. 7 illustrates the measured results of gate
signals VSma,ng; and vs.Ug, and clamped capacitor voltage Vc,amp.
When the auxiliary switch is turned on, the clamp capacitance
is resonant with resonant inductance. Therefore the clamp
voltage is resonant in this period. When the auxiliary switch is
turned off, the clamp capacitor voltage is clamped to nV,=96V.
Fig. 8 shows the measured results of gate-to-source and drainto-source voltage for main switch. Before the mains switch is
turned on the drain-to-source voltage has been reached zero.
Therefore the main switch is ZVS turn-on. Fig. 9 gives the
experimental waveform of output capacitor voltage v. at
120W output load. The system efficiency of the adopted
system is about 83%.

_h

..

ds

iJE 250 V

iMi-ri0-

Fig. 5 Experimental waveforms of gate signals for main


switch vS,,ings and auxiliary switch vs.,g, and drain to source
voltage vSman,d,.
Tek .._!_._.._.,___,_.___________,
*.

&n
.wgv

-g

Vs.UAgS

.-._
v

M
400ns

3E loov

A Chlr

s.

Fig. 6 Experimental waveforms of gate signals for main


switch VSma,jngs and auxiliary switch VsaUxg. and transformer
primary voltage vp,,.

Tek

F .,

Vsr,,j,gs

rT
~

_r_~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~.......

Fig. 4 Experimental prototype circuit of active clamp) flyback


converter.

Chi

3m

17_s__ i

10.0,jV

501

OM

A Chi 1

SV

Fig. 7 Experimental waveforms of gate signals for main


switch vS4xprienga, and auxiliary switch vsate,gm and clamped

capacitor voltage Vclamp.

428

'-:z....!-....

Tek-'

S-rnin,gs

power and very wide input voltage range applications", IEEEAPEC, vol. 1, pp. 242-248, 2002.
[2] C. T. Choi, C. K. Li and S. K. Kok, "Control of an active clamp

'.

,discontinuous conduction mode flyback converter", IEEE-PEDS,


vol. 2, pp. 1120-1123, 1999.

VSmn, ds

[3] 1. D. Jitaru and S. Birca-Galateanu, "Small-signal


characterization of the forward-flyback converters with active
clamp", IEEE-APEC, vol. 2, pp. 626-632, 1998.

[4] C. T. Choi, C. K. Li and S. K. Kok, "Modeling of an active

clamp discontinuous conduction mode flyback converter under


variation of operating conditions", IEEE-PEDS, vol. 2, pp. 730733, 1999.
[5] R. Watson, F. C. Lee, and G. C. Hua, "Utilization of an activeclamp circuit to achieve soft switching in flyback converters",
Transactions on Power Electronic, vol. 11, no. 1, pp. 162IEEE
M 1 .. Ch If S.OOV
169, 1996.
lO10.0OV
[6] Y.-S. Lee and B.-T. Lin, "Adding Active Clamping and Soft
Ch3 100lV
Switching to Boost-Flyback Single-Stage Isolated PowerFig. 8 Experimental waveforms of gate-to-source and drain-toFactor-Corrected Power Supplies", IEEE Transactions on Power
source voltage for main switch.
Electronics, vol. 12, no. 6, pp. 1017-1027, 1997.
- .q5.
Tok ..~ ! z
..
!F-,,r- ... ......
Y. Hakoda, T. Ninomiya, M. Shoyama and T. Hashimoto,
[7]......
"Effect of clamp capacitor on the stability of active-clamp dc-dc
V; vO ,converters", IEEE-PESC, pp. 355-361, 1998.

.____i_-_

. .._

A.

4.

*C1:;~7N

11 --l

7~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

M.2.00ms A

Ch3

13.3 V

Fig. 9 Measured output voltage v, waveform at 120W output


load.
CONCLUSION
This paper gives a detailed circuit description and
mathematical analysis of the active clamp flyback converter.
The auxiliary clamp circuit is used to recycle the energy stored
in the leakage inductance and suppress the voltage stress of
main switch. The clamp circuit can also help the main switch
to turn on at ZVS. The circuit design procedure and design
example of a 120W converter is also presented in this paper.
The experimental results of prototype circuit demonstrate the
features of high efficiency and ZVS operation.
VI.

ACKNOWLEDGMENT
This project is supported by Mean Well Enterprises Co.,
Ltd. and National Science Council in Taiwan, under grant
NSC93-2622-E-224- 15-CC3.
REFERENCES
[1] P. Alou, 0. Garcia, J. A. Cobos, and J. Uceda, "Rascon,

M.;Flyback with active clamp: a suitable topology for low

429

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