PAD202

G=40
G=6..100

HP 1 pole fc=0.16 Hz

R237

R233

1F

10k

15k

R234

100k

8.2k

P203
20k

C235

VGND

R235
100k
C233

VGND

IC206PWR

C224

VGND

100nF

1nF

1nF

C227
C223

R225

1k

C230

100nF

R222
1

100nF

AGND VGND

+5V/2

TLC277P

VCC

100nF

INA114P

100nF

ADIN0

220nF 5%

C215

TLC277P

1M

R236

V-

+5V/2

VGND

Right-leg driver (DRL) notes:

simulates electrode impedance

Important usage instructions for the DRL.

If you only want to use one channel, never let the other channel float.
Always connect the unused terminals to VGND, or the DRL will not work properly.

DRL design from http://www.biosemi.com/publications/artikel7.htm, fig.3

See http://openeeg.sf.net for more information.
Authors: Moritz v. Buttlar, Joerg Hansmann, Andreas R

R238

Cal_GND

10k
AGND

R240
100

u cal

If P201 is needed, adjust potentiometer so DRL=0mV (referred to VGND)

when _all_ amplifier inputs are shorted to the DRL output (R_LEG).

PAD204

PAD203
U_cal

R239
10k

TLC277P

100nF
+
C201
47F tan 1ohm

AGND

P201 is not needed when INA114 instrumentation amplifiers are used.

You may replace it with a short wire from pin 2 and pin 1 (VGND).

C208

R227
1M

2.0V buf

Ground plane is VGND

R223
AGND

1M

voltage divider 1:20000

5Vp-p +/-10% => 250Vp-p +/-10%
250Vpp +/-10%, 0.1 .. 100Hz
Square wave Calibration Signal

+5V/2

Vcc analog

1nF

AGND

VGND ref. voltage

+2V, buffered

100nF

2.0V

+
47F

20k
P201

C219

modEEGamp_v1_1_Rev. A
Olimex LTD, Bulgaria, 2013
https://www.olimex.com

100nF

IC201B

Only insert IC201 on _one_ board

when using 2 or 3 amplifier boards

IC201A
8

10nF
C213

C211

C203 10nF

TLC277P
VGND

C202

+5V/2

VGND

TLC277P

IC204PWR
GND

10k

1nF

AGND

3
1

The solder-jumpers (SJ201 - SJ206)

to the right, are used for channel
mapping. This allows multiple amplifier
boards to share the same connector.
2 channels must be selected on each
board by closing two jumper gaps with
solder.
Use SJ201 and SJ204 for the first board.

J201
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33

2.0V
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34

1
1
1

ADIN1

IC204A
R218

ADIN0

AGND

VCC

C226

C216

200k
C212

IC206B
5

1M

C218

V+

5
7

R210

C228

GND

R209

IC206A

C221

2k2

C236

2k2

G=16

33nF 5%
1F
R226

3
3

+5V/2

AGND

Q204
BC557

PAD205
COM

R213

3rd order "Besselworth" filter, fc = 59 Hz.

The 3rd pole is located on the digital board.

2k2
R217

VGND

1nF

TLC277P

R216

2k2

right leg driver

R_LEG

IC205PWR

1nF

PAD206

R_LEG

100k
C232

VGND

AGND

Right Leg
Electrode

R230

C222

VGND

2k2
R203

VGND

VGND

IC203

2
3

100pF

1 1

Q208
BC547

8.2k

C225

G=12.2

Q202
BC557

1 1

10pF
C206

CH1+

2k2

2k2

100pF

R211

2k2
Q206
BC547

R229

100k

Electrode
DC checkpoint
R212

C210
Channel 1 +
Electrode

10k

R204

C207

CH1-

R221

1k

+5V/2

TLC277P

Input Voltage Full Scale (10 Bit) = 512uVpp

Input Voltage Resolution (1 LSB) = 0.5 uVpp
Total gain = 7812.5
Input can handle up to +/-100mV DC electrode offset

Channel 1 Electrode

P202
20k

IC204B
R219

R220
1

100nF

ADIN1

15k

100nF

100nF

AGND VGND

10k

VCC

100nF
C214

INA114P

R206

1F

TLC277P

1
2

C231

V-

C217

GND

2k2

V+

33nF 5%
IC205B

R228
220nF 5%

5
7

R232

C220

C229

C234

1M

2k2
R215

Q203
BC557

R205

IC205A

2k2

2k2

1F

G=16

R231

R214

VGND

R201

G=40
G=6..100

HP 1 pole fc=0.16 Hz

1M

Q201
BC557

CH2+ 2k2

+5V/2

IC202
2

Q207
BC547

2k2

1 1

2
3

100pF

1 1

C205

10pF
C204

C209
Channel 2 +
Electrode

Q205
BC547

G=12.2

R207

2k2
3

2k2

R224

HF rejection
CH2- R202

100pF

Channel 2 Electrode

PAD201

Electrode
DC checkpoint
ESD protection
and user current limiter
R208

2 SJ201
2 SJ202
2 SJ203
1
1
1

2 SJ204
2 SJ205
2 SJ206

PWM

PINHD-2X17
PWM cal (PB1)
Output Voltage Full Scale (10 Bit) = 4.000 Vp-p (Range 0..4V)
=> 3.9mV bitstep at 10 bit resolution.

This hardware design by Olimex LTD is licensed under a Creative Commons Attribution-ShareAlike 3.0 Unported License.