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DATA SHEET
TEA6880H
Up-level Car radio Analog Signal
Processor (CASP)
Product specification
Supersedes data of 2000 May 08
2003 Feb 04
Philips Semiconductors
Product specification
TEA6880H
CONTENTS
1
FEATURES
1.1
1.2
1.3
1.4
General
Stereo decoder and noise blanking
Weak signal processing
Audio pre-amplifier
GENERAL DESCRIPTION
ORDERING INFORMATION
BLOCK DIAGRAM
PINNING
FUNCTIONAL DESCRIPTION
7.1
7.2
7.3
7.4
7.5
7.5.1
7.5.2
7.5.3
7.5.4
7.5.5
7.5.6
7.5.7
7.5.8
Stereo decoder
FM noise blanker
AM noise blanker
Multipath/fading detection and weak signal
control
Tone/volume control
Source selector
Loudness
Volume 1
Treble
Bass
Volume 2
RSA selector
Chime adder
LIMITING VALUES
THERMAL CHARACTERISTICS
10
CHARACTERISTICS
2003 Feb 04
11
I2C-BUS PROTOCOL
11.1
11.2
11.3
11.4
11.5
11.6
11.7
11.8
11.9
11.10
11.11
11.12
11.13
11.14
11.15
11.16
12
INTERNAL CIRCUITRY
13
PACKAGE OUTLINE
14
SOLDERING
14.1
14.2
14.3
14.4
14.5
15
16
DEFINITIONS
17
DISCLAIMERS
18
Philips Semiconductors
Product specification
TEA6880H
FEATURES
1.1
General
I2C-bus compatible
Digital alignment/adjustment via I2C-bus:
FM noise blanker sensitivity
FM stereo separation.
FM audio processing hold for RDS updating; holds the
detectors for the FM weak signal processing in their
present state
FM stereo decoder
Accepts FM multiplex signal and AM audio at input
Audio pre-amplifier
GENERAL DESCRIPTION
ORDERING INFORMATION
TYPE
NUMBER
TEA6880H
2003 Feb 04
PACKAGE
NAME
QFP64
DESCRIPTION
plastic quad flat package; 64 leads (lead length 1.95 mm);
body 14 20 2.8 mm
VERSION
SOT319-2
Philips Semiconductors
Product specification
TEA6880H
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VCC
supply voltage
7.8
8.5
9.2
ICC
supply current
32
40
48
mA
signal-to-noise ratio
78
dB
THD
0.1
cs
channel separation
40
dB
Vo(rms)
840
950
1060
mV
Tone/volume control
Vo(max)(rms)
2000
mV
Gv
voltage gain
1 dB steps
112
+20
dB
Gstep(vol)
dB
Gbass
bass control
18
+18
dB
Gtreble
treble control
14
+14
dB
dB
Vo = 2.0 V; Gv = 0 dB;
unweighted
107
dB
THD
Vo(rms) = 1.0 V; Gv = 0 dB
0.01
RR100
ripple rejection
70
dB
CMRR
48
53
dB
2003 Feb 04
Philips Semiconductors
Product specification
TEA6880H
BLOCK DIAGRAM
fref
(75.4 kHz)
audio
processing hold
(for RDS update)
10 nF
68 k
470 k
6.8 nF
100 nF
AM
mono
input
33 nF 220 k
51
50
49 48 47
6.8 nF
44
45
46
22
nF
100
k
43
52
A
trigger sensitivity
120 kHz
HIGH-PASS
AMPLIFIER
AM
GATE
NOISE
&
INTERFERENCE
DETECTOR
AGC
220 nF
10 nF
test
AVERAGE
DETECTOR
(MUTE/HCC)
60 kHz
HIGH-PASS
&
USN
DETECTOR
pilot
ind.
STEREO
DECODER
PLL
PEAK
DETECTOR
(SNC)
sensitivity
56
RIN 182 k
220 nF 100 k
82 k
57
33 pF
10 nF
detector
hold
38 kHz
19 kHz
10 F
54
55
MPXRDS
FM
PULSE
FORMER
PULSE
SEPARATOR
53
AMNBIN
MPX
input
100
nF
58
INPUT BUFFER
&
80 kHz
LOW-PASS
start/
slope
sep.adj.
mute slope
MATRIX
&
SOFT-MUTE
mute start
3.3 nF
59
3.3 nF
60
2.7 nF
61
2.7 nF
62
4.7 nF
63
4.7 nF
64
PEAK
DETECTOR
(WBAM2)
V/I
CONVERTER
detector
reset
TEA6880H
PEAK
DETECTOR
(USN2)
SNC
38 kHz
AVERAGE
DETECTOR
(WBAM1)
FM BUFFER
&
FM NB-GATES
HCC
50/75 s
DE-EMPHASIS
&
AM STEREO INPUT
STEREO
DECODER
OUTPUT
start/
slope
detector
hold
BUS
AVERAGE
DETECTOR
(USN1)
LEVEL
ADC
(6-BIT)
de-emphasis
switch
detector hold
I2C-BUS
bus controls
detector reset
&
CONTROL LOGIC
20 kHz
BAND-PASS
&
AMWB
DETECTOR
LEVEL
INPUT
BUFFER
test
sensitivity
H
1
7
22 k
10 nF
22 k
I2C-bus
to NICE
from AM/FM
level detector
I2C-bus
MHB427
VDD(I2C-bus)
2003 Feb 04
Philips Semiconductors
Product specification
TEA6880H
3.3
k
AM noise
blanker flag
330
pF
42
41
10
nF
220
nF
40
39
left rear
output
left front
output
right front
output
right rear
output
220
nF
15 nF
36
37
38
35
33
34
A
CHIME ADDER
(G = 20 dB)
&
SWITCH
AM
PULSE
FORMER
BUS
PEAK
TO
AVERAGE
DETECTOR
VOLUME 2
LEFT
FRONT
BUS
CHIME ADDER
(G = 20 dB)
&
SWITCH
BUS
BUS
BUS
REAR
SEAT
AUDIO
SWITCH
VOLUME 2
LEFT
REAR
BUS
BUS
VOLUME 2
RIGHT
REAR
VOLUME 2
RIGHT
FRONT
32
ANALOG STEP
INTERPOLATION
(ASI)
LEFT
TREBLE
BAND
BUS
RIGHT
BASS
BAND
ASI
ABC
BUS
WBAM
ADC
(3-BIT)
ASI
LEFT
BASS
BAND
ABC
BUS
31
RIGHT
TREBLE
BAND
BUS
30
220 nF
3.3 k
220 nF
10 nF
BUS
E
BUS
USN
ADC
(3-BIT)
VOLUME 1
LEFT
AUDIO
BLEND CONTROL
(ABC)
VOLUME 1
RIGHT
LOUDNESS
LEFT
ASI/ABC
control
LOUDNESS
RIGHT
BUS
29
68 nF
4.7 k
43 k
680 nF
28
BUS
27
TEA6880H
BUS
BUS
CKVR
26
25
INTERNAL
POWER
SUPPLY
A left
100 nF
23
220 nF
CKIR
24
BUS
220 nF
CKIL
A right
CVHS
220 nF
47 F
F
SOURCE SELECTOR
&
REAR SEAT AUDIO SELECTOR
22
100 nF
21
100 nF
20
H
8
9
100 nF
VCC
(+8.5 V)
input
diagnostic
&
chime
11
10
68
nF
12
CKVL
43 k
680 pF
4.7 k
13
220 nF
14
15
16
220
nF
220nF
B
right
address
select
B
left
17
CELFI
22 F
18
19
1 F
C
right
C
common
2003 Feb 04
1 F
MHB428
D input
mono
symmetric
1 F
C left
Philips Semiconductors
Product specification
TEA6880H
PINNING
SYMBOL
PIN
DESCRIPTION
SDAQ
SCLQ
LEVEL
SCL
I2C-bus clock
SDA
I2C-bus data
DGND
digital ground
TBL
VCC
supply voltage
CHIME
AGND
10
analog ground
LLN
11
LOPI
12
LOPO
13
BRI
14
ADR
15
address select
BLI
16
SCAP
17
CRIP
18
CCOM
19
CLIP
20
MONOC
21
MONOP
22
VHS
23
ARI
24
AMNCAP
25
ALI
26
ROPO
27
ROPI
28
RLN
29
RTC
30
RBI
31
RBO
32
RF
33
RR
34
ASICAP
35
LR
36
LF
37
LBO
38
LBI
39
LTC
40
2003 Feb 04
Philips Semiconductors
Product specification
TEA6880H
PIN
DESCRIPTION
AMPCAP
41
AMHOLD
42
AMHCAP
43
IREF
44
TWBAM2
45
TUSN2
46
PHASE
47
phase detector
FREF
48
PILOT
49
AFSAMPLE
50
FMHOLD
51
AMHIN
52
AMNBIN
53
TMUTE
54
MPXRDS
55
TSNC
56
MPXIN
57
FMNCAP
58
DEEML
59
DEEMR
60
FMLBUF
61
FMRBUF
62
TWBAM1
63
TUSN1
64
2003 Feb 04
Philips Semiconductors
Product specification
52 AMHIN
53 AMNBIN
54 TMUTE
55 MPXRDS
56 TSNC
57 MPXIN
58 FMNCAP
TEA6880H
59 DEEML
60 DEEMR
61 FMLBUF
62 FMRBUF
63 TWBAM1
64 TUSN1
SDAQ 1
51 FMHOLD
SCLQ 2
50 AFSAMPLE
LEVEL 3
49 PILOT
SCL 4
48 FREF
SDA 5
47 PHASE
DGND 6
46 TUSN2
TBL 7
45 TWBAM2
VCC 8
44 IREF
43 AMHCAP
CHIME 9
TEA6880H
AGND 10
42 AMHOLD
41 AMPCAP
LLN 11
LOPI 12
40 LTC
LOPO 13
39 LBI
38 LBO
BRI 14
ADR 15
37 LF
BLI 16
36 LR
35 ASICAP
SCAP 17
2003 Feb 04
RBO 32
RBI 31
RTC 30
RLN 29
ROPI 28
ROPO 27
ALI 26
AMNCAP 25
ARI 24
VHS 23
33 RF
MONOP 22
CCOM 19
MONOC 21
34 RR
CLIP 20
CRIP 18
MHB408
Philips Semiconductors
Product specification
TEA6880H
FUNCTIONAL DESCRIPTION
Stereo decoder
7.2
7.3
AM noise blanker
7.4
FM noise blanker
10
Philips Semiconductors
Product specification
TEA6880H
7.5
For the time of fast RDS updating soft mute, SNC and
HCC can be put on hold and the AM wideband peak
detector and the ultrasonic noise peak detector are put on
reset by a switch signal delivered from the TEA6840H via
pin FMHOLD.
Volume 1
Treble
Bass
Volume 2
Rear Seat Audio (RSA) selector
Chime adder
Analog step interpolation
Audio blend control.
The stages loudness, volume 1, bass and volume 2
include the Analog Step Interpolation (ASI) function. This
minimizes pops by smoothing out the transitions in the
audio signal during switching. The transition time is
I2C-bus programmable in a range of 1 : 24 in four steps.
2003 Feb 04
Tone/volume control
11
Philips Semiconductors
Product specification
TEA6880H
7.5.5
SOURCE SELECTOR
7.5.6
LOUDNESS
7.5.7
VOLUME 1
7.5.8
TREBLE
CHIME ADDER
With the chime adder circuit the chime input signal can be
summed with the left front and/or right front audio, or be
turned off.
2003 Feb 04
RSA SELECTOR
VOLUME 2
BASS
12
Philips Semiconductors
Product specification
TEA6880H
8 LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL
PARAMETER
CONDITIONS
MIN.
0.3
VCC
supply voltage
Vi
VCC 10 V
MAX.
UNIT
+10
Ptot
480
mW
Tstg
storage temperature
65
+150
Tamb
ambient temperature
40
+85
Ves
note 1
200
+200
note 2
2000
+2000
Notes
1. Machine model (R = 0 , C = 200 pF).
2. Human body model (R = 1.5 k, C = 100 pF).
9
THERMAL CHARACTERISTICS
SYMBOL
Rth(j-a)
2003 Feb 04
PARAMETER
CONDITIONS
13
VALUE
UNIT
48
K/W
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PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VCC
supply voltage
7.8
8.5
9.2
ICC
supply current
VCC = 8.5 V
32
40
48
mA
VHS
VCC = 8.5 V
3.75
4.25
4.75
IIREF
reference current
35
37
39
Vi(MPX)(p-p)
Ri = 182 k
1.89
THD = 1%
FM signal path
14
Vi(MPX)
Ii
AF input current
Ii(max)
THD = 1%
dB
3.66
7.32
Vo(rms)
890
1000
1110
mV
Vout
+1
dB
cs
channel separation
40
47
70
dB
L = 0; R = 1
40
47
70
dB
0.1
0.3
L = 1; R = 0
0.1
0.3
L = 0; R = 1
0.1
0.3
THD
Philips Semiconductors
SYMBOL
2003 Feb 04
10 CHARACTERISTICS
FM part: input signal Vi(MPX)(p-p) = 1.89 V; m = 100% (f = 75 kHz, fmod = 400 Hz); de-emphasis of 75 s and series resistor at input RIN = 182 k;
FM audio measurements are taken at pins LOPO and ROPO.
Tone part: RS = 600 ; RL = 10 k, AC-coupled; CL = 2.5 nF; CLK = square-wave (5 to 0 V) at 100 kHz; stereo source = A channel input; volume 1
attenuator = 0 dB; loudness = 0 dB, off; volume 2 attenuators = 0 dB; bass linear; treble linear; input voltage = 1 V, f = 1 kHz. Tone part audio
measurements are taken at pins RF and LF. VCC = 8.3 to 8.7 V; VSS = 0 V; Tamb = 25 C; unless otherwise specified.
This IC shall not radiate noise in the audio system such that it disturbs any other circuit. This IC shall also not be susceptible to the radiation of any
other circuit.
f = 20 Hz to 15 kHz
75
78
dB
19
f = 19 kHz
40
50
dB
38
subcarrier suppression
f = 38 kHz
35
50
dB
57
f = 57 kHz
40
dB
76
f = 76 kHz
50
60
dB
Product specification
signal-to-noise ratio
TEA6880H
S/N
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CONDITIONS
MIN.
TYP.
MAX.
UNIT
IM2
60
dB
IM3
58
dB
57(RDS)
f = 57 kHz; note 2
70
dB
67
f = 67 kHz; note 3
70
dB
114
190
PSRR
RSDEEML;
RSDEEMR
IFMLBUF;
IFMRBUF
80
dB
70
dB
30
dB
20
22.7
25.4
13.4
15.2
17
VFMLBUF,FMRBUF = 5.5 1 V
50
200
oscillator frequency
228
kHz
190
270
kHz
fref
75.4
kHz
Vi(FREF)
30
100
500
mV
Zi(FREF)
input impedance
100
27
37
mV
22
mV
hys(pilot)
dB
VPILOT
0.3
0.7
195
245
295
mV
dB
100
120
PLL VCO
fosc
Philips Semiconductors
PARAMETER
2003 Feb 04
SYMBOL
15
AM signal path
AMON = 1 and AMST = 0; Ri = 220 k;
ViAM(mono) = 250 mV
Gv
Ri(DEEML);
Ri(DEEMR)
input resistance for AM stereo left and right AMON = 1 and AMST = 1; note 6
80
Product specification
TEA6880H
VLOPO; VROPO
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CONDITIONS
MIN.
TYP.
MAX.
UNIT
Noise blanker
FM PART
20
30
40
20
50
nA
16
12.5
9.5
45
70
100
tsup
Ioffset
Ich(FMNCAP)
Idch(FMNCAP)
Vi(MPXRDS) = 0 V
4.5
5.5
VFMNCAP
15
40
60
mV
VTBL
75
100
200
mV
Vi(MPXRDS) = 670 mV
500
mV
Philips Semiconductors
PARAMETER
2003 Feb 04
SYMBOL
VFMNCAP
VLEVEL(AC) = 0 V
4.5
5.5
VFMNCAP
mV
40
mV
NBS1 = 0; NBS0 = 0
60
mV
NBS1 = 0; NBS0 = 1
100
mV
NBS1 = 1; NBS0 = 0
150
mV
NBS1 = 1; NBS0 = 1
200
mV
NBS1 = 0; NBS0 = 0
250
mV
NBS1 = 0; NBS0 = 1
275
mV
NBS1 = 1; NBS0 = 0
300
mV
NBS1 = 1; NBS0 = 1
320
mV
Trigger sensitivity measurement with pulse (on MPX signal) at MPXRDS input
Vpulse
trigger sensitivity
Trigger sensitivity measurement with pulse (on level signal) at AM/FM level input
Vpulse
trigger sensitivity
TEA6880H
Product specification
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CONDITIONS
MIN.
TYP.
MAX.
UNIT
AM PART
mmod
trigger threshold
140
VAMPCAP(AC)
AF voltage at AMHCAP
16
22
30
mV
AMGATE
60
70
80
dB
tsup(AMHOLD)
400
500
600
VAMNCAP(DC)
3.3
3.8
4.3
fAMHOLD
trigger sensitivity
45
50
55
Hz
Ioffset
50
+50
nA
17
Vi(LEVEL)
0.5
Gv
dB
VTMUTE
1.5
VTMUTE/K
3.3
mV/K
Philips Semiconductors
PARAMETER
2003 Feb 04
SYMBOL
0.2
Idch(TMUTE)
0.2
VO
DC output voltage
TEST CONDITION
Ich(test)
12
Idch(test)
12
Product specification
TEA6880H
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CONDITIONS
MIN.
TYP.
MAX.
UNIT
VCTWBAM1
DC voltage coefficient
4.10
AWS1 = 1; AWS0 = 0
3.60
AWS1 = 0; AWS0 = 1
3.00
AWS1 = 0; AWS0 = 0
2.35
AWS1 = 1; AWS0 = 1
0.69
0.82
0.98
AWS1 = 1; AWS0 = 0
0.60
0.72
0.86
AWS1 = 0; AWS0 = 1
0.50
0.60
0.71
AWS1 = 0; AWS0 = 0
VO
DC output voltage
0.40
0.47
0.56
1.5
5.5
Philips Semiconductors
PARAMETER
2003 Feb 04
SYMBOL
Ich(TWBAM1)
19.5
15
11.5
Idch(TWBAM1)
11.5
15
19.5
USS1 = 1; USS0 = 1
4.25
USS1 = 1; USS0 = 0
4.00
USS1 = 0; USS0 = 1
3.50
USS1 = 0; USS0 = 0
2.60
USS1 = 1; USS0 = 1
0.71
0.85
1.00
USS1 = 1; USS0 = 0
0.67
0.80
0.95
USS1 = 0; USS0 = 1
0.60
0.70
0.85
USS1 = 0; USS0 = 0
0.44
0.52
0.62
1.5
5.5
VCTUSN1
DC voltage coefficient
Product specification
DC output voltage
TEA6880H
VO
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CONDITIONS
MIN.
TYP.
MAX.
UNIT
19.5
15
11.5
Idch(TUSN1)
11.5
15
19.5
0.5
4.75
dB
1.75
2.00
2.25
input voltage
VTSNC
VTSNC/K
4.50
5.00
5.50
3.3
mV/K
USS1 = 1; USS0 = 1
4.25
USS1 = 1; USS0 = 0
4.00
USS1 = 0; USS0 = 1
3.50
USS1 = 0; USS0 = 0
2.60
USS1 = 1; USS0 = 1
0.71
0.85
1.00
USS1 = 1; USS0 = 0
0.67
0.80
0.95
USS1 = 0; USS0 = 1
0.60
0.70
0.85
DC voltage at TSNC with respect to AGND VMPXRDS(AC) = 350 mV; VLEVEL(DC) = 3.5 V;
fi = 80 kHz; write mode; data byte 1, bits 6 and 7:
19
VCTSNC
DC voltage coefficient
USS1 = 0; USS0 = 0
VO
DC output voltage
Philips Semiconductors
PARAMETER
2003 Feb 04
SYMBOL
0.44
0.52
0.62
V
Product specification
TEA6880H
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CONDITIONS
MIN.
TYP.
MAX.
UNIT
VCTSNC
DC voltage at TSNC
DC voltage coefficient
4.10
AWS1 = 1; AWS0 = 0
3.60
AWS1 = 0; AWS0 = 1
3.00
AWS1 = 0; AWS0 = 0
2.35
AWS1 = 1; AWS0 = 1
0.69
0.82
0.98
AWS1 = 1; AWS0 = 0
0.60
0.72
0.86
AWS1 = 0; AWS0 = 1
0.50
0.60
0.71
AWS1 = 0; AWS0 = 0
VO
DC output voltage
0.40
0.47
0.56
1.5
5.5
Philips Semiconductors
PARAMETER
2003 Feb 04
SYMBOL
Ich(TSNC)
2.3
Idch(TSNC)
65
TEST CONDITION
Ich(test)
1.5
mA
Idch(test)
200
Product specification
TEA6880H
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CONDITIONS
MIN.
TYP.
MAX.
UNIT
VCTUSN2
DC voltage coefficient
4.25
USS1 = 1; USS0 = 0
4.00
USS1 = 0; USS0 = 1
3.50
USS1 = 0; USS0 = 0
2.60
USS1 = 1; USS0 = 1
0.71
0.85
1.00
USS1 = 1; USS0 = 0
0.67
0.80
0.95
USS1 = 0; USS0 = 1
0.60
0.70
0.85
USS1 = 0; USS0 = 0
VO
DC output voltage
0.44
0.52
0.62
1.5
5.5
Philips Semiconductors
PARAMETER
2003 Feb 04
SYMBOL
21
1.6
Idch(TUSN2)
21
AWS1 = 1; AWS0 = 1
4.10
AWS1 = 1; AWS0 = 0
3.60
AWS1 = 0; AWS0 = 1
3.00
AWS1 = 0; AWS0 = 0
2.35
AWS1 = 1; AWS0 = 1
0.69
0.82
0.98
AWS1 = 1; AWS0 = 0
0.60
0.72
0.86
AWS1 = 0; AWS0 = 1
0.50
0.60
0.71
AWS1 = 0; AWS0 = 0
0.40
0.47
0.56
VCTWBAM2
DC voltage coefficient
Product specification
DC output voltage
TEA6880H
VO
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CONDITIONS
MIN.
TYP.
MAX.
UNIT
1.6
Idch(TWBAM2)
21
0.5
+0.5
dB
dB
dB
dB
dB
10
13
dB
10
13
dB
10
13
dB
10
13
dB
6dB
10dB
22
Philips Semiconductors
PARAMETER
2003 Feb 04
SYMBOL
Product specification
TEA6880H
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CONDITIONS
MIN.
TYP.
MAX.
UNIT
cs(slope)
23
aligned at L = 1 and R = 0;
data byte 2, SST[3:0] = 1111; VTSNC or VTUSN1 or
VTWBAM1 = 0.63VTUSN1 without AC; see note 14 and
Fig.9
4.5
7.5
dB
aligned at L = 1 and R = 0;
data byte 2, SST[3:0] = 1000; VTSNC or VTUSN1 or
VTWBAM1 = 0.70VTUSN1 without AC; see note 14 and
Fig.9
4.5
7.5
dB
aligned at L = 1 and R = 0;
data byte 2, SST[3:0] = 0000; VTSNC or VTUSN1 or
VTWBAM1 = 0.74VTUSN1 without AC; see note 14 and
Fig.9
4.5
7.5
dB
SSL1 = 0; SSL0 = 0
dB
SSL1 = 0; SSL0 = 1
dB
SSL1 = 1; SSL0 = 0
11
13
15
dB
aligned at L = 1 and R = 0;
data byte 2, SST[3:0] = 1000; VTSNC = 0.72VTUSN1
without AC; see note 15 and Fig.8; data byte 2,
bits 4 and 5:
Philips Semiconductors
PARAMETER
2003 Feb 04
SYMBOL
Product specification
TEA6880H
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CONDITIONS
MIN.
TYP.
MAX.
UNIT
HCC(slope)
24
HCC(max)
1.5
4.5
dB
1.5
4.5
dB
1.5
4.5
dB
1.5
4.5
dB
HSL1 = 1; HSL0 = 1
5.5
7.5
9.5
dB
HSL1 = 1; HSL0 = 0
dB
HSL1 = 0; HSL0 = 1
dB
HSL1 = 0; HSL0 = 0
dB
10
14.5
dB
10
14.5
dB
Philips Semiconductors
PARAMETER
2003 Feb 04
SYMBOL
Product specification
TEA6880H
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CONDITIONS
MIN.
TYP.
MAX.
UNIT
840
mV
Analog-to-digital converters
LEVEL ANALOG-TO-DIGITAL CONVERTER (6-BIT)
VLEVEL(min)
600
720
VLEVEL(max)
3.2
3.4
3.6
VLEVEL
bit resolution
44
mV
1.9
2.1
2.4
VTUSN(max)
3.8
4.1
4.5
VTUSN
bit resolution
280
330
380
mV
1.9
2.1
2.4
VTWBAM(max)
3.8
4.1
4.5
VTWBAM
bit resolution
280
330
380
mV
Philips Semiconductors
PARAMETER
2003 Feb 04
SYMBOL
Tone/volume control
25
Gv(max)
RS 10 ; RL 10 M
19
20
21
dB
Gv(signal)
Tamb = 25 C
0.75
+0.75
dB
Tamb = 40 to +85 C
+1
dB
Vo(rms)
THD 0.5%
2000
mV
THD = 1%; Gv = 3 dB
2300
mV
RL = 2 k; CL = 10 nF; THD = 1%
2000
mV
50
Vi(rms)
input sensitivity
Vo = 500 mV; Gv = 20 dB
fro
roll-off frequency
20000
mV
Hz
35
45
Hz
20
25
Hz
cs
channel separation
18
23
Hz
10
13
Hz
74
80
dB
TEA6880H
Product specification
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26
chime adder total harmonic distortion
PSRR
CONDITIONS
TYP.
MAX.
UNIT
0.05
0.1
0.1
0.3
0.05
0.1
0.01
0.1
0.13
0.3
Vi(rms) = 1 V; f = 20 Hz to 20 kHz;
volume 1 attenuator: 6 dB; equalizer bands flat
0.05
0.2
0.1
0.3
0.1
0.3
0.1
0.2
0.15
0.3
0.04
0.1
f = 20 to 100 Hz
35
46
dB
f = 1 to 20 kHz
50
65
dB
75
dB
250
ms
SCAP = 10 F; VHS = 10 F
100
ms
Product specification
TEA6880H
50
SCAP = 22 F; VHS = 47 F
f = 1 kHz
tturn-on
MIN.
Philips Semiconductors
THD
PARAMETER
2003 Feb 04
SYMBOL
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CMRR
CONDITIONS
MIN.
TYP.
MAX.
UNIT
27
65
100
100
140
volume 1 attenuator: 0 dB
10
14
12.5
18
16
25
22
32
volume 1 attenuator: 9 dB
14
3.5
5.7
53
dB
48
53
dB
68
dB
CMRRmono
40
45
dB
ct
110
dB
tABC
ms
3.33
ms
ASI1 = 1; ASI0 = 0
8.33
ms
ASI1 = 1; ASI0 = 1
20
ms
Product specification
TEA6880H
ASI1 = 0; ASI0 = 0
ASI1 = 0; ASI0 = 1
Philips Semiconductors
Vnoise(rms)
PARAMETER
2003 Feb 04
SYMBOL
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CONDITIONS
MIN.
TYP.
MAX.
UNIT
Source selector
Zi(stereo)
80
100
120
Zi(sym)
24
30
36
Zi(CHIME)
80
100
120
Zo
80
100
RL
10
CL
2500
pF
Gv
Vi(rms)
28
0.2
+0.2
dB
f = 1 kHz
90
105
dB
f = 12.5 kHz
80
95
dB
f = 20 Hz to 20 kHz
75
90
dB
2.0
2.15
1.8
1.9
80
100
120
Philips Semiconductors
PARAMETER
2003 Feb 04
SYMBOL
Loudness control
Zi
Gloudness
0.2
+0.2
dB
18.5
20
21.5
dB
Gloudness
f = 1 kHz; Gloudness = 20 dB
1.5
+1.5
dB
Gstep
f = 1 kHz
dB
f = 1 kHz
0.5
dB
17
18.5
19
dB
f = 10 kHz
dB
f = 30 Hz
dB
f = 10 kHz
LB(max)
dB
14
15.5
dB
12
13.5
15
dB
Product specification
12.5
TEA6880H
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CONDITIONS
MIN.
TYP.
MAX.
UNIT
Volume 1 control
Gv
voltage gain
36
+20
dB
Gstep
dB
0.5
dB
Ga
Gv = +20 to 36 dB
+1
dB
Gtrack
Gv = +20 to 36 dB
dB
13
14
15
dB
maximum attenuation
f = 10 kHz
13
14
15
dB
f = 10 kHz
dB
f = 10 kHz
0.5
dB
16
18
20
dB
maximum attenuation
16
18
20
dB
13
14.4
15.5
dB
Treble control
Gtreble
Gstep
Bass control
Gbass
29
Gstep
dB
dB
1.2
1.6
1.9
dB
f = 60 Hz
0.5
dB
fc
centre frequency
50
60
70
Hz
Qe
0.8
0.9
1.1
EQbow
equalizer bowing
2.1
3.3
dB
68
dB
Philips Semiconductors
PARAMETER
2003 Feb 04
SYMBOL
Volume 2 control
Gstep
step resolution
Gv = 0 to 56 dB
dB
Gv = 0 to 56 dB
0.5
dB
58.5
dB
62
dB
68
dB
additional steps
Product specification
voltage gain
TEA6880H
Gv
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mute
mute attenuation
Ga
CONDITIONS
MIN.
TYP.
MAX.
UNIT
100
110
dB
f = 20 Hz to 20 kHz
75
85
dB
Gv = 0 to 32 dB
+1
dB
Gv = 32 to 68 dB
+2
dB
Gtrack
dB
Zo
output impedance
Gv = 0 to 56 dB
80
120
RL
Co(L)
10
nF
Ro(L)
4.7
Chime adder
Gv(CHIME)
21
20
19
dB
Vi(CHIME)(rms)
2.0
factor for Vi(CHIME) to avoid internal clipping k Vi(CHIME)(p-p) < 5.7 V Vo(p-p)
0.22
0.25
0.28
Philips Semiconductors
PARAMETER
2003 Feb 04
SYMBOL
Digital part (SDA, SDAQ, SCL, SDA, SCLQ, FMHOLD, AFSAMPLE); note 18
30
VIH
9.7
VIL
0.3
+0.3
+1.5
IIH
IIL
VOL
VCC = 0 to 9.5 V
IL = 3 mA
10
+10
10
+10
0.4
600
Rpu
pull-up resistance
22
CL
load capacitance
20
pF
VCC
0.3
+1.5
IIH
150
IIL
80
Product specification
TEA6880H
VIH
VIL
Philips Semiconductors
Product specification
TEA6880H
31
Philips Semiconductors
Product specification
TEA6880H
2003 Feb 04
32
Philips Semiconductors
Product specification
TEA6880H
11 I2C-BUS PROTOCOL
Table 1
S(1)
Write mode
CHIP ADDRESS (write)
A(2)
SUBADDRESS
A(2)
DATA BYTE(S)
A(2)
P(3)
A(2)
DATA BYTE 1
A(2)
DATA BYTE 2
A(2)
P(3)
Notes
1. S = START condition.
2. A = acknowledge.
3. P = STOP condition.
Table 2
S(1)
Read mode
CHIP ADDRESS (read)
Notes
1. S = START condition.
2. A = acknowledge.
3. P = STOP condition.
Table 3
Notes
1. Defined by address pin ADR.
2. 0: receiver and 1: transmitter.
2003 Feb 04
READ/WRITE
33
0/1(1)
R/W(2)
Philips Semiconductors
Product specification
TEA6880H
Table 4
STIN
RDSU
LVL5
LVL4
LVL3
LVL2
LVL1
LVL0
Table 5
BIT
SYMBOL
DESCRIPTION
STIN
Stereo indicator. This bit indicates if a pilot signal has been detected. If STIN = 0, then
no pilot signal detected. If STIN = 1, then a pilot signal has been detected.
RDSU
Measure mode. This bit selects the measure mode for the RDS flags. If RDSU = 0,
then continuous mode selected. If RDSU = 1, then RDS update mode selected.
5 to 0
LVL[5:0]
Table 6
ADC voltage level. These 6 bits determine the ADC voltage level, see Table 6.
LVL5
LVL4
LVL3
LVL2
LVL1
LVL0
3.600
3.553
3.506
3.460
3.413
3.366
3.319
3.272
3.225
3.179
3.132
3.085
3.038
2.991
2.944
2.898
2.851
2.804
2.757
2.710
2.663
2.617
2.570
2.523
2.476
2.429
2.383
2003 Feb 04
34
Philips Semiconductors
Product specification
TEA6880H
VLEVEL (V)
LVL5
LVL4
LVL3
LVL2
LVL1
LVL0
2.336
2.289
2.242
2.195
2.148
2.102
2.055
2.008
1.961
1.914
1.867
1.821
1.774
1.727
1.680
1.633
1.587
1.540
1.493
1.446
1.399
1.352
1.306
1.259
1.212
1.165
1.118
1.071
1.025
0.978
0.931
0.884
0.837
0.790
0.744
0.697
0.650
2003 Feb 04
35
Philips Semiconductors
Product specification
TEA6880H
Table 7
USN2
USN1
USN0
WBA2
WBA1
WBA0
Table 8
BIT
SYMBOL
USN2
USN1
USN0
WBA2
WBA1
WBA0
Table 9
DESCRIPTION
This bit is not used and must be set to logic 1.
Ultrasonic noise ADC. These 3 bits select the voltage level for the ultrasonic noise
ADC, see Table 9.
USN2
USN1
USN0
4.500
4.157
3.814
3.471
3.129
2.786
2.443
2.100
VTWBAM2 (V)
WBA2
WBA1
WBA0
4.500
4.157
3.814
3.471
3.129
2.786
2.443
2.100
2003 Feb 04
36
Philips Semiconductors
Product specification
TEA6880H
AIOF
BOUT
SAD3
SAD2
SAD1
SAD0
SYMBOL
DESCRIPTION
AIOF
Auto-increment control. This bit controls the auto-increment function. If AIOF = 0, then
the auto-increment is on. If AIOF = 1, then auto-increment is off.
BOUT
I2C-bus output control. This bit enables/disables the I2C-bus output SDAQ and SCLQ
to the TEA6840H. If BOUT = 0, then the I2C-bus output is disabled. If BOUT = 1, then
the I2C-bus output is enabled.
SAD3
SAD2
SAD1
SAD0
MNEMONIC
SAD3
SAD2
SAD1
SAD0
Alignment 0
ALGN0
Alignment 1
ALGN1
Alignment 2
ALGN2
Alignment 3
ALGN3
SSEL
Bass control
BASS
Treble control
TRBL
Loudness control
LOUD
Volume 1
VOLU1
VOL2_LF
VOL2_RF
VOL2_LR
VOL2_RR
Not used(1)
Not
used(1)
Not
used(1)
Note
1. Not tested; function not guaranteed.
2003 Feb 04
37
Philips Semiconductors
Product specification
TEA6880H
AMON
AMST
SEAR
SMUT
MMUT
MONO
MST1
MST0
SYMBOL
DESCRIPTION
AMON
AMST
SEAR
Search mode selection. If SEAR = 0, then mute and SNC detectors normal. If
SEAR = 1, then mute and SNC detectors fast.
SMUT
Soft mute enable. If SMUT = 0, then soft mute off. If SMUT = 1, then soft mute
enabled.
MMUT
Muting of MPX output. If MMUT = 0, then MPX output not muted. If MMUT = 1, then
MPX output muted.
MONO
MST1
Start of muting. These 2 bits determine the value of VTMUTE; see Table 17 and Fig.4.
MST0
AM/FM mode selection. These 2 bits select the AM/FM mode and source; see
Table 16.
AMON
AMST
Not allowed
Note
1. MPX input (MPXIN) and AM input (AMHIN) muted, stereo decoder in mono mode and de-emphasis terminals
(DEEML and DEEMR) are audio signal inputs.
Table 17 Setting of start of muting (MUTE = 6 dB)
2003 Feb 04
VTMUTE (V)
MST1
MST0
2.45
2.30
2.15
2.00
38
Philips Semiconductors
Product specification
TEA6880H
MHB413
MUTE
(dB)
(1)
(2)
(3)
(4)
10
20
1.0
1.5
2.0
2.5
3.0
VTMUTE (V)
VTUSN1 (V)
MST1
MST0
(1)
(2)
(3)
(4)
Fig.4 Soft mute attenuation versus VTMUTE and VTUSN1 input voltage (fixed slope).
2003 Feb 04
39
3.5
Philips Semiconductors
Product specification
TEA6880H
USS1
USS0
AWS1
AWS0
CHS3
CHS2
CHS1
CHS0
SYMBOL
USS1
USS0
AWS1
AWS0
CHS3
CHS2
CHS1
CHS0
DESCRIPTION
Ultrasonic noise sensitivity. These 2 bits determine the ultrasonic noise sensitivity
levels, see Table 20 and Fig.5.
AM wideband sensitivity. These 2 bits determine the AM wideband sensitivity levels,
see Table 21 and Fig.6.
Channel separation alignment. These 4 bits select the channel separation alignment,
see Table 22.
USS1
USS0
2.1
2.9
4.4
6.8
2003 Feb 04
40
Philips Semiconductors
Product specification
TEA6880H
MHB411
handbook,
full pagewidth
V
TUSN2
VTUSN1
VTSNC
(V)
(1)
(2)
(3)
(4)
0
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
VMPXRDS (80kHz) (V)
USS1
USS0
(1)
(2)
(3)
(4)
Fig.5
Ultrasonic noise peak and average detector output voltage versus MPX signal input and stereo noise
control peak detector output voltage versus MPX signal input.
2003 Feb 04
41
Philips Semiconductors
Product specification
TEA6880H
AWS1
AWS0
2.2
3.3
4.9
6.5
MHB410
6
full pagewidth
Vhandbook,
TWBAM2
VTWBAM1
VTSNC
(V)
5
(1)
4
(2)
(3)
(4)
0
0
200
400
600
800
1000
VLEVELAC(24kHz)p-p (mV)
AWS1
AWS0
(1)
(2)
(3)
(4)
Fig.6
AM wideband peak and average detector output voltage versus level AC signal input and stereo noise
control peak detector output voltage versus level AC signal input.
2003 Feb 04
42
Philips Semiconductors
Product specification
TEA6880H
CHS3
CHS2
CHS1
CHS0
Not used(1)
Not
used(1)
Not
used(1)
Not used(1)
Not
used(1)
Not
used(1)
Setting 8
Setting 7
Setting 6
Setting 5
Setting 4
Setting 3
Setting 2
Setting 1
Note
1. Not tested; function not guaranteed.
11.6
MSL1
MSL0
SSL1
SSL0
SST3
SST2
SST1
SST0
SYMBOL
MSL1
MSL0
SSL1
SSL0
SST3
SST2
SST1
SST0
2003 Feb 04
DESCRIPTION
Soft mute slope alignment. These 2 bits determine the value of VTMUTE(DC); see
Table 25 and Fig.7.
Stereo noise control slope alignment. These 2 bits determine the value of cs; see
Table 26 and Fig.8.
Stereo noise control start alignment. These 4 bits determine the stereo noise control
start alignment; see Table 27 and Fig.9.
43
Philips Semiconductors
Product specification
TEA6880H
MSL1
MSL0
0.395VTUSN1 without AC
0.390VTUSN1 without AC
0.380VTUSN1 without AC
0.350VTUSN1 without AC
MHB412
MUTE
(dB)
10
(1)
(2)
(3)
20
(4)
30
40
1.0
1.5
2.0
2.5
3.0
VTUSN1 (V)
VTMUTE (V)
MSL1
MSL0
(1)
(2)
(3)
(4)
Fig.7 Soft mute attenuation versus input voltages VTUSN1 and VTMUTE (fixed start).
2003 Feb 04
44
3.5
Philips Semiconductors
Product specification
TEA6880H
Table 26 Setting of stereo noise control slope alignment (VTSNC = 0.72VTUSN1 without AC)
cs (dB)
SSL1
SSL0
Not defined
13
MHB414
50
cs
(dB)
40
30
20
(1)
(2)
(3)
10
0
2.5
3.0
3.5
4.0
VTSNC (V)
SSL0
SSL1
(1)
(2)
(3)
Fig.8 Channel separation versus voltage at pins TSNC, TWBAM1 and TUSN1 (fixed start).
2003 Feb 04
45
4.5
Philips Semiconductors
Product specification
TEA6880H
SST3
SST2
SST1
SST0
VTSNC
VTSNC
VTSNC
VTSNC
VTSNC
VTSNC
VTSNC
VTSNC
VTSNC
VTSNC
VTSNC
VTSNC
VTSNC
2003 Feb 04
46
Philips Semiconductors
Product specification
TEA6880H
MHB415
50
cs
(dB)
40
30
(1)
(2)
(3)
20
10
0
2.5
3.0
3.5
4.0
VTSNC (V)
SST3
SST2
SST1
SST0
(1)
(2)
(3)
Fig.9 Channel separation versus voltage at pins TSNC, TWBAM1 and TUSN1 (fixed slope).
2003 Feb 04
47
4.5
Philips Semiconductors
Product specification
TEA6880H
NBS1
NBS0
DE75
HCCS
HST1
HST0
HSL1
HSL0
SYMBOL
DESCRIPTION
NBS1
NBS0
DE75
HCCS
HCC control switch. With static roll-off: HCCS = 1, CFMLBUF = CFMRBUF = 2.7 nF.
Without static roll-off: HCCS = 0, CFMLBUF = CFMRBUF = 680 pF.
HST1
HST0
HCC start alignment. These 2 bits determine the alignment for the start of high cut
control; see Table 31 and Fig.10.
HSL1
HSL0
Noise blanker sensitivity. These 2 bits determine the noise blanker sensitivity levels;
see Table 30.
HCC slope alignment. These 2 bits determine the alignment for the slope of high cut
control; see Table 32 and Fig.11.
Vpulse(p)(level) (mV)
NBS1
NBS0
12
110
24
120
60
150
120
200
VLEVEL(DC) (V)
HST1
HST0
1.30
1.45
1.90
2.10
Table 31 Setting of alignment for start of high cut control (10kHz = 3 dB)
2003 Feb 04
48
Philips Semiconductors
Product specification
TEA6880H
MHB417
10kHz
(dB)
4
(1)
(2)
(3)
(4)
10
12
HST1
HST0
(1)
(2)
(3)
(4)
2003 Feb 04
49
VTMUTE (V)
Philips Semiconductors
Product specification
TEA6880H
Table 32 Setting of alignment for slope of high cut control (VTMUTE = 2.4 V)
10kHz (dB)
HSL1
HSL0
7.5
6.0
4.0
3.0
MHB416
10kHz
(dB)
8
(1)
(2)
(3) (4)
10
12
HSL1
HSL0
(1)
(2)
(3)
(4)
2003 Feb 04
50
VTMUTE (V)
Philips Semiconductors
Product specification
TEA6880H
ASI1
ASI0
RSA2
RSA1
RSA0
MSS2
MSS1
MSS0
SYMBOL
DESCRIPTION
ASI1
ASI0
ASI/ABC speed selection. These 2 bits select the ASI/ABC speed (time per step), see
Table 35.
RSA2
RSA1
RSA0
MSS2
MSS1
MSS0
Rear seat audio selector. These 3 bits select the source for the rear outputs, see
Table 36.
Main source selector. These 3 bits select the source for the main control part, see
Table 37.
ASI1
ASI0
20
8.33
3.33
0.83
RSA2
RSA1
RSA0
channel(1)
channel(1)
AM/FM (internal)
Input A (stereo)
Input B (stereo)
Internal, main
Internal, main
Note
1. Not tested; function not guaranteed.
2003 Feb 04
51
Philips Semiconductors
Product specification
TEA6880H
MSS2
MSS1
MSS0
Chime input(1)
input(1)
Chime
Chime input
Input D (mono,
symmetrical)
AM/FM (internal)
Input A (stereo)
Input B (stereo)
Input C (stereo,
symmetrical)
Note
1. Not tested; function not guaranteed.
11.9
BSYC
BSYB
BAS4
BAS3
BAS2
BAS1
BAS0
SYMBOL
BSYC
DESCRIPTION
Bass filter mode for cut. If BSYC = 0, then shelving characteristic selected. If
BSYC = 1, then band-pass filter characteristic selected.
BSYB
Bass filter mode for boost. If BSYB = 0, then shelving characteristic selected. If
BSYB = 1, then band-pass filter characteristic selected.
BAS4
Bass control. These 5 bits determine the bass control level, see Table 40.
BAS3
BAS2
BAS1
BAS0
2003 Feb 04
52
Philips Semiconductors
Product specification
TEA6880H
BAS4
BAS3
BAS2
BAS1
BAS0
+18(1)
+18(1)
+18(1)
+18(1)
+18(1)
+18
+16
+14
+12
+10
+8
+6
+4
+2
+0
2 (1.8)
4 (3.6)
6 (5.4)
8 (7.1)
10 (8.7)
12 (10.3)
14 (11.7)
16 (13.1)
18 (14.4)
18 (14.4)(1)
18 (14.4)(1)
18
(14.4)(1)
18
(14.4)(1)
18 (14.4)(1)
18
(14.4)(1)
18
(14.4)(1)
Note
1. Not tested; function not guaranteed.
2003 Feb 04
53
Philips Semiconductors
Product specification
TEA6880H
HSTM
TRE3
TRE2
TRE1
TRE0
SYMBOL
HSTM
TRE3
TRE2
TRE1
TRE0
DESCRIPTION
Test mode muting average and SNC peak detector. If HSTM = 0, then normal
operation. If HSTM = 1, then increased detector currents.
These 3 bits are not used; each must be set to logic 0.
Treble control. These 4 bits determine the treble control level, see Table 43.
TRE3
TRE2
TRE1
TRE0
+14
+12
2003 Feb 04
+10
+8
+6
+4
+2
+0
10
12
14
54
Philips Semiconductors
Product specification
TEA6880H
LOFF
LSN4
LSN3
LSN2
LSN1
LSN0
SYMBOL
LOFF
LSN4
LSN3
LSN2
LSN1
LSN0
DESCRIPTION
Loudness switch control. If LOFF = 0, then the loudness switch is on. If LOFF = 1,
then loudness switch is off.
These 2 bits are not used, each must be set to logic 0.
Loudness control. These 5 bits determine the attenuation of the loudness block, see
Table 46.
LSN4
LSN3
LSN2
LSN1
LSN0
10
11
12
13
14
15
16
17
18
19
20
20(1)
20(1)
2003 Feb 04
55
Philips Semiconductors
Product specification
TEA6880H
ATTENUATION (dB)
LSN4
LSN3
LSN2
LSN1
LSN0
20(1)
20(1)
20(1)
20(1)
20(1)
20(1)
20(1)
20(1)
20(1)
Note
1. Not tested; function not guaranteed.
2003 Feb 04
56
Philips Semiconductors
Product specification
TEA6880H
AMUT
VOL5
VOL4
VOL3
VOL2
VOL1
VOL0
SYMBOL
DESCRIPTION
AMUT
Audio mute switch. If AMUT = 0, then there is no audio mute. If AMUT = 1, then audio
mute on.
5 to 0
VOL[5:0]
VOL5
VOL4
VOL3
VOL2
VOL1
VOL0
+20(1)
+20(1)
+20(1)
+20
+19
+18
+17
+16
+15
+14
+13
+12
+11
+10
+9
+8
+7
+6
+5
+4
+3
+2
+1
2003 Feb 04
57
Philips Semiconductors
Product specification
TEA6880H
ATTENUATION (dB)
VOL5
VOL4
VOL3
VOL2
VOL1
VOL0
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
36(1)
36(1)
36(1)
36(1)
Note
1. Not tested; function not guaranteed.
2003 Feb 04
58
Philips Semiconductors
Product specification
TEA6880H
CHML
VLF5
VLF4
VLF3
VLF2
VLF1
VLF0
SYMBOL
CHML
5 to 0
VLF[5:0]
DESCRIPTION
Chime adder left front select. If CHML = 1, then chime on. If CHML = 0, then chime
off.
This bit is not used and must be set to logic 0.
Left front volume 2, balance and fader control. These 6 bits determine the
attenuation of volume 2 left front; see Table 52.
VLF5
VLF4
VLF3
VLF2
VLF1
VLF0
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
2003 Feb 04
59
Philips Semiconductors
Product specification
TEA6880H
ATTENUATION (dB)
VLF5
VLF4
VLF3
VLF2
VLF1
VLF0
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
58.5
62
68
front(1)
Mute left
Note
2003 Feb 04
60
Philips Semiconductors
Product specification
TEA6880H
CHMR
VRF5
VRF4
VRF3
VRF2
VRF1
VRF0
SYMBOL
DESCRIPTION
CHMR
Chime adder right front select. If CHMR = 1, then chime on. If CHMR = 0, then chime
off.
5 to 0
VRF[5:0]
VRF5
VRF4
VRF3
VRF2
VRF1
VRF0
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
2003 Feb 04
61
Philips Semiconductors
Product specification
TEA6880H
ATTENUATION (dB)
VRF5
VRF4
VRF3
VRF2
VRF1
VRF0
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
58.5
62
68
front(1)
Mute right
Note
2003 Feb 04
62
Philips Semiconductors
Product specification
TEA6880H
VLR5
VLR4
VLR3
VLR2
VLR1
VLR0
SYMBOL
5 to 0
VLR[5:0]
DESCRIPTION
These 2 bits are not used, each must be set to logic 0.
Left rear volume 2, balance and fader control. These 6 bits determine the attenuation
of volume 2 left rear; see Table 58.
VLR5
VLR4
VLR3
VLR2
VLR1
VLR0
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
2003 Feb 04
63
Philips Semiconductors
Product specification
TEA6880H
ATTENUATION (dB)
VLR5
VLR4
VLR3
VLR2
VLR1
VLR0
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
58.5
62
68
rear(1)
rear(1)
Mute left
Mute left
Note
2003 Feb 04
64
Philips Semiconductors
Product specification
TEA6880H
VRR5
VRR4
VRR3
VRR2
VRR1
VRR0
SYMBOL
5 to 0
VRR[5:0]
DESCRIPTION
These 2 bits are not used, each must be set to logic 0.
Right rear volume 2, balance and fader control. These 6 bits determine the
attenuation of volume 2 right rear, see Table 61.
VRR5
VRR4
VRR3
VRR2
VRR1
VRR0
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
2003 Feb 04
65
Philips Semiconductors
Product specification
TEA6880H
ATTENUATION (dB)
VRR5
VRR4
VRR3
VRR2
VRR1
VRR0
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
58.5
62
68
rear(1)
rear(1)
Mute right
Mute right
Note
2003 Feb 04
66
Philips Semiconductors
Product specification
TEA6880H
MHB409
VTMUTE
(V)
5
1
0
VLEVEL (V)
Fig.12 Muting average detector (TMUTE) dependency on level (LEVEL) and stereo noise control peak detector
(TSNC) dependency on level (LEVEL).
2003 Feb 04
67
Philips Semiconductors
Product specification
TEA6880H
handbook, halfpage
CKVL
LOPI 12
220 nF
OP1
Ri
100 k
Rloudness
45 k
Vref
11
LLN
R2
5.1 k
C3
100 nF
MHB418
MHB420
gain
(dB)
5
10
15
20
25
30
10
102
103
104
frequency (Hz)
Fig.14 Loudness with bass boost only without influence of coupling capacitors CKVL and CKVR.
2003 Feb 04
68
105
Philips Semiconductors
Product specification
TEA6880H
handbook, halfpage
CKVL
LOPI 12
220 nF
OP1
Ri
100 k
Rloudness
45 k
Vref
C2
R1
680 pF
43 k
C3
11
LLN
68 nF
R2
4.7 k
MHB419
Fig.15 External circuit for loudness with bass and treble boost.
MHB421
gain
(dB)
5
10
15
20
25
30
10
102
103
104
frequency (Hz)
105
Fig.16 Loudness with bass and treble boost without influence of coupling capacitors CKVL and CKVR.
2003 Feb 04
69
Philips Semiconductors
Product specification
TEA6880H
MHB422
20
gain
(dB)
15
10
0
5
10
15
20
10
102
103
frequency (Hz)
104
Fig.17 Bass curve with 2 220 nF and R = 3.3 k external, BSYB = 1 for gain and BSYC = 0 for cut.
MHB423
20
gain
(dB)
15
10
0
5
10
15
20
10
102
103
frequency (Hz)
Fig.18 Bass curve with 2 220 nF and R = 3.3 k external, BSYB = 1 and BSYC = 1.
2003 Feb 04
70
104
Philips Semiconductors
Product specification
TEA6880H
MHB424
20
gain
(dB)
15
10
0
5
10
15
20
10
102
103
104
frequency (Hz)
Fig.19 Bass curve with 1 47 nF external, between RBI and ROBO, BSYB = 0 and BSYC = 0.
MHB425
20
gain
(dB)
15
10
0
5
10
15
20
10
102
103
2003 Feb 04
71
104
frequency (Hz)
105
Philips Semiconductors
Product specification
TEA6880H
12 INTERNAL CIRCUITRY
Table 62 Equivalent pin circuits
PIN
1
SYMBOL
EQUIVALENT CIRCUIT
SDAQ
1
MHB375
SCLQ
2
MHB376
LEVEL
3
MHB379
SCL
4
MHB377
SDA
5
MHB378
DGND
TBL
7
MHB384
8
2003 Feb 04
VCC
72
Philips Semiconductors
Product specification
TEA6880H
SYMBOL
EQUIVALENT CIRCUIT
CHIME
9
MHB426
10
AGND
11
LLN
11
12
MHB363
LOPI
12
MHB350
13
LOPO
13
MHB361
14
BRI
14
MHB351
2003 Feb 04
73
Philips Semiconductors
Product specification
TEA6880H
SYMBOL
EQUIVALENT CIRCUIT
ADR
15
16
MHB395
BLI
16
MHB352
17
SCAP
17
MHB396
18
CRIP
18
MHB353
19
CCOM
19
MHB354
2003 Feb 04
74
Philips Semiconductors
Product specification
TEA6880H
SYMBOL
EQUIVALENT CIRCUIT
CLIP
20
MHB355
21
MONOC
21
MHB356
22
MONOP
22
MHB357
23
VHS
23
MHB394
24
ARI
24
MHB358
2003 Feb 04
75
Philips Semiconductors
Product specification
TEA6880H
SYMBOL
EQUIVALENT CIRCUIT
AMNCAP
25
MHB397
26
ALI
26
MHB359
27
ROPO
27
MHB362
28
ROPI
28
MHB360
29
30
2003 Feb 04
RLN
29
MHB364
30
MHB365
RTC
76
Philips Semiconductors
Product specification
TEA6880H
SYMBOL
31
RBI
32
RBO
EQUIVALENT CIRCUIT
31
32
MHB373
33
RF
33
MHB367
34
RR
34
MHB368
35
ASICAP
35
MHB393
36
LR
36
MHB369
37
LF
37
MHB370
2003 Feb 04
77
Philips Semiconductors
Product specification
TEA6880H
SYMBOL
38
LBO
39
LBI
EQUIVALENT CIRCUIT
39
38
MHB374
40
LTC
40
41
MHB366
AMPCAP
41
MHB398
42
AMHOLD
42
MHB399
2003 Feb 04
78
Philips Semiconductors
Product specification
TEA6880H
SYMBOL
EQUIVALENT CIRCUIT
AMHCAP
43
MHB401
44
IREF
44
MHB400
45
TWBAM2
45
MHB402
46
TUSN2
46
MHB390
47
PHASE
47
MHB403
2003 Feb 04
79
Philips Semiconductors
Product specification
TEA6880H
SYMBOL
EQUIVALENT CIRCUIT
FREF
48
MHB404
49
PILOT
49
MHB405
50
AFSAMPLE
50
MHB380
51
FMHOLD
51
MHB381
52
AMHIN
52
MHB371
53
AMNBIN
53
MHB406
2003 Feb 04
80
Philips Semiconductors
Product specification
TEA6880H
SYMBOL
EQUIVALENT CIRCUIT
TMUTE
54
MHB385
55
MPXRDS
55
MHB407
56
TSNC
56
MHB386
57
MPXIN
57
MHB372
58
FMNCAP
58
MHB387
2003 Feb 04
81
Philips Semiconductors
Product specification
TEA6880H
SYMBOL
EQUIVALENT CIRCUIT
DEEML
59
MHB382
60
DEEMR
60
MHB383
61
FMLBUF
61
MHB391
62
FMRBUF
62
MHB392
63
TWBAM1
63
MHB388
2003 Feb 04
82
Philips Semiconductors
Product specification
TEA6880H
SYMBOL
EQUIVALENT CIRCUIT
TUSN1
64
MHB389
2003 Feb 04
83
Philips Semiconductors
Product specification
TEA6880H
13 PACKAGE OUTLINE
QFP64: plastic quad flat package; 64 leads (lead length 1.95 mm); body 14 x 20 x 2.8 mm
SOT319-2
y
X
51
33
52
32
ZE
e
E HE
A2
(A 3)
A1
wM
pin 1 index
Lp
bp
20
64
detail X
19
1
ZD
w M
bp
v M A
HD
v M B
10 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
D (1)
E (1)
HD
HE
Lp
mm
3.20
0.25
0.05
2.90
2.65
0.25
0.50
0.35
0.25
0.14
20.1
19.9
14.1
13.9
24.2
23.6
18.2
17.6
1.95
1.0
0.6
0.2
0.2
0.1
Z D (1) Z E (1)
1.2
0.8
1.2
0.8
7
0o
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT319-2
2003 Feb 04
REFERENCES
IEC
JEDEC
EIAJ
EUROPEAN
PROJECTION
ISSUE DATE
97-08-01
99-12-27
MO-112
84
Philips Semiconductors
Product specification
TEA6880H
If wave soldering is used the following conditions must be
observed for optimal results:
14 SOLDERING
14.1
Reflow soldering
14.4
Wave soldering
2003 Feb 04
Manual soldering
85
Philips Semiconductors
Product specification
TEA6880H
Suitability of surface mount IC packages for wave and reflow soldering methods
SOLDERING METHOD
PACKAGE(1)
WAVE
BGA, LBGA, LFBGA, SQFP, TFBGA, VFBGA
not suitable
suitable(3)
not
suitable
REFLOW(2)
suitable
suitable
suitable
not
recommended(4)(5)
suitable
not
recommended(6)
suitable
Notes
1. For more detailed information on the BGA packages refer to the (LF)BGA Application Note (AN01026); order a copy
from your Philips Semiconductors sales office.
2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods.
3. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder
cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side,
the solder might be deposited on the heatsink surface.
4. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
5. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not
suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
6. Wave soldering is suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
2003 Feb 04
86
Philips Semiconductors
Product specification
TEA6880H
DATA SHEET
STATUS(1)
PRODUCT
STATUS(2)(3)
Development
DEFINITION
Objective data
II
III
Product data
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).
Production
This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
16 DEFINITIONS
17 DISCLAIMERS
2003 Feb 04
87
Philips Semiconductors
Product specification
TEA6880H
Purchase of Philips I2C components conveys a license under the Philips I2C patent to use the
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.
2003 Feb 04
88
Philips Semiconductors
Product specification
TEA6880H
NOTES
2003 Feb 04
89
Philips Semiconductors
Product specification
TEA6880H
NOTES
2003 Feb 04
90
Philips Semiconductors
Product specification
TEA6880H
NOTES
2003 Feb 04
91
Contact information
For additional information please visit http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
SCA75
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