Documenti di Didattica
Documenti di Professioni
Documenti di Cultura
Cluster 4: Kottayam
M. Tech Program in
Electronics & Communication
Engineering
(Applied Electronics)
Compiled By
C
D
E
Course No:
04 EC 6401
Name
L- T - P
Internal
Marks
3-0-0
40
4-0-0
04 EC64XX
04 EC 6491
Research Methodology
0-2-0
100
0-0-2
100
04 EC 6403
04 EC 6405
04 EC 6407
04GN 6001
04 EC 6493
40
60
3-0-0
40
60
Elective 1
3-0-0
40
60
Seminar
0-0-2
100
Total
Course No.
04 EC 6409
04 EC 6411
04 EC 6413
04 EC 6415
22
40
Credits
60
3-0-0
End Semester
Exam
Marks (hrs)
60
3
0
0
0
0
2
1
21
*See List of Electives-I for slot E
Course Name
D
E
Course No:
L- T - P
Internal
Marks
3-1-0
40
3-0-0
40
60
04 EC 64XX
Elective 2
3-0-0
60
04 EC 6492
Elective 3
3-0-0
40
Mini Project
3-0-0
40
60
04 EC 6402
04 EC 6404
04 EC 6406
04 EC 64XX
04 EC 6494
Name
Course
Code
04 EC 6408
04 EC 6412
04 EC 6414
04 EC 6416
Course
Code
04 EC 6418
04 EC 6422
04 EC 6424
04 EC 6426
Total
0-0-4
0-0-2
40
100
100
End Semester
Exam
Marks (hrs)
60
3
60
0
0
3
0
0
22
^See List of Electives -III for slot E
Credits
4
3
2
1
19
Course Name
Course Name
Summer Break
Exam Course No:
Slot
NA
L- T - P
Int.
Marks
0-0-4
NA
Name
L- T - P
Int.
Marks
04 EC 74XX
Elective 4
3-0-0
40
04 EC 7491
Seminar
0-0-2
100
04 EC 7490
Course No:
04 EC74XX
04 EC 7493
Name
Industrial Training
Project (Phase 1)
A
A
Course Code
04 EC 7401
04 EC 7403
04 EC 7405
04 EC 7407
Course Code
04 EC 7409
04 EC 7411
04 EC 7413
04 EC 7415
3-0-0
Elective 5
Exam
Slot
A
A
Total
Total
0-0-12
20
40
50
End Semester
Exam
Marks (hrs)
Credits
End Semester
Exam
Marks
hrs
60
3
Credits
NA
NA
60
Pass
/Fail
0
3
3
2
6
14
^See List of Electives-V for
Course Name
Course Name
Course No:
04 EC 7494
Name
Project (Phase 2)
L- T - P
Total
0-0-21
21
Interna
l
Marks
70
External
Evaluation
Marks
30
NA
Credit
s
12
12
Total: 66
SYLLABUS
SEMESTER I
COURSE CODE
04 EC 6401
COURSE NAME
APPLIED MATHEMATICS FOR ELECTRONICS ENGINEERS
L-T-P:C
3-0-0: 3
YEAR
2015
Pre-requisites: Nil
Course Objectives:
Syllabus:
Fundamental concepts and overview of fuzzy logic, The Cholesky decomposition, Toeplitz matrices and
some applications; important matrix factorizations and decomposition, , Gamma and Normal distributions
Function of a Random Variable, Problem of dimensionality. Overview of one-dimensional random variables.
Machine Interference Model, Principle of Dynamic programming and its applications. Different types of
queueing models, testing of hypotheses, Chi-Square and F distributions for testing of mean.
Course Outcome:
Students who successfully complete this course will have demonstrated an ability
to understand the fundamental concepts of applied mathematics.
Text Books:
References:
1. George J. Klir and Yuan, B., Fuzzy sets and fuzzy logic, Theory and applications, Prentice
Hall of India Pvt. Ltd., 1997.
2. Taha, H.A., Operations Research, An introduction, 7th edition, Pearson education
editions, Asia, New Delhi, 2002.
1. Moon, T.K., Sterling, W.C., Mathematical methods and algorithms for signal
processing,
Pearson Education, 2000.
2. Richard Johnson, Miller & Freunds Probability and Statistics for Engineers, 7 th
Edition, Prentice Hall of India, Private Ltd., New Delhi (2007).
3. Donald Gross and Carl M. Harris, Fundamentals of Queuing theory, 2nd edition, John
Wiley and Sons, New York (1985)
COURSE CODE:
04 EC 6401
COURSE PLAN
COURSE TITLE
Applied Mathematics for Electronics Engineers
MODULES
MODULE 2:
Some important matrix factorizations The Cholesky decomposition QR
factorization Least squares method Singular value decomposition Toeplitz matrices and some applications
INTERNAL TEST 1 (MODULE 1 & 2)
MODULE 3:
Random variables - Probability function moments moment generating
functions and their properties Binomial, Poisson, Geometric, Uniform,
Exponential, Gamma and Normal distributions Function of a Random
Variable
MODULE 4:
CREDITS
3-0-0:3
Sem.
Contact
Exam
Hours
Marks
(%)
7
15
15
15
15
20
20
COURSE CODE
04 EC 6403
COURSE NAME
Analog Integrated Circuit Design
L-T-P:C
3-0-0: 3
YEAR
2015
Pre-requisites: Nil
Course Objectives:
The basics and advanced mos- amplifier configuration, thin biasing circuit details and
performance matrices
evaluation of
Syllabus:
MOSFET Operation and Models for Analog Design, General Design, Small signal Models, Short Channel
Models; Single Stage Amplifiers and Biasing, Miller Effect, Cascode and Folded Cascode stages; Differential
Amplifiers, CMRR Requirements, Slew rate, Differential pair noise, Operational Amplifiers, Telescopic and
Folded cascade Opamps, noise mismatch, fully differential one stage and two stage opamps, Mixed signal
circuits, Non Linear and dynamic Analog circuit, CMOS Device Modeling, SPICE Model parameter Extraction.
Course Outcome:
Students who successfully complete this course will have demonstrated an ability to understand the
fundamental concepts of Analog Integrated Circuit Design.
Text Books:
1. BehzadRazavi, Design of Analog CMOS Integrated Circuits, McGraw Hill HigherEducation, 2003.
2. Jacob Baker R., CMOS: Circuit Design, Layout, and Simulation, Wiley, 2010.
References:
1. Philip E. Allen & Douglas R. Holberg, CMOS Analog Circuit Design, 2nd Ed., Oxford University Press, 2009.
2. David A. Johns & Ken Martin, Analog Integrated Circuit Design, Wiley India Pvt. Ltd., 2008.
3. Paul R. Gray, Paul J. Hurst, Stephen H. Lewis & Robert G. Meryer, Analysis and Design of Analog
Integrated Circuits, 5th Ed., Wiley 2009.
4.
CMOS Circuits Design, Layout and Simulation Baker, Li, Boyce, 1st ed., TMH
COURSE CODE:
04 EC 6403
COURSE TITLE
Analog Integrated Circuit Design
MODULES
CREDITS
3-0-0:3
Sem.
Contact
Exam
Hours
Marks
(%)
7
15
15
15
15
20
20
COURSE CODE
04 EC 6405
COURSE NAME
Digital Integrated Circuit Design
L-T-P:C
4-0-0: 4
YEAR
2015
Pre-requisites: Nil
Course Objectives:
Syllabus:
CMOS Inverter, Performance of CMOS Inverter, Dynamic Behaviour,, Designing Combinational Logic Gates in
CMOS , Designing Sequential Logic Circuits, Timing Issues in Digital Circuits, Basic Concept, Building Blocks of
a PLL, Dynamic Logic Circuits, Semiconductor Memories, Flash Memory- NOR flash and NAND flash.
Course Outcome:
Students who successfully complete this course will have demonstrated an ability to understand the
fundamental concepts of Digital Integrated Circuit Design.
Texts:
1. Ken Martin, "Digital Integrated Circuit Design", Oxford University Press, 1999.
2. Sung-Mo (Steve) Kang & Yusuf Leblebici, "CMOS Digital Integrated Circuits Analysis and Design", 3rd Ed.,
McGraw Hill, 2002.
3. David Hodges, Horace Jackson &ResveSaleh, "Analysis and Design of Digital Integrated Circuits", 3rd Ed.,
McGraw Hill, 2003.
4. Hubert Kaeslin& Eth Zurich, "Digital Integrated Circuit Design from VLSI Architectures to CMOS
Fabrication", Cambridge University Press, 2008.
5. Digital Integrated Circuit Design Ken Martin, Oxford University Press, 2011.
10
COURSE CODE:
04 EC 6405
COURSE TITLE
Digital Integrated circuit Design
MODULES
11
CREDITS
4-0-0:4
Sem.
Contact
Exam
Hours
Marks (%)
9
15
15
15
15
10
20
10
20
COURSE CODE
04 EC 6407
COURSE NAME
High Speed Switching architecture
L-T-P:C
3-0-0: 3
YEAR
2015
Pre-requisites: Nil
Course Objectives:
The basics of switching technologies and their implementation LANs, ATM networks and IP
networks.
Theidea of different switching architectures and queuing strategies and their impact on the blocking
performances.
Tthe advances in packet switching architectures and IP addressing and switching solutions and
approaches to exploit and integrate the best features of different architectures for high speed
switching.
Syllabus
LAN switching technology; ATM switching architectures; queues in ATM switches; packet switching
architectures; IP switching; network security overview.
Course Outcome:
1. The student would be able to identify suitable switching architectures for a specified networking scenario
and demonstrate its blocking performance.
2. The student would be in a position to apply his knowledge of switching technologies, architectures and
buffering strategies for designing high speed communication networks and analyse their performance.
Text Books:
1. Computer Networks and Internets, 2nd edition, D. Comer, Prentice Hall
2. High-Speed Networks and Internets, 2nd ed. William Stallings, Prentice Hall
References:
1. AchillePattavina, Switching Theory: Architectures and performance in Broadband ATM networks ",John
Wiley & Sons Ltd, New York. 1998
2. Rich Siefert, Jim Edwards, The All New Switch Book The Complete Guide to LAN Switching Technology,
Wiley Publishing, Inc., Second Edition, 2008.
3. Elhanany M. Hamdi, High Performance Packet Switching architectures, Springer Publications, 2007.
4. Christopher Y Metz, Switching protocols & Architectures, McGraw - Hill Professional Publishing,
NewYork.1998. 5. Rainer Handel, Manfred N Huber, Stefan Schroder, ATM Networks - Concepts Protocols,
Applications, 3rd Edition, Addison Wesley, New York. 1999.
12
COURSE CODE:
04 EC 6407
COURSE TITLE
High Speed Switching architecture
MODULES
13
CREDITS
3-0-0:3
Sem.
Contact
Exam
Hours
Marks (%)
7
15
15
15
15
20
20
COURSE CODE
04 EC 6409
COURSE NAME
Digital Communication System Design
L-T-P:C
3-0-0: 3
YEAR
2015
Pre-requisites: Nil
Course Objectives:
To understand the basic structure of digital communication system and review of random variables.
To study digital modulation methods.
To develop and understanding of digital receivers
To understand the channel characteristics.
Syllabus:
Basic structure of a digital communication system, Digital modulation schemes, Optimum receivers for
AWGN channels, Digital communication through band limited channels, baseband formating and coding
techniques, baseband reception techniques.
Course Outcome:
1. Tri T. Ha, Theory and Design of Digital Communication Systems, California Cambridge University Press,
2010.
2. Simon M. K., Hinedi S. M. & Lindsey W. C., Digital Communication Techniques-Signal Design and
Detection, Prentice Hall, 1995.
3. John G. Proakis&MasoudSalehi, Fundamentals of Communication Systems, Prentice Hall, 2005.
14
COURSE CODE:
04 EC 6409
COURSE TITLE
Digital Communication System Design
MODULES
CREDITS
3-0-0:3
Contact
Hours
Sem. Exam
Marks (%)
15
15
15
15
20
20
COURSE CODE
04 EC 6411
COURSE NAME
Low Power VLSI Design
L-T-P:C
3-0-0: 3
YEAR
2015
Pre-requisites: Nil
Course Objectives:
Identify the power reduction techniques based on technology independent and technology dependent
Identify Power dissipation mechanism in various MOS logic style
Identify suitable techniques to reduce the power dissipation.
Design memory circuits with low power dissipation.
Syllabus:
Fundamentals of Low Power Circuit Design, Velocity Saturation, Impact Ionization, Hot Electron Effect,
Power Dissipation In Cmos, Power Optimization, Design Of Low Power Cmos Circuits, Power Estimation ,
Synthesis And Software Design For Low Power, software design for low power.
Course Outcome:
2. The student would be in a position to apply his knowledge designing Of Low Power Cmos Circuits.
Text Books:
1.Kaushik Roy and S.C.Prasad, Low power CMOS VLSI circuit design, Wiley, 2000.
2. DimitriosSoudris, ChirstianPignet, Costas Goutis, Designing CMOS Circuits for Low Power, Kluwer, 2002.
3. J.B.Kulo and J.H Lou, Low voltage CMOS VLSI Circuits, Wiley 1999.
References:
4. James B.Kulo, Shih-Chia Lin, Low voltage SOI CMOS VLSI devices and Circuits, John Wiley and sons, inc.
2001.
16
COURSE CODE:
04 EC 6411
COURSE TITLE
Low Power VLSI Design
MODULES
17
CREDITS
3-0-0:3
Sem.
Contact
Exam
Hours
Marks
(%)
7
15
15
15
15
20
20
COURSE CODE
04 EC 6413
COURSE NAME
IMAGE AND VIDEO PROCESSING
SYSTEM DESIGN
L-T-P:C
3-0-0: 3
YEAR
2015
Pre-requisites: Nil
Course Objectives:
Syllabus:
Introduction to Digital Image Processing & Applications, Image Proceesing Technique, Image Compression,
LZW coding, run length coding, Bit Plane coding, transform coding, Boundary Representation , Basic Steps Of
Video Processing, 2-D Motion Estimation.
Course Outcome:
1. The student would be able to identify the basic concepts of image and video processing.
Text Books:
1. Iain E Richardson, H.264 and MPEG-4 Video Compression, John Wiley & Sons, September 2003
2. M. Tekalp, Digital Video Processing, Prentice-Hall
18
COURSE CODE:
04 EC 6413
COURSE TITLE
IMAGE AND VIDEO PROCESSING SYSTEM DESIGN
MODULES
CREDITS
3-0-0:3
Sem.
Contact
Exam
Hours
Marks (%)
7
15
15
15
15
19
20
20
20
COURSE CODE
04 EC 6415
COURSE NAME
RF SYSTEM DESIGN
L-T-P:C
3-0-0: 3
YEAR
2015
Pre-requisites: Nil
Course Objectives:
Syllabus:
Cmos Physics, Homodyne Receiver, Heterodyne Receiver, Image reject, Transceiver Specifications And
Architectures, Transmission Line Theory , RF Filter Design , Impedance Matching Networks , PLL And
Frequency Synthesizers , RF Amplifiers, Oscillators and Mixers.
Course Outcome:
1. The student would be able to identify the basic concepts of RF filter design, impedance matching network.
Text Books:
1. Reinhold Ludwig & Powel Bretchko, RF Circuit Design Theory and Applications, 1st Ed., Pearson
Education Ltd., 2004.
2. David M. Pozzar , Microwave Engineering, 3r Ed., Wiley India, 2007.
References:
1. Mathew M. Radmanesh, Radio Frequency and Microwave Electronics, 2nd Ed. Pearson Education Asia,
2006.
2. Mathew M. Radmanesh, Advanced RF & Microwave Circuit Design-The Ultimate Guide to System
Design, Pearson Education Asia, 2009.
3. George D Vendelin ,Anthony M Pavio and Ulrich L.Rohde., Microwave Circuit Design using Linear and
Nonlinear Techniques, 2nd Ed, Wiley India,2005.
4. Ulrich L. Rohde & David P.NewKirk, RF / Microwave Circuit Design, John Wiley & Sons, 2000.
5. Davis W. Alan, Radio Frequency Circuit Design, Wiley India, 2009.
6. Christopher Bowick, John Blyer& Cheryl Ajluni RF Circuit Design, 2nd Ed., Newnes, 2007.
7. Cotter W. Sayre, Complete Wireless Design, 2nd Ed., McGraw-Hill, 2008.
8. Joseph J. Carr, RF Components and Circuits, Newnes, 2002
COURSE CODE:
21
COURSE TITLE
CREDITS
04 EC 6415
RF SYSTEM DESIGN
MODULES
22
3-0-0:3
Contact
Hours
Sem.
Exam
Marks (%)
15
15
15
15
20
20
COURSE CODE
04GN 6001
COURSE NAME
RESEARCH METHODOLOGY
L-T-P:C
0-2-0: 2
YEAR
2015
Pre-requisites: Nil
Course Objectives:
Syllabus:
Introduction to the Concepts of Research Methodology, Research Proposals, Research Design, Data
Collection and Analysis, Quantitative Techniques and Mathematical Modeling, Report Writing
Course Outcome:
Students who successfully complete this course would learn the fundamental concepts of Research
Methodology, apply the basic aspects of the Research methodology to formulate a research problem and its
plan. They would also be able to deploy numerical/.quantitative techniques for data analysis. They would
be equipped with good technical writing and presentation skills.
Text Books: 1. Research Methodology: Methods and Techniques, by Dr. C. R. Kothari, New Age
International Publisher, 2004.
2. Research Methodology: A Step by Step Guide for Beginners by Ranjit Kumar, SAGE Publications Ltd;
Third Edition
Reference Books:
1 Research Methodology: An Introduction for Science & Engineering Students, by Stuart Melville and
Wayne Goddard, Juta and Company Ltd, 2004
2. Research Methodology: An Introduction by Wayne Goddard and Stuart Melville, Juta and Company
Ltd, 2004
3.
4.
23
COURSE CODE:
04GN 6001
COURSE TITLE
RESEARCH METHODOLOGY
MODULES
24
CREDITS
0-2-0:2
Contact
Hours
Sem.
Exam
Marks
(%)
15
15
15
15
20
20
COURSE CODE
04 EC 6491
COURSE NAME
SEMINAR
L-T-P:C
0-0-2: 2
YEAR
2015
Each student shall present a seminar on any topic of interest related to the core / elective courses offered in
the first semester of the M. Tech. Programme. He / she shall select the topic based on the References: from
international journals of repute, preferably IEEE journals. They should get the paper approved by the
Programme Co-ordinator / Faculty member in charge of the seminar and shall present it in the class. Every
student shall participate in the seminar. The students should undertake a detailed study on the topic and
submit a report at the end of the semester. Marks will be awarded based on the topic, presentation,
participation in the seminar and the report submitted.
04 EC 6493
COURSE NAME
ELECTRONIC SYSTEM DESIGN LAB-I
L-T-P:C
0-0-2: 1
YEAR
2015
Objectives:
To simulate experiments based on the core courses and the elective courses opted by the student in the first
semester.
Tools: Xilinx, MATLAB, PSPICE and SPARTAN 3E Kit
Experiments:-
25
COURSE CODE
04 EC 6402
COURSE NAME
L-T-P:C
3-1-0: 4
YEAR
2015
Pre-requisites: Nil
Course Objectives:
Syllabus:
Introduction to Electromagnetic Compatibility, Aspects of EMC; electrical dimensions and waves,Non ideal
behaviour of components: wires; PCB lands; effect of component leads,Cabling,capacitive coupling, inductive
coupling, Grounding, Balancing and Filtering, Shielding, Frequency Vs. time domain; analog Vs. digital circuits
Course Outcome:
Text Books:
1. Clayton R. Paul, Introduction to Electromagnetic Compatibility, 2nd Ed., Wiley India Pvt. Ltd.,
2011.
2. Henry W. Ott, Electromagnetic Compatibility Engineering, John Wiley and Sons Inc., 2009.
References:
1. Henry W. Ott, Noise Reduction Techniques in Electronic Systems, 2nd Ed., Wiley, 1998.
2. Prasad Kodali V., Engineering Electromagnetic Compatibility: Principles, Measurements,
Technologies and Computer Models, 2nd Ed., Wiley India Pvt. Ltd, 2010.
3. David Morgan, Handbook of EMC Testing and Measurements, IET Electrical Measurement Series, 1994
26
SEMESTER II
COURSE PLAN
COURSE CODE:
COURSE TITLE
04 EC 6402
CREDITS
3-1-0: 4
Contact
Hours
Sem.
Exam
Marks (%)
15
15
15
15
10
15
MODULE 2: CABLING
Shielding: near fields and far fields; characteristic and wave impedance;
shielding effectiveness; absorption loss; reflection loss; composite
absorption and reflection loss; shielding with magnetic materials;
grounding of shields.
27
Frequency Vs. time domain; analog Vs. digital circuits; digital logic noise;
internal noise sources; digital circuit ground noise; power distribution;
noise voltage; differential-mode radiation; controlling differential-mode
radiation; common-mode radiation; controlling common-mode radiations
10
15
28
COURSE CODE
04 EC 6404
COURSE NAME
L-T-P:C
3-0-0: 3
YEAR
2015
Pre-requisites: Nil
Course Objectives:
Microprocessor Architecture, Instruction Set Data formats Addressing modes Memory hierarchy, High
Performance CISC Architecture Pentium,
CPU Architecture- Bus Operations Pipelining ,
HighPerformance RISC Architecture ARM, Organization of CPU Bus architecture , MOTOROLA 68HC11
Microcontrollers Instruction set addressing modes , PIC Microcontroller- CPU Architecture Instruction set
interrupts- Timers
Course Outcome:
29
COURSE CODE:
04 EC 6404
COURSE PLAN
COURSE TITLE
Advanced Microprocessors and Microcontrollers
MODULES
CREDITS
3-0-0: 3
Sem.
Contact
Exam
Hours
Marks (%)
15
15
15
15
Instruction set addressing modes operating modes- Interrupt systemRTC-Serial Communication Interface A/D Converter PWM and UART.
20
20
Organization of CPU Bus architecture Memory management unit ARM instruction set- Thumb Instruction set- addressing modes
Programming the ARM processor
MODULE 4 : ARM INTERRUPT HANDLING SCHEMES
30
COURSE CODE
04 EC 6406
COURSE NAME
L-T-P:C
3-0-0: 3
YEAR
2015
Pre-requisites: Nil
Course Objectives:
Syllabus:
Introduction to High Speed Digital Design, Frequency and time, Time and Distance , Transmission lines,
problems in ordinary point to point wiring, infinite uniform transmission line , Signallingconvention and
circuits, Signalling modes for transmission lines , Cross talk , Clock , Timing convention andsynchronisation
Timing fundamentals
Course Outcome:
1. Howard Johnson & Martin Graham, High Speed Digital Design: A Handbook of Black Magic, Prentice Hall,
1993.
2. Jan M. Rabaey, AnanthaChandrakasan&BorivojeNikolic, Digital Integrated Circuits: A Design Perspective,
2nd Ed. Pearson Education Asia, 2007.
References:
1. K.C Chang, Digital Systems Design with VHDL and Synthesis: An Integrated Approach, Wiley India ,2010.
2. William S. Dally & John W. Poulton, Digital Systems Engineering, Cambridge University Press, 2008.
31
COURSE CODE:
04 EC 6406
COURSE PLAN
COURSE TITLE
High Speed Digital System Design
MODULES
CREDITS
3-0-0: 3
Contact
Hours
Sem. Exam
Marks (%)
15
15
15
15
15
15
Timing margin, clock skew, using low impedance drivers, using low
impedance clock distribution lines, source termination of multiple clock
lines, controlling crosstalk on clock lines, delay adjustments, clock jitter
MODULE : 6 Timing convention and synchronisation Timing
fundamentals
32
COURSE CODE
04 EC 6408
COURSE NAME
L-T-P:C
3-0-0: 3
YEAR
2015
Pre-requisites: Nil
Course Objectives:
To develop and understanding of optical fiber system components and design considerations.
To develop a basic understanding of telecommunication networks and digital optical ciber
communication systems.
Syllabus:
Review of Fiber Optic Communication Systems, Fibre optic types and parameters, Fibre optic types and
parameters, Fiber Optic System Design Considerations and Components, Optical Fiber Communication
System, Advanced Multiplexing Strategies , Optical Networking
Course Outcome:
Classify the Optical sources and detectors and to discuss their principle.
Familiar with Design considerations of fiber optic systems.
Text Books:
1. John Senior, Optical Fiber Communications: Principles and Practice, 3rd Ed., Prentice Hall, 2008.
2. Govind P .Agarwal , Fibre Optic Communcation Systems ,3 rd Ed.,Wiely 2013
References:
Optical Society of America, Fiber Optics Handbook: Fiber, Devices, and Systems for Optical
Communications, McGraw Hill, 2001.
2. Iizuka K., Elements of Photonics, Volume II, Wiley, 2002.
3. Shieh W., &Djordjevic I., OFDM for Optical Communications, Elsevier, 2009.
4. Javier Aracil, Enabling Optical Internet with Advanced Network Technologies, Springer, 2009.
5. MasatakaNakazawa, High Spectral Density Optical Communication Technologies, Springer, 2010.
33
COURSE CODE:
04 EC 6408
COURSE PLAN
COURSE TITLE
Optical Communication System
MODULES
Contact
Hours
CREDITS
3-0-0: 3
Sem. Exam
Marks (%)
15
15
15
15
20
20
35
COURSE CODE
04 EC 6412
COURSE NAME
INTRODUCTION TO RF MICROELECTRONICS
L-T-P:C
3-0-0: 3
YEAR
2015
Pre-requisites: Nil
Course Objective:
To provide an overview of passive components and lumped elements circuits.
To understand the fabrication of microwave integrated circuits.
To study about various planar transmission lines.
Syllabus
Passive Components,Lumped Element Circuits, Introduction - Materials, Mask layout, Mask fabrication,
Printed Circuit Boards, Thin Film Technology, Thick film Technology, Introduction to Planar Transmission
Line, PLLS, Various RF synthesizer architectures and frequency dividers, Power Amplifiers design.
Course Outcome
1. Frank Ellinger, Radio Frequency Integrated Circuits and Technologies, Springer, 2007.
2. Inder Bahl, Lumped Elements for RF and Microwave Circuits, Artech House, 2003.
References:
1. Gupta K. C. &Amarjit Singh, Microwave Integrated Circuits" John Wiley & Sons, 1975.
2. Hoffman R. K., Handbook of Microwave Integrated Circuits, Artech House Publishers, 1987.
3. I.D Robertson,C .Lucyszyn., RFIC and MMIC Design and Technology, The Institution of Engineering and
Technology,2001.
4. Leo G. Maloratsky, Passive RF & Microwave Integrated Circuits, Elsevier, 2004.
5. Joseph J. Carr, RF Components and Circuits, Newnes, 2002.
6. B.Razavi, RF Microelectronics, Prentice-Hall PTR,1998.
36
COURSE PLAN
COURSE NO:
COURSE TITLE:
04 EC 6412
INTRODUCTION TO RF MICROELECTRONICS
MODULES
CREDITS:
3-0-0: 3
Contact
hours
Sem. Exam
Marks;%
15
15
15
15
20
20
MODULE3:
MICROWAVE
INTEGRATED
CIRCUIT
FABRICATION
TECHNOLOGY
Introduction - Materials, Mask layout, Mask fabrication, Printed Circuit
Boards- PCB Fabrication, PCB Inductors. Microwave Printed Circuits - MPC
fabrication.
MODULE 4 : HYBRID INTEGRATED CIRCUITS
Thin Film Technology, Thick film Technology- Coirfed Ceramic and Glass
ceramic Technology. MMIC Fabrication, Steps Involved in the Fabrication of
MOSFET, CMOS Fabrication, Micromachining fabrication.
SECOND INTERNAL TEST
37
COURSE CODE
04 EC 6414
COURSE NAME
L-T-P: C
3-0-0:3
YEAR
2015
Pre-requisites: Nil
Course Objectives:
Syllabus:
Waves, Waveguides and Environmental Characteristics - Time Domain Methods - Short Time Fourier Analysis
- a Voice and Audio Encoding System - Formulation of Linear Prediction problem in Time Domain - Sampling,
Time Resolution, Buffering, Latency and Jitter.
Course Outcome:
Text Books:
References:
4. Deller J. R., Hansen J. H. L. &Proakis J. G., Discrete Time Processing of Speech Signals, John Wiley,
IEEE Press, 1999.
5. Kirk R. & Hunt A. Digital Sound Processing for Music and Multimedia, Focal Press, 1999.
6. Eargle J. H. Music Sound and Technology, Van Nostrand Reinhold, 1995.
7. Vijay Madisetti, Video, Speech, and Audio Signal Processing and Associated Standards, CRC Press,
2009.
38
COURSE CODE:
04 EC 6414
COURSE PLAN
COURSE TITLE
CONCEPTS OF SPEECH AND AUDIO PROCESSING
SYSTEM
CREDITS
3-0-0:3
MODULES
Contact
Hours
Sem.
Exam
Marks (%)
15
15
15
15
20
MODULE : 1
MODULE : 2
20
40
COURSE CODE
04 EC 6416
COURSE NAME
L-T-P:C
3-0-0:3
YEAR
2015
Pre-requisites: Nil
Course Objectives:
Syllabus:
Course Outcome:
Text Books:
1. Christopher M. Bishop, Neural Networks for Pattern Recognition, Oxford University Press
2. NelloCristianini, John Shawe-Taylor, "An Introduction to Support Vector Machines and Other
Kernel-based Learning Methods,Cambridge University Press.
References:
41
COURSE CODE:
04 EC 6416
COURSE PLAN
COURSE TITLE
CREDITS
3-0-0:3
MODULES
Contact
Hours
Sem. Exam
Marks (%)
15
15
15
15
20
20
MODULE : 1
MODULE : 2
Fuzzy Logic System: Basic of fuzzy logic theory , crisp and fuzzy sets,
Basic set operation like union , interaction , complement , T-norm , Tconorm , composition of fuzzy relations, fuzzy if-then rules , fuzzy
reasoning, Neuro-Fuzzy Modeling: Adaptive Neuro-Fuzzy Inference
System (ANFIS) , ANFIS architecture , Hybrid Learning Algorithm.
MODULE : 3
MODULE : 4
Ant Colony Optimization: Introduction From real to artificial antsTheoretical considerations Convergence proofs ACO Algorithm ACO
and model based search Application principles of ACO.
MODULE : 6
COURSE CODE
04 EC 6418
COURSE NAME
L-T-P:C
3-0-0: 3
YEAR
2015
Pre-requisites: Nil
Course Objectives:
Syllabus:
Passive RF Components, Importance of RF Design, Dimensions and units, frequency spectrum, RF Behaviour
of Passive Components, Active RF Components, RF Diodes - Schottky Diode, PIN Diode, Varactor Diode,
Active RF Components Modelling, Non Linear Diode Model, Linear Diode Model, Transistor Models,
Microwave Control Components, Switches, PIN Diode Switches, RF Amplifier Characterisitics, oscillators,
mixers & applications.
Course Outcome:
. Reinhold Ludwig & Powel Bretchko, RF Circuit Design Theory and Applications, 2nd Ed., Prentice Hall
Ltd., 2008.
2. W. Alan Davis, K. K Agarwal, Radio Frequency Circuit Design,Wiely India,2009
References:
1. Misra., Radio Frequency &Microwave Communication Circuits: Analysis &Design, Wiley India ,
2. Sorrentino R. & Bianchi G., Microwave and RF Engineering, John Wiley, 2010.
43
COURSE CODE:
04 EC 6418
COURSE PLAN
COURSE TITLE
RF Components and Circuit Design
MODULES
CREDITS
3-0-0: 3
Contact
Hours
Sem. Exam
Marks (%)
15
15
15
15
Diode Models: Non Linear Diode Model, Linear Diode Model. Transistor
Models: Large Signal BJT Models, Small Signal BJT Models, Large Signal
FET Models, Small Signal FET Models. Scattering Parameter Device
Characterization
Module 4: Microwave Control Components
Introduction; Switches: PIN Diode Switches, FET Switches, MEMS
Switches, Alternative Multi Port Switch Structure. Variable Attenuators,
Phase Shifters: True Relay and Slow Wave Phase Shifters, Reflection
Phase Shifters, Stepped Phase Shifters, Binary Phase Shifters.
INTERNAL TEST 2 (MODULE 3 & 4)
44
45
20
20
COURSE CODE
04 EC 6422
COURSE NAME
L-T-P:C
3-0-0: 3
YEAR
2015
Pre-requisites: Nil
Course Objectives:
Syllabus:
Information Theoretic aspects of MIMO, Review of SISO fading communication channels, MIMO channel
models, MIMO Diversity and Spatial Multiplexing sources and types of diversity, analysis under Rayleigh
fading, Diversity and channel knowledge,Space time block codes on real and complex orthogonal designs ,
Code design criteria for quasi-static channels, Space Time Trellis Codes, Representation of STTC, shift
register, generator matrix, state-transition diagram, trellis diagram, Space time block codes on real and
complex orthogonal designs, Space Time Trellis Codes
Representation of STTC
Course Outcome:
Text Books:
COURSE CODE:
04 EC 6422
COURSE PLAN
COURSE TITLE
Aspects of MIMO Communication System
MODULES
CREDITS
3-0-0: 3
Contact
Hours
Sem. Exam
Marks (%)
15
15
15
15
20
20
47
COURSE CODE
04 EC 6424
COURSE NAME
L-T-P:C
3-0-0: 3
YEAR
2015
Pre-requisites: Nil
Course Objectives:
Syllabus:
Reception in White Noise, The Active Radar or Sonar Signal, Physical Interpretation, Passive Listening,
Reception in Colored Noise, Optimum Reception in Colored Noise, Receiver Structure, Tracking,Modeling
Detection and Tactical Decision Aids, Digital Sonar System, Design of Digital Sonar: Implementation Method
of Various Function of Digital Sonar, Tracking,
Modeling Detection and Tactical Decision Aids
Course Outcome:
Design simulation experiments related to radar systems and radar signal processing
Text Books:
1. Franois Le Chevalier, Principles of Radar and Sonar Signal Processing, Artech, 2002.
2. Richard P. Hodges, Underwater Acoustics: Analysis, Design and Performance of Sonar Wiley, 2010
References:
1. Samuel S. Blackman & Robert Popoli ,Design and Analysis of Modern Tracking Systems Artech,
1999.
48
COURSE CODE:
04 EC 6424
COURSE PLAN
COURSE TITLE
Detection and Tracking System
MODULES
CREDITS
3-0-0: 3
Sem.
Contact
Exam
Hours
Marks (%)
7
15
15
15
15
Module 5: Testing
Compound hypothesis testing, Generalized likelihood-ratio test; Detection
with unknown signal parameters, Signal detection in the presence of
noise, Chernoff bound, asymptotic relative efficiency; sequential
detection; nonparametric detection, sign test, rank test.
20
20
49
COURSE CODE
04 EC 6426
COURSE NAME
L-T-P:C
3-0-0: 3
YEAR
2015
Pre-requisites: Nil
Course Objectives:
Syllabus:
Text Books:
References:
50
1. Marco Di Natale, HaiboZeng, Paolo Giusto &ArakadebGhosal, Understanding and Using the Controller
Area Network ,Springer, 2012.
2. John Catsoulis, Designing Embedded Hardware, O'Reilly Media, Inc., 2002
3. Dr. SidnieFeit, TCP/IP : Architectures, Protocols and Implementations with IPv6 and IP Security, Tata
McGraw Hill, Second Edition, 2008.
4. Martin W. Murhammer, OrcunAtakan, Stefan Bretz,Larry R. Pugh, Kazunari Suzuki, David H. Wood,
TCP/IP Tutorial and Technical Overview, International Technical Support Organization-IBM, Sixth Edition
,October 1998.
5. Wayne Wolf, Computers as Components: Principles of Embedded Computing System Design, Morgan
Kaufman Publishers, 2008.
COURSE CODE:
04 EC 6426
COURSE PLAN
COURSE TITLE
Embedded Network Design
CREDITS
3-0-0: 3
MODULES
Contact
Hours
15
15
15
15
Sem. Exam
Marks (%)
52
20
20
COURSE CODE
04 EC 6492
COURSE NAME
MINI PROJECT
L-T-P:C
0-0-4:2
YEAR
2015
In Mini Project the student shall undergo two months duration. The mini project is designed to develop
practical ability and knowledge about practical tools/techniques in order to solve the actual problems
related to the industry, academic institutions or similar area. Students can take up any application
level/system level project pertaining to a relevant domain. Mini Projects can be chosen either from the list
provided by the faculty or in the field of interest of the student. For external mini projects, students should
obtain prior permission after submitting the details to the guide and synopsis of the work. The mini project
guide should have a minimum qualification of ME/M.Tech in relevant field of work. At the end of each
phase, presentation and demonstration of the mini project should be conducted, which will be evaluated by
a panel of examiners. A detailed mini project report duly approved by the guide in the prescribed format
should be submitted by the student for final evaluation. Publishing the work in Conference Proceedings/
Journals with National/ International status with the consent of the guide will carry an additional weightage
in the review process. Mini project undergo an evaluation by a panel of examiners including at least one
external examiner appointed by university and internal examiner.
COURSE CODE
04 EC 6494
COURSE NAME
L-T-P:C
0-0-2:1
YEAR
2015
Pre-requisites: Nil
Course Objectives:
To simulate experiments based on the core courses and the elective courses opted by the student in the
second semester
Tools:
Periodogram Estimation
Time frequency domain properties of different windows using MATLAB
Design of FIR filter using windowing Technique.
System design using PIC Microcontroller
53
04 EC 7490
54
INDUSTRIAL TRAINING
0-0-4:P/F
2015
SEMESTER III
COURSE CODE
COURSE NAME
04 EC 7401
L-T-P:C
3-0-0:3
YEAR
2015
Pre-requisites:
Course Objectives:
Syllabus
Cellular Communication, Cellular concept-frequency reuse, channel assignment, Fading and Diversity,
Wireless Channel Models, Path Loss and Shadowing Models, Diversity, Frequency and Space Diversity,
Concept
of
Diversity
Branches
and
Signal
Paths,
multiple
access
technique,
TDMA,
FDMA,
GSM,
CDMA
digital
cellular,
Fading
Channel
Capacity,
Capacity of Wireless Channels, Cellular Wireless Communication Standards, Second generation cellular
systems: GSM specifications and Air Interface - specifications, IS 95 CDMA- 3G systems: UMTS & CDMA 2000
standards and specifications.
Course Outcome:
1. Simon Haykin& Michael Moher, Modern Wireless Communications, Person Education, 2007.
2. Stuber G. L, Principles of Mobile Communications, 2nd Ed., Kluwer Academic Publishers, 2001.
3. Andreas F .Molisch., Wireless Communication , 2nd Ed., John Wiley India,2012.
4. Peterson R. L, Ziemer R. E. & David E. Borth, Introduction to Spread Spectrum Communication, Pearson
Education, 1995.
5. Viterbi A. J., CDMA: Principles of Spread Spectrum, Addison Wesley, 1995.
55
COURSE CODE:
04 EC 7401
COURSE PLAN
COURSE TITLE
Wireless Communication Systems
MODULES
Contact
Hours
CREDITS
3-0-0:3
Sem. Exam
Marks (%)
15
15
15
15
20
20
57
COURSE CODE
COURSE NAME
L-T-P:C
YEAR
04 EC 7403
3-0-0:3
2015
Pre-requisites:
Course Objectives:
Syllabus
Biological neural, Neural processing, Learning Vector Quantization , Hebbian Learning, Hopfield Network,
Bidirectional Associative memory (BAM), Self Organization Maps (SOM) and ART1, Fuzzy decision making
Multi Objective Decision Making.
Course Outcome:
The student will be able to understand the concepts of discrete and continuous perception
The Method of Hebbian Learning is explained in detail.
References:
1.Jang J S R Sun C T and Mizutani E, Neuro Fuzzy and Soft computing, Pearson
Education, (Singapore), 2004.
2.SRajasekaran and G A VijayalakshmiPai, Neural networks Fuzzy logics and Genetic algorithms, Prentice
Hall of India, 2004
3.Derong Liu , Advances in Neural Networks--ISNN 2007 , Springer, 2007
4.Timothy J Ross, Fuzzy Logic Engineering Applications, John Wiley and Sons, 2004
5.James A. Anderson, An Introduction to Neural Networks, Prentice Hall, 2002
58
COURSE CODE:
04 EC 7403
MODULE : 1
COURSE PLAN
COURSE TITLE
Applications of Fuzzy Logic and Neural Network
MODULES
CREDITS
Contact
Hours
3-0-0:3
Sem. Exam
Marks (%)
15
15
15
15
20
20
MODULE : 2
Unsupervised Learning , Competitive Learning Networks , Kohonenselforganising networks , Learning Vector Quantization , Hebbian Learning,
Hopfield Network ,Content Addressable Nature , Binary Hopfield
Network , Continuous Hopfield Network
MODULE : 3
Representation of fuzzy knowledge - fuzzy inference systemsMamdani Model Sugeno Model Tsukamoto Model Fuzzy decision
making Multi Objective Decision Making Fuzzy Classification Fuzzy
Control Methods Application.
END SEMESTER EXAM
59
COURSE CODE
COURSE NAME
L-T-P:C
YEAR
04 EC 7405
3-0-0:3
2015
Pre-requisites:
Course Objectives:
Syllabus
Digital sound, video and graphics, network requirements for audio/video transform, Broadband services,
ATM
and
IP,
Multicast
And
Transport
Protocol,
Media
On
Demand,
Multimedia And Internet, Peer-to-peer computing, shared application
Course Outcome:
Texts:
1. Jon Crowcroft, Mark Handley, Ian Wakeman. Internetworking Multimedia, Harcourt Asia
Pvt.Ltd.Singapore, 1998.
2. B.O. Szuprowicz, Multimedia Networking, McGraw Hill, NewYork. 1995
References:
Voice and
60
COURSE CODE:
04 EC 7405
MODULE : 1
COURSE PLAN
COURSE TITLE
INTERNET WORKING AND MULTIMEDIA
MODULES
Contact
Hours
CREDITS
3-0-0:3
Sem. Exam
Marks (%)
15
15
15
15
20
20
MODULE : 2
61
COURSE CODE
04 EC 7407
COURSE NAME
ASIC DESIGN
L-T-P:C
3-0-0:3
YEAR
2015
Pre-requisites:
Course Objectives:
Syllabus
Types of ASICs, Design flow, Anti fuse, static RAM, EPROM, EEPROM technology, Xilinx I/O blocks, Actel ACT,
Xilinx LCA, Low level design language, PLA tools, EDIF, CFI design representation.
Course Outcome:
Texts:
1. M.J.S .Smith, "Application Specific Integrated Circuits, Addison -Wesley Longman Inc., 1997.
2. FarzadNekoogar and FaranakNekoogar, From ASICs to SOCs: A Practical Approach, Prentice Hall PTR,
2003.
References:
1. Wayne Wolf, FPGA-Based System Design, Prentice Hall PTR, 2004.
2. R. Rajsuman, System-on-a-Chip Design and Test. Santa Clara, CA: Artech House Publishers, 2000.
3. F. Nekoogar. Timing Verification of Application-Specific Integrated Circuits (ASICs).Prentice Hall PTR, 1999.
4. Michael D.Ciletti, Advanced Digital design with Verilog HDL, Pearson Education, 2005.
5. S. Brown & Z. Vranestic, Fundamentals of Digital Logic with Verilog HDL, Tata McGraw Hill, 2002
62
COURSE CODE:
04 EC 7407
MODULE : 1
COURSE PLAN
COURSE TITLE
ASIC DESIGN
MODULES
Types of ASICs - Design flow - CMOS transistors CMOS Design rules Combinational Logic Cell Sequential logic cell - Data path logic cell Transistors as Resistors - Transistor Parasitic Capacitance- Logical effort
Library cell design - Library architecture.
MODULE : 2
CREDITS
3-0-0:3
Contact
Hours
Sem. Exam
Marks (%)
15
15
15
15
20
20
MODULE : 4
Design units, Data objects, Signal drivers, Delays , Data types, language
elements, operators, user defined primitives, modeling-data flow,
behavioral, structural, Verilog implementation of simple combinational
circuits: adder, code converter,decoder, encoder, multiplexer,
demultiplexer..
MODULE : 5
63
COURSE CODE
04 EC 7409
COURSE NAME
L-T-P:C
3-0-0:3
YEAR
2015
Pre-requisites:
Course Objectives:
Syllabus
Introduction to VLSI Design methodologies, Review of Data structures and algorithms, Layout Compaction,
Design rules, problem formulation, algorithms for constraint graph compaction, Floor planning concepts,
shape functions and floorplan sizing, Types of local routing problems, High level transformations.
Course Outcome:
The student will be able to understand the VLSI Design automation tools.
Texts:
1. S.H. Gerez, "Algorithms for VLSI Design Automation", John Wiley & Sons, 2002.
2. N.A. Sherwani, "Algorithms for VLSI Physical Design Automation", Kluwer Academic Publishers, 2002
References:
1. Sadiq M. Sait, Habib Youssef, VLSI Physical Design automation: Theory and Practice, World scientific
1999.
2. Steven M.Rubin, Computer Aids for VLSI Design, Addison Wesley Publishing 1987.
64
COURSE PLAN
COURSE CODE:
COURSE TITLE
CREDITS
04 EC 7409
3-0-0:3
Contact
Hours
Sem. Exam
Marks (%)
15
15
15
15
20
20
MODULE : 1
MODULES
MODULE : 6
65
COURSE CODE
04 EC 7411
COURSE NAME
L-T-P:C
3-0-0:3
YEAR
2015
Pre-requisites:
Course Objectives:
To understand the need of digital signal processors and to study typical DSP processor.
To understand the current trends in digital signal processor.
Syllabus
Need for Special Digital Signal Processors, Processor Trends: Von Newmann Vs. Harvard Architecture,
Structures for FIR systems , Direct and Cascade forms , Structures for Linear phase systems, Analog filter
design: Filter specification, Filter specification ,Low pass IIR filter design, Impulse invariant and Bilinear
transformation methods, Analog Devices DS Processors: Introduction to Sharc / Tiger Sharc / Blackfin Series,
Other Major Vendors in the DSP Market and the Latest Trends.
Course Outcome:
Texts:
1. NaimDahnoun, Digital Signal Processing Implementation Using the TMS320C6000 Processors, Prentice
Hall, 2000.
2. Chassaing R., Digital Signal Processing and Applications With the C6713 and C6416 DSK, John Wiley &
Sons, 2004.
References:
66
COURSE CODE:
04 EC 7411
COURSE PLAN
COURSE TITLE
DSP SYSTEM DESIGN
MODULES
MODULE : 1
Need for Special Digital Signal Processors, Processor Trends: Von Newmann
Vs. Harvard Architecture, Architectures of Superscalar and VLIW Fixed and
Floating Point Processors, New Digital Signal Processing Hardware Trends,
Selection of DS Processors.
MODULE : 2
Introduction to a Popular DSP from Texas Instruments (TMS330C6000
Series), CPU Architecture, CPU Data Paths and Control, Internal Data /
Program Memory. On Chip Peripherals: Timers, Multi Channel Buffered
Serial Ports, Extended Direct Memory Access, Interrupts, Pipelining.
INTERNAL TEST 1 (MODULE 1 & 2)
MODULE : 3
IIR and FIR systems , Block diagram and SFG representation of difference
equations , Basic structures for IIR systems , Direct form , Cascade form ,
Parallel form , Transposed forms ,Structures for FIR systems , Direct and
Cascade forms , Structures for Linear phase systems. Analog filter design:
Filter specification , Butterworth approximation , Pole locations , Design of
analog low pass Butterworth filters ,Chebyshev Type 1 approximation , pole
locations , Analog to analog transformations for designing high pass, band
pass and band stop filters.
CREDITS
3-0-0:3
Sem.
Contact
Exam
Hours
Marks
(%)
7
15
15
15
15
20
MODULE : 4
Filter specification ,Low pass IIR filter design , Impulse invariant and Bilinear
transformation methods Butterworth and Chebyshev , Design of high
pass, band pass and band stop IIR digital filters , Design of FIR filters by
windowing , Properties of commonly used windows , Rectangular, Bartlett,
Hanning, Hamming and Kaiser.
MODULE : 5
Design Aspects: Introduction to the C6713 DSK, Code Composer Studio IDE,
Matlab and Basic Skills, Review of FIR Filtering: FIR Filter Design Techniques
and Tools, Review of IIR Filtering: IIR Filter Design Techniques and Tools,
Sampling, Quantization and Working with the AIC23 Codec, Writing Efficient
Code: Optimizing Compiler, Effect of Data Types and Memory Map:
TMS320C6713 Assembly Language Programming: Instructions Set And
Addressing Modes, Linear Assembly.
67
MODULE : 6
68
20
COURSE CODE
04 EC 7413
COURSE NAME
RF ANTENNA THEORY
L-T-P:C
3-0-0:3
YEAR
2015
Pre-requisites:
Course Objectives:
Syllabus
Dipole, monopole, loop antenna; Mobile phone antenna- base station, hand set antenna, Various
Microstrip Antenna Configurations, Microstrip Patch Antenna, Printed Dipole Antenna, Use of a Meandered
Ground Plane, Use of a Planar Inverted-L Patch.
Course Outcome:
Texts:
1. Bhartia P., InderBahl, Garg R. &Ittipiboon A., Microstrip Antenna Design Handbook, Artech House
Publishers, 2001.
2. Kin-Lu Wong, Compact and Broadband Microstrip Antennas, 1st Ed., Wiley-Inter science, 2002.
References:
1. Fang D.G., Antenna Theory and Microstrip Antennas, CRC Press, 2009.
2. Simon R. Saunders & Alejandro Aragon-Zavala, Antennas and Propagation for Wireless Communication
System, John Wiley & Sons, 2007.
3. Robert S Elliot., Antenna Theory and Design, John Wiley & Sons, 2006.
4. Constantine A Balanis., Modern Antenna Handbook, Wiley ,2011.
5. Balanis.A, Antenna Theory Analysis and Design, John Wiley and Sons, New York, 1982
5. S K Mitra, Digital Signal Processing: A Computer Based Approach ,TataMc.Graw Hill.
69
COURSE CODE:
04 EC 7413
MODULE : 1
COURSE PLAN
COURSE TITLE
RF ANTENNA THEORY
MODULES
CREDITS
3-0-0:3
Contact
Hours
Sem. Exam
Marks (%)
15
15
15
15
20
20
COURSE NAME
L-T-P:C
3-0-0:3
YEAR
2015
Pre-requisites:
Course Objectives:
To know the various types of faults and also to study about fault detection, dominance
Syllabus
Introduction to testing, Faults in Digital Circuits, Modelling of faults, Logical Fault Models, Test generation
for sequential circuits, Vector Simulation ATPG Vectors, Formats, Compaction and Compression.
Course Outcome:
The student will be able to study the various testing techniques available in the field of VLSI.
Texts:
1. M.Abramovici, M.A.Breuer and A.D. Friedman, Digital systems and Testable Design, Jaico Publishing
House,2002.
2. P.K. Lala, Digital Circuit Testing and Testability, Academic Press, 2002
References:
1. M.L.Bushnell and V.D.Agrawal, Essentials of Electronic Testing for Digital, Memory and Mixed- Signal VLSI
Circuits, Kluwer Academic Publishers, 2002.
2. A.L.Crouch, Design Test for Digital ICs and Embedded Core Systems, Prentice Hall International, 2002
3. Robert J.Feugate, Jr., Steven M.Mentyn, Introduction to VLSI Testing, Prentice Hall, Englehood Cliffs,
1998.
71
COURSE CODE:
04 EC 7415
COURSE PLAN
COURSE TITLE
FAULT DETECTION AND TESTING OF VLSI CIRCUITS
MODULES
MODULE : 1
CREDITS
3-0-0:3
Sem.
Contact
Exam
Hours
Marks (%)
7
15
15
15
15
20
20
MODULE : 2
Built-In self Test test pattern generation for BIST Circular BIST BIST
Architectures Testable Memory Design Test Algorithms Test
generation for Embedded RAMs.
MODULE : 6
72
COURSE CODE
04 EC 7491
COURSE NAME
SEMINAR
L-T-P:C
YEAR
2015
0-0-2:2
Each student shall present a seminar on any topic of interest related to the core / elective courses
offered in the second semester of the M. Tech. Programme. He / she shall select the topic based on the
references from international journals of repute, preferably IEEE journals. They should get the paper
approved by the Programme Co-ordinator / Faculty member in charge of the seminar and shall present it in
the class. Every student shall participate in the seminar. The students should undertake a detailed study on
the topic and submit a report at the end of the semester. Marks will be awarded based on the topic,
presentation, participation in the seminar and the report submitted
COURSE CODE
04 EC 7493
COURSE NAME
PROJECT (PHASE I)
L-T-P:C
0-0-12:6
YEAR
2015
In Project Phase-I, the students are expected to select an emerging research area in the field of
specialization. After conducting a detailed literature survey, they should compare and analyze research work
done and review recent developments in the area and prepare an initial design of the work to be carried out
. It is mandatory that the students should refer National and International Journals and conference
proceedings while selecting a topic for their project. He/She should select a recent topic from a reputed
International Journal, preferably IEEE/ACM. Emphasis should be given for introduction to the topic, literature
survey, and scope of the proposed work along with some preliminary work carried out on the project topic.
Students should submit a copy of Phase-I project report covering the content discussed above and
highlighting the features of work to be carried out in Phase-II of the project. The candidate should present
the current status of the project work and the assessment will be made on the basis of the work and the
presentation, by a panel of internal examiners in which one will be the internal guide. The examiners should
give their suggestions in writing to the students so that it should be incorporated in the PhaseII of the
project. Project phase 1 undergo an evaluation by a panel of examiners including at least one external
examiner appointed by university and internal examiner.
73
SEMESTER IV
COURSE CODE
COURSE NAME
L-T-P:C
YEAR
EC EC 7494
0-0-21:12
2015
In the fourth semester, the student has to continue the project work and after successfully finishing
the work, he / she has to submit a detailed bounded project report. The work carried out should lead to a
publication in a National / International Conference or Journal. The papers received acceptance before the
M.Tech evaluation will carry specific weightage.
TOTAL MARKS :100
Project evaluation by the supervisor/s
Evaluation by the External expert
Presentation & evaluation by the Committee
74
: 30 Marks
: 30 Marks
: 40 Marks