Sei sulla pagina 1di 74

APJ Abdul Kalam Technological University

Cluster 4: Kottayam

M. Tech Program in
Electronics & Communication
Engineering
(Applied Electronics)

Scheme of Instruction & Syllabus: 2015 Admissions

Compiled By

Rajiv Gandhi Institute of Technology, Kottayam


July 2015

APJ Abdul Kalam Technological University


(Kottayam Cluster)

M. Tech Program in Applied Electronics

Credit requirements : 66 credits (21+19+14+12)


Normal Duration
: Regular: 4 semesters; External Registration: 6 semesters;
Maximum duration
: Regular: 6 semesters; External Registration: 7 semesters.
Courses: Core Courses: Either 4 or 3 credit courses; Elective courses: All of 3 credits
Allotment of credits and examination scheme:Semester 1 (Credits: 21)
Exam
Slot
A
B

C
D
E

Course No:

04 EC 6401

Name

L- T - P

Internal
Marks

Applied Mathematics For


Electronics Engineers
Analog Integrated Circuit
Design

3-0-0

40

Digital Integrated Circuit


Design

4-0-0

04 EC64XX

High Speed Switching


architecture

04 EC 6491

Research Methodology

0-2-0

100

0-0-2

100

04 EC 6403
04 EC 6405
04 EC 6407
04GN 6001
04 EC 6493

40

60

3-0-0

40

60

Elective 1

3-0-0

40

60

Seminar

0-0-2

100

List of Elective - I Courses


Exam
Slot
E
E
E
E

Total

Course No.
04 EC 6409
04 EC 6411
04 EC 6413
04 EC 6415

22

40

Credits

60

Electronic System Design


Lab I

3-0-0

End Semester
Exam
Marks (hrs)
60
3

0
0

0
0

2
1

21
*See List of Electives-I for slot E

Course Name

Digital Communication System Design


Low Power VLSI Design
Image and Video Processing System Design
RF System Design

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

Semester 2 (Credits: 19)


Exam
Slot
A
B
C

D
E

Course No:

L- T - P

Internal
Marks

System Design for


Electromagnetic Compatibility

3-1-0

40

Advanced Microprocessor and


Microcontroller

3-0-0

40

60

04 EC 64XX

High Speed DSD

Elective 2

3-0-0

60

04 EC 6492

Elective 3

3-0-0

40

Mini Project

3-0-0

40

60

04 EC 6402
04 EC 6404
04 EC 6406

04 EC 64XX
04 EC 6494

Name

Electronic System Design Lab


II

*See List of Electives -II for slot D


List of Elective - II Courses
Exam
Slot
D
D
D
D

Course
Code
04 EC 6408
04 EC 6412
04 EC 6414
04 EC 6416

List of Elective - III Courses


Exam
Slot
E
E
E
E

Course
Code
04 EC 6418
04 EC 6422
04 EC 6424
04 EC 6426

Total

0-0-4
0-0-2

40
100
100

End Semester
Exam
Marks (hrs)
60
3

60
0
0

3
0
0

22
^See List of Electives -III for slot E

Credits
4

3
2
1
19

Course Name

Optical Communication System


Introduction to RF Microelectronics
Concepts of Speech and audio Processing System
Artificial Intelligence & Optimization Techniques

Course Name

RF Components and circuit design


Aspects of MIMO Communication System
Detection and Tracking System
Embedded Network Design

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

Summer Break
Exam Course No:
Slot
NA

L- T - P

Int.
Marks

0-0-4

NA

Name

L- T - P

Int.
Marks

04 EC 74XX

Elective 4

3-0-0

40

04 EC 7491

Seminar

0-0-2

100

04 EC 7490

Semester 3 (Credits: 14)


Exam
Slot
A
B

Course No:

04 EC74XX

04 EC 7493

Name

Industrial Training

Project (Phase 1)

List of Elective - IV Courses

A
A

Course Code
04 EC 7401
04 EC 7403
04 EC 7405
04 EC 7407

List of Elective - V Courses


Exam
Slot
B
B
B
B

Course Code
04 EC 7409
04 EC 7411
04 EC 7413
04 EC 7415

3-0-0

Elective 5

*See List of Electives-IV for slot A


slot B

Exam
Slot
A
A

Total

Total

0-0-12
20

40
50

End Semester
Exam
Marks (hrs)

Credits

End Semester
Exam
Marks
hrs
60
3

Credits

NA

NA

60

Pass
/Fail
0

3
3
2
6

14
^See List of Electives-V for

Course Name

Wireless Communication Systems


Applications of Fuzzy logic and Neural Networks
Internet working & Multimedia
ASIC Design

Course Name

CAD for VLSI Circuits


DSP System Design
RF Antenna Theory
Fault Detection and Testing of VLSI Circuits

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

Semester 4 (Credits: 12)


Exam
Slot
NA

Course No:
04 EC 7494

Name
Project (Phase 2)

L- T - P

Total

0-0-21
21

Interna
l
Marks
70

External
Evaluation
Marks
30
NA

Credit
s
12

12
Total: 66

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

SYLLABUS

SEMESTER I
COURSE CODE
04 EC 6401

COURSE NAME
APPLIED MATHEMATICS FOR ELECTRONICS ENGINEERS

L-T-P:C
3-0-0: 3

YEAR
2015

Pre-requisites: Nil

Course Objectives:

To give the Student:-

A foundation in the fundamentals of Applied Mathematics

An introduction to experimental methods

Practice in the analytical formulation of Applied Mathematics problems

Syllabus:

Fundamental concepts and overview of fuzzy logic, The Cholesky decomposition, Toeplitz matrices and
some applications; important matrix factorizations and decomposition, , Gamma and Normal distributions
Function of a Random Variable, Problem of dimensionality. Overview of one-dimensional random variables.
Machine Interference Model, Principle of Dynamic programming and its applications. Different types of
queueing models, testing of hypotheses, Chi-Square and F distributions for testing of mean.
Course Outcome:

Students who successfully complete this course will have demonstrated an ability
to understand the fundamental concepts of applied mathematics.
Text Books:

References:

1. George J. Klir and Yuan, B., Fuzzy sets and fuzzy logic, Theory and applications, Prentice
Hall of India Pvt. Ltd., 1997.
2. Taha, H.A., Operations Research, An introduction, 7th edition, Pearson education
editions, Asia, New Delhi, 2002.
1. Moon, T.K., Sterling, W.C., Mathematical methods and algorithms for signal
processing,
Pearson Education, 2000.
2. Richard Johnson, Miller & Freunds Probability and Statistics for Engineers, 7 th
Edition, Prentice Hall of India, Private Ltd., New Delhi (2007).
3. Donald Gross and Carl M. Harris, Fundamentals of Queuing theory, 2nd edition, John
Wiley and Sons, New York (1985)

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE:
04 EC 6401

COURSE PLAN

COURSE TITLE
Applied Mathematics for Electronics Engineers
MODULES

MODULE 1:Classical logic Multivalued logics Fuzzy propositions Fuzzy


quantifiers

MODULE 2:
Some important matrix factorizations The Cholesky decomposition QR
factorization Least squares method Singular value decomposition Toeplitz matrices and some applications
INTERNAL TEST 1 (MODULE 1 & 2)
MODULE 3:
Random variables - Probability function moments moment generating
functions and their properties Binomial, Poisson, Geometric, Uniform,
Exponential, Gamma and Normal distributions Function of a Random
Variable
MODULE 4:

Dynamic programming Principle of optimality Forward and backward


recursion Applications of dynamic programming Problem of
dimensionality
INTERNAL TEST 2 (MODULE 3 & 4)
MODULE 5:Poisson Process Markovian queues Single and Multi-server
Models Littles formula - Machine Interference Model Steady State
analysis Self Service queue.
MODULE 6:Sampling distributions - Type I and Type II errors - Tests based
on Normal, t, Chi-Square and F distributions for testing of mean, variance
and proportions Tests for Independence of attributes and Goodness of fit.
END SEMESTER EXAM

CREDITS
3-0-0:3
Sem.
Contact
Exam
Hours
Marks
(%)
7

15

15

15

15

20

20

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE
04 EC 6403

COURSE NAME
Analog Integrated Circuit Design

L-T-P:C
3-0-0: 3

YEAR
2015

Pre-requisites: Nil

Course Objectives:

To give the Student:-

The basics and advanced mos- amplifier configuration, thin biasing circuit details and
performance matrices

evaluation of

The basic of MOSFET operation and models for analog design

Syllabus:

MOSFET Operation and Models for Analog Design, General Design, Small signal Models, Short Channel
Models; Single Stage Amplifiers and Biasing, Miller Effect, Cascode and Folded Cascode stages; Differential
Amplifiers, CMRR Requirements, Slew rate, Differential pair noise, Operational Amplifiers, Telescopic and
Folded cascade Opamps, noise mismatch, fully differential one stage and two stage opamps, Mixed signal
circuits, Non Linear and dynamic Analog circuit, CMOS Device Modeling, SPICE Model parameter Extraction.
Course Outcome:

Students who successfully complete this course will have demonstrated an ability to understand the
fundamental concepts of Analog Integrated Circuit Design.
Text Books:

1. BehzadRazavi, Design of Analog CMOS Integrated Circuits, McGraw Hill HigherEducation, 2003.
2. Jacob Baker R., CMOS: Circuit Design, Layout, and Simulation, Wiley, 2010.
References:

1. Philip E. Allen & Douglas R. Holberg, CMOS Analog Circuit Design, 2nd Ed., Oxford University Press, 2009.
2. David A. Johns & Ken Martin, Analog Integrated Circuit Design, Wiley India Pvt. Ltd., 2008.

3. Paul R. Gray, Paul J. Hurst, Stephen H. Lewis & Robert G. Meryer, Analysis and Design of Analog
Integrated Circuits, 5th Ed., Wiley 2009.
4.

CMOS Circuits Design, Layout and Simulation Baker, Li, Boyce, 1st ed., TMH

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE:
04 EC 6403

COURSE TITLE
Analog Integrated Circuit Design
MODULES

MODULE 1: MOSFET Capacitance Overview / Review, Threshold Voltage, I-V


Characteristics of MOSFETs. Models for Analog Design: Long-Channel
MOSFETs, Square-Law Equations, Small Signal Models, Temperature Effects,
Short-Channel MOSFETs, General Design, MOSFET Noise Modelling
MODULE 2:Common Source amplifier: dc and small signal analysis, noise
and ac analysis, miller effect; Common Drain and Common Gate amplifiers:
dc and small signal analysis, noise and ac analysis; cascode and folded
cascode stages; impedance and frequency scaling of circuits; biasing
transistors at a given current; Simple and, cascode current mirrors;
amplifiers biased at a constant current.
INTERNAL TEST 1 (MODULE 1 & 2)
MODULE 3: MOS differential amplifiers: introduction; dc and ac operations;
differential and common mode half circuits; CMRR requirements;
differential pair with passive and active loads - gain, output resistance and
CMRR; differential pair frequency response; differential pair noise; offset
and slew rate.

MODULE 4: MOS operational amplifiers: one-stage opamp gain, frequency


response, noise, mismatch and slew rate; telescopic and folded
cascodeopamps gain, frequency response, noise, mismatch and slew rate;
two-stage opamp topology; fully differential one-stage and two-stage
opamps.
INTERNAL TEST 2 (MODULE 3 & 4)
MODULE 5: Non-Linear & Dynamic Analog Circuits: Basic CMOS Comparator
Design, Adaptive Biasing, Analog Multipliers.
Dynamic Analog Circuits: MOSFET Switch, Switched capacitor circuits: ,
Switched capacitor Integrator, dynamic Circuits.
MODULE 6: I-V characteristics (N and P MOSFETs) SPICE Model Parameter
Extraction ,Small-signal model Second-order effects
END SEMESTER EXAM

CREDITS
3-0-0:3
Sem.
Contact
Exam
Hours
Marks
(%)
7

15

15

15

15

20

20

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE
04 EC 6405

COURSE NAME
Digital Integrated Circuit Design

L-T-P:C
4-0-0: 4

YEAR
2015

Pre-requisites: Nil

Course Objectives:

To provide the Student:-

An overview of the characteristics of digital integrated circuit.

The Knowledge of combinational logic circuits.

The concept of sequential logic circuits.

Syllabus:

CMOS Inverter, Performance of CMOS Inverter, Dynamic Behaviour,, Designing Combinational Logic Gates in
CMOS , Designing Sequential Logic Circuits, Timing Issues in Digital Circuits, Basic Concept, Building Blocks of
a PLL, Dynamic Logic Circuits, Semiconductor Memories, Flash Memory- NOR flash and NAND flash.
Course Outcome:

Students who successfully complete this course will have demonstrated an ability to understand the
fundamental concepts of Digital Integrated Circuit Design.
Texts:

1. Jan M. Rabaey, AnanthaChandrakasan&BorivojeNikolic, "Digital Integrated Circuits: A Design Perspective",


2nd Ed. Pearson Education Asia, 2007.
2. Jacob Baker R., "CMOS: Circuit Design, Layout, and Simulation", Wiley, 2010.
References:

1. Ken Martin, "Digital Integrated Circuit Design", Oxford University Press, 1999.
2. Sung-Mo (Steve) Kang & Yusuf Leblebici, "CMOS Digital Integrated Circuits Analysis and Design", 3rd Ed.,
McGraw Hill, 2002.
3. David Hodges, Horace Jackson &ResveSaleh, "Analysis and Design of Digital Integrated Circuits", 3rd Ed.,
McGraw Hill, 2003.
4. Hubert Kaeslin& Eth Zurich, "Digital Integrated Circuit Design from VLSI Architectures to CMOS
Fabrication", Cambridge University Press, 2008.
5. Digital Integrated Circuit Design Ken Martin, Oxford University Press, 2011.

10

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE:
04 EC 6405

COURSE TITLE
Digital Integrated circuit Design
MODULES

MODULE 1: Issues in Digital Integrated Circuit Design, Quality Metrics of a


Digital Design, Cost of an Integrated Circuit, Functionality and Robustness,
Performance, Power and Energy Consumption. Static CMOS Inverter:
Static Behavior, Switching Threshold, Noise Margins. Performance of
CMOS Inverter: Dynamic Behavior, Computing the Capacitances,
Propagation Delay: First-Order Analysis, Power, Energy, and Energy
Delay, Dynamic Power Consumption, Static Consumption
MODULE 2:Static CMOS Design - Complementary CMOS, Ratioed Logic,
Pass-Transistor Logic, Dynamic CMOS Design, Dynamic Logic: Basic
Principles, Speed and Power Dissipation of Dynamic Logic, Issues in
Dynamic Design, Cascading Dynamic Gates.
INTERNAL TEST 1 (MODULE 1 & 2)
MODULE 3: Timing Metrics for Sequential Circuits, Classification of
Memory Elements, Static Latches and Registers, Bistability Principle,
Multiplexer-Based Latches, Master-Slave Edge-Triggered Register, LowVoltage Static Latches, Static SR Flip-Flops, Dynamic Latches and Registers,
Dynamic Transmission-Gate Edge-Triggered Registers, CMOSClock Skew
insensitive Approach, True SinglePhase Clocked Register(TSPCR),
Alternative Register Styles, Pulse Registers, Sense-Amplifier Based
Register.
MODULE 4: Timing Classification of Digital Systems, Synchronous
Interconnect, Mesochronous Interconnect, Plesiochronous Interconnect,
Asynchronous Interconnect, Synchronous Design: Synchronous Timing
Basics, Sources of Skew and Jitter, Clock-Distribution Techniques.
Synchronizers and Arbiters: Synchronizers - Concept and Implementation,
Arbiters Clock Synthesis and Synchronization using PLL: Basic Concept,
Building Blocks of a PLL, Distributed Clocking using DLL.
INTERNAL TEST 2 (MODULE 3 & 4)
MODULE 5: Basic principle, Voltage Bootstrapping, Synchronous dynamic
pass transistor circuits, Dynamic CMOS transmission gate logic, High
performance Dynamic CMOS circuit

MODULE 6: Semiconductor Memories Types, RAM array organization,


DRAM Types, Operation, Leakage currents in DRAM cell and refresh
operation, SRAM operation Leakage currents in SRAM cells, Flash
Memory- NOR flash and NAND flash.
END SEMESTER EXAM

11

CREDITS
4-0-0:4
Sem.
Contact
Exam
Hours
Marks (%)
9

15

15

15

15

10

20

10

20

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE
04 EC 6407

COURSE NAME
High Speed Switching architecture

L-T-P:C
3-0-0: 3

YEAR
2015

Pre-requisites: Nil

Course Objectives:

To give the Student:

The basics of switching technologies and their implementation LANs, ATM networks and IP
networks.
Theidea of different switching architectures and queuing strategies and their impact on the blocking
performances.
Tthe advances in packet switching architectures and IP addressing and switching solutions and
approaches to exploit and integrate the best features of different architectures for high speed
switching.

Syllabus
LAN switching technology; ATM switching architectures; queues in ATM switches; packet switching
architectures; IP switching; network security overview.

Course Outcome:
1. The student would be able to identify suitable switching architectures for a specified networking scenario
and demonstrate its blocking performance.
2. The student would be in a position to apply his knowledge of switching technologies, architectures and
buffering strategies for designing high speed communication networks and analyse their performance.
Text Books:
1. Computer Networks and Internets, 2nd edition, D. Comer, Prentice Hall
2. High-Speed Networks and Internets, 2nd ed. William Stallings, Prentice Hall

References:
1. AchillePattavina, Switching Theory: Architectures and performance in Broadband ATM networks ",John
Wiley & Sons Ltd, New York. 1998
2. Rich Siefert, Jim Edwards, The All New Switch Book The Complete Guide to LAN Switching Technology,
Wiley Publishing, Inc., Second Edition, 2008.
3. Elhanany M. Hamdi, High Performance Packet Switching architectures, Springer Publications, 2007.
4. Christopher Y Metz, Switching protocols & Architectures, McGraw - Hill Professional Publishing,
NewYork.1998. 5. Rainer Handel, Manfred N Huber, Stefan Schroder, ATM Networks - Concepts Protocols,
Applications, 3rd Edition, Addison Wesley, New York. 1999.

12

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE:
04 EC 6407

COURSE TITLE
High Speed Switching architecture
MODULES

MODULE 1: Switching Concepts, LAN Switching, switch forwarding


techniques - cut through and store and forward, Layer 3 switching, Loop
Resolution, Switch Flow control, virtual LANs.
MODULE 2: Blocking networks - basic - and- enhanced banyan networks,
sorting networks - merge sorting, rearrangable networks - full-and- partial
connection networks, non-blocking networks - Recursive network
construction, comparison of non-blocking network, Switching with
deflection routing - shuffle switch, tandem banyan switch.
INTERNAL TEST 1 (MODULE 1 & 2)
MODULE 3: Internal Queuing -Input, output and shared queueing, multiple
queueing networks combined Input, output and shared queueing performance analysis of Queued switches.
MODULE 4: Architectures of Internet Switches and Routers- Bufferless and
buffered Crossbar switches, Multistage switching, Optical Packet
switching; Switching fabric on a chip; Internally buffered Crossbars.
INTERNAL TEST 2 (MODULE 3 & 4)
MODULE 5: Addressing model, IP Switching types - flow driven and
topology driven solutions, IP Over ATM address and next hop resolution,
multicasting, Ipv6 over ATM.
MODULE 6: Cryptography Introduction & Basics, Ciphers , DES, Public Key
cryptography, RAS Algorithm, Digital Watermarking, attacks and counter
measures, service authentication perform, Various Algorithms
END SEMESTER EXAM

13

CREDITS
3-0-0:3
Sem.
Contact
Exam
Hours
Marks (%)
7

15

15

15

15

20

20

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE
04 EC 6409

COURSE NAME
Digital Communication System Design

L-T-P:C
3-0-0: 3

YEAR
2015

Pre-requisites: Nil

Course Objectives:

To understand the basic structure of digital communication system and review of random variables.
To study digital modulation methods.
To develop and understanding of digital receivers
To understand the channel characteristics.
Syllabus:
Basic structure of a digital communication system, Digital modulation schemes, Optimum receivers for
AWGN channels, Digital communication through band limited channels, baseband formating and coding
techniques, baseband reception techniques.
Course Outcome:

Student will be able to:


1. Compute the bandwidth and transmission power by analyzing time and frequency domain spectra
of signal required under various modulation schemes.
2. Apply suitable modulation schemes and coding for various applications.
3. Identify and describe different techniques in modern digital communications, in particular in source
coding, modulation and detection, carrier modulation, and channel coding.
4. Analyze the performance of a baseband and pass band digital communication system in terms of
error rate and spectral efficiency.
5. Perform the time and frequency domain analysis of the signals in a digital communication system.
6. Select the blocks in a design of digital communication system
Text Books:

1. John G. Proakis&MasoudSalehi, Digital Communications," 5th Ed., McGraw Hill, 2008.


2. Rice M., Digital Communications: A Discrete-Time Approach, Prentice-Hall, 2009.
3.SimonHaykin, "Digital Communications", John Wiley, 2006.
References:

1. Tri T. Ha, Theory and Design of Digital Communication Systems, California Cambridge University Press,
2010.
2. Simon M. K., Hinedi S. M. & Lindsey W. C., Digital Communication Techniques-Signal Design and
Detection, Prentice Hall, 1995.
3. John G. Proakis&MasoudSalehi, Fundamentals of Communication Systems, Prentice Hall, 2005.

14

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE:
04 EC 6409

COURSE TITLE
Digital Communication System Design
MODULES

MODULE 1: Basic structure of a digital communication system,


communication channels and their mathematical models, Review of
random variables and some important PDFs; Bernoulli, Binomial,
Uniform, Gaussian, Rayleigh, Rician -definition, properties and
statistical averages. Random processes-Stationary processes, Gaussian
processes and White Noise processes. Mean and correlation of random
processes, power spectrum.
MODULE 2: Digital modulation schemes- Representation of digitally
modulated signals, signal space diagram, Modulation methods- Digital
PAM, Phase modulation, QAM, Mutli dimensional signaling, power
spectrum of these digitally modulated signals.
INTERNAL TEST 1 (MODULE 1 & 2)
MODULE 3: Optimum receivers for AWGN channels- Principles of
optimal detection, correlation receiver, Matched filter receiverimplementation, Error probability for band limited and power limited
signaling, Non coherent detection- basic concepts, optimal non
coherent detection of FSK modulated signals, Comparison of digital
signaling methods.
MODULE 4: Digital communication through band limited channelscharacterization, signal design, design of band limited signals for zero
ISI and controlled ISI.
Optimum receiver for channels with ISI and AWGN Optimum
Maximum likelihood receiver, Linear equalization, Decision feedback
equalization, Turbo equalization.

INTERNAL TEST 2 (MODULE 3 & 4)


MODULE 5: BASEBAND FORMATING TECHNIQUES-Sampling - Impulse
sampling, Natural Sampling, Sampler Implementation; QuantisationUniform and Non-uniform; Encoding Techniques for Analog SourcesTemporal waveform encoding, Spectral waveform encoding, Modelbased encoding, Comparison of speech encoding methods.
BASE BAND CODING TECHNIQUES -Error Control Codes - Block Codes ,
Convolutional Codes, Concept of Error Free Communication;
Classification of line codes, desirable characteristics and power spectra
of line codes
MODULE 6: BASEBAND RECEPTION TECHNIQUES:Noise in
Communication Systems; Receiving Filter - Correlator type, Matched
Filter type; Equalising Filter - Signal and system design for ISI
elimination, Implementation, Eye Pattern analysis; Synchronisation;
Detector - Maximum Likelihood Detector, Error Probability, Figure-ofMerit for Digital Detection
15

CREDITS
3-0-0:3

Contact
Hours

Sem. Exam
Marks (%)

15

15

15

15

20

20

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE
04 EC 6411

COURSE NAME
Low Power VLSI Design

L-T-P:C
3-0-0: 3

YEAR
2015

Pre-requisites: Nil

Course Objectives:

Student will be able to:

Identify sources of power in an IC.

Identify the power reduction techniques based on technology independent and technology dependent
Identify Power dissipation mechanism in various MOS logic style
Identify suitable techniques to reduce the power dissipation.
Design memory circuits with low power dissipation.
Syllabus:

Fundamentals of Low Power Circuit Design, Velocity Saturation, Impact Ionization, Hot Electron Effect,
Power Dissipation In Cmos, Power Optimization, Design Of Low Power Cmos Circuits, Power Estimation ,
Synthesis And Software Design For Low Power, software design for low power.
Course Outcome:

1. The student would be able to identify Fundamentals of Low Power Circuit

2. The student would be in a position to apply his knowledge designing Of Low Power Cmos Circuits.
Text Books:

1.Kaushik Roy and S.C.Prasad, Low power CMOS VLSI circuit design, Wiley, 2000.

2. DimitriosSoudris, ChirstianPignet, Costas Goutis, Designing CMOS Circuits for Low Power, Kluwer, 2002.
3. J.B.Kulo and J.H Lou, Low voltage CMOS VLSI Circuits, Wiley 1999.
References:

1. A.P.Chandrasekaran and R.W.Broadersen, Low power digital CMOS design, Kluwer,1995.


2. Gary Yeap, Practical low power digital VLSI design, Kluwer, 1998.

3. AbdelatifBelaouar, Mohamed.I.Elmasry, Low power digital VLSI design, Kluwer, 1995.

4. James B.Kulo, Shih-Chia Lin, Low voltage SOI CMOS VLSI devices and Circuits, John Wiley and sons, inc.
2001.
16

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE:
04 EC 6411

COURSE TITLE
Low Power VLSI Design
MODULES

MODULE 1: Fundamentals: Need for Low Power Circuit Design, Sources of


Power Dissipation Switching Power Dissipation, Short Circuit Power
Dissipation, Leakage Power Dissipation, Glitching Power Dissipation, Short
Channel Effects Drain Induced Barrier Lowering and Punch Through,
Surface Scattering, Velocity Saturation, Impact Ionization, Hot Electron
Effect
MODULE 2: Hierarchy of limits of power Sources of power consumption
Physics of power dissipation in CMOS FET devices Basic principle of low
power design
INTERNAL TEST 1 (MODULE 1 & 2)
MODULE 3:Logic level power optimization Circuit level low power design
circuit techniques for reducing power consumption in adders and
multipliers.
MODULE 4: Computer arithmetic techniques for low power system
reducing power consumption in memories low power clock, Inter connect
and layout design Advanced techniques Special techniques.
INTERNAL TEST 2 (MODULE 3 & 4)

MODULE 5:Power Estimation techniques logic power estimation


Simulation power analysis Probabilistic power analysis

MODULE 6: Synthesis for low power Behavioral level transform software


design for low power.
END SEMESTER EXAM

17

CREDITS
3-0-0:3
Sem.
Contact
Exam
Hours
Marks
(%)
7

15

15

15

15

20

20

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE
04 EC 6413

COURSE NAME
IMAGE AND VIDEO PROCESSING
SYSTEM DESIGN

L-T-P:C

3-0-0: 3

YEAR
2015

Pre-requisites: Nil

Course Objectives:

To understand the basics of digital images.

To study boundary representation and video processing of digital image.

Syllabus:

To study the image enhancement methods.

Introduction to Digital Image Processing & Applications, Image Proceesing Technique, Image Compression,
LZW coding, run length coding, Bit Plane coding, transform coding, Boundary Representation , Basic Steps Of
Video Processing, 2-D Motion Estimation.
Course Outcome:

1. The student would be able to identify the basic concepts of image and video processing.
Text Books:

1. K. Jain, Fundamentals Of Digital Image Processing, Prentice Hall Of India, 1989.


2. R. C. Gonzalez, R. E. Woods, Digital Image Processing, Pearson Education.
References:

1. Iain E Richardson, H.264 and MPEG-4 Video Compression, John Wiley & Sons, September 2003
2. M. Tekalp, Digital Video Processing, Prentice-Hall

3. Bovik, Handbook of Image & Video Processing, Academic Press, 2000


4. W. K. Pratt, Digital Image Processing, Prentice Hall

5. Rosenfeld, A. C. Kak, Digital Image Processing, vols. 1 and 2, Prentice Hall.

6. K. R. Rao, Zoran S. Bojkovic, Dragorad A. Milovanovic, Multimedia Communication Systems: Techniques,


Standards and Networks, Prentice Hall

18

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE:
04 EC 6413

COURSE TITLE
IMAGE AND VIDEO PROCESSING SYSTEM DESIGN
MODULES

MODULE 1: Introduction to Digital Image Processing &


ApplicationsElements of visual perception, Mach band effect, sampling,
quantization, basic relationship between pixels, color image
fundamentals-RGB-HSI models, image transforms - two dimensional
orthogonal and unitary transforms, separable unitary transforms, basis
images, DFT, WHT, KLT, DCT and SVD.
MODULE 2: Image Proceesing Technique
Filters in spatial and frequency domains, histogram-based processing,
homomorphic filtering, image restoration: degradation models, PSF,
circulant and block-circulant matrices, deconvolution, restoration using
inverse filtering, Wiener filtering and maximum entropy based methods,
image segmentation: pixel classification, bi-level thresholding, multilevel
thresholding, adaptive thresholding, spectral & spatial classification, edge
detection, Hough transform, region growing.
INTERNAL TEST 1 (MODULE 1 & 2)
MODULE 3: 3 Image Compression:Image Compression Image
compression fundamentals coding Redundancy, spatial and temporal
redundancy. Compression models : Lossy and Lossless, Huffmann coding,
Arithmetic coding, LZW coding, run length coding, Bit Plane coding,
transform coding, predictive coding , wavelet coding, JPEG standards.

CREDITS
3-0-0:3
Sem.
Contact
Exam
Hours
Marks (%)
7

15

15

15

15

MODULE 4: Boundary Representation

Chain codes, polygonal approximation, boundary segments, boundary


descriptors, regional descriptors, relational descriptors, object
recognition, pattern and pattern classes, recognition based on decision
theoretic methods, matching, optimum statistical classifiers, structural
methods, matching shape numbers, string methods, morphological image
processing, erosion and dilation, opening or closing, HIT or MISS
transformation, basic morphological algorithms, grey scale morphology.
INTERNAL TEST 2 (MODULE 3 & 4)

19

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

MODULE 5:Basic Steps Of Video Processing


Basic Steps of Video Processing: Analog video, Digital Video, Time varying
Image Formation models : 3D motion models, Geometric Image formation
, Photometric Image formation, sampling of video signals, filtering
operations
MODULE 6: 2-D Motion Estimation
2-D Motion Estimation: Optical flow, general methodologies, pixel based
motion estimation, Block matching algorithm, Mesh based motion
Estimation, global Motion Estimation, Region based motion estimation,
multi resolution motion estimation. Waveform based coding, Block based
transform coding, predictive coding, Application of motion estimation in
video coding for low power.
END SEMESTER EXAM

20

20

20

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE
04 EC 6415

COURSE NAME
RF SYSTEM DESIGN

L-T-P:C
3-0-0: 3

YEAR
2015

Pre-requisites: Nil

Course Objectives:

Syllabus:

To provide a review of transmission line theory


To understand RF filter design.
To study about impedance matching network.
To study about the characteristics of RF amplifiers, oscillators and mixers.

Cmos Physics, Homodyne Receiver, Heterodyne Receiver, Image reject, Transceiver Specifications And
Architectures, Transmission Line Theory , RF Filter Design , Impedance Matching Networks , PLL And
Frequency Synthesizers , RF Amplifiers, Oscillators and Mixers.
Course Outcome:

1. The student would be able to identify the basic concepts of RF filter design, impedance matching network.
Text Books:

1. Reinhold Ludwig & Powel Bretchko, RF Circuit Design Theory and Applications, 1st Ed., Pearson
Education Ltd., 2004.
2. David M. Pozzar , Microwave Engineering, 3r Ed., Wiley India, 2007.
References:
1. Mathew M. Radmanesh, Radio Frequency and Microwave Electronics, 2nd Ed. Pearson Education Asia,
2006.

2. Mathew M. Radmanesh, Advanced RF & Microwave Circuit Design-The Ultimate Guide to System
Design, Pearson Education Asia, 2009.
3. George D Vendelin ,Anthony M Pavio and Ulrich L.Rohde., Microwave Circuit Design using Linear and
Nonlinear Techniques, 2nd Ed, Wiley India,2005.
4. Ulrich L. Rohde & David P.NewKirk, RF / Microwave Circuit Design, John Wiley & Sons, 2000.
5. Davis W. Alan, Radio Frequency Circuit Design, Wiley India, 2009.
6. Christopher Bowick, John Blyer& Cheryl Ajluni RF Circuit Design, 2nd Ed., Newnes, 2007.
7. Cotter W. Sayre, Complete Wireless Design, 2nd Ed., McGraw-Hill, 2008.
8. Joseph J. Carr, RF Components and Circuits, Newnes, 2002

COURSE CODE:
21

COURSE TITLE

CREDITS

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

04 EC 6415

RF SYSTEM DESIGN
MODULES

MODULE 1: Cmos Physics, Transceiver Specifications And Architectures:


Introduction to MOSFET Physics, Noise: Thermal, shot, flicker, popcorn
noise, Two port Noise theory, Noise Figure, THD, IP2, IP3, Sensitivity,
SFDR, Phase noise - Specification distribution over a communication link,
Homodyne Receiver, Heterodyne Receiver, Image reject, Low IF Receiver
Architectures Direct up conversion Transmitter, Two step up conversion
Transmitter.
MODULE 2: Transmission Line Theory:
Review of Transmission Line Theory: Lumped Element Model, Field
Analysis of Transmission Lines, Terminated Lossless Lines, SWR, and
Impedance Mismatches. Planar Transmission-Lines: Stripline, Microstrip,
Coplanar-Line. Smith Chart: Reflection Coefficient, Load Impedance,
Impedance Transformation, Admittance Transformation, Parallel and
Series Connection. Review of S-Parameters
INTERNAL TEST 1 (MODULE 1 & 2)
MODULE 3: RF Filter Design
Overview; Basic Resonator and Filter Configuration, Special Filter
Realizations, Filter Implementations, Coupled Filter.
MODULE 4: Impedance Matching Networks
Impedance Matching using Discrete Components, Microstripline
Matching Networks, Single Stub Matching Network , Double Stub
Matching Network. Quarter-Wave Transformers, Multi-Section and
Tapered Transformers.

INTERNAL TEST 2 (MODULE 3 & 4)


MODULE 5:PLL And Frequency Synthesizers
Linearised Model, Noise properties, Phase detectors, Loop filters and
Charge pumps, IntegerN frequency synthesizers, Direct Digital Frequency
synthesizers
MODULE 6: RF Amplifiers, Oscillators and Mixers
Characteristics; Amplifier Power Relations, Stability Considerations,
Constant Gain Circles, Noise Figure Circles, Constant VSWR Circles, Low
Noise Circuits; Broadband, High Power and Multistage Amplifiers. Basic
Oscillator Model, High Frequency Oscillator Configurations, Basic
Characteristics of Mixers.
END SEMESTER EXAM

22

3-0-0:3

Contact
Hours

Sem.
Exam
Marks (%)

15

15

15

15

20

20

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE
04GN 6001

COURSE NAME
RESEARCH METHODOLOGY

L-T-P:C
0-2-0: 2

YEAR
2015

Pre-requisites: Nil

Course Objectives:

To get introduced to research philosophy and processes in general.


To formulate the research problem and prepare research plan
To apply various numerical /quantitative techniques for data analysis
To communicate the research findings effectively

Syllabus:

Introduction to the Concepts of Research Methodology, Research Proposals, Research Design, Data
Collection and Analysis, Quantitative Techniques and Mathematical Modeling, Report Writing
Course Outcome:

Students who successfully complete this course would learn the fundamental concepts of Research
Methodology, apply the basic aspects of the Research methodology to formulate a research problem and its
plan. They would also be able to deploy numerical/.quantitative techniques for data analysis. They would
be equipped with good technical writing and presentation skills.
Text Books: 1. Research Methodology: Methods and Techniques, by Dr. C. R. Kothari, New Age
International Publisher, 2004.

2. Research Methodology: A Step by Step Guide for Beginners by Ranjit Kumar, SAGE Publications Ltd;
Third Edition
Reference Books:

1 Research Methodology: An Introduction for Science & Engineering Students, by Stuart Melville and
Wayne Goddard, Juta and Company Ltd, 2004

2. Research Methodology: An Introduction by Wayne Goddard and Stuart Melville, Juta and Company
Ltd, 2004
3.
4.

Research Methodology, G.C. Ramamurthy, Dream Tech Press, New Delhi

Management Research Methodology by K. N. Krishnaswamy et al, Person Education.

23

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE:
04GN 6001

COURSE TITLE
RESEARCH METHODOLOGY
MODULES

MODULE 1: Introduction to Research Methodology, Concepts of


Research, Meaning and Objectives of Research, Research Process, Types
of Research, Type of research: Descriptive vs. Analytical, Applied vs.
Fundamental, Quantitative vs. Qualitative, and Conceptual vs. Empirical,
.
MODULE 2: Criteria of Good Research, Research Problem, Selection of a
problem, Techniques involved in definition of a problem, Research
Proposals Types, contents, Ethical aspects, IPR issues like patenting,
copyrights.
INTERNAL TEST 1 (MODULE 1 & 2)
MODULE 3: Meaning, Need and Types of research design, Literature
Survey and Review, Identifying gap areas from literature review,
Research Design Process, Sampling fundamentals, Measurement and
scaling techniques, Data Collection concept, types and methods,
Design of Experiments.
MODULE 4: Probability distributions, Fundamentals of Statistical
analysis, Data Analysis with Statistical Packages, Multivariate methods,
Concepts of correlation and regression, Fundamentals of time series
analysis and spectral analysis
INTERNAL TEST 2 (MODULE 3 & 4)
MODULE 5:Principles of Thesis Writing, Guidelines for writing reports &
papers, Methods of giving references and appendices, Reproduction of
published material, Plagiarism, Citation and acknowledgement,
MODULE 6: Documentation and presentation tools LATEX, Office
Software with basic presentations skills, Use of Internet and advanced
search techniques,
END SEMESTER EXAM

24

CREDITS
0-2-0:2

Contact
Hours

Sem.
Exam
Marks
(%)

15

15

15

15

20

20

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE
04 EC 6491

COURSE NAME
SEMINAR

L-T-P:C
0-0-2: 2

YEAR
2015

Each student shall present a seminar on any topic of interest related to the core / elective courses offered in
the first semester of the M. Tech. Programme. He / she shall select the topic based on the References: from
international journals of repute, preferably IEEE journals. They should get the paper approved by the
Programme Co-ordinator / Faculty member in charge of the seminar and shall present it in the class. Every
student shall participate in the seminar. The students should undertake a detailed study on the topic and
submit a report at the end of the semester. Marks will be awarded based on the topic, presentation,
participation in the seminar and the report submitted.

04 EC 6493

COURSE NAME
ELECTRONIC SYSTEM DESIGN LAB-I

L-T-P:C
0-0-2: 1

YEAR
2015

Objectives:

To simulate experiments based on the core courses and the elective courses opted by the student in the first
semester.
Tools: Xilinx, MATLAB, PSPICE and SPARTAN 3E Kit
Experiments:-

1. Simulation of CMOS Inverter, NAND and NOR Gates.

2. Simulation of NMOS Inverter, NAND and NOR Gates.

3. Transfer Characteristics of CMOS Inverter using PSICE

4. Transfer Characteristics of NMOS Inverter using PSPICE


5. System design using PIC Microcontroller.

6. Modelling of Sequential Digital System using VHDL.


7. Design and implementation of ALU using FPGA
8. Modelling of Sequential System using Verilog.

25

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE
04 EC 6402

COURSE NAME

System Design For Electromagnetic Compatibility

L-T-P:C

3-1-0: 4

YEAR
2015

Pre-requisites: Nil
Course Objectives:

To study the electromagnetic compatibility for electronic systems.


To understand different coupling methods and grounding.
To study about balancing, filtering and scheduling.
To understand the effect of circuit noise and radiation.

Syllabus:
Introduction to Electromagnetic Compatibility, Aspects of EMC; electrical dimensions and waves,Non ideal
behaviour of components: wires; PCB lands; effect of component leads,Cabling,capacitive coupling, inductive
coupling, Grounding, Balancing and Filtering, Shielding, Frequency Vs. time domain; analog Vs. digital circuits
Course Outcome:

To design a EMI free system


To reduce system level crosstalk
To design high speed Printed Circuit board with minimum interference
To make our world free from unwanted electromagnetic environment

Text Books:

1. Clayton R. Paul, Introduction to Electromagnetic Compatibility, 2nd Ed., Wiley India Pvt. Ltd.,
2011.
2. Henry W. Ott, Electromagnetic Compatibility Engineering, John Wiley and Sons Inc., 2009.
References:

1. Henry W. Ott, Noise Reduction Techniques in Electronic Systems, 2nd Ed., Wiley, 1998.
2. Prasad Kodali V., Engineering Electromagnetic Compatibility: Principles, Measurements,
Technologies and Computer Models, 2nd Ed., Wiley India Pvt. Ltd, 2010.
3. David Morgan, Handbook of EMC Testing and Measurements, IET Electrical Measurement Series, 1994

26

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

SEMESTER II

COURSE PLAN

COURSE CODE:

COURSE TITLE

04 EC 6402

System Design For Electromagnetic Compatibility


MODULES

MODULE 1: INTRODUCTION TO ELECTROMAGNETICCOMPATIBILITY

Aspects of EMC; electrical dimensions and waves; EMC units and


specifications; EMC requirements for electronic systems; radiated
emissions and conducted emissions; additional product requirements;
advantages of EMC design.Non ideal behaviour of components: wires; PCB
lands; effect of component leads; resistors; capacitors; inductors;
ferromagnetic materials; ferrite beads; common-mode chokes;
electromechanical devices; mechanical switches.

CREDITS
3-1-0: 4

Contact
Hours

Sem.
Exam
Marks (%)

15

15

15

15

10

15

MODULE 2: CABLING

Cabling: capacitive coupling; effect of shield on capacitive coupling;


inductive coupling; effect of shield on magnetic coupling; shielding to
prevent magnetic radiations; common impedance shield coupling; shield
transfer impedance; braided shields; spiral shields; shield terminations;
types of cables..
MODULE 3: GROUNDING

INTERNAL TEST 1 (MODULE 1 & 2)

Grounding :ac power distribution safety grounds; signal grounds;


equipment / system grounding; ground loops; low and high frequency
analysis of common-mode chokes; single ground reference for a circuit
MODULE 4 : BALANCING AND FILTERING

Balancing and Filtering: power supply decoupling; decoupling filters;


amplifier decoupling; driving capacitive loads; high frequency filtering;
system bandwidth; modulation and coding
MODULE 5: SHIELDING

INTERNAL TEST 2 (MODULE 3 & 4)

Shielding: near fields and far fields; characteristic and wave impedance;
shielding effectiveness; absorption loss; reflection loss; composite
absorption and reflection loss; shielding with magnetic materials;
grounding of shields.
27

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

MODULE 6 : DIGITAL CIRCUIT NOISE AND RADIATION

Frequency Vs. time domain; analog Vs. digital circuits; digital logic noise;
internal noise sources; digital circuit ground noise; power distribution;
noise voltage; differential-mode radiation; controlling differential-mode
radiation; common-mode radiation; controlling common-mode radiations

10

15

END SEMESTER EXAM

28

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE
04 EC 6404

COURSE NAME

Advanced Microprocessor and Microcontroller

L-T-P:C

3-0-0: 3

YEAR
2015

Pre-requisites: Nil
Course Objectives:

To expose the students to the fundamentals of microprocessor architecture.


To introduce the advanced features in microprocessors and microcontrollers.
To enable the students to understand various microcontroller architectures
Syllabus:

Microprocessor Architecture, Instruction Set Data formats Addressing modes Memory hierarchy, High
Performance CISC Architecture Pentium,
CPU Architecture- Bus Operations Pipelining ,
HighPerformance RISC Architecture ARM, Organization of CPU Bus architecture , MOTOROLA 68HC11
Microcontrollers Instruction set addressing modes , PIC Microcontroller- CPU Architecture Instruction set
interrupts- Timers
Course Outcome:

Student will be able:


To get a detailed knowledge about the microprocessor and microcontroller.
To get an idea about instruction sets and addressing modes of microcontrollers to write programs.
To make a detailed knowledge about ARM Processor and PIC microcontroller
Text Books:
1. Daniel Tabak , Advanced Microprocessors McGraw Hill.Inc., 1995

2. James L. Antonakos , The Pentium Microprocessor Pearson Education , 1997.


References:

1.SteveFurber , ARM System On Chip architecture Addision Wesley , 2000.


2. Gene .H.Miller . Micro Computer Engineering , Pearson Education , 2003.
3. John .B.Peatman , Design with PIC Microcontroller , Prentice hall, 1997
4. James L.Antonakos , An Introduction to the Intel family of Microprocessors Pearson Education 1999.
5. Barry.B.Breg, The Intel Microprocessors Architecture , Programming and Interfacing , PHI,2002.
6. Steve Heath Embedded Systems Design, 2 Edition, Elsevier,
2008.
7. Arnold S. Berger, Embedded Systems Design-An Introduction to Processes, Tools, & Techniques, CMP
Books, 2005.
8. Valvano "Embedded Microcomputer Systems" Thomson Asia PVT LTD first reprint 2001. Readings
Readings: Web links www.ocw.nit.edu www.arm.com

29

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE:
04 EC 6404

COURSE PLAN

COURSE TITLE
Advanced Microprocessors and Microcontrollers
MODULES

MODULE 1 : MICROPROCESSOR ARCHITECTURE

Instruction Set Data formats Addressing modes Memory hierarchy


register file Cache Virtual memory and paging Segmentationpipelining the instruction pipeline pipeline hazards instruction level
parallelism reduced instruction set Computer principles RISC versus
CISC

CREDITS
3-0-0: 3
Sem.
Contact
Exam
Hours
Marks (%)

15

15

15

15

Instruction set addressing modes operating modes- Interrupt systemRTC-Serial Communication Interface A/D Converter PWM and UART.

20

CPU Architecture Instruction set interrupts- Timers- I 2C Interfacing


UART- A/D Converter PWM and introduction to C-Compilers

20

MODULE 2: HIGH PERFORMANCE CISC ARCHITECTURE PENTIUM

CPU Architecture- Bus Operations Pipelining Brach predication


floating point unit- Operating Modes Paging Multitasking Exception
and Interrupts Instruction set addressing modes Programming the
Pentium processor.
INTERNAL TEST 1 (MODULE 1 & 2)
MODULE 3: HIGH PERFORMANCE RISC ARCHITECTURE ARM

Organization of CPU Bus architecture Memory management unit ARM instruction set- Thumb Instruction set- addressing modes
Programming the ARM processor
MODULE 4 : ARM INTERRUPT HANDLING SCHEMES

Exception Handling, Interrupts, Interrupt Handling schemes, Firmware,


Embedded Operating Systems, Caches-Cache Architecture, Cache Policy,
Introduction to DSP on the ARM,DSP on the ARMT1DMI, ARM9TDMI,
Strong ARM, ARM9E, ARM IOE
INTERNAL TEST 2 (MODULE 3 & 4)
MODULE 5: MOTOROLA 68HC11 MICROCONTROLLERS

MODULE 6 : PIC MICROCONTROLLER

END SEMESTER EXAM

30

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE
04 EC 6406

COURSE NAME

High Speed Digital System Design

L-T-P:C

3-0-0: 3

YEAR
2015

Pre-requisites: Nil

Course Objectives:

To learn the characteristics of transmission line.


To develop a basic understanding about cross talk.

Syllabus:

Introduction to High Speed Digital Design, Frequency and time, Time and Distance , Transmission lines,
problems in ordinary point to point wiring, infinite uniform transmission line , Signallingconvention and
circuits, Signalling modes for transmission lines , Cross talk , Clock , Timing convention andsynchronisation
Timing fundamentals
Course Outcome:

Student will be able to:


Design least cross talk Transmission lines
Solve the existing problems in wiring
Text Books:

1. Howard Johnson & Martin Graham, High Speed Digital Design: A Handbook of Black Magic, Prentice Hall,
1993.
2. Jan M. Rabaey, AnanthaChandrakasan&BorivojeNikolic, Digital Integrated Circuits: A Design Perspective,
2nd Ed. Pearson Education Asia, 2007.
References:
1. K.C Chang, Digital Systems Design with VHDL and Synthesis: An Integrated Approach, Wiley India ,2010.
2. William S. Dally & John W. Poulton, Digital Systems Engineering, Cambridge University Press, 2008.

31

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE:
04 EC 6406

COURSE PLAN

COURSE TITLE
High Speed Digital System Design
MODULES

MODULE : 1 Introduction to High Speed Digital Design

Frequency and time, Time and Distance; lumped vs distributed systems,


kinds of reactance, ordinary capacitance, ordinary inductance, mutual
capacitance, mutual inductance, power, speed
MODULE : 2 Transmission lines
Transmission lines, problems in ordinary point to point wiring, infinite
uniform transmission line, ideal distortion less, lossless transmission line,
lossy transmission line, low loss transmission line, RC transmission line,
skin effect, proximity effect, dielectric loss

CREDITS
3-0-0: 3

Contact
Hours

Sem. Exam
Marks (%)

15

15

15

15

15

15

INTERNAL TEST 1 (MODULE 1 & 2)


MODULE : 3 Signalling convention and circuits

Signalling modes for transmission lines -signalling over lumped


transmission media - signalling over RC interconnect - driving lossy LC
lines - simultaneous bi-directional signalling - terminations - transmitter
and receiver circuits
MODULE : 4 Cross talk

High speed current follows the path of least inductance, crosstalk in


solid ground planes, crosstalk in slotted ground planes, crosstalk in cross
hatched ground planes, crosstalk with power and ground fingers, Guard
traces, near end and far end crosstalk
INTERNAL TEST 2 (MODULE 3 & 4)
MODULE : 5 Clock

Timing margin, clock skew, using low impedance drivers, using low
impedance clock distribution lines, source termination of multiple clock
lines, controlling crosstalk on clock lines, delay adjustments, clock jitter
MODULE : 6 Timing convention and synchronisation Timing
fundamentals

Timing properties of clocked storage elements - signals and events -open


loop timing level sensitive clocking - pipeline timing - closed loop timing clock distribution - synchronization failure and metastability
END SEMESTER EXAM

32

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE
04 EC 6408

COURSE NAME

Optical Communication System

L-T-P:C

3-0-0: 3

YEAR
2015

Pre-requisites: Nil
Course Objectives:

To develop and understanding of optical fiber system components and design considerations.
To develop a basic understanding of telecommunication networks and digital optical ciber
communication systems.
Syllabus:

Review of Fiber Optic Communication Systems, Fibre optic types and parameters, Fibre optic types and
parameters, Fiber Optic System Design Considerations and Components, Optical Fiber Communication
System, Advanced Multiplexing Strategies , Optical Networking
Course Outcome:

Student will be able to

Recognize and classify the structures of Optical fiber and types.

Analyze various coupling losses.

Discuss the channel impairments like losses and dispersion.

Classify the Optical sources and detectors and to discuss their principle.
Familiar with Design considerations of fiber optic systems.

Text Books:

1. John Senior, Optical Fiber Communications: Principles and Practice, 3rd Ed., Prentice Hall, 2008.
2. Govind P .Agarwal , Fibre Optic Communcation Systems ,3 rd Ed.,Wiely 2013
References:

Optical Society of America, Fiber Optics Handbook: Fiber, Devices, and Systems for Optical
Communications, McGraw Hill, 2001.
2. Iizuka K., Elements of Photonics, Volume II, Wiley, 2002.
3. Shieh W., &Djordjevic I., OFDM for Optical Communications, Elsevier, 2009.
4. Javier Aracil, Enabling Optical Internet with Advanced Network Technologies, Springer, 2009.
5. MasatakaNakazawa, High Spectral Density Optical Communication Technologies, Springer, 2010.

33

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE:
04 EC 6408

COURSE PLAN

COURSE TITLE
Optical Communication System
MODULES

MODULE : 1 REVIEW OF FIBER OPTIC COMMUNICATION SYSTEMS

Evolution, Benefits and Disadvantages of Fiber Optics, Transmission


Windows, Transmission through Optical Fiber, The Numerical Aperture
(NA), The Optical Fiber, Types of Fiber, Different Losses and Issues in
Fiber Optics
MODULE : 2 FIBRE OPTIC TYPES AND PARAMETERS

Attenuation, Dispersion, Connectors and Splices, Bending Loses,


Absorption, Scattering, Very Low Loss Materials, Plastic and PolymerClad-Silica Fibers, Wave Propagation in Step Index and Graded Index
Fiber, Fiber Dispersion, Single Mode Fibers, Multimode Fibers,
Dispersion Shifted Fiber, Dispersion Flattened Fiber, Polarization, CutOff Condition and V-Parameter. Light Sources and Transmitters,
Detectors and Receivers.
INTERNAL TEST 1 (MODULE 1 & 2)
MODULE : 3 FIBER OPTIC SYSTEM DESIGN CONSIDERATIONS AND
COMPONENTS

Indoor Cables, Outdoor Cables, Cabling Example, Power Budget,


Bandwidth and Rise Time Budgets, Electrical and Optical Bandwidth,
Connectors, Fiber Optic Couplers.
MODULE : 4
OPTICAL FIBER COMMUNICATION SYSTEM
Telecommunication, Local Distribution Series, Computer Networks,
Local Data Transmission, Digital Optical Fiber Communication System,
First and Second-Generation System, Future Systems. Noise Sources,
Channel Impairments, and Optical Transmission System Design.
INTERNAL TEST 2 (MODULE 3 & 4)
MODULE : 5 ADVANCED MULTIPLEXING STRATEGIES
Optical TDM, Subscriber Multiplexing (SCM), WDM and Hybrid
Multiplexing Methods; Network Element Technology: (D)WDM
Technology; Gratings, Filters, Passive and Active Devices, Signal
Processors, Gain Equalizer, Power Splitter, Combiner, Coupler, Optical
Switching and Routing; Space, Time, and Wavelength Granularity, Add
/ Drop Mux, Advanced Optical Signal Processing, Functions of Photonic
Integrated Circuits, Advanced Modulation Formats, OFDM, Polarization
Multiplexing, Constrained Coding, and Coherent Detection
MODULE : 6 OPTICAL NETWORKING

Data Communication Networks, Network Topologies, MAC Protocols,


Network Architecture: SONET / TDH, Optical Transport Network,
34

Contact
Hours

CREDITS
3-0-0: 3

Sem. Exam
Marks (%)

15

15

15

15

20

20

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

Optical Access Network, Optical Premise Network. Broadcast and


Select WDM Concepts, Wavelength Routed Protocols, Performance of
WDM + EDFA Systems, Solitons, Optical CDMA, Introduction to IP Over
WDM, Optical Packet Switching, Optical Burst Switching, Optical Switch
Fabrics OSFs and their Application.
END SEMESTER EXAM

35

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE
04 EC 6412

COURSE NAME

INTRODUCTION TO RF MICROELECTRONICS

L-T-P:C

3-0-0: 3

YEAR
2015

Pre-requisites: Nil
Course Objective:
To provide an overview of passive components and lumped elements circuits.
To understand the fabrication of microwave integrated circuits.
To study about various planar transmission lines.
Syllabus

Passive Components,Lumped Element Circuits, Introduction - Materials, Mask layout, Mask fabrication,
Printed Circuit Boards, Thin Film Technology, Thick film Technology, Introduction to Planar Transmission
Line, PLLS, Various RF synthesizer architectures and frequency dividers, Power Amplifiers design.
Course Outcome

Student will be able:


To get a detailed knowledge about the RF components and circuits.
To get an idea about PCB fabrication.
To make a detailed knowledge about RFIC and MMIC Design and Technology.
Text Books:

1. Frank Ellinger, Radio Frequency Integrated Circuits and Technologies, Springer, 2007.
2. Inder Bahl, Lumped Elements for RF and Microwave Circuits, Artech House, 2003.
References:

1. Gupta K. C. &Amarjit Singh, Microwave Integrated Circuits" John Wiley & Sons, 1975.

2. Hoffman R. K., Handbook of Microwave Integrated Circuits, Artech House Publishers, 1987.

3. I.D Robertson,C .Lucyszyn., RFIC and MMIC Design and Technology, The Institution of Engineering and
Technology,2001.
4. Leo G. Maloratsky, Passive RF & Microwave Integrated Circuits, Elsevier, 2004.
5. Joseph J. Carr, RF Components and Circuits, Newnes, 2002.
6. B.Razavi, RF Microelectronics, Prentice-Hall PTR,1998.

36

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE PLAN
COURSE NO:

COURSE TITLE:

04 EC 6412

INTRODUCTION TO RF MICROELECTRONICS
MODULES

MODULE 1 : PASSIVE COMPONENTS

Introduction, Inductors- printed inductors, wire inductors resistors,


capacitors, Monolithic capacitors, inter digital capacitors Via holes and
grounding.(No detailed analysis required)
MODULE 2: LUMPED ELEMENT CIRCUITS

Passive Circuits-filters, Hybrids and Couplers, Power dividers/ Combiners,


Matching Networks, Lumped Elements for biasing circuit ,Phase Shifters,
Digital Attenuators.( No detailed analysis required)

CREDITS:
3-0-0: 3

Contact
hours

Sem. Exam
Marks;%

15

15

15

15

20

20

FIRST INTERNAL TEST

MODULE3:
MICROWAVE
INTEGRATED
CIRCUIT
FABRICATION
TECHNOLOGY
Introduction - Materials, Mask layout, Mask fabrication, Printed Circuit
Boards- PCB Fabrication, PCB Inductors. Microwave Printed Circuits - MPC
fabrication.
MODULE 4 : HYBRID INTEGRATED CIRCUITS

Thin Film Technology, Thick film Technology- Coirfed Ceramic and Glass
ceramic Technology. MMIC Fabrication, Steps Involved in the Fabrication of
MOSFET, CMOS Fabrication, Micromachining fabrication.
SECOND INTERNAL TEST

MODULE 5 :MICROSTRIP OVERVIEW Introduction to Planar Transmission


Line, Various types of planar transmission lines. Analysis of
MicrostripLines,Losses in microstrip lines, Introduction to Slotline and
Coupled lines.
MODULE 6 : RADIO FREQUENCY SYNTHESIZES PLLS, Various RF
synthesizer architectures and frequency dividers, Power Amplifiers design.
Linearization techniques, Design issues in integrated RF filters.

37

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE
04 EC 6414

COURSE NAME

CONCEPTS OF SPEECH AND AUDIO PROCESSING SYSTEM

L-T-P: C

3-0-0:3

YEAR
2015

Pre-requisites: Nil
Course Objectives:

To provide an overview of signal propagation from different audio sources.


To understand audio encoding systems.
To study about real time audio processing

Syllabus:

Waves, Waveguides and Environmental Characteristics - Time Domain Methods - Short Time Fourier Analysis
- a Voice and Audio Encoding System - Formulation of Linear Prediction problem in Time Domain - Sampling,
Time Resolution, Buffering, Latency and Jitter.
Course Outcome:
Text Books:

1. Thomas F. Quatieri, Discrete-Time Speech Signal Processing, Pearson Education, 2004.


2. Nelson Morgan & Ben Gold, Speech and Audio Signal Processing: Processing and Perception of
Speech and Music 1999.

References:

1. Apte, Speech and Audio Processing,Wielyindia.


2. Martin Russ, Sound Synthesis and Sampling, Focal Press, Elsevier, 2004.
3. John Watkinson, The Art of Digital Audio, Focal Press, Elsevier, 2001.

4. Deller J. R., Hansen J. H. L. &Proakis J. G., Discrete Time Processing of Speech Signals, John Wiley,
IEEE Press, 1999.
5. Kirk R. & Hunt A. Digital Sound Processing for Music and Multimedia, Focal Press, 1999.
6. Eargle J. H. Music Sound and Technology, Van Nostrand Reinhold, 1995.

7. Vijay Madisetti, Video, Speech, and Audio Signal Processing and Associated Standards, CRC Press,
2009.

38

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE:
04 EC 6414

COURSE PLAN

COURSE TITLE
CONCEPTS OF SPEECH AND AUDIO PROCESSING
SYSTEM

CREDITS
3-0-0:3

MODULES

Contact
Hours

Sem.
Exam
Marks (%)

Waves, Waveguides and Environmental Characteristics. Human Speech


and Hearing: Human Speech Generation Mechanism, Speech Signal
Characteristics. Human Hearing System: Ear, Auditory Physiology, Human
Hearing Characteristics, Psychophysics, Perceptual Issues, Auditory Scene
Analysis

15

15

15

15

20

MODULE : 1

MODULE : 2

Time Domain Methods - Time Domain Parameters of Speech and Music


Signal, Methods for Extracting the Parameters: Energy, Average
Magnitude, Zero Crossing Rate. Silence Discrimination using ZCR and
Energy, Short Time Auto Correlation Function, Pitch Period Estimation
using Auto Correlation Function.
MODULE : 3

INTERNAL TEST 1 (MODULE 1 & 2)

Short Time Fourier Analysis: Fourier Transform and Linear Filtering


Interpretations, Sampling Rates, Spectrographic Displays, Pitch and
Formant Extraction, Analysis by Synthesis, Analysis-Synthesis Systems:
Phase Vocoder, Channel Vocoder, Homomorphic Speech Analysis:
Cepstral Analysis of Speech, Formant and Pitch Estimation,
HomomorphicVocoder, Spectral Modelling of Music Signals, Sinusoidal
Plus Residual Modelling of Music Signals, Extraction of Perceptual
Attributes of Music Signals, Music Applications Based on Audio
Processing.
MODULE : 4
General Block Diagram of a Voice and Audio Encoding System; Human
Auditory System: Application to Voice and Audio Encoding. Analysis of
Audio and of Music; Predictive Encoding, Discrete Cosine Transform, SubBand Analysis, Bit Localization Strategies, Rate / Distortion Techniques,
Encoding in The Time Domain, PCM Encoding, Predictive Encoding,
Encoding in the Frequency Domain; MPEG-1 Audio, MPEG-2 Audio and
MPEG-2 AAC, MPEG-4 Audio, Dolby AC-3 Audio; Applications: Voice over
IP.
INTERNAL TEST 2 (MODULE 3 & 4)
MODULE : 5
Formulation of Linear Prediction problem in Time Domain Basic Principle
39

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

Auto correlation method Covariance method Solution of LPC


equations Cholesky method Durbins Recursive algorithm lattice
formation and solutions Comparison of different methods Application
of LPC parameters Pitch detection using LPC parameters Formant
analysis VELP CELP
MODULE : 6

Sampling, Time Resolution, Buffering, Latency and Jitter; Synchronous Vs.


Asynchronous Models in the Generation and Processing of Real Time
Interactive Sound; Aspects of Control and of Mapping; Visual Data Flow"Type Programming Languages for Real Time Audio; Communication
Protocols (MIDI, UDP Vs. TCP, OSC); Music Analysis & Recognition:
Transcription, Summarization, and Similarity; Sound Mixtures and
Separation: CASA, ICA, and Model-Based Separation.

20

END SEMESTER EXAM

40

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE
04 EC 6416

COURSE NAME

ARTIFICIAL INTELLIGENCE AND


OPTIMIZATION TECHNIQUES

L-T-P:C

3-0-0:3

YEAR
2015

Pre-requisites: Nil
Course Objectives:

1. To present main rules underlying in these techniques.


2. To present selected case-studies.
3. To adopt these techniques in solving problems in the real world.

Syllabus:
Course Outcome:

1. An understanding of the fundamental Computational Intelligence models


2. Understanding the concepts of neural networks, genetic algorithms, fuzzy neural networks, and
ant colony optimization algorithms
3. Application of computational Intelligence techniques to classification, pattern recognition,
prediction, rule extraction, and optimization problems.

Text Books:

1. Christopher M. Bishop, Neural Networks for Pattern Recognition, Oxford University Press

2. NelloCristianini, John Shawe-Taylor, "An Introduction to Support Vector Machines and Other
Kernel-based Learning Methods,Cambridge University Press.

References:

1. Jyh-Shing Roger Jang, Chuen-Tsai Sun,EijiMizutani, Neuro-fuzzy


2. soft computing: a computational approach to learning and machine intelligence, Prentice Hall of
India, New Delhi.
3. H.J. Zimmermann, Fuzzy Set Theory and its Applications, Springer.
4. David E. Goldberg, Genetic Algorithms in search, Optimization & Machine Learning, Pearson
Education.
5. Kenneth A DeJong,Evolutionary Computation A Unified Approach, Prentice Hall of India, New
Delhi. 8. Marco Dorigo and Thomas Stutzle, Ant Colony optimization, Prentice Hall of India, New
Delhi.
6. N P Padhy, Artificial Intelligence and Intelligent Systems, Oxford University Press, 2005
7. Engelbrecht, A.P. Fundamentals of Computational Swarm Intelligence, Wiley.

41

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE:
04 EC 6416

COURSE PLAN

COURSE TITLE

ARTIFICIAL INTELLIGENCE AND OPTIMIZATION


TECHNIQUES

CREDITS
3-0-0:3

MODULES

Contact
Hours

Sem. Exam
Marks (%)

Neural Networks: Back Propagation Network, generalized delta rule,


Radial Basis Function Network, interpolation and approximation RBFNS,
comparison between RBFN and BPN, Support Vector Machines : Optimal
hyperplane for linearly separable patterns, optimal hyperplane for nonlinearly separable patterns, Inverse Modeling

15

15

Evolutionary Computation (EC) Features of EC Classification of EC


Advantages Applications

15

Introduction Biological Background Operators in GA-GA Algorithm


Classification of GA Applications
INTERNAL TEST 2 (MODULE 3 & 4)
MODULE : 5

15

20

20

MODULE : 1

MODULE : 2

Fuzzy Logic System: Basic of fuzzy logic theory , crisp and fuzzy sets,
Basic set operation like union , interaction , complement , T-norm , Tconorm , composition of fuzzy relations, fuzzy if-then rules , fuzzy
reasoning, Neuro-Fuzzy Modeling: Adaptive Neuro-Fuzzy Inference
System (ANFIS) , ANFIS architecture , Hybrid Learning Algorithm.
MODULE : 3

INTERNAL TEST 1 (MODULE 1 & 2)

MODULE : 4

Ant Colony Optimization: Introduction From real to artificial antsTheoretical considerations Convergence proofs ACO Algorithm ACO
and model based search Application principles of ACO.
MODULE : 6

Particle Swarm Optimization: Introduction Principles of bird flocking


and fish schooling Evolution of PSO Operating principles PSO
Algorithm Neighborhood Topologies Convergence criteria
Applications of PSO, Honey Bee Social Foraging Algorithms, Bacterial
Foraging Optimization Algorithm.
42

END SEMESTER EXAM

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE
04 EC 6418

COURSE NAME

RF Components and Circuit Design

L-T-P:C

3-0-0: 3

YEAR
2015

Pre-requisites: Nil
Course Objectives:

To provide a thorough knowledge about passive and active RF components.


To study the modeling of active RF components.
To understand different microwave control components.

Syllabus:

Passive RF Components, Importance of RF Design, Dimensions and units, frequency spectrum, RF Behaviour
of Passive Components, Active RF Components, RF Diodes - Schottky Diode, PIN Diode, Varactor Diode,
Active RF Components Modelling, Non Linear Diode Model, Linear Diode Model, Transistor Models,
Microwave Control Components, Switches, PIN Diode Switches, RF Amplifier Characterisitics, oscillators,
mixers & applications.
Course Outcome:

Students should be able to:

1. Analyze RF circuits networks and behavior

2. Model RF components with their matching and biasing networks


3. Design Microwave amplifiers

4. Design RF Oscillators and Mixers


Text Books:

. Reinhold Ludwig & Powel Bretchko, RF Circuit Design Theory and Applications, 2nd Ed., Prentice Hall
Ltd., 2008.
2. W. Alan Davis, K. K Agarwal, Radio Frequency Circuit Design,Wiely India,2009
References:

1. Misra., Radio Frequency &Microwave Communication Circuits: Analysis &Design, Wiley India ,
2. Sorrentino R. & Bianchi G., Microwave and RF Engineering, John Wiley, 2010.
43

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

3. Samuel y Liao, Microwave Devices and Circuits, 3rd Pearson Education,2003


4. Coleman C., An introduction to Radio
Frequency Engineering, Cambridge, 2004.
5. David M. Pozzar , Microwave Engineering, 3rd Ed., Wiley India, 2007.
6. InderBahl, Lumped Elements for RF and Microwave Circuits, Artech House, 2003.
7. Joseph J. Carr, RF Components and Circuits, Newnes, 2002.
8. Guillermo Gonzalez, Microwave Transistor Amplifiers: Analysis and Design, Prentice Hall, 1997.
9. InderBahl, Fundamentals of RF and Microwave Transistor Amplifiers, John Wiley & Sons, 2009.
10. T.Yitterda, l Y.Cheng, T.Fjeldly, Device modeling for Analog and RF CMOS circuit Design, John Wiley
&Sons,2003

COURSE CODE:
04 EC 6418

COURSE PLAN

COURSE TITLE
RF Components and Circuit Design
MODULES

Module 1: Passive RF Components


Introduction: Importance of RF Design, Dimensions and units, frequency
spectrum, RF Behaviour of Passive Components: High frequency
resistors, capacitors and inductors ,Chip Components and Circuit Board
Considerations: Chip resistors, chip capacitors and surface mounted
inductors

CREDITS
3-0-0: 3

Contact
Hours

Sem. Exam
Marks (%)

15

15

15

15

Module 2: Active RF Components

RF Diodes - Schottky Diode, PIN Diode, Varactor Diode, IMPATT,


TRAPATT, BARRIT and Gunn Diodes, Tunnel Diode, Noise Diode, Snap
Diode. Microwave Transistor Issues: Silicon Vs. GaAs. Noise Sources, SParameters, Noise Figure Parameters. RF Field Effect Transistors, High
Mobility Transistors.
INTERNAL TEST 1 (MODULE 1 & 2)
Module 3: Active RF Components Modelling

Diode Models: Non Linear Diode Model, Linear Diode Model. Transistor
Models: Large Signal BJT Models, Small Signal BJT Models, Large Signal
FET Models, Small Signal FET Models. Scattering Parameter Device
Characterization
Module 4: Microwave Control Components
Introduction; Switches: PIN Diode Switches, FET Switches, MEMS
Switches, Alternative Multi Port Switch Structure. Variable Attenuators,
Phase Shifters: True Relay and Slow Wave Phase Shifters, Reflection
Phase Shifters, Stepped Phase Shifters, Binary Phase Shifters.
INTERNAL TEST 2 (MODULE 3 & 4)

44

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

MODULE : 5 RF AMPLIFIER DESIGNS

Characteristics, amplifier power relations, stability considerations,


constant gain circles, constant VSWR circles, low noise circles
broadband, high power and multistage amplifiers
MODULE : 6 OSCILLATORS, MIXERS & APPLICATIONS

Basic oscillator model, High Frequency oscillator configuration, basic


characteristic of mixers, wireless synthesizers, phase locked loops,
detector and demodulator circuits.
END SEMESTER EXAM

45

20

20

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE
04 EC 6422

COURSE NAME

Aspects of MIMO Communication


System

L-T-P:C

3-0-0: 3

YEAR
2015

Pre-requisites: Nil

Course Objectives:

To study the information theoretic aspects of MIMO.


To understand space time block codes and space time trells codes.

Syllabus:

Information Theoretic aspects of MIMO, Review of SISO fading communication channels, MIMO channel
models, MIMO Diversity and Spatial Multiplexing sources and types of diversity, analysis under Rayleigh
fading, Diversity and channel knowledge,Space time block codes on real and complex orthogonal designs ,
Code design criteria for quasi-static channels, Space Time Trellis Codes, Representation of STTC, shift
register, generator matrix, state-transition diagram, trellis diagram, Space time block codes on real and
complex orthogonal designs, Space Time Trellis Codes
Representation of STTC
Course Outcome:

The student will be able to Understand:


The concepts of Channel modeling and propagation

MIMO Capacity, space-time coding and MIMO receivers,

MIMO for multi-carrier systems, multi-user communications, multi-user MIMO


Introduction to cooperative and coordinated multi-cell MIMO

Text Books:

1. David Tse and PramodViswanath, Fundamentals of Wireless Communication, Cambridge University


Press 2005
2. Hamid Jafarkhani, Space-Time Coding: Theory and Practice, Cambridge University Press 2005
2005
References:

1. Paulraj, R. Nabar and D. Gore, Introduction to Space-Time Wireless Communications, Cambridge


University Press 2003
2. E.G. Larsson and P. Stoica, Space-Time Block Coding for Wireless Communications, Cambridge University
Press 2008
3. EzioBiglieri, Robert Calderbank et al MIMO Wireless Communications Cambridge University Press 2007
46

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE:
04 EC 6422

COURSE PLAN

COURSE TITLE
Aspects of MIMO Communication System
MODULES

Module 1: Information Theoretic aspects of MIMO


Review of SISO fading communication channels, MIMO channel
models, Classical IID and extended channels, Frequency selective and
correlated channel models, Capacity of MIMO channels, Ergodic and
outage capacity, Capacity bounds and Influence of channel properties
on the capacity
Module 2: MIMO Diversity and Spatial Multiplexing
Sources and types of diversity, analysis under Rayleigh fading, Diversity
and channel knowledge. Alamouti space time code, MIMO spatial
multiplexing. Space time receivers. ML, ZF, MMSE and Sphere
decoding, BLAST receivers and Diversity multiplexing trade-off.
INTERNAL TEST 1 (MODULE 1 & 2)
Module 3: Space Time Block Codes
Space time block codes on real and complex orthogonal designs, Code
design criteria for quasi-static channels (Rank, determinant and
Euclidean distance), Orthogonal designs, Generalized orthogonal
designs, Quasi-orthogonal designs and Performance analysis.

Module 4: Space Time Trellis Codes


Representation of STTC, shift register, generator matrix, statetransition diagram, trellis diagram, Code construction, Delay diversity
as a special case of STTC and Performance analysis
INTERNAL TEST 2 (MODULE 3 & 4)
Module 5: Space Time Block Codes
Space time block codes on real and complex orthogonal designs, Code
design criteria for quasi-static channels (Rank, determinant and
Euclidean distance), Orthogonal designs, Generalized orthogonal
designs, Quasi-orthogonal designs and Performance analysis.
Module 6: Space Time Trellis Codes
Representation of STTC, shift register, generator matrix, statetransition diagram, trellis diagram, Code construction, Delay diversity
as a special case of STTC and Performance analysis

CREDITS
3-0-0: 3

Contact
Hours

Sem. Exam
Marks (%)

15

15

15

15

20

20

END SEMESTER EXAM

47

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE
04 EC 6424

COURSE NAME

Detection and Tracking System

L-T-P:C
3-0-0: 3

YEAR
2015

Pre-requisites: Nil
Course Objectives:

To understand sampling fundamentals.


To study descriptive and inferential statistics

Syllabus:

Reception in White Noise, The Active Radar or Sonar Signal, Physical Interpretation, Passive Listening,
Reception in Colored Noise, Optimum Reception in Colored Noise, Receiver Structure, Tracking,Modeling
Detection and Tactical Decision Aids, Digital Sonar System, Design of Digital Sonar: Implementation Method
of Various Function of Digital Sonar, Tracking,
Modeling Detection and Tactical Decision Aids
Course Outcome:

Student will be able to:

Understand and analyze radar Systems

Analyze radar signal processing

Appreciate the wide range of applications of radar Systems

Understand Target detection and tracking using radar systems

Understand various electronic counter measures(ECM)

Understand various electronic navigation systems

Design simulation experiments related to radar systems and radar signal processing
Text Books:

1. Franois Le Chevalier, Principles of Radar and Sonar Signal Processing, Artech, 2002.
2. Richard P. Hodges, Underwater Acoustics: Analysis, Design and Performance of Sonar Wiley, 2010
References:

1. Samuel S. Blackman & Robert Popoli ,Design and Analysis of Modern Tracking Systems Artech,
1999.

48

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE:
04 EC 6424

COURSE PLAN

COURSE TITLE
Detection and Tracking System
MODULES

Module 1: Reception in White Noise


Introduction, The Active Radar or Sonar Signal, Physical Interpretation,
Passive Listening, Optimum Reception in White Noise: Principle,
Estimation of a Parameter, Simultaneous Estimation of Several
Parameters, Optimum Detection, Optimum Receiver, Optimum Detector,
The Ambiguity Function, Detection Performance

CREDITS
3-0-0: 3
Sem.
Contact
Exam
Hours
Marks (%)
7

15

15

15

Module 4: Detection Theory


Detection Theory, Decision Theory, and Hypothesis Testing,
Review of Probability Theory, Elementary hypothesis testing, Bayes rule,
minimax rule, Neyman-Pearson rule

15

Module 5: Testing
Compound hypothesis testing, Generalized likelihood-ratio test; Detection
with unknown signal parameters, Signal detection in the presence of
noise, Chernoff bound, asymptotic relative efficiency; sequential
detection; nonparametric detection, sign test, rank test.

20

20

Module 2: Reception in Colored Noise

Optimum Reception in Colored Noise, Receiver Structure, Application to


Spurious Echoes or Jammers, Stationary Colored Noise and Infinite
Observation Time, Adaptive Processing, Adaptive Filtering using a
Transversal Filter, Adaptive Whitening, Sensor Arrays, Space-time
Processing, Passive Listening, MUSIC.
Module 3: Tracking

INTERNAL TEST 1 (MODULE 1 & 2)

Modeling Detection and Tactical Decision Aids, Cumulative Probability of


Detection, Tracking Target Motion Analysis and Localization, Design and
Evaluation of Sonars and Radars

INTERNAL TEST 2 (MODULE 3 & 4)

Module 6: Digital Sonar System

Design of Digital Sonar: Implementation Method of Various Function of


Digital Sonar, System Simulation Technique in Digital Sonar Design,
Examples of Typical Modern Digital Sonar.
END SEMESTER EXAM

49

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE
04 EC 6426

COURSE NAME

Embedded Network Design

L-T-P:C

3-0-0: 3

YEAR
2015

Pre-requisites: Nil
Course Objectives:

To understand the Requirements of embedded network design.


To study programming for embedded system.

Syllabus:

Embedded Networking Requirements, Introduction to Network for Embedded Systems, Introduction to


buses and protocols for embedded networking, connection, Wireless - Bluetooth, Zig Bee standard.
Controller Area Network, CAN Overview, Introduction, CAN 2.0b Standard (covering Physical Layer, Message
Frame Formats, TCP/IP, History, ZigBee, Comparison with Bluetooth, Short range wireless Networking
classes,Programming for Embedded Systems, Pointers and Memory Mapping in Operating System
Course Outcome:
The student can understand
1. What are embedded systems and the embedded system design process?
2. Understand the basics of Microprocessors and Microcontrollers.
3. Basic 8051 and PSOC microcontrollers architecture and programming.
4. The assembly Language programming process for 8051 and PSoC.
5. Various applications like blinking of LED Digital logic, Precision Analog and serial Communications.
6. Can understand RTOS and embedded software and debugging techniques.
7. Knowledge of advanced architectures like ARM, SHARC.
8. Various bus protocols like I2C bus and CAN BUS
.

Text Books:

1. Lyla B Das, Embedded Systems-An Integrated Approach, Pearson, 2012.


2. Olaf P Feiffer, Andrew Ayre& Christian Keyold, Embedded Networking with CAN and CAN Open,
Embedded System Academy 2005.

References:
50

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

1. Marco Di Natale, HaiboZeng, Paolo Giusto &ArakadebGhosal, Understanding and Using the Controller
Area Network ,Springer, 2012.
2. John Catsoulis, Designing Embedded Hardware, O'Reilly Media, Inc., 2002
3. Dr. SidnieFeit, TCP/IP : Architectures, Protocols and Implementations with IPv6 and IP Security, Tata
McGraw Hill, Second Edition, 2008.
4. Martin W. Murhammer, OrcunAtakan, Stefan Bretz,Larry R. Pugh, Kazunari Suzuki, David H. Wood,
TCP/IP Tutorial and Technical Overview, International Technical Support Organization-IBM, Sixth Edition
,October 1998.
5. Wayne Wolf, Computers as Components: Principles of Embedded Computing System Design, Morgan
Kaufman Publishers, 2008.

COURSE CODE:
04 EC 6426

COURSE PLAN

COURSE TITLE
Embedded Network Design

CREDITS
3-0-0: 3

MODULES

Contact
Hours

Introduction to Network for Embedded Systems, Introduction to buses


and protocols for embedded networking: CAN Bus, I2C, SPI, USB,
Ethernet protocol, TCP/IP Protocol, Internet connectivity over an
Ethernet connection, Wireless - Bluetooth, Zig Bee standard

15

15

15

15

Module 1: Embedded Networking Requirements

Sem. Exam
Marks (%)

Module 2: Controller Area Network

CAN Overview, Introduction, CAN 2.0b Standard (covering Physical


Layer, Message Frame Formats, Bus Arbitration, Message Reception
and Filtering, Error Management), Selecting a CAN Controller, CAN
Development Tools, Evaluating system requirements choosing devices
and tools, Configuring single devices, Overall network configuration,
Network simulation, Network Commissioning..
Module 3: TCP/IP

INTERNAL TEST 1 (MODULE 1 & 2)

TCP/IP: Introduction to TCP/IP: History, Architecture, Standards and


Applications, TCP/IP Architecture: Layering, Protocol Overview,
Routers & Topology, IP routing, TCP Architecture, UDP Architecture,
Security Concepts.
Module 4: ZigBee

Introduction, Comparison with Bluetooth, Short range wireless


networking classes, Zigbee& IEEE802.15.4 standard, Operating
frequencies, data rate, interoperability, Device types, Topologies,
Communication basics, Association and Disassociation, binding, Selfforming and self-healing characteristics, Networking Layer functions,
ZigBee gateway, Zigbee Metaphor
51

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

INTERNAL TEST 2 (MODULE 3 & 4)


MODULE : 5 Programming for Embedded Systems

Pointers and Memory Mapping in Operating System: C Internals, RTOS:


OS Basics. Real Time OS Kernel Architecture, Scheduling Algorithms:
Priority Based, Shortest Job First, Round-Robin, FIFO. Task
Synchronization: Mutual Exclusion, Semaphores. Embedded Operating
Systems, Mobile Operating Systems, Porting RTOS or EOS on a
Hardware Platform.
MODULE : 6

Networked Embedded Systems in Industrial Automation: Fieldbus


Systems, Real-Time Ethernet, WLAN and WPAN for Industrial
Environments.
END SEMESTER EXAM

52

20

20

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE
04 EC 6492

COURSE NAME
MINI PROJECT

L-T-P:C
0-0-4:2

YEAR
2015

In Mini Project the student shall undergo two months duration. The mini project is designed to develop
practical ability and knowledge about practical tools/techniques in order to solve the actual problems
related to the industry, academic institutions or similar area. Students can take up any application
level/system level project pertaining to a relevant domain. Mini Projects can be chosen either from the list
provided by the faculty or in the field of interest of the student. For external mini projects, students should
obtain prior permission after submitting the details to the guide and synopsis of the work. The mini project
guide should have a minimum qualification of ME/M.Tech in relevant field of work. At the end of each
phase, presentation and demonstration of the mini project should be conducted, which will be evaluated by
a panel of examiners. A detailed mini project report duly approved by the guide in the prescribed format
should be submitted by the student for final evaluation. Publishing the work in Conference Proceedings/
Journals with National/ International status with the consent of the guide will carry an additional weightage
in the review process. Mini project undergo an evaluation by a panel of examiners including at least one
external examiner appointed by university and internal examiner.
COURSE CODE
04 EC 6494

COURSE NAME

ELECTRONIC SYSTEM DESIGN LAB II

L-T-P:C

0-0-2:1

YEAR
2015

Pre-requisites: Nil
Course Objectives:

To simulate experiments based on the core courses and the elective courses opted by the student in the
second semester
Tools:

Xilinx, MATLAB, PSPICE


Experiments:1.
2.
3.
4.

Periodogram Estimation
Time frequency domain properties of different windows using MATLAB
Design of FIR filter using windowing Technique.
System design using PIC Microcontroller
53

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

5. Simulation of QMF filter using Simulation Packages


6. Sensor design using simulation tools
7. Analysis of Asynchronous and clocked synchronous sequential circuits
SUMMER BREAK

04 EC 7490

54

INDUSTRIAL TRAINING

0-0-4:P/F

2015

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

SEMESTER III
COURSE CODE

COURSE NAME

04 EC 7401

WIRELESS COMMUNICATION SYSTEM

L-T-P:C
3-0-0:3

YEAR
2015

Pre-requisites:

Course Objectives:

To provide a basic knowledge about fading and diversity.

To give an idea about the cellular communication theory and technology.

Syllabus

Cellular Communication, Cellular concept-frequency reuse, channel assignment, Fading and Diversity,
Wireless Channel Models, Path Loss and Shadowing Models, Diversity, Frequency and Space Diversity,
Concept
of
Diversity
Branches
and
Signal
Paths,
multiple
access
technique,
TDMA,
FDMA,
GSM,
CDMA
digital
cellular,
Fading
Channel
Capacity,
Capacity of Wireless Channels, Cellular Wireless Communication Standards, Second generation cellular
systems: GSM specifications and Air Interface - specifications, IS 95 CDMA- 3G systems: UMTS & CDMA 2000
standards and specifications.
Course Outcome:

The student will be able to understand the concepts of Cellular Communication.


Text Books:

1. Andrea Goldsmith, Wireless Communications, Cambridge University press, 2006.


2. Rappaport T. S., Wireless Communication, principles & practice, Prentice Hall of India, 2002.
References:

1. Simon Haykin& Michael Moher, Modern Wireless Communications, Person Education, 2007.
2. Stuber G. L, Principles of Mobile Communications, 2nd Ed., Kluwer Academic Publishers, 2001.
3. Andreas F .Molisch., Wireless Communication , 2nd Ed., John Wiley India,2012.
4. Peterson R. L, Ziemer R. E. & David E. Borth, Introduction to Spread Spectrum Communication, Pearson
Education, 1995.
5. Viterbi A. J., CDMA: Principles of Spread Spectrum, Addison Wesley, 1995.

55

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE:
04 EC 7401

COURSE PLAN

COURSE TITLE
Wireless Communication Systems
MODULES

MODULE 1: Cellular concept-frequency reuse, channel assignment,


hand off, interference-Co-Channel Interference and adjacent channel
interference, trunking and Grade of Service, Improving Capacity: Cell
Splitting and Sectorization. Microcell concept.
MODULE 2: Wireless Channel Models: Path Loss and Shadowing
Models, Statistical Fading Models, Narrow Band and Wideband Fading
Models.
Diversity: Time Diversity, Frequency and Space Diversity, Receive
Diversity, Concept of Diversity Branches and Signal Paths, Performance
Gains; Combining Methods: Selective Combining, Maximal Ratio
Combining, Equal Gain Combining.
MODULE : 3

Contact
Hours

CREDITS
3-0-0:3

Sem. Exam
Marks (%)

15

15

15

15

20

20

INTERNAL TEST 1 (MODULE 1 & 2)

GSM network architecture, GSM channel type, frame structure for


GSM, signal processing in GSM, speech coding, channel coding,
interleaving, ciphering, burst formatting, modulation, frequency
hopping, demodulation, authentication and security in GSM, GSM call
procedures, GSM hand off procedures.
MODULE : 4
GSM network architecture, GSM channel type, frame structure for
GSM, signal processing in GSM, speech coding, channel coding,
interleaving, ciphering, burst formatting, modulation, frequency
hopping, demodulation, authentication and security in GSM, GSM call
procedures, GSM hand off procedures.
INTERNAL TEST 2 (MODULE 3 & 4)
MODULE : 5
CDMA digital cellular standards- Introduction, frequency and channel
specification, forward and reverse CDMA channel, CDMA call
processing, soft hand off, performance of a CDMA system, comparison
of CDMA with GSM, digital cellular standards- DECT, PDC, PHS.
MODULE : 6

Capacity of Wireless Channels- Capacity of flat and frequency selective


fading channels- Multiple Input Multiple output (MIMO) systemsNarrow band multiple antenna system model- Parallel Decomposition
of MIMO Channels- Capacity of MIMO Channels. Cellular Wireless
Communication Standards, Second generation cellular systems: GSM
56

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

specifications and Air Interface - specifications, IS 95 CDMA- 3G


systems: UMTS & CDMA 2000 standards and specifications.
END SEMESTER EXAM

57

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE

COURSE NAME

L-T-P:C

YEAR

04 EC 7403

APPLICATIONS OF FUZZY LOGIC AND


NEURAL NETWORKS

3-0-0:3

2015

Pre-requisites:

Course Objectives:

To provide a basic knowledge about neural networks.


To give an idea about the fuzzy systems and applications

Syllabus

Biological neural, Neural processing, Learning Vector Quantization , Hebbian Learning, Hopfield Network,
Bidirectional Associative memory (BAM), Self Organization Maps (SOM) and ART1, Fuzzy decision making
Multi Objective Decision Making.
Course Outcome:

The student will be able to understand the concepts of discrete and continuous perception
The Method of Hebbian Learning is explained in detail.

References:

1.Jang J S R Sun C T and Mizutani E, Neuro Fuzzy and Soft computing, Pearson
Education, (Singapore), 2004.

2.SRajasekaran and G A VijayalakshmiPai, Neural networks Fuzzy logics and Genetic algorithms, Prentice
Hall of India, 2004
3.Derong Liu , Advances in Neural Networks--ISNN 2007 , Springer, 2007
4.Timothy J Ross, Fuzzy Logic Engineering Applications, John Wiley and Sons, 2004
5.James A. Anderson, An Introduction to Neural Networks, Prentice Hall, 2002

58

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE:
04 EC 7403

MODULE : 1

COURSE PLAN

COURSE TITLE
Applications of Fuzzy Logic and Neural Network
MODULES

Biological neural - Neural processing - Supervised and unsupervised


learning - Neural network learning rules. Single layer perception discrete and continuous perception - multi layer feed forward network
Back propagation Networks - feed back networks - Training
Algorithms.

CREDITS
Contact
Hours

3-0-0:3

Sem. Exam
Marks (%)

15

15

15

15

20

20

MODULE : 2

Unsupervised Learning , Competitive Learning Networks , Kohonenselforganising networks , Learning Vector Quantization , Hebbian Learning,
Hopfield Network ,Content Addressable Nature , Binary Hopfield
Network , Continuous Hopfield Network
MODULE : 3

INTERNAL TEST 1 (MODULE 1 & 2)

Hopfield Network Content Addressable Nature Binary Hopfield


Network Continuous Hopfield Network.
MODULE : 4

. Bidirectional Associative Memory Principle Component Analysis.


Auto associative memories - Bidirectional Associative memory (BAM) Self Organization Maps (SOM) and ART1.
MODULE : 5

INTERNAL TEST 2 (MODULE 3 & 4)

Fuzzy sets - Fuzzy Rules: Extension Principle, fuzzy measures - fuzzy


relations - fuzzy functions-Fuzzy Reasoning.
MODULE : 6

Representation of fuzzy knowledge - fuzzy inference systemsMamdani Model Sugeno Model Tsukamoto Model Fuzzy decision
making Multi Objective Decision Making Fuzzy Classification Fuzzy
Control Methods Application.
END SEMESTER EXAM

59

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE

COURSE NAME

L-T-P:C

YEAR

04 EC 7405

INTERNET WORKING AND


MULTIMEDIA

3-0-0:3

2015

Pre-requisites:

Course Objectives:

To study the various network technologies.


To understand concepts of internet and applications.

Syllabus

Digital sound, video and graphics, network requirements for audio/video transform, Broadband services,
ATM
and
IP,
Multicast
And
Transport
Protocol,
Media
On

Demand,
Multimedia And Internet, Peer-to-peer computing, shared application
Course Outcome:

The student will be able to

Understand the video and graphics


Understand the buffer Management
Identify the indexing synchronization of requests

Texts:

1. Jon Crowcroft, Mark Handley, Ian Wakeman. Internetworking Multimedia, Harcourt Asia
Pvt.Ltd.Singapore, 1998.
2. B.O. Szuprowicz, Multimedia Networking, McGraw Hill, NewYork. 1995
References:

1. Tay Vaughan,Multimedia making it to work, 4ed,Tata McGrawHill, NewDelhi,2000.

2. Ellen kayatawesel, Ellen Khayata, Wireless Multimedia Communication: Networking Video,


Data, Addison Wesley Longman Publication, USA, 1998.

Voice and

3. Fred Halsall, Multimedia Communications Pearson

4. John F. KoegelBufod, Multimedia Systems, Addison Wesley, Edition 2000

60

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE:
04 EC 7405
MODULE : 1

COURSE PLAN

COURSE TITLE
INTERNET WORKING AND MULTIMEDIA
MODULES

Digital sound, video and graphics, basic multimedia networking,


multimedia characteristics, evolution of Internet services model,
network requirements for audio/video transform, multimedia
coding and compression for text, image, audio and video.
Multimedia communication in wireless network

Contact
Hours

CREDITS
3-0-0:3

Sem. Exam
Marks (%)

15

15

15

15

20

20

MODULE : 2

Broadband services, ATM and IP, IPV6, High speed switching,


resource reservation, Buffer management, traffic shaping,
caching, scheduling and policing, throughput, delay and jitter
performance.
INTERNAL TEST 1 (MODULE 1 & 2)
MODULE : 3
Multicast over shared media network, multicast routing and
addressing, scaping multicast and NBMA networks, Reliable
transport protocols, TCP adaptation algorithm, RTP, RTCP.
MODULE : 4
Storage and media servers, voice and video over IP, MPEG-2 over
ATM/IP, indexing synchronization of requests, recording and
remote control
INTERNAL TEST 2 (MODULE 3 & 4)
MODULE : 5

The internet, Client server technology, Communication protocols,


Internet addressing, WWW, HTML and Web authorizing, Web
page browsers and development, bandwidth, applications and
considerations, Accessing content on internet
MODULE : 6

MIME, Peer-to-peer computing, shared application, video


conferencing, centralized and distributed conference control,
distributed virtual reality, light weight session philosophy.
END SEMESTER EXAM

61

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE
04 EC 7407

COURSE NAME
ASIC DESIGN

L-T-P:C

3-0-0:3

YEAR

2015

Pre-requisites:

Course Objectives:

To prepare the student to be an entry-level ASIC design


To give the student an understanding of ASIC programming, synthesis, simulation and testing

Syllabus

Types of ASICs, Design flow, Anti fuse, static RAM, EPROM, EEPROM technology, Xilinx I/O blocks, Actel ACT,
Xilinx LCA, Low level design language, PLA tools, EDIF, CFI design representation.
Course Outcome:

The student will be able to understand the CMOS Design rules.

Texts:

1. M.J.S .Smith, "Application Specific Integrated Circuits, Addison -Wesley Longman Inc., 1997.
2. FarzadNekoogar and FaranakNekoogar, From ASICs to SOCs: A Practical Approach, Prentice Hall PTR,
2003.
References:
1. Wayne Wolf, FPGA-Based System Design, Prentice Hall PTR, 2004.
2. R. Rajsuman, System-on-a-Chip Design and Test. Santa Clara, CA: Artech House Publishers, 2000.
3. F. Nekoogar. Timing Verification of Application-Specific Integrated Circuits (ASICs).Prentice Hall PTR, 1999.
4. Michael D.Ciletti, Advanced Digital design with Verilog HDL, Pearson Education, 2005.
5. S. Brown & Z. Vranestic, Fundamentals of Digital Logic with Verilog HDL, Tata McGraw Hill, 2002

62

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE:
04 EC 7407
MODULE : 1

COURSE PLAN

COURSE TITLE
ASIC DESIGN

MODULES

Types of ASICs - Design flow - CMOS transistors CMOS Design rules Combinational Logic Cell Sequential logic cell - Data path logic cell Transistors as Resistors - Transistor Parasitic Capacitance- Logical effort
Library cell design - Library architecture.
MODULE : 2

Anti fuse - static RAM - EPROM and EEPROM technology - PREP


benchmarks - Actel ACT - Xilinx LCA Altera FLEX - Altera MAX DC & AC
inputs and outputs - Clock & Power inputs - Xilinx I/O blocks.
INTERNAL TEST 1 (MODULE 1 & 2)
MODULE : 3
Actel ACT -Xilinx LCA - Xilinx EPLD - Altera MAX 5000 and 7000 - Altera
MAX 9000 - Altera FLEX Design systems - Logic Synthesis - Half gate
ASIC -Schematic entry - Low level design language - PLA tools -EDIF- CFI
design representation.

CREDITS
3-0-0:3

Contact
Hours

Sem. Exam
Marks (%)

15

15

15

15

20

20

MODULE : 4

Design units, Data objects, Signal drivers, Delays , Data types, language
elements, operators, user defined primitives, modeling-data flow,
behavioral, structural, Verilog implementation of simple combinational
circuits: adder, code converter,decoder, encoder, multiplexer,
demultiplexer..
MODULE : 5

INTERNAL TEST 2 (MODULE 3 & 4)

Combinational circuit implementation using QuineMcCluskey


algorithm, Decoders, Multiplexers, ROM and PLA, Implementation of
multi output gate implementations.
MODULE : 6

Verilog and logic synthesis -VHDL and logic synthesis - types of


simulation -boundary scan test - fault simulation - automatic test
pattern generation. System partition - FPGA partitioning - partitioning
methods - floor planning - placement - physical design flow global
routing - detailed routing - special routing - circuit extraction.

63

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE
04 EC 7409

COURSE NAME

CAD FOR VLSI CIRCUITS

L-T-P:C

3-0-0:3

YEAR
2015

Pre-requisites:

Course Objectives:

To study various physical design methods in VLSI.


To understand the concepts behind the VLSI design rules and routing techniques.
To use the simulation techniques at various levels in VLSI design flow.
To understand the concepts of various algorithms used for floor planning techniques.

Syllabus

Introduction to VLSI Design methodologies, Review of Data structures and algorithms, Layout Compaction,
Design rules, problem formulation, algorithms for constraint graph compaction, Floor planning concepts,
shape functions and floorplan sizing, Types of local routing problems, High level transformations.
Course Outcome:

The student will be able to understand the VLSI Design automation tools.

Texts:

1. S.H. Gerez, "Algorithms for VLSI Design Automation", John Wiley & Sons, 2002.
2. N.A. Sherwani, "Algorithms for VLSI Physical Design Automation", Kluwer Academic Publishers, 2002
References:

1. Sadiq M. Sait, Habib Youssef, VLSI Physical Design automation: Theory and Practice, World scientific
1999.
2. Steven M.Rubin, Computer Aids for VLSI Design, Addison Wesley Publishing 1987.

64

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE PLAN

COURSE CODE:

COURSE TITLE

CREDITS

04 EC 7409

CAD FOR VLSI CIRCUITS

3-0-0:3
Contact
Hours

Sem. Exam
Marks (%)

15

15

15

15

High level Synthesis - Hardware models - Internal representation


Allocation.

20

Assignment and scheduling - Simple scheduling algorithm - Assignment


problem - High level transformations.
END SEMESTER EXAM

20

MODULE : 1

MODULES

Introduction to VLSI Design methodologies - Review of Data structures


and algorithms - Review of VLSI Design automation tools - Algorithmic
Graph Theory and Computational Complexity - Tractable and
Intractable problems - general purpose methods for combinatorial
optimization.
MODULE : 2

Layout Compaction - Design rules - problem formulation - algorithms


for constraint graph compaction - placement and partitioning - Circuit
representation - Placement algorithms partitioning.
MODULE : 3

INTERNAL TEST 1 (MODULE 1 & 2)

Floor planning concepts - shape functions and floorplan sizing - Types


of local routing problems - Area routing - channel routing - global
routing - algorithms for global routing.
MODULE : 4

Simulation - Gate-level modeling and simulation - Switch-level


modeling and simulationCombinational Logic Synthesis - Binary
Decision Diagrams - Two Level Logic Synthesis.
INTERNAL TEST 2 (MODULE 3 & 4)
MODULE : 5

MODULE : 6

65

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE
04 EC 7411

COURSE NAME

DSP SYSTEM DESIGN

L-T-P:C

3-0-0:3

YEAR
2015

Pre-requisites:

Course Objectives:

To understand the need of digital signal processors and to study typical DSP processor.
To understand the current trends in digital signal processor.

Syllabus

Need for Special Digital Signal Processors, Processor Trends: Von Newmann Vs. Harvard Architecture,
Structures for FIR systems , Direct and Cascade forms , Structures for Linear phase systems, Analog filter
design: Filter specification, Filter specification ,Low pass IIR filter design, Impulse invariant and Bilinear
transformation methods, Analog Devices DS Processors: Introduction to Sharc / Tiger Sharc / Blackfin Series,
Other Major Vendors in the DSP Market and the Latest Trends.
Course Outcome:

The student will be able to differentiate direct and cascade forms.

Texts:

1. NaimDahnoun, Digital Signal Processing Implementation Using the TMS320C6000 Processors, Prentice
Hall, 2000.
2. Chassaing R., Digital Signal Processing and Applications With the C6713 and C6416 DSK, John Wiley &
Sons, 2004.
References:

1. Sen M. Kuo&Woon-SengGan, Digital Signal Processors: Architectures, Implementations, and


Applications, Pearson, 2005.
2. David J. De Fatta, Joseph G. Lucas & William S. Hodgkiss, Digital Signal Processing: A System Design
Approach, Wiley India, 2009.
3. Oppenheim A. V. & Schafer R. W., Discrete-Time Signal Processing, 2nd Ed., Prentice Hall, 1989. 4. John
G. Proakis&Dimitris G. Manolakis, Digital Signal Processing: Principles, Algorithms and Applications, 4th
Ed., Pearson, 2007.
5. S K Mitra, Digital Signal Processing: A Computer Based Approach ,TataMc.Graw Hill.

66

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE:
04 EC 7411

COURSE PLAN

COURSE TITLE
DSP SYSTEM DESIGN
MODULES

MODULE : 1

Need for Special Digital Signal Processors, Processor Trends: Von Newmann
Vs. Harvard Architecture, Architectures of Superscalar and VLIW Fixed and
Floating Point Processors, New Digital Signal Processing Hardware Trends,
Selection of DS Processors.
MODULE : 2
Introduction to a Popular DSP from Texas Instruments (TMS330C6000
Series), CPU Architecture, CPU Data Paths and Control, Internal Data /
Program Memory. On Chip Peripherals: Timers, Multi Channel Buffered
Serial Ports, Extended Direct Memory Access, Interrupts, Pipelining.
INTERNAL TEST 1 (MODULE 1 & 2)
MODULE : 3
IIR and FIR systems , Block diagram and SFG representation of difference
equations , Basic structures for IIR systems , Direct form , Cascade form ,
Parallel form , Transposed forms ,Structures for FIR systems , Direct and
Cascade forms , Structures for Linear phase systems. Analog filter design:
Filter specification , Butterworth approximation , Pole locations , Design of
analog low pass Butterworth filters ,Chebyshev Type 1 approximation , pole
locations , Analog to analog transformations for designing high pass, band
pass and band stop filters.

CREDITS
3-0-0:3
Sem.
Contact
Exam
Hours
Marks
(%)
7

15

15

15

15

20

MODULE : 4

Filter specification ,Low pass IIR filter design , Impulse invariant and Bilinear
transformation methods Butterworth and Chebyshev , Design of high
pass, band pass and band stop IIR digital filters , Design of FIR filters by
windowing , Properties of commonly used windows , Rectangular, Bartlett,
Hanning, Hamming and Kaiser.
MODULE : 5

INTERNAL TEST 2 (MODULE 3 & 4)

Design Aspects: Introduction to the C6713 DSK, Code Composer Studio IDE,
Matlab and Basic Skills, Review of FIR Filtering: FIR Filter Design Techniques
and Tools, Review of IIR Filtering: IIR Filter Design Techniques and Tools,
Sampling, Quantization and Working with the AIC23 Codec, Writing Efficient
Code: Optimizing Compiler, Effect of Data Types and Memory Map:
TMS320C6713 Assembly Language Programming: Instructions Set And
Addressing Modes, Linear Assembly.
67

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

MODULE : 6

Current Trend in Digital Signal Processors: DSP Controllers, Architecture of


TMS320C28XX Series DSP and its Applications. Architecture Trends of Other
Texas Instruments DSP Processors, Analog Devices DS Processors:
Introduction to Sharc / Tiger Sharc / Blackfin Series, Other Major Vendors in
the DSP Market and the Latest Trends.
END SEMESTER EXAM

68

20

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE
04 EC 7413

COURSE NAME

RF ANTENNA THEORY

L-T-P:C

3-0-0:3

YEAR
2015

Pre-requisites:

Course Objectives:

To understand the design consideration and modeling of micro strip antennas

Syllabus

Dipole, monopole, loop antenna; Mobile phone antenna- base station, hand set antenna, Various
Microstrip Antenna Configurations, Microstrip Patch Antenna, Printed Dipole Antenna, Use of a Meandered
Ground Plane, Use of a Planar Inverted-L Patch.
Course Outcome:

The student will be able to study the various RF Antenna Configurations

Texts:

1. Bhartia P., InderBahl, Garg R. &Ittipiboon A., Microstrip Antenna Design Handbook, Artech House
Publishers, 2001.
2. Kin-Lu Wong, Compact and Broadband Microstrip Antennas, 1st Ed., Wiley-Inter science, 2002.
References:

1. Fang D.G., Antenna Theory and Microstrip Antennas, CRC Press, 2009.
2. Simon R. Saunders & Alejandro Aragon-Zavala, Antennas and Propagation for Wireless Communication
System, John Wiley & Sons, 2007.
3. Robert S Elliot., Antenna Theory and Design, John Wiley & Sons, 2006.
4. Constantine A Balanis., Modern Antenna Handbook, Wiley ,2011.
5. Balanis.A, Antenna Theory Analysis and Design, John Wiley and Sons, New York, 1982
5. S K Mitra, Digital Signal Processing: A Computer Based Approach ,TataMc.Graw Hill.

69

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE:
04 EC 7413
MODULE : 1

COURSE PLAN

COURSE TITLE
RF ANTENNA THEORY

MODULES

Antenna fundamental parameters,. Radiation integrals ,Radiation


from surface and line current distributions dipole, monopole, loop
antenna; Mobile phone antenna- base station, hand set antenna;
Image; Induction ,reciprocity theorem, Broadband antennas and
matching techniques, Balance to unbalance transformer,
Introduction to numerical techniques
MODULE : 2
Introduction; Advantages and Limitations of Microstrip Antenna,
Radiation Mechanism of a Microstrip Antenna, Various Microstrip
Antenna Configurations, Microstrip Patch Antenna, Printed Dipole
Antenna, Printed Slot Antenna, Feeding Techniques and Modeling,
Coaxial Feed / Probe Coupling, Microstrip (Coplanar) Feed, Proximity
Coupled Microstrip Feed, Aperture Coupled Microstrip Feed,
Coplanar Waveguide Feed, Radiation Fields.
INTERNAL TEST 1 (MODULE 1 & 2)
MODULE : 3

Introduction; Models of Rectangular Patch Antenna, Transmission


Line Model Analysis , Cavity Model Analysis, Design Considerations of
Rectangular Patch Antenna, Substrate Selection, Element Width and
Length, Radiation Pattern and Radiation Resistance, Loss Factor,
Bandwidth, Radiation Efficiency, Feed Location and Polarization.
MODULE : 4
Introduction; Analysis of a Circular Disk Microstrip Antenna Using
Cavity Model, Design Considerations: Substrate Selection, Radiation
Pattern, Quality Factor and Impedance Bandwidth, Feed Point
Location and Polarization.
INTERNAL TEST 2 (MODULE 3 & 4)
MODULE : 5

Broad Banding of Microstrip Antennas-Introduction; Effect of


Substrate Parameters on Bandwidth, Selection of Suitable Patch
Shape, Selection of Suitable Feeding Technique, Aperture-Coupled
Microstrip Antenna
MODULE : 6
Compact Microstrip Antennas-Introduction; Use of a Shorted Patch
with a Thin Dielectric Substrate, Use of a Meandered Patch, Use of a
Meandered Ground Plane, Use of a Planar Inverted-L Patch, Use of an
70

CREDITS
3-0-0:3

Contact
Hours

Sem. Exam
Marks (%)

15

15

15

15

20

20

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

Inverted U-Shaped or Folded Patch.


END SEMESTER EXAM
COURSE CODE
04 EC 7415

COURSE NAME

FAULT DETECTION AND TESTING OF VLSI CIRCUITS

L-T-P:C

3-0-0:3

YEAR
2015

Pre-requisites:

Course Objectives:

To know the various types of faults and also to study about fault detection, dominance

To understand the fault diagnosis methods

To know the concepts of the test generation methods-DFT-BIST.

Syllabus

Introduction to testing, Faults in Digital Circuits, Modelling of faults, Logical Fault Models, Test generation
for sequential circuits, Vector Simulation ATPG Vectors, Formats, Compaction and Compression.
Course Outcome:

The student will be able to study the various testing techniques available in the field of VLSI.

Texts:

1. M.Abramovici, M.A.Breuer and A.D. Friedman, Digital systems and Testable Design, Jaico Publishing
House,2002.
2. P.K. Lala, Digital Circuit Testing and Testability, Academic Press, 2002
References:

1. M.L.Bushnell and V.D.Agrawal, Essentials of Electronic Testing for Digital, Memory and Mixed- Signal VLSI
Circuits, Kluwer Academic Publishers, 2002.
2. A.L.Crouch, Design Test for Digital ICs and Embedded Core Systems, Prentice Hall International, 2002

3. Robert J.Feugate, Jr., Steven M.Mentyn, Introduction to VLSI Testing, Prentice Hall, Englehood Cliffs,
1998.

71

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE:
04 EC 7415

COURSE PLAN

COURSE TITLE
FAULT DETECTION AND TESTING OF VLSI CIRCUITS
MODULES

MODULE : 1

Introduction to testing Faults in Digital Circuits Modelling of faults


Logical Fault Models Fault detection Fault Location Fault dominance
Logic simulation Types of simulation Delay models Gate Level Event
driven simulation.

CREDITS
3-0-0:3
Sem.
Contact
Exam
Hours
Marks (%)
7

15

15

15

15

20

20

MODULE : 2

Test generation for combinational logic circuits Testable combinational


logic circuit design Test generation for sequential circuits design of
testable sequential circuits.
MODULE : 3

INTERNAL TEST 1 (MODULE 1 & 2)

Generation (ATPG/ATG) For Ssfs In Combinational and Sequential Circuits,


Functional Testing With Specific Fault Models. Vector Simulation ATPG
Vectors, Formats, Compaction and Compression, Selecting ATPG Tool
MODULE : 4

Design for Testability Ad-hoc design generic scan based design


classical scan based design system level DFT approaches.
MODULE : 5

INTERNAL TEST 2 (MODULE 3 & 4)

Built-In self Test test pattern generation for BIST Circular BIST BIST
Architectures Testable Memory Design Test Algorithms Test
generation for Embedded RAMs.
MODULE : 6

Logical Level Diagnosis Diagnosis by UUT reduction Fault Diagnosis for


Combinational Circuits Self-checking design System Level Diagnosis.
END SEMESTER EXAM

72

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

COURSE CODE
04 EC 7491

COURSE NAME
SEMINAR

L-T-P:C

YEAR
2015

0-0-2:2

Each student shall present a seminar on any topic of interest related to the core / elective courses
offered in the second semester of the M. Tech. Programme. He / she shall select the topic based on the
references from international journals of repute, preferably IEEE journals. They should get the paper
approved by the Programme Co-ordinator / Faculty member in charge of the seminar and shall present it in
the class. Every student shall participate in the seminar. The students should undertake a detailed study on
the topic and submit a report at the end of the semester. Marks will be awarded based on the topic,
presentation, participation in the seminar and the report submitted
COURSE CODE
04 EC 7493

COURSE NAME

PROJECT (PHASE I)

L-T-P:C

0-0-12:6

YEAR
2015

In Project Phase-I, the students are expected to select an emerging research area in the field of
specialization. After conducting a detailed literature survey, they should compare and analyze research work
done and review recent developments in the area and prepare an initial design of the work to be carried out
. It is mandatory that the students should refer National and International Journals and conference
proceedings while selecting a topic for their project. He/She should select a recent topic from a reputed
International Journal, preferably IEEE/ACM. Emphasis should be given for introduction to the topic, literature
survey, and scope of the proposed work along with some preliminary work carried out on the project topic.
Students should submit a copy of Phase-I project report covering the content discussed above and
highlighting the features of work to be carried out in Phase-II of the project. The candidate should present
the current status of the project work and the assessment will be made on the basis of the work and the
presentation, by a panel of internal examiners in which one will be the internal guide. The examiners should
give their suggestions in writing to the students so that it should be incorporated in the PhaseII of the
project. Project phase 1 undergo an evaluation by a panel of examiners including at least one external
examiner appointed by university and internal examiner.

73

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

SEMESTER IV
COURSE CODE

COURSE NAME

L-T-P:C

YEAR

EC EC 7494

PROJECT (PHASE II)

0-0-21:12

2015

In the fourth semester, the student has to continue the project work and after successfully finishing
the work, he / she has to submit a detailed bounded project report. The work carried out should lead to a
publication in a National / International Conference or Journal. The papers received acceptance before the
M.Tech evaluation will carry specific weightage.
TOTAL MARKS :100
Project evaluation by the supervisor/s
Evaluation by the External expert
Presentation & evaluation by the Committee

74

: 30 Marks
: 30 Marks
: 40 Marks

APJ Abdul Kalam Technological University|Cluster 4|M.Tech Program in Applied Electronics

Potrebbero piacerti anche