TITLE: EXP6 : DESIGN OF CMOS HALF ADDER CIRCUIT BY USING

MENTOR GRAPHICS
NAME: D.KRISHNA PREM
ROLL NO: 13H61A04K7

DATE :
Pg No : ______

AIM: To design the schematic of a CMOS HALF ADDER circuit and simulate it to observe

the Waveforms by using ELDO simulator in mentor graphics.

TOOLS USED: 1.PC with LINUX OS

2.PYXIS software
3.mentor graphics tools
THEORY: Half adder is a combinational arithmetic circuit that adds two

numbers and produces a sum bit (S) and carry bit (C) as the output. If A
and B are the input bits, then sum bit (S) is the X-OR of A and B and the
carry bit (C) will be the AND of A and B. From this it is clear that a half
adder circuit can be easily constructed using one X-OR gate and one AND
gate. Half adder is the simplest of all adder circuit, but it has a major
disadvantage. The half adder can add only two input bits (A and B) and
has nothing to do with the carry if there is any in the input. So if the input
to a half adder have a carry, then it will be neglected it and adds only the
A and B bits. That means the binary addition process is not complete and
thats why it is called a half adder. The truth table, schematic
representation and XOR//AND realization of a half adder are shown in the
figure below.
TRUTH TABLE:

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SYMBOL:

VLSI-LAB

TITLE: EXP6 : DESIGN OF CMOS HALF ADDER CIRCUIT BY USING

MENTOR GRAPHICS
NAME: D.KRISHNA PREM
ROLL NO: 13H61A04K7

DATE :
Pg No : ______

BOOLEAN EXPRESSION: SUM=(A^B) ; CARRY= (A&B)

PROCEDURE:
SCHEMATIC CREATION:
1.turn on the computer and log on to linux operating system
2. now, right click on desktop and then select open terminal option, a command prompt window will be
displayed on the screen.
3. now, in that window type ping 192.168.6.222 and then press enter (it is to ensure that the system is
connected to server).
4.press ctrl+c and then type clear, to clear the data in the window.
5. now, type csh and then press enter.
6. now, type source<space>/home/software/cshrc/ams_2009.cshrc
7. now, change the directory from root to #cd/home/software/FOUNDRY/GDK/Pyxis_SPT_HEP by typing
the command on the window displayed and then press enter.
8. now, type /open_Pyxis_SPT & press enter
9. now create a new project file.
10. create a folder with a name or roll number
11. create a file in that folder with the name of the project to be performed.
12.now, click on library and then select browse location map and then select GENERIC 13 map and then
click ok.
13. add standard libraries and then click ok.
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Department of ECE

VLSI-LAB

TITLE: EXP6 : DESIGN OF CMOS HALF ADDER CIRCUIT BY USING

MENTOR GRAPHICS
DATE :
Pg No : ______

NAME: D.KRISHNA PREM

ROLL NO: 13H61A04K7

14. right click on project name and then click new and then select library option and then give aname to the
library and then click ok.
15.now, right click on library and then create a new cell and then give a name to it and then click ok.
16. now, right click on that cell and then click on schematic and then click ok.
17. now, a schematic window, where we have to place the discrete components will be displayed on the
screen.
18. now, we can get the components by clicking I in the keyboard and then select generic13 folder from left
side panel and then double click on symbols and then select the required component and then click ok.
19. now, go to schematic editor which is at top right corner of schematic window.
20. now, click on library and then select generic library and then select the required components
(VDD,GND,etc)
21. press w for getting wire to connect the components as per the circuit .
22. now, go to add and then select generate symbol option and then select activate symbol option and then
choose a shape which is suitable for the design.
23. now, here as it is an inverter, direct symbol is not available so, we have to select a buffer and then add a
circle at its output to make it look like an inverter
SCHEMATIC:

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VLSI-LAB

TITLE: EXP6 : DESIGN OF CMOS HALF ADDER CIRCUIT BY USING

MENTOR GRAPHICS
DATE :
Pg No : ______

NAME: D.KRISHNA PREM

ROLL NO: 13H61A04K7
SYMBOL:

TESTBENCH CREATION:
1. Close all schematics & symbols.
2. Create a new schematic inv_sim by selecting new schematic from session.
3. Add symbol of the schematic made.
Add_ Instance_ Choose Symbol.
4. Add a Pulse Source at the input to inverter and a DC Voltage source VDD port.
And do the necessary connections as per the figure given below.
** (from sources library we can pick various sources)
5. Right click on the Pulse Generator Source and select Edit Properties.
6. Change the values of the below mentioned parameters and apply the changes.Once you change the values
that have to be reflected once you click on OK tab.
Initial = 0V Pulse = 5V Delay = 1nS Rise = 1nS
Fall = 1nS Width = 25nS Period = 50ns.
7. Also change the magnitude of the Voltage Source from 1V to 5V by following the below step.
8. Right Click on the Voltage source adjacent to VDD and then Edit properties
9. Now from the menu bar click on check and save button. This will report if any errors present.
10. Now click on back tab and then select Simulationfrom the palette to run the simulation and select ok.
ANURAG GROUP OF INSTITUTIONS
Department of ECE

VLSI-LAB

TITLE: EXP6 : DESIGN OF CMOS HALF ADDER CIRCUIT BY USING

MENTOR GRAPHICS
DATE :
Pg No : ______

NAME: D.KRISHNA PREM

ROLL NO: 13H61A04K7
11. Select a New configuration (Give a new name for simulation).

12. Now select the Session tab _simulator/viewer from Setup on the palette and ensure
That the following options are set.
Simulator _ Eldo and Viewer _ EZwave and then Ok.
13. Select Lib/Temp/In _ include filesprovide the following path by selecting the
browsebutton. $ADK/technology/ic/models/ami05.mod.
14. Select Analyses _and enable DC and Transient.
15. Drop down the Analysis setup and select DC setup give the parameters as

Select option Source

Select the voltage source as V1
Start: 0 stop: 5 Step 0.1
16. Select Transient Setup and change the stop time to 1000N.
17. Select the input path A and then hold CTRL key and then output path Y and click
on Probes from the palette. Select DC in Analysis tab, Plot from Task tab
Select add. Similarly select TRAN from Analysis tab and select add and close the
Window
18. Now click on Run Eldo tab from the palette where it opens 2 windows showing
various steps running in command line. Once it finishes it will invoke the EZWave
waveform viewer. If it is not invoked Click on the View Waves Tab from the palette
to invoke the EZWave Waveform Viewer.
19. Now the EZWave displays the input and output signals.

TESTBENCH:

ANURAG GROUP OF INSTITUTIONS

Department of ECE

VLSI-LAB

TITLE: EXP6 : DESIGN OF CMOS HALF ADDER CIRCUIT BY USING

MENTOR GRAPHICS
NAME: D.KRISHNA PREM
ROLL NO: 13H61A04K7

DATE :
Pg No : ______

WAVEFORMS:

RESULT: Thus the output of CMOS HALF ADDER circuit is verified by designing a

schematic and simulating it by using ELDO simulator in mentor graphics.

APPLICATIONS: 1) The ALU (arithmetic logic circuitry) of a computer uses half adder to

compute the binary addition operation on two bits.

ANURAG GROUP OF INSTITUTIONS

Department of ECE

VLSI-LAB

TITLE: EXP6 : DESIGN OF CMOS HALF ADDER CIRCUIT BY USING

MENTOR GRAPHICS
NAME: D.KRISHNA PREM
ROLL NO: 13H61A04K7

DATE :
Pg No : ______

2) Half adder is used to make full adder as a full adder requires 3 inputs, the third input
being an input carry i.e. we will be able to cascade the carry bit from one adder to the other.
CONCLUSION: The operation of HALF ADDER is such that when inputs a and b are

unequal the sum output is high and cout is high if the two inputs a and b are high .

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