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Driving Circuits
Speaker: Wenbinchen
Date: 2011/3/24
Outline
LCD Driving Principle
LCD Structure
Basic Operation
Driving method
Outline
LCD Driving Principle
LCD Structure
Basic Operation
Driving method
LCD Structure
LCD Structure
LCD Structure
LCD Structure
90
Polarizer
LC
Voltage
Polarizer
Transmittance(%)
100
90
Back Light
10
0.0
Voltage (Between Vcom & Pixel)
Cst
Id
10E-6
Pixel ITO
Pixel ITO
(Display area)
Data Line
-10
-5
10
20
Vg
(Gate )
TFT
Gate Line
TFT
Pixel
Driving Method
Gate_Line
Data_Line
Gate Line
Sub_Pixel
Data Line
Driving Method
Voltage
G1
T= 0
G2
t=0
Selected
row
Nonselected
row
t=1
time
Driving Method
Gate_LineScan
pixel
T= 1
NonSelected
row
Selected
row
Driving Method
Frame Time
Voltage
V64
G1
G2
G2
G3
G3
GN
G1
Time
t1 t2 t3
tN t1
Driving Method
AC driving instead of DC
driving
If DC driving..
Signal n
Gate n-1
C lc
C pd
C st
C pd
Gate n
C gs
CF ITO
TFT
Signal M
Gate N - 1
Gate N-1
Gate N
Pixel MN
Signal
M
Gate N
Pixel
MN
Charging
Vgate(n)
1/1000
Gn-1
Gn
999/1000
Vgate(n)
Vgate(n-1)
Vdata
VPixel
Vcom
C pd(next)
Vpixel(p)
Vcom
Vpixel(n)
Vgl
C st
C pd(own)
C lc
C gs
On
Off
C pd(own)
Vpixel(p)
Vcom
Vpixel(n)
Vgl
C st
C pd(next)
C lc
C gs
On
Off
Feed-Through
Feed through Voltage
C pd(own)
Vpixel(p)
Vcom
Vpixel(n)
Vgl
C st
C pd(next)
C lc
C gs
On
Off
Outline
LCD Driving Principle
LCD Structure
Basic Operation
Driving method
LCD Structure
DC/DC
Y-Driver IC
DC/DC
converter
Receiver
Connector
Connector
ASIC
Timing
Controller
RSDS/TTL
Transmitter
VGA &
Scalar
Source Driver
Gamma
Correction
Power
Transmitter
Timing controller
Cell
X-Driver IC
X PCB
Gate Driver
:XPCBA
Signal flow
DC/DC
7.6V
3.8V
V6
4.31V
Vcom
TRANSMISSION
V7
3.29V
3.8V
V8
V13
AVDD decides maximum driving voltage of LC
0V
VOLTAGE
Drain
Vgon-min
Tg
Vgpp
Vgd
Vspp
Vgdholding
Vgh/Vgl depend on TFT pixel charging and
Vst:
Vsh
Vdh
Vst
Common
Vsl
Vdl
Vgoff-min
Vgl
Level shift
Logic
Shift register
CLK
CLK
CLK
CLK
CLK
CLK
YCLK
Out 1
Out 2
Out 3
Out 255
Out 256
YDIO2
gate1
(Vgh,Vgl)
Analog output
(1,0)
When logic output=0
Gate2 open
gate2
VGL
Y383
Y1
Y3
Y382
Y384
VGMA1 ~
VGMA14
6
DATAPOL
6
6
Data Register
6
6
STB
CLKP
CLKN
128
SHL
DIO1
DVDD
6
Level Shift
RSDS Receiver
D00P/N
D01P/N
D02P/N
D10P/N
D11P/N
D12P/N
D20P/N
D21P/N
D22P/N
POL
R-DAC
DGND
AVDD
AGND
Source Driver---R-DAC
B0
B0
B1
B1
B2
B2
VGMA1
R0
VGMA2
R1
VGMA3
R2
VGMA4
OP
R3
VGMA5
R4
VGMA6
R5
VGMA7
R7
VGMA8
Quiz #2 ()
1. LC driving LC mode ?
2. Full HD TV1920x
1080 ?
3. (Pixel charge behavior)
?
4. feed through voltage
?
5.
IC1440(Channel)
IC?
6. Array Process?