VNS-786 VNS-786a3 Umanual Motherboard 990-016 Rev A.3

VNS-786
User's Manual
Preliminary
Adastra Systems
3988 Trust Way
Hayward, CA 94545
TEL: (510) 732-6900
FAX: (510) 732-7655
URL: www.adastra.com
Document P/N 990-016

Rev. A.3
Copyright Notice
Copyright 1999 Adastra Systems Corporation ALL RIGHTS RESERVED.
This manual is copyrighted by Adastra Systems Corporation. You may not reproduce,
transmit, transcribe, store in a retrieval system, or translate into any language or computer
language, in any form or by any means - electronic, mechanical, magnetic, optical,
chemical, manual, or otherwise - any part of this publication without the express written
permission of Adastra Systems Corporation.
Adastra Systems is a trademark of Adastra Systems Corporation. All other trademarks
and registered trademarks contained herein are the property of their respective owners.
This document is designed to provide information about Adastra Systems Corporation
products. No warranty of suitability, purpose, or fitness is implied. While every attempt
has been made to insure the information in this document is accurate, the information
contained within is supplied "as-is" and is subject to change without notice.
Table of Contents
1.
INTRODUCTION ________________________________________________________1
1.1
1.2
1.3
1.4
1.5
2.
FEATURE LIST __________________________________________________________1

FUNCTIONAL SPECIFICATIONS _____________________________________________2
PHYSICAL SPECIFICATIONS _______________________________________________3
TECHNICAL SUPPORT ____________________________________________________4
ABOUT THIS MANUAL____________________________________________________4
CPU ____________________________________________________________________5
2.1 PROCESSOR UPGRADE ___________________________________________________5
2.1.1 CPU TYPE JUMPER SETTINGS __________________________________________6
3.
SYSTEM MEMORY ______________________________________________________9

3.1 PHYSICAL CONFIGURATIONS ______________________________________________9
3.1.1 REMOVING DIMM MODULES _________________________________________10
3.2 CHANGING MEMORY CONFIGURATION ____________________________________10
3.3 LOGICAL CONFIGURATIONS______________________________________________10
3.3.1 CONVENTIONAL MEMORY ____________________________________________10
3.3.2 EXPANDED MEMORY ________________________________________________11
3.3.3 EXTENDED MEMORY ________________________________________________11
3.3.4 SHADOW MEMORY _________________________________________________11
4.
IDE HOST ADAPTER____________________________________________________13

4.1 CONNECTOR __________________________________________________________13
4.2 IDE ACTIVITY LED ____________________________________________________15
4.3 PORT ADDRESS AND IRQ ________________________________________________15
5.
FLOPPY DISK INTERFACE______________________________________________17

5.1 CONNECTOR __________________________________________________________17
5.2 DRIVE TYPE SPECIFICATION _____________________________________________18
6.
CONSOLE INTERFACE _________________________________________________19

6.1
6.2
6.3
6.4
6.5
CONNECTOR __________________________________________________________19
NO-KEYBOARD OPERATION______________________________________________21
RESET SWITCH ________________________________________________________21
SPEAKER _____________________________________________________________22
KEYBOARD LOCK ______________________________________________________23
6.6 DRIVE ACTIVITY LIGHTS _______________________________________________ 23

6.7 EXTERNAL BATTERY ___________________________________________________ 24
7.
SERIAL COMMUNICATION INTERFACE ________________________________ 25

7.1 CONNECTORS _________________________________________________________
7.1.1 DTE SIGNALS _____________________________________________________
7.1.2 RS-232 CABLING __________________________________________________
7.2 RS422 / RS485 OPERATION _____________________________________________
7.2.1 RS422 / RS485 FULL-DUPLEX OPERATION ______________________________
7.2.2 RS485 HALF-DUPLEX OPERATION_____________________________________
7.2.3 RS422 / RS485 CABLING ____________________________________________
7.2.4 RS422 / RS485 LINE TERMINATION ___________________________________
7.2.5 PORT ASSIGNMENTS AND IRQS _______________________________________
8.
25
27
27
28
28
29
30
31
32
PARALLEL COMMUNICATION INTERFACE_____________________________ 33

8.1 CONNECTOR __________________________________________________________ 33
8.2 PORT ASSIGNMENTS AND IRQS __________________________________________ 35
9.
ETHERNET INTERFACE _______________________________________________ 37

9.1 CONNECTORS _________________________________________________________
9.1.1 RJ 45 PIN-OUT ____________________________________________________
9.1.2 NETWORK INDICATOR LEDS _________________________________________
9.2 I/O ADDRESS AND INTERRUPT CONFIGURATION ____________________________
9.3 NETWORK SOFTWARE DRIVERS __________________________________________
37
38
40
40
40
10. VGA INTERFACE ______________________________________________________ 41

10.1
10.2
10.3
10.4
10.5
10.6
CONNECTORS _______________________________________________________
PANEL VOLTAGE ____________________________________________________
PIN TO PANEL CORRELATION CHART ___________________________________
PANEL POWER SEQUENCING __________________________________________
VGA VIDEO MODES _________________________________________________
ZOOMED VIDEO OVERLAY ____________________________________________
41
44
45
46
47
50
11. AUDIO INTERFACE ____________________________________________________ 53

11.1
11.2
11.3
AUDIO CONNECTORS_________________________________________________ 54
AUDIO CONNECTOR PIN-OUTS_________________________________________ 54
AUDIO INPUT/OUTPUT _______________________________________________ 56
12. UNIVERSAL SERIAL BUS (USB) INTERFACE_____________________________ 59
ii
12.1
CONNECTOR ________________________________________________________60
13. ISA AND PCI BUS EXPANSION___________________________________________61

13.1
13.2
CONNECTORS _______________________________________________________61
ADAPTER CARD MOUNTING ___________________________________________64
14. POWER ________________________________________________________________65

14.1
MAIN POWER CONNECTOR ____________________________________________65
14.2
FAN POWER CONNECTOR _____________________________________________66
14.3
POWER CONSUMPTION ________________________________________________67
14.4
POWER MANAGEMENT ________________________________________________67
14.4.1 CONNECTOR _______________________________________________________67
15. BIOS___________________________________________________________________69
15.1
15.2
15.3
BIOS MAP __________________________________________________________69

CUSTOM LOGOS _____________________________________________________70
BIOS LOAD UTILITY _________________________________________________70
16. SOLID STATE DISKS____________________________________________________71

16.1
SSD SETUP _________________________________________________________72
16.2
SSD MEMORY CONFIGURATION ________________________________________72
16.2.1 SSD WINDOW SIZE _________________________________________________72
16.2.2 SSD WINDOW ADDRESS _____________________________________________73
16.2.3 SSD MEMORY TYPE ________________________________________________73
16.3
SOCKET SSD ACCESS _________________________________________________74
16.4
SSD PAGE ADDRESS CALCULATIONS ____________________________________75
16.5
M-SYSTEMS DISKONCHIP ___________________________________________76
16.6
SSD SOCKET PIN CONNECTIONS ________________________________________77
17. APPENDIX A: OPTIONS AND ADAPTERS ________________________________79
17.1
17.2
17.3
17.4
CABLES ____________________________________________________________79
MEMORY DIMM 168-PIN UNBUFFERED 3.3V, GOLD LEADED ______________80
DISK DRIVES ________________________________________________________80
SOFTWARE, OPERATING SYSTEMS ______________________________________80
18. APPENDIX B: HARDWARE INTERRUPT ASSIGNMENT ___________________81
19. APPENDIX C: I/O PORT ASSIGNMENT___________________________________83
iii
19.1
19.2
19.3
19.4
19.5
19.6
19.7
19.8
STANDARD PC/AT I/O ADDRESS RANGE 000 - 3FFH ______________________

VNS-786 EXTENDED I/O______________________________________________
VNS-786 CONFIGURATION REGISTER LOCATIONS ________________________
VNS-786 CONFIGURATION REGISTER MAP ______________________________
REGISTER 0 WINDOW MATCH PATTERN _______________________________
REGISTER 1 SOCKET PAGE __________________________________________
REGISTER 2 SSD DEVICE SETUP ______________________________________
REGISTER 3 RS485 SETUP ___________________________________________
83
84
84
84
86
87
88
89
20. APPENDIX D: MECHANICAL SPECIFICATION __________________________ 91
21. APPENDIX E: JUMPER SPECIFICATION_________________________________ 93

21.1
21.2
21.3
21.4
JUMPER LOCATIONS _________________________________________________

JUMPER E1_________________________________________________________
JUMPER BLOCK E2 __________________________________________________
JUMPER BLOCK E3 __________________________________________________
93
93
93
95
22. APPENDIX F: CONNECTORS ___________________________________________ 97

22.1
22.2
CONNECTOR LAYOUT ________________________________________________ 97

MATING CONNECTOR SPECIFICATIONS _________________________________ 98
23. APPENDIX G: BLOCK DIAGRAM _______________________________________ 99
iv
1. Introduction
The VNS-786 is designed to provide a complete embedded solution while offering the latest
in features and technology. This board features support for Pentium, Pentium MMX, AMD
K6-2, AMD K6-3 processors up to 400Mhz and the low power Pentium Tillamook
processor up to 266Mhz.
The PC/AT subsystems normally found in a desktop unit are built in to the VNS-786. These
systems include the CPU, system RAM, system ROM (BIOS), VGA, DMA, counters,
interrupt controllers, keyboard, and speaker of the motherboard; the floppy and two Ultra
DMA EIDE hard disk interfaces of the disk controller; the serial ports COM1 and COM2;
and a parallel port, LPT1. Ports COM3, COM4, and LPT2 are also available.
Additional subsystems are integrated into the VNS-786, which further enhance its PC/AT
functionality. These include a PS/2 style mouse, two USB ports, SoundBlaster Pro
Compatible audio, and a PCI Fast Ethernet interface.
1.1
Feature List
Intel Pentium, MMX, Tillamook, AMD K6-2 or AMD K6-3

Multiple clock speeds; from 133Mhz to 400Mhz
Intel TX Chipset
Up to 128Mbytes of RAM
Award Elite BIOS V4.51
5 Volt only operation
512K L2 synchronous bust cache
32-bit PCI VGA/LCD controller with Windows hardware accelerator
32-bit PCI Fast (100Base-TX) Ethernet interface w/ auto-detect
Four deep-FIFO RS-232 serial ports (RS-485/422 available on second two ports)
Two USB ports with overcurrent protection and USB Keyboard support
SoundBlaster Pro and Windows Sound System compatible audio
Two enhanced parallel ports
PS/2 Keyboard and PS/2 Mouse
Two independent Ultra DMA EIDE
Full support for M-Systems' DiskOnChip
1.2
Functional Specifications
Processor Support:
Intel Pentium to 200 Mhz
Pentium MMX to 233 Mhz
Pentium Tillamook to 266Mhz
AMD K6-2 to 400Mhz
AMD K6-3 to 400Mhz
RAM:
3.3V DIMM supporting up to 128Mbytes of EDO or SDRAM.
BIOS:
One 512K byte 29F040 Flash - Field upgradeable
Core Chipset:
Intel i430TX
Keyboard Controller:
Embedded in Super I/O along with PS/2 Mouse
Real-time Clock:
Embedded in core chipset
Integrated I/O Chip:
Two Super I/O chips that contains the following:
PC/AT compatible floppy disk controller
Four 16550 serial UARTs
Two (enhanced) (PC/AT printer) parallel ports,
TTL compatible
Speaker Driver:
8 ohm, 150 mW speaker drive capability
Network:
AMD 79C973 network controller

32-bit Fast Ethernet, AMD PCNet compatible
Drivers for all popular operating systems
Network Boot support
100/10BASE-T on-board, auto-negotiated
Video:
Chips & Technologies 69000 video controller

PCI based
2 MB internal VRAM
Supports resolutions of 640X480 to 1280X1024
Optional upgrade to 69030 w/ 4MB VRAM
Audio:
16-bit Stereo
SoundBlaster Pro compatible
Windows Sound System compatible
Up to 6 Watts per channel.
Bus Expansion:
PC/104-Plus ISA/PCI bus connection,
6 ISA PC/104 card drive capability
2 PC/104Plus card drive capability
Solid State Disk:
One 32-pin JEDEC socket
Support for SRAM, EPROM, EEPROM, or Flash SSD.
Accepts M-Systems DiskOnChip.
1.3
Physical Specifications
Mechanical:
5.75" x 8.00" x 1.25" (with 1 inch DIMM memory)
Mounting:
Six mounting holes

Four mounting holes for PC/104 and PC/104-Plus boards
Temperature:
0 - 70 C (processor dependent)
Humidity:
5 - 95% RH (non-condensing)
Power:
3.45A at 5 volt (233MMX with 128MB RAM)
1.4
Technical Support
Adastra Systems Corporation technicians and engineers are available for technical support
should the need arise. We are committed to making our product easy to use and will help in
any way we can when you apply our products in your systems.
Technical support may be reached at (510) 732-6900, 8:00 am to 5:00 p.m. Pacific Time.
Additional information and technical support is available on our web site,
http://www.adastra.com. Advanced technical information requires contacting
Adastra for the user identification and password.
1.5
About This Manual
Adastra Systems strives to provide a thorough and complete manual that facilitates the
process of working with our products. This manual will be undergoing additional revisions
to add documentation of features and application notes not available at publication time. If
there is a feature for which you require additional information, please contact Adastra
technical support.
2. CPU
The VNS-786 supports Intel Pentium MMX, Tillamook, AMD K6-2 & -3 CPUs with
clock speeds up to 400 MHz.
To properly configure the board for the different processors, it is necessary to set the
combination of jumpers at positions E2 & E3. The jumpers are 2mm and are numbered E21 to E2-8, where E2-1 is on the right with the tab in the rectangle as shown in the figure
below. The jumper numbers are identified on the circuit board.
2.1
Processor Upgrade
The CPU is a factory installed option and must be specified at the time of ordering.
However, the processor type may be changed in the field if desired. The socket that holds
the processor is a low insertion force (LIF) type and requires a small flat screwdriver to
remove the chip.
The procedure to change the processor is as follows:

1.
2.
3.
4.
Work at a suitable static-free work area.

Ground yourself, the new processor, and the VNS-786 to the work area.
Lay the VNS-786 on the work surface with the processor socket facing up.
Remove the heat sink (if present). This is achieved by pressing down on the spring steel
clip and unhooking it from the socket tab.
5. Remove the old processor. There are special tools for removing processors, but our
experience is that a small flat screwdriver is the best. To remove the processor, gently
work the flat edge between the processor and the socket. Gently rotate the screwdriver
clockwise and counter-clockwise until the processor starts to separate from the socket.
Work your way around the socket until the processor comes out. Be careful not push the
screwdriver in too hard, because it could damage pins or slide off and damage the board.
6. Place the new processor in the socket, taking care to line up the pin 1 indicators of the
chip and socket. Once you are sure that the pins line up, use the palm of your hand to
put pressure on the processor until it is seated. This may take considerable force, so the
board should be supported on the opposite side.
7. Change the jumpers to conform to the new processor type (see next section).
2.1.1
CPU Type Jumper Settings
CPU Core Freq / Bus Freq / Core Voltage

8
Jumper Block E2
6
5
4
3
Intel MMX 233 MHz / 66 MHz / 2.8V

Intel Tillamook 266 MHz / 66 MHz / 1.9V
Intel Tillamook 166 MHz / 66 MHz / 1.9V
Pentium Classic 200 MHz / 66 MHz / 3.3V
AMD K6-III
AMD K6-III
AMD K6-III
AMD K6-III
AMD K6-III
AMD K6-III
AMD K6-III
AMD K6-III
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
400 MHz / 66 MHz / 2.4V

366 MHz / 66 MHz / 2.4V
333 MHz / 66 MHz / 2.4V
300 MHz / 66 MHz / 2.4V
266 MHz / 66 MHz / 2.4V
233 MHz / 66 MHz / 2.4V
200 MHz / 66 MHz / 2.4V
166 MHz / 66 MHz / 2.4V
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
Jumper Block E3
4
3
2
1
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
3
IN
IN
IN
IN
IN
IN
IN
IN
IN
2
IN
IN
IN
1
IN
IN
IN
IN
IN
IN
IN
CPU Core Freq / Bus Freq / Core Voltage

AMD K6-II
AMD K6-II
AMD K6-II
AMD K6-II
AMD K6-II
AMD K6-II
AMD K6-II
AMD K6-II
Jumper Block E2
400 MHz / 66 MHz / 2.2V

366 MHz / 66 MHz / 2.2V
333 MHz / 66 MHz / 2.2V
300 MHz / 66 MHz / 2.2V
266 MHz / 66 MHz / 2.2V
233 MHz / 66 MHz / 2.2V
200 MHz / 66 MHz / 2.2V
166 MHz / 66 MHz / 2.2V
Jumper Block E3
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
Note: check the markings on the CPU. The core voltages may be different from what is
shown here. If the markings do not agree with the description above, consult the tables in
Appendix E.
IN
IN
IN
IN
IN
IN
IN
IN
3. System Memory
The system memory of the VNS-786 consists of one 168-pin DIMM style DRAM module.
There are several types of DIMMs.
3.1
Physical Configurations
There is one DIMM memory socket on the VNS-786. DIMM specifications are 168-pin
unbuffered, 64 bits wide, gold-leaded, 3.3V, non-parity, 60nS EDO or 66MHz or better
SDRAM memory. DIMMS with parity may be used but the parity will be ignored. The
DIMM sockets have gold contacts and using gold leaded DIMMs will improve long-term
reliability. DIMMs may be obtained from Adastra. Compatible modules come in
256Kx64(2M), 512Kx64 (4M), 1Mx64 (8M), 2Mx64 (16M), 4Mx64 (32M), 8Mx64 (64M),
and 16Mx64 (128M) capacity. See Appendix A for ordering information
Installing DIMM Modules

1.
2.
3.
4.
Work at a suitable static-free work area.

Insure that power to the system is off.
Carefully insert the DIMM module straight down into the socket.
Check for proper alignment and orientation of the DIMM. DIMMs are designed with
notches on the edge of the DIMM with the gold fingers. The placement of the notches is
different for 3.3V and 5V DIMMs. The socket on the VNS-786 is polarized so it will
only accept 3.3V DIMMs.
5. Slowly push the module straight into the socket. Apply pressure evenly, along the entire
length of the module. It takes some force to push in the DIMM. Make sure that the
board is supported under the point of pressure.
6. The module should "click" as the latches lock into place in the notches on the edges of
the DIMM.
3.1.1
Removing DIMM Modules
1. Work at a suitable static-free work area.

2. Insure that power to the system is off.
3. Carefully pull the latch tabs on both ends of the socket, away from the module. The
latches are fragile and can be broken. Put gentle pressure to ease the DIMM from the
socket. If the latch is broken, it must be returned to the factory for replacement.
3.2
Changing Memory Configuration
If physical memory is removed or added to the system, BIOS will automatically detect the
changes during the power-on self-test period (POST) after reset.
3.3
Logical Configurations
Portions of the system memory may be allocated as conventional memory, extended

memory, expanded memory, or shadow memory. Conventional, extended, and expanded
memory are all accessible to programs for their own use. Shadow memory is used
exclusively by BIOS. The mix of conventional, extended, expanded, and shadow memory is
dictated primarily by the operating system and programs that will run on the VNS-786.
3.3.1
Conventional Memory
Conventional memory is the first 640K bytes of RAM. This memory block is used
extensively by various operating systems and programs common on the PC/AT.
10
3.3.2
Expanded Memory
Expanded memory refers to a design which allows access to a large address space (e.g. 32M
bytes) on a processor such as the 8088, that has address lines to directly address only 1M
byte of memory. 16K or 64K sections of memory, called pages, can be "switched" into
addressable blocks (holes) in the expanded memory range. Programs must use the BIOS
extension known as LIM (Lotus/Intel/Microsoft) Expanded Memory Services to control the
switching of pages.
3.3.3
Extended Memory
This is memory beyond the first 1 MB. This memory is directly addressable by programs in
the VNS-786. However, it is usually controlled by an installed memory manager, such as
HIMEM.SYS, to prevent programs from using the same area of extended memory.
3.3.4
Shadow Memory
BIOS may be copied from its ROM memory to a bank of RAM. Execution of BIOS can
then take place from the faster RAM memory, enhancing performance. The RAM used is
called shadow RAM.
A special BIOS utility will copy ROM BIOS to shadow RAM if some of the system memory
is allocated for the shadow RAM (using Set-up).
11
12
4. IDE Host Adapter

The VNS-786 contains two built-in Enhanced IDE Host Adapters capable of driving two
hard disks each. The enhanced IDE ports support large disk drives and the UltraDMA
interface. The second port is ideal for use with an ATAPI CD-ROM. When two devices are
connected to a single adapter, they are connected in a typical Master/Slave, daisy chain
fashion.
4.1
Connector
The IDE connectors are 44-pin, dual in-line, 2mm pitch, male headers.
Ref Des Function
J25, J26 IDE
Connector on VNS-786
Mating Cable Connector
Astron AT-SRDPH2-44-2-0-GF Astron
AT-IDCSK2-44-11-GF
13
One or two IDE drives may be connected to each header by using the appropriate flat ribbon
cable. The first drive must be configured as the master; the second drive (at the end of the
cable) must be configured as the slave. Consult the disk drive manual for instructions in this
task.
The 44-pin, 2mm connectors are pin compatible with 2.5" and 1.8" form factor drives.
Power is provided on the cable. An adapter board to convert from the 44-pin, 2mm
connector to a 40-pin, 0.1" connector is required to connect to 3.5" hard disk drives. This
part is available from Adastra and is specified in Appendix A.
IDE Connector pin out:
Pin
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
J25, J26
Signal
Pin
IDE Reset#
2
Data 7
4
Data 6
6
Data 5
8
Data 4
10
Data 3
12
Data 2
14
Data 1
16
Data 0
18
GND
20
DMA_Rqst_A
22
IO Write#
24
IO Read#
26
IO Channel Ready
28
DMA_Ack_A#
30
IRQ 14
32
Addr 1
34
Addr 0
36
Hard Disk Select 0# 38
PU_VCC
40
VCC
42
GND
44
14
Signal
GND
Data 8
Data 9
Data 10
Data 11
Data 12
Data 13
Data 14
Data 15
NC
GND
GND
GND
NC
GND
NC
NC
Addr 2
Hard Disk Select 1#
MGND
MVCC
NC
4.2
IDE Activity LED
An activity LED for the primary and secondary IDE drive may be attached to connector J24.
See Chapter 6 for pin-out information for connector J24 and wiring information for the LED.
Attach the LED Anode to pin J24-17 and the Cathode to pin J24-18.
4.3
Port Address and IRQ
The port addresses and interrupt line used by the primary IDE Host Adapter are:
IDE
Primary
Secondary
Port Addresses
1F0 - 1F7 & 3F6
170 - 177 & 376
Interrupt Line
IRQ 14
IRQ 15
The BIOS is setup to automatically detect your disk drive and select the fastest mode
supported by the drive. The on-board controller supports up to PIO mode 4 and UltraDMA.
If there is no secondary drive the IO and interrupt locations are available to other peripherals
and applications.
15
16
5. Floppy Disk Interface

The floppy disk interface can support one drive. The drive may be 3.5" (720K, 1.44M, or
2.88M), 5.25" (360K or 1.2M).
5.1
Connector
The floppy disk connector is a 34-pin, .1 inch pitch, dual in-line, male header.
Ref Des Connector on VNS-786
J18
3M
2534-6002UG

3M
3414-6634
17
The standard VNS-786 does not support the common two-drive, daisy chain configuration.
The sole drive is connected to the VNS-786 via a straight through 34-conductor cable.
Pin-out for the floppy disk connector is:
Pin
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
Signal
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
NC
GND
NC
J18
Pin
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
Signal
Density Select
NC
NC
Index#
Motor 1#
Drive Select 0#
Drive Select 1#
Motor 0#
Direction
Step#
Write Data#
Write Gate#
Track 0#
Write Protect#
Read Data#
Head Select#
Disk Change
Active low signals are indicated with a # sign at the end of the name.
5.2
Drive Type Specification
The drive type must be specified using the BIOS Setup utility. The drive type can be 5.25",
either 360KB or 1.2MB, or 3.5", either 720KB, 1.44MB, or a 2.44MB, or NONE.
18
6. Console Interface
The VNS-786 supports the PS/2 style mouse and keyboard through one connector. Both
PC/AT and PC/XT style keyboards are supported on this port. The VNS-786 includes BIOS
support for the PS/2 style mouse.
6.1
Connector
The console connector is 20-pin male, 2mm pitch, dual in-line, Hirose DF11. Its function is
shared with the front panel signals.
Ref Des Function
J24
Console
Hirose
DF11-20DP-2DSA
19

Hirose
DF11-20DS-2C
The pin-out for J24 is as follows:

J24
Pin #
1
3
5
7
9
11
13
15
17
19
Signal
Keyboard VCC
Keyboard Data
Mouse VCC
Mouse Data
Push Button Reset Input
Speaker Ext. Battery Input
KB_LOCK#
IDE_ACT_LED+
Reserved
Pin #
2
4
6
8
10
12
14
16
18
20
Signal
Keyboard Clock
GND
Mouse Clock
GND
GND
Speaker +
GND
GND
IDE_ACT_LEDReserved
Keyboard and Mouse wiring diagrams:
GND
GND
+5V
+5V
Mse Data
Key Data
Mse Clock
Key Clock
4
1
4
1
PS/2 Mouse: 6-pin female mini-DIN
PS/2 Keyboard: 6-pin female mini-DIN
Pin-out of connector looking into plug (on mouse or keyboard)
20
6.2
No-Keyboard Operation
Often in embedded systems a keyboard is not used. Standard PC/AT BIOS will report an
error and fail during power-on self-test (POST) after a reset, if a keyboard is not present.
The VNS-786 BIOS allows the system to be configured to either ignore or halt on keyboard
errors. The default setting is to ignore the errors. For more information on BIOS
configuration a BIOS manual is available from Adastra technical support.
6.3
Reset Switch
The reset switch should be a momentary, normally open single pole switch. The switch
should be rated for 10ma, 5V.
PB Reset +
J24-9
PB Reset J24-10
21
6.4
Speaker
The VNS-786 can drive a standard PC/AT speaker or other audio annunciator. The PC/AT
speaker is typically an 8 ohm, 2" speaker. Alternatives to speakers, such as piezo-electric
devices, must have drive characteristics similar to that of a speaker. The VNS-786 will drive
an 8 ohm speaker at approximately 150mW. The circuit for the speaker is shown on the
following page.
+5V
75 ohm
Speaker +
J24-12
Speaker J24-11
Speaker
Signal
22
6.5
Keyboard Lock
Locking the keyboard is possible by pulling J24-15 low. This can be achieved by connecting
a key-lock switch across J24-15 and J24-16. In the lock position, the switch should close
the circuit. Closing this circuit locks the keyboard and disables the PS/2 Mouse.
KB_Lock J24-15
GND
J24-16
6.6
Drive Activity Lights
The VNS-786 has facilities for connecting a drive activity LED for the primary and
secondary IDE drive. The two drives are connected in a wired-or configuration, so that
activity on either drive will light the LED. The circuit provides approximately 9mA to the
LED. The resistor and control signal are provided on-board; one needs only attach the LED
as indicated.
Protected +5V
LED +
J24-17
LED
J24-18
Activity
Signal470 ohm
(on board)
23
6.7
External Battery
An external 3.3 to 3.6V battery can be used as a replacement to the onboard battery. A
schematic for the external battery setup is illustrated below.
VCC
A2
J16-7
U32
VCC_STDBY
A1
2
230-022
BAT54C
D12
VIN
VOUT
GND
ON/OFF#
R105
10K
S0603
NC
230-014
BAT54
D7
LP2980
LP2980
J24-13
1
EXT_BAT
A2
To RTC & CMOS
R111
10K
S0603
On board
Lithium battery
BT1
3.6V
LTC-3PN
A1
230-022
BAT54C
D8
R110
10K
S0603
24
VCC_RTC
7. Serial Communication Interface

The VNS-786 has four 16550-compatible serial ports. These ports may be configured as
COM1, COM2, COM3, and COM4 of a standard PC/AT. The line drivers used conform to
the IEEE RS-232C standard. Two ports support RS-485 signal levels. Using the BIOS
Setup Utility, any of 10 interrupts may be selected for each port. The ports may be disabled,
if desired, to accommodate an alternate serial device such as a modem or fax..
7.1
Connectors
The four serial devices share one connector, a 40-pin, .1 inch pitch, dual in-line, male
header.
Ref Des Connector on VNS-786
J23
3M
2540-6002UG

3M
3417-6640
25
The pin-out is:

J23
Pin #
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
Signal
RS232_DCD1
RS232_RXD1RS232_TXD1RS232_DTR1
GND
RS232_DCD2
RS232_RXD2RS232_TXD2RS232_DTR2
GND
NC
RS232/485_RXD3RS232/485_TXD3MOUSE_VMINUS
GND
NC
RS232/485_RXD4RS232/485_TXD4MOUSE_VMINUS
GND
Pin #
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
Signal
RS232_DSR1
RS232_RTS1
RS232_CTS1
RS232_RI1
VCC
RS232_DSR2
RS232_RTS2
RS232_CTS2
RS232_RI2
VCC
NC
RS232_RTS3/485_TXD3
RS232_CTS3/485_RXD3
NC
VCC
IRSL0
RS232_RTS4/485_TXD4
RS232_CTS4/485_RXD4
IRSL1
VCC
The pin-out for this connector is designed to allow a split cable to be terminated with
standard 9 pin D-sub connectors commonly used for RS232 ports.
When COM3 or COM4 is set to RS485 mode, the RTS bit in the serial ports control
register enables the transmitter.
26
7.1.1
DTE Signals
The COM ports are configured as DTE (Data Terminal Equipment) type serial devices. The
first two COM ports support full modem control lines. The second two COM ports operate
in either RS-232 or in RS-422 / RS-485 mode. In RS-232 mode, transmit, receive, RTS
(ready to send), and CTS (clear to send) are supported. In RS-422 / RS-485 mode, only
transmit and receive are supported.
The signal definitions for a DTE are:
Mnemonic
CTS
DCD
DSR
DTR
GND
NC
RI
RTS
RXDTXD7.1.2
Signal
Clear To Send
Data Carrier Detect
Data Set Ready
Data Terminal Ready
Signal Ground
No Connect
Ring Indicator
Request To Send
Receive Data
Transmit Data
Input/Output
Input
Input
Input
Output
NA
NA (Open)
Input
Output
Input
Output
RS-232 Cabling
An adapter cable is used to transform the 40-pin header to four 9-pin D-sub connectors
common to PC/AT serial ports.
Header to 9-pin
D-Sub
10
12
11
14
13
16
15
18
17
20
19
22
21
24
23
26
25
28
27
30
29
RS232_DCD1
RS232_DSR1
RS232_RXD1RS232_RTS1
RS232_TXD1RS232_CTS1
RS232_DTR1
RS232_R11
GND
VCC
1
6
2
7
3
8
4
9
5
1
RS232_DCD2
RS232_DSR2
RS232_RXD2RS232_RTS2
RS232_TXD2RS232_CTS2
RS232_DTR2
RS232_RI2
GND
VCC
6
2
7
3
8
4
9
5
1
6
RS232/485_RXD3RS232_RTS3/485_TXD3
RS232/485_TXD3RS323_CTS3/485_RXD3
MOUSE_VMINUS
GND
7
3
8
4
9
32
31
34
33
36
35
38
37
40
39
VCC
1
IRSL0
RS232/485_RXD4RS232_RTS4/485_TXD4
RS232/485_TXD4RS323_CTS4/495_RXD4
MOUSE_VMINUS
IRSL1
GND
VCC
27
6
2
7
3
8
4
9
5
7.2
RS422 / RS485 Operation
COMS 3 & 4 on the VNS-786 support RS232 or RS422 / RS485 operation. The BIOS
default and reset default is RS232 mode. Mode configuration is selected in BIOS under
Integrated Peripherals.
RS422 is a full-duplex mode while RS485 is capable of full-duplex as well as a half-duplex
mode.
7.2.1
RS422 / RS485 Full-Duplex Operation
Full Duplex RS422 operation means that the unit can send and receive at the same time, and
that there are separate transmit and receive channels. Since RS422 / RS485 is differential,
this means that a 4 wire interface is used (a transmit pair and a receive pair). Full-duplex
operation is sometimes referred to as 4-Wire operation. Use of the ground wire is optional.
In some situations, it may be advisable to use the ground on one end of the cable only, to
ground reference a cable shield. The driver enable signal is always enabled in RS422 Fullduplex mode.
The diagram below illustrates the VNS-786 RS422 Full-Duplex mode. The pin numbers on
the left of the diagram refer to the connector J23 pin numbers.
VNS-786 RS422
Full Duplex Mode (COM 3)
28
7.2.2
RS485 Half-Duplex Operation
Half-duplex RS485 operations means that the unit uses the same physical channel (in this
case a differential pair) to send and receive, not at the same time. Half-duplex operation is
sometimes referred to as 2-Wire operation. RS422 does not apply to half-duplex mode
because RS422 drivers can not be disabled and hence can not share the wiring channel with
the receiver.
As in the full-duplex case, use of the ground wire is optional. In some situations, it may be
advisable to use the ground on one end of the cable only, to ground reference a cable shield.
The driver is enabled when UART_RTS is asserted (this polarity can be changed if
necessary). The receiver is always enabled. This is configured by BIOS when RS485 mode
is selected. Please refer to section 7.2.3 for details on pin-out information. Any questions in
reference to RS485 Half Duplex Mode can be directed to Adastra Systems Technical
Support.
The diagram below illustrates the VNS-786 RS485 Half-Duplex mode. The pin numbers on
the left edge of the diagram refer to the J23 pin numbers.
VNS-786 RS485
Half Duplex Mode (COM 3)
29
7.2.3
RS422 / RS485 Cabling
The following chart illustrates pin-out connection variations when using RS232, RS422, and
RS485 modes.
J23
Pin #
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
RS232
NC
NC
/ RXD (COM3)
RTS (COM3)
/ TXD (COM3)
CTS (COM3)
Mouse Neg Supply
NC
GND
VCC
NC
NC
/ RXD (COM4)
RTS (COM4)
/ TXD (COM4)
CTS (COM4)
Mouse Neg Supply
NC
GND
VCC
RS422/RS485
NC
NC
/ RXD (COM3)
TXD (COM3)
/ TXD (COM3)
RXD (COM3)
Mouse Neg Supply
NC
GND
VCC
NC
NC
/ RXD (COM4)
TXD (COM4)
/ TXD (COM4)
RXD (COM4)
Mouse Neg Supply
NC
GND
VCC
30
7.2.4
RS422 / RS485 Line Termination
Long RS422 / RS485 transmission lines will benefit from line termination. Proper
termination reduces or eliminates reflections at the ends of the line and reduces system
noise, allowing faster and more robust data transmission.
Only the ends of the differential transmission line should be terminated. In some cases, such
as when one end of the line has a driver acting in RS422 mode (transmit only), only one end
of the line (the receiving end) needs termination.
Ideally the lines are terminated across the pair by a resistor value equal to the differential
impedance of the transmission line pair. This is typically 100 to 140 ohms and varies with
the cabling used. If the line impedance is low, having a pair of terminations (at each of the
cable ends) may present too much of a DC load to the line drivers.
The VNS-786 requires the termination to be wired into the connector.
31
7.2.5
Port Assignments and IRQs
Typically, the VNS-786 port assignments will not need to be changed and are as shown in
the table below. However, it is possible in the BIOS setup utility to select any of the I/O
addresses common to COM1 through COM4 on a PC. The IRQs can be set independently
from the I/O location to many different choices. This is very useful in systems where
additional boards are installed that must use the primary interrupts of IRQ3 and 4. The user
must take care not to accidentally select an interrupt used by another device. For example,
the BIOS will allow the serial interrupt to be set to IRQ15, but this is commonly used as the
secondary IDE interrupt.
Port
1
2
3
4
PC COM
COM1
COM2
COM3
COM4
I/O Address
3F8
2F8
Disabled
Disabled
Interrupt
IRQ 4
IRQ 3
N/A
N/A
32
Functions
RS-232
RS-232
8. Parallel Communication Interface

The VNS-786 supports two enhanced parallel ports. These ports maintain full compatibility
with the PC/AT printer port and add PS/2 bi-directional capability. They are configured as
PC/AT printer ports LPT1 and LPT2 and may be disabled in BIOS.
8.1
Connector
The connectors are identical 26-pin, .1 inch pitch, dual in-line male headers.
Ref Des Function
J21, J22 Parallel Port
3M
2526-6002UG
33

3M
3399-6626
The parallel port pinout is as follows:

J21, J22
Pin Signal
Pin
1
\STROBE 2
3
D0
4
5
D1
6
7
D2
8
9
D3
10
11 D4
12
13 D5
14
15 D6
16
17 D7
18
19 \ACK
20
21 BUSY
22
23 PE
24
25 SLCT
26
Signal
\AUTOFD
ERR
\INIT
\SLCTIN
GND
GND
GND
GND
GND
GND
GND
GND
NC
An adapter cable may be used to change from the 26 pin header style of the VNS-786 to the
more common 25-pin female D-sub. See Appendix A for adapter part numbers and
ordering.
2
10
12
11
14
13
16
15
18
17
20
19
10
22
21
11
24
23
12
26
25
13
14
15
16
17
18
19
20
21
22
23
24
25
NC
26-pin Header to 25-pin D-Sub conversion
34
8.2
Port Assignments and IRQs
The standard PC/AT parallel port is an output only device. The VNS-786 parallel ports are
fully bi-directional. The bi-directional functions are compatible with those of a PS/2 style
parallel port. This functionality is always available and does not conflict with normal printer
use. The parallel port mode, I/O addresses, and IRQs are defined in the BIOS setup under
Integrated Peripherals.
Port
1
2
PC COM
LPT1
LPT2
I/O Address
378
Disabled
Interrupt
IRQ 7
N/A
35
Functions
Standard or SPP
36
9. Ethernet Interface
The VNS-786 on-board Ethernet interface is based on the Advanced Micro Devices
AM79C973 PCI Fast Ethernet Controller. This network controller supports a 10/100Base-T
interface. The device auto-negotiates whether a 10Mbit/sec or 100Mbit/sec connection is to
be used.
All major network operating systems, and several real-time and embedded operating systems
support the interface.
9.1
Connectors
The 10/100Base-T is an 8-pin, 2mm pitch, dual in-line, Hirose, male header. The network
LEDs are located on a 6-pin, 2mm pitch, dual in-line, Hirose, male header.
Ref Des Function
J5
10/100Base-T
J6
Network LEDs
Hirose
DF11-8DP-2DSA
Hirose
DF11-6DP-2DSA
37

Hirose
DF11-8DS-2C
Hirose
DF11-6DS-2C
J5
Pin #
1
3
5
7
Signal
XMT+
RCV+
Unused Pair A+ Terminated
Unused Pair A- Terminated
Pin #
2
4
6
8
Signal
XMTUnused Pair B+ Terminated
RCVUnused Pair B-Terminated
J6
Pin #
1
3
5
Signal
Act_LED- (LED Cathode)
Link_LED- (LED Cathode)
NC
Pin #
2
4
6
Signal
Act_LED+ (LED Anode)
Link_LED+ (LED Anode)
NC
There are two status LEDs associated with the 10/100Base-T connection. One indicates the
link status of the hub connection and the other indicates activity. J6 is used to connect to
the LEDs.
9.1.1
RJ 45 Pin-Out
An adapter cable converting the J5 8-pin header to a standard 10/100Base-T RJ45 jack is
available.
The 10/100Base-T network lines are terminated with 75 ohms to chassis ground through a
0.01uF, 2kV capacitor. The network chassis ground is tied to the VNS-786 board ground
through jumper E8. Normally E8 is hardwired (soldered) in place, tying the network ground
to the board ground. The lower left mounting hole is network ground; all other mounting
holes are board ground.
38
RJ-45 Pin-out:
Pin
1
2
3
4
5
6
7
8
RJ-45
Signal
Transmit Data +
Transmit Data Receive Data +
No Connect
No Connect
Receive Data No Connect
No Connect
1 2 3 4 5 6 7 8
RJ-45 Connector
Front View
39
9.1.2 Network Indicator LEDs

There are two status LEDs associated with the 10/100Base-T connection. One indicates the
link status of the hub connection and the other indicates activity. J6 is used to connect to
the LEDs. The board provides approximately 4mA per LED.
+5V
470 ohm
LED +
J6-2
LED
J6-1
Activity
Signal470 ohm
LED +
J6-4
Link Signal
LED
J6-3
9.2
I/O Address and Interrupt Configuration
The on-board PCI Ethernet interface is configured by the BIOS configuration manager. It
will be assigned to an available I/O and IRQ location.
9.3
Network Software Drivers
Drivers for the popular PC/AT network operating systems are available on the Adastra
Systems web site.
40
10. VGA Interface

The VNS-786 is based on a Chips and Technologies 69000 PCI video controller with 2
Mbytes of memory (or optionally, a 69030 with 4M of memory). This controller can drive
conventional CRT displays with resolution up to 1280x1024. Resolutions of 640x480 and
800x600 support 16M colors while 1024x768 supports 64K and 1280x1024 support 256
colors. It is capable of driving a variety of flat-panel displays including electro-luminescent
(EL), gas plasma, passive LCD, and active LCD.
10.1
Connectors
There are three VGA display connectors on the VNS-786, one for standard CRT VGA
monitors and a pair for flat-panel displays. Another connector is used for video overlay.
Ref Des
J1
J2
J3
J4
J19
Function
Back-light
Flat Panel
Flat Panel
VGA - CRT
Video Overlay
AMP
640456-5
Astron AT-SRDPH2-50-2-0-GF
Hirose DF11-14DP-2DSA
41

AMP
640044-5 (for #22 AWG)
Astron
AT-IDCSK2-50-11-15G
Astron
AT-IDCSK2-20-11-15G
Hirose
DF11-14DS-2C
Astron
AT-IDCSK2-40-11-15G
The VGA connector, J4, is a 14-pin, 2mm pitch, dual in-line header used for VGA
compatible CRT monitors. A simple cable adapter can be used to map this connector to the
standard 15-pin high density D-SUB connector commonly used for VGA. See Appendix A
for ordering information.
The pin-out for the VGA connector is:
J4
Pin #
1
3
5
7
9
11
13
Signal
RED
BLUE
Signal GND
VGA Chassis GND
NC
NC
HSYNC
Pin #
2
4
6
8
10
12
14
Signal
GREEN
DDC Clock
VGA Chassis GND
VGA Chassis GND
Signal GND
DDC Data
VSYNC
VGA chassis ground and signal ground are tied together on the VNS-786 printed circuit
board.
The Flat Panel connectors consist of a 50-pin and a 20-pin connector. The 50-pin connector
at J2 is a 2mm pitch, dual in-line connector and is solely used when integrating TFT or LCD
displays up to 24-bit. The 20-pin connector at J3 is a 2mm pitch, dual in-line connector and
is used in conjunction with J2 to drive 36-bit panels. Flat Panel pigtail cables for mating to
these connectors are available from Adastra Systems. See Appendix A for ordering
information. Connector J1 is a 5-pin 0.1 pitch single-in-line header with signals used to
control flat panel backlights.
42
The pin-outs for the connectors J1, J2, and J3 are:

J2
Pin #
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
Signal
GND
P22
P21
GND
P18
P17
GND
P14
P13
GND
P10
P9
GND
P6
P5
GND
P2
P1
FP_Voltage
ENABLK
ENAVDD
SHFCLK
LP
M/DE
FLM
Description
Signal Ground
Panel Data 22
Panel Data 21
Signal Ground
Panel Data 18
Panel Data 17
Signal Ground
Panel Data 14
Panel Data 13
Signal Ground
Panel Data 10
Panel Data 9
Signal Ground
Panel Data 6
Panel Data 5
Signal Ground
Panel Data 2
Panel Data 1
+5 or +3.3V
Enable Back Light
Enable VDD Control
Data Shift Clock
Line Load Pulse
LCD M or Display enable
First Line Marker
Pin #
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
Signal
P23
GND
P20
P19
GND
P16
P15
GND
P12
P11
GND
P8
P7
GND
P4
P3
GND
P0
FP_Voltage
ENAVEE
GND
GND
GND
FPV/PIXCK
GND
Description
Panel Data 23
Signal Ground
Panel Data 20
Panel Data 19
Signal Ground
Panel Data 16
Panel Data 15
Signal Ground
Panel Data 12
Panel Data 11
Signal Ground
Panel Data 8
Panel Data 7
Signal Ground
Panel Data 4
Panel Data 3
Signal Ground
Panel Data 0
+5 or +3.3V
Enable LCD Bias
Signal Ground
Signal Ground
Signal Ground
5 /3.3V or Continuous Clk
Signal Ground
To reduce cable noise, the connector is pinned-out so that each two data lines are bracketed
by two ground lines on a ribbon cable. The clock and synch signals have a ground on each
side to maximize the noise reduction.
The data shift clock polarity can be inverted by BIOS software setup.
J2-48 is normally used as a switched flat panel voltage. If necessary, a resistor build option
allows J2-48 to output a continuous pixel clock. This can be used to implement an LVDS
transmitter with a passive LCD display. For LVDS implementation with TFT displays, the
pixel clock is not required; the SHFCLK (pin 43) is used.
43
J3
Pin #
1
3
5
7
9
11
13
15
17
19
Signal
GND
P34
P33
GND
P30
P29
GND
P26
P25
GND
Description
Signal Ground
Panel Data 34
Panel Data 33
Signal Ground
Panel Data 30
Panel Data 29
Signal Ground
Panel Data 26
Panel Data 25
Signal Ground
Pin #
2
4
6
8
10
12
14
16
18
20
Signal
P35
GND
P32
P31
GND
P28
P27
GND
P24
NC
Description
Panel Data 35
Signal Ground
Panel Data 32
Panel Data 31
Signal Ground
Panel Data 28
Panel Data 27
Signal Ground
Panel Data 24
No Connect
Pin #
2
4
Signal
FP_Voltage
FP_Voltage
Description
+5 or +3.3V
+5 or +3.3V
J1
Pin #
1
3
5
Signal
+12V
ENABLK
GND
Description
+12 Volt (fused)
Enable Back Light
Ground
5 7
...
...
2
J2 & J3 pin numbering

(standard 2mm scheme)
4 6 8
10.2 Panel Voltage
Many display panels, LCD's in particular, require lower voltages for operation. The
VNS786 has the ability to provide panels with either +3.3V or +5V. In either case, the flat
panel signals are driven to +3.3V (for logic high) by the video controller. The voltage is
determined by E1, included on the board. The flat panel voltage pins (FP_Voltage) will be
determined by the chart below. This jumper is to be set while no power is being applied to
the board. In either case, the flat panel signals are driven to +3.3V (for logic high) by the
video controller.
E1
1-2
2-3
FP_Voltage
+5V
+3.3V
44
10.3 Pin to Panel correlation chart
Pin#
Pin
Name
W6
P0
V7
P1
Y6
P2
W7
P3
V8
P4
Y7
P5
W8
P6
U9
P7
V9
P8
Y8
P9
W9
P10
Y9
P11
V10
P12
W10
P13
Y10
P14
U10
P15
U11
P16
Y11
P17
W11
P18
V11
P19
Y12
P20
Y13
P21
V12
P22
U12
P23
W13
P24
Y14
P25
V13
P26
W14
P27
Y15
P28
V14
P29
W15
P30
Y16
P31
V15
P32
Y17
P33
W16
P34
U15
P35
Y5
CLK
Pixels/Clock:
Mono
SS
Mono
DD
Mono
DD
Color
TFT
Color
TFT
Color
TFT
Color
TFT HR
8-bit
8-bit
16 bit
9/12/16
bit
B0
B1
B2
B3
B4
G0
G1
G2
G3
G4
G5
R0
R1
R2
R3
R4
-
18/24 bit
36-bit
18/24 bit
B0
B1
B2
B3
B4
B5
B6
B7
G0
G1
G2
G3
G4
G5
G6
G7
R0
R1
R2
R3
R4
R5
R6
R7
-
CLK
1
CLK
1
FB0
FB1
FB2
FB3
FB4
FB5
SB0
SB1
SB2
SB3
SB4
SB5
FG0
FG1
FG2
FG3
FG4
FG5
SG0
SG1
SG2
SG3
SG4
SG5
FR0
FR1
FR2
FR3
FR4
FR5
SR0
SR1
SR2
SR3
SR4
SR5
CLK
2
FB0
FBI
FB2
FB3
SB0
SB1
SB2
SB3
FG0
FG1
FG2
FG3
SG0
SG1
SG2
SG3
FR0
FR1
FR2
FR3
SR0
SR1
SR2
SR3
CLK
2
P0
P1
P2
P3
P4
P5
P6
P7
CLK
8
UD3
UD2
UD1
UD0
LD3
LD2
LD1
LD0
CLK
8
UD7
UD6
UD5
UD4
UD3
UD2
UD1
UD0
LD7
LD6
LD5
LD4
LD3
LD2
LD1
LD0
CLK
16
45
Color
STN
SS
8-bit
(4bP)
R1
B1
G2
R3
B3
G4
R5
B5
CLK
2-2/3
Color
STN
SS
16-bit
(4bP)
R1
G1
B1
R2
G2
B2
R3
G3
B3
R4
G4
B4
R5
G5
B5
R6
CLK
5-1/3
Color
STN
DD
8-bit
(4bP)
UR1
UG1
UB1
UR2
LR1
LG1
LB1
LR2
CLK
2-2/3
Color
STN
DD
16-bit
(4bP)
UR0
UG0
LB0
UR1
LR0
LG0
LB0
LR1
UG1
UB1
UR2
UG2
LG1
LB1
LR2
LG2
CLK
5-1/3
Color
STN
DD
24-bit
UR0
UG0
LB0
LR0
LG0
LB0
UR1
UG1
UB1
LR1
LG1
LB1
UR2
UG2
UB2
LR2
LG2
LB2
UR3
UG3
UB3
LR3
LG3
LB3
CLK
8
10.4 Panel Power Sequencing
The C&T 690X0 controller provides panel power sequencing control lines. These are
brought out to the flat panel connectors; ENA_VDD can be used to sequence the flat panel
logic supply (+5 or +3.3V). ENA_VEE can be used to sequence the LCD bias. ENA_BKL
can be used to sequence the backlight supply (usually +12V).
The flat panel signals, including the sync controls, are not active until the ENA_VDD signal
has been toggled high. The ENA_VEE signal is not active until the flat panel signals begin
toggling. The picture below illustrates this sequencing.
VNS-786 Panel Power Sequencing
The same logic applies when turning off signals. ENA_VEE goes low which stops the Flat
Panel signals from toggling. This in turn will cause ENA_VDD to go low.
The Flat Panel Voltage (+5 or +3.3V, selected by jumper E1) is present whenever the VNS786 is powered.
46
10.5 VGA Video Modes
The 690X0 BIOS supports all standard VGA modes as well as a wide selection of extended
modes. The following tables lists the modes and vertical refresh rates that this BIOS can
support.
Standard Video Display Modes
Video
Mode
00h
VESA
VBE
Mode
01h
02h
03h
04h
05h
06h
07h
08h0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
Pixel
Resolution
Colors
320x200
320x350
360x400
320x200
320x350
360x400
640x200
640x350
720x400
640x200
640x350
720x400
320x200
320x200
320x200
320x200
640x200
720x350
720x350
720x400
Reserved
16(gray)
16(gray)
16
16
16
16
16(gray)
16(gray)
16
16
16
16
4
4(gray)
4(gray)
4
2
Mono
Mono
Mono
-
320x200
640x200
640x350
640x350
640x480
640x480
320x200
16
16
Mono
16
2
16
256
Mode
Type
Text
Text
Text
Text
Graph
Graph
Graph
Text
Display
Adapter
Font
Size
Char.
Display
CGA
EGA
VGA
CGA
EGA
VGA
CGA
EGA
VGA
CGA
EGA
VGA
All
CGA
EGA
VGA
All
MDA
EGA
VGA
8x8
8x14
9x16
8x8
8x14
9x16
8x8
8x14
9x16
8x8
8x14
9x16
8x8
8x8
8x8
8x8
8x8
9x14
9x14
9x16
40x25
40x25
40x25
40x25
40x25
40x25
80x25
80x25
80x25
80x25
80x25
80x25
40x25
40x25
40x25
40x25
80x25
80x25
80x25
80x25
Dot
Clock
(MHz)
25
25
28
25
25
28
25
25
28
25
25
28
25
25
25
25
25
28
28
28
E/VGA
E/VGA
E/VGA
E/VGA
VGA
VGA
VGA
8x8
8x8
8x14
8x14
8x16
8x16
8x8
40x25
80x25
80x25
80x25
80x30
80x30
40x25
25
25
25
25
25
25
25
Horiz.
Freq.
(KHz)
31.5
31.5
31.5
31.5
31.5
31.5
31.5
31.5
31.5
31.5
31.5
31.5
31.5
31.5
31.5
31.5
31.5
31.5
31.5
31.5
Vert.
Freq.
(Hz)
70
70
70
70
70
70
70
70
70
70
70
70
70
70
70
70
70
70
70
70
Video
Mem.
(KB)
256
256
256
256
256
256
256
256
256
256
256
256
256
256
256
256
256
256
256
256
31.5
31.5
31.5
31.5
31.5
31.5
31.5
70
70
70
70
60
60
70
256
256
256
256
256
256
256
Graph
Graph
Graph
Graph
Graph
Graph
Graph
47
Video
Mode
20h
VESA
VBE
Mode
120
640x480
22h
122
24h
Pixel
Resolution
Colors
Mode
Type
Mem.
Org
Font
Size
Char.
Display
16
Graph(L)
PackPix
8x16
80x30
800x600
16
Graph(L)
PackPix
8x16
100x37
124
1024x768
16
Graph(L)
PackPix
8x16
128x48
28h
128
1280x1024
16
Graph(L)
PackPix
8x16
160x64
2Ah*
30h
101h
1600x1200
640x480
16
256
Graph(L)
Graph(L)
PackPix
PackPix
8x16
8x16
200x75
80x30
31h
32h
100h
103h
640x400
800x600
256
256
Graph(L)
Graph(L)
PackPix
PackPix
8x16
8x16
80x25
100x37
34h
105h
1024x768
256
Graph(L)
PackPix
8x16
128x48
38h
107h
1280x1024
256
Graph(L)
PackPix
8x16
160x64
3Ah*
40h
110h
1600x1200
640x480
256
32K
Graph(L)
Graph(L)
PackPix
PackPix
8x16
8x16
200x75
80x30
41h
111h
640x480
64K
Graph(L)
PackPix
8x16
80x30
42h
113h
800x600
32K
Graph(L)
PackPix
8x16
100x37
Notes: I = Interlaced L = Linear * = Modes 2Ah and 3Ah are for flat panel only.
48
Dot
Clock
(MHz)
25.175
31.5
36
36
40
49.5
56.25
44.9
65
78.75
94.5
78.75
108
25.175
31.5
36
25.175
36
40
49.5
56.25
44.9
65
78.75
94.5
78.75
108
25.175
31.5
36
25.175
31.5
36
36
40
49.5
56.25
Horiz.
Freq.
(KHz)
31.5
37.5
43.3
35.1
37.9
46.9
53.7
35.5
48.4
60
68.7
47
64
31.5
37.5
43.3
31.5
35.1
37.9
46.9
53.7
35.5
48.4
60
68.7
47
64
31.5
37.5
43.3
31.5
37.5
43.3
35.1
37.9
46.9
53.7
Vert.
Freq.
(Hz)
60
75
85
56
60
75
85
43(I)
60
75
85
43(I)
60
60
75
85
70
56
60
75
85
43(I)
60
75
85
43(I)
60
60
75
85
60
75
85
56
60
75
85
Video
Mem.
(KB)
256
256
256
256
256
256
256
384
384
384
384
640
640
938
300
300
300
256
469
469
469
469
768
768
768
768
1280
1280
1875
600
600
600
600
600
600
938
938
938
938
Video
Mode
43h
VESA
VBE
Mode
114h
800x600
44h
116h
45h
Pixel
Resolution
Colors
Mode
Type
Mem.
Org
Font
Size
Char.
Display
64K
Graph(L)
PackPix
8x16
100x37
1024x768
32K
Graph(L)
PackPix
8x16
128x48
117h
1024x768
64K
Graph(L)
PackPix
8x16
128x48
50h
112h
640x480
16M
Graph(L)
PackPix
8x16
80x30
52h
115h
800x600
16M
Graph(L)
PackPix
8x16
100x37
6Ah
102h
800x600
16
Graph
Planar
8x16
100x37
64h
104h
1024x768
16
Graph
Planar
8x16
128x48
68h
106
1280x1024
16
Graph
Planar
8x16
160x64
70h
101h
640x480
256
Graph
PackPix
8x16
80x30
71h
72h
100h
103h
640x400
800x600
256
256
Graph
Graph
PackPix
PackPix
8x16
8x16
80x25
100x37
74h
105h
1024x768
256
Graph
PackPix
8x16
128x48
78h
107h
1280x1024
256
Graph
PackPix
8x16
160x64
Dot
Clock
(MHz)
36
40
49.5
56.25
44.9
65
44.9
65
25.175
31.5
36
36
40
36
40
49.5
56.25
44.9
65
78.75
94.5
78.75
108
25.175
31.5
36
25.175
36
40
49.5
56.25
44.9
65
78.75
94.5
78.75
108
Horiz.
Freq.
(KHz)
35.1
37.9
46.9
53.7
35.5
48.4
35.5
48.4
31.5
37.5
43.3
35.1
37.9
35.1
37.8
46.9
53.7
35.5
48.4
60
68.7
47
64
31.5
37.5
43.3
31.5
35.1
37.9
46.9
53.7
35.5
48.4
60
68.7
47
64
Vert.
Freq.
(Hz)
56
60
75
85
43(I)
60
43(I)
60
60
75
85
56
60
56
60
75
85
43(I)
60
75
85
43(I)
60
60
75
85
70
56
60
75
85
43(I)
60
75
85
43(I)
60
Notes: I = Interlaced L = Linear
The VNS-786 comes standard with 2 Mbytes of memory. This is sufficient for the all of the
modes of operation in the preceding table. 4 Mbytes of memory is available optionally.
49
Video
Mem.
(KB)
938
938
938
938
1536
1536
1536
1536
900
900
900
1407
1407
256
256
256
256
384
384
384
384
640
640
300
300
300
256
469
469
469
469
768
768
768
768
1280
1280
10.6 Zoomed Video Overlay
The video overlay feature of the VNS is very powerful. It can display live video on a VGA
display, either a CRT or a flat panel. The video is windowed and its size and location are
completely programmable. Color or coordinate keying may be used to determine the size,
shape, and position of the video window. Frame capture is also possible with the VNS-786
and a front-end video digitizer. Because of its ability to show live video, the frame capture
function has the additional feature of being able to display the live image before capturing
the image. This is an important feature when aligning the object is critical.
The VNS-786 with its C&T 690X0 accepts digital video input in Zoomed Video format.
When programmed to for Zoom Video mode, the 69000 accepts video encoded by a YUV 42-2 color encoding scheme. The Y component represents luminance (brightness), and the
UV components together represent color. To accurately reproduce each pixel one would
normally need one each of the Y, U, and V components, but the 4-2-2 format takes
advantage of the fact that the eye is more sensitive to brightness than color. In this coding
scheme, each pixel has its own Y component but two adjacent pixels share a set of U and V
components. Thus for every four pixels of Y data, there are two pixels of U data and two
pixels of V data. This representation saves storage space at the cost of a slight smearing of
abrupt color transitions. Similar edge smearing can be seen on ordinary television sets,
because TV broadcast systems also allocate less bandwidth to color information than to
brightness information.
Note that it is also possible to input RGB data in Zoomed Video mode, but this option is not
heavily used and so is not described here.
50
10.6.1.1 Zoomed Video Pin-out

The following connector pin-out is for the Zoomed Video input mode.
J19
Pin
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
Signal
GND
GND
GND
CK_REF
VREF
GND
GND
GND
GND
HREF
GND
GND
GND
GND
GND
GND
GND
I2C_CK
GND
GND
Description
Signal Ground
Signal Ground
Signal Ground
External pixel clock input
External vertical sync input
Signal Ground
Signal Ground
Signal Ground
Signal Ground
External horizontal sync input
Signal Ground
Signal Ground
Signal Ground
Signal Ground
Signal Ground
Signal Ground
Signal Ground
I2C clock
Signal Ground
Signal Ground
51
Pin
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
Signal
UV7
UV6
UV5
UV4
UV3
Reserved
UV2
UV1
UV0
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
I2C_DAT
VCC
+12V
Description
UV color component
UV color component
UV color component
UV color component
UV color component
No Connect
UV color component
UV color component
UV color component
Luminance component
Luminance component
Luminance component
Luminance component
Luminance component
Luminance component
Luminance component
Luminance component
I2C data
Fused +5V to peripheral
Fused +12V to peripheral
10.6.1.2 Zoom Video Interface Block Diagram

The following is a block diagram of a multimedia system featuring the VNS and a video
digitizer such as that found on the DVA-104A+.
Synchronized RGB Video

Video
Source,
For
example,
Camera or
VCR
NTSC,SECAM,
or PAL
Video Digitizer
For example,
Philips 7110
on the
DVA-104A+
Video
Controller
YUV
Video
Mux
Display Data
and Sync
Signals
Display
Sync and
Clock
J19 Video
Overlay
Connector
Interface to
VNS using
YUV Input
VGA
Display Interface
J2 and J3 for flat
panels or J4 for
CRT displays
690X0 VGA Controller
VGA Memory
VNS with a 690X0 Controller

using
YUV Interface
52
11. Audio Interface

The VNS-786 has an on-board Audio interface, based on Crystals CS4235 Audio driver
chip. The audio controller is compatible with both SoundBlaster Pro and Windows Sound
System interfaces.
The VNS-786 has an on-board amplifier to drive speakers, eliminating the requirement for
external amplifiers in most applications.
The interface is supported by all major operating systems. Standard drivers are available
through Adastras website.
53
11.1 Audio Connectors
The DSP/Option connector, J7, is an 18-pin, 2mm pitch, Hirose, dual-in-line connector.
The Audio Output, J8, connector is a 10-pin, 2mm pitch, Hirose, dual-in-line connector.
The Audio Input, J9, connector is a 20-pin, 2mm pitch, Hirose, dual-in-line connector.
The MIDI/Gameport, J10, connector is a 16-pin, 2mm pitch, Hirose, dual-in-line connector.
Ref Des
J7
J8
J9
J10
Function
DSP/Option
Audio Output
Audio Input
MIDI/Gameport
Hirose
DF11-18DP-2DSA
Hirose
DF11-10DP-2DSA
Hirose
DF11-20DP-2DSA
Hirose
DF11-16DP-2DSA

Hirose
DF11-18DS-2C
Hirose
DF11-10DS-2C
Hirose
DF11-20DS-2C
Hirose
DF11-16DS-2C
11.2 Audio Connector Pin-Outs
The pin-outs for the audio connectors are as follows:
Pin #
1
3
5
7
9
11
13
15
17
J7 (DSP/Option)
Signal
Pin #
GND
2
NC
4
GND
6
GND
8
GND
10
AUDIO BRESET
12
GND
14
AUDIO SDATA
16
GND
18
54
Signal
AUDIO MUTE
AUDIO VOLUP
AUDIO VOLDN
AUDIO FSYNC
AUDIO SDOUT
AUDIO SCLK
AUDIO SDIN
AUDIO MCLK
AUDIO LRCLK
J8 (Audio Output)
Pin #
Signal
Pin #
Signal
1
LINE OUT common (connect to sleeve
2
LINE OUT right channel (connect to ring
terminal of LINE OUT jack)
3
Reserved
4
LINE OUT left channel (connect to tip
5
R_SPEAKER_NEG (connect to (-)
6
R_SPEAKER_POS (connect to (+)
terminal of right channel speaker)
terminal of right channel speaker)
7
L_SPEAKER_NEG (connect to (-)
8
L_SPEAKER_POS (connect to (+)
terminal of left channel speaker)
terminal of left channel speaker)
9
Audio Speaker Switch (-)
10
Audio Speaker Switch (+)
Note for J8 pin-out information: Pins 5-8 are active only when 9 and 10 are tied
together, to enable the on-board audio amplifier.
Signal
J9 (Audio Input)
Pin #
2
4
6
8
10
12
14
16
18
20
Pin #
1
3
5
7
9
11
13
15
17
19
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
Pin #
1
3
5
7
9
11
13
15
J10 (MIDI/Gameport)
Signal
Pin #
Signal
VCC (Fused)
JOY_SWA
2
JOY_TA
GND
4
GND
JOY_TB
6
JOY_SWB
VCC
8
VCC
JOY_SWC
10
JOY_TC
MIDI_OUT
12
JOY_TD
JOY_SWD
14
MIDI_IN
NC
16
55
Signal
AUDOUT_R
AUDOUT_L
AUDIN_R_LINE
AUDIN_L_LINE
AUDIN_MONO
AUDIN_MIC
AUDIN_MIC_BIAS
AUDIN_C_CD
AUDIN_R_CD
AUDIN_L_CD
11.3 Audio Input/Output
The output is capable of driving 8 ohm speakers at 2W per channel or 4 ohm speakers at 3W
per channel with less than 1% THD (Total Harmonic Distortion). In order to obtain the very
low noise levels that can be achieved by the VNS-786, care must be taken to avoid noise
pickup on the input wiring. Here are some suggestions:
For the microphone input, use shielded cable and a shielded input connector if possible.
This input is especially sensitive because it has more gain than the other inputs. Use a stereo
input jack even if you are intending to use a mono microphone. Many common mono
microphones have stereo plugs with both channels wired to the same microphone element.
Plugging this arrangement into a mono phone jack will short out the input signal because of
the physical construction of the mono jack.
Use twisted-pair (or twisted-triple) wiring to each input device. The twists should be as tight
as possible - about 8-10 twists per inch is usually sufficient. Using shielded cable is even
better, especially for relatively long wiring runs.
Avoid running audio input wiring near noisy devices such as power supplies. Whenever
possible, lay the wiring tightly against an inside chassis wall rather than running it over PC
boards and other powered circuitry.
In some cases, ground loops may arise if an audio cable is grounded both at the VNS-786
board and at the source device or jack. Try temporarily insulating input jacks if they are
mounted to a metal chassis. If this proves helpful, the input jacks can be mounted with
insulating washers or fully isolated audio jacks can be obtained.
Audio engineering handbooks have many other techniques and suggestions for minimizing
noise and hum pickup, especially on long wiring runs.
Here are some other tips and suggestions regarding input wiring:
If you are hooking up the audio output from the Redbook (audio output) connector on a
CD-ROM drive, be aware that several different pinouts are in use by CD-ROM drive
manufacturers even though the connectors are generally physically interchangeable. You
may have to refer to the drives documentation to determine the correct wiring for the cable.
Note that the connector is arranged so that every input pin is physically adjacent to a ground
in the other row of the connector. This was done to facilitate the use of individual shielded
cables where required.
56
The joystick or game port connector, J10, is pinned-out so that it is a one-to-one connection
to a DB15S game connector. A commercial analog joystick can be plugged directly into the
DB15S connector.
An adapter cable to the standard DB15 is available from Adastra. Refer to Appendix A for
cable information.
57
58
12. Universal Serial Bus (USB) Interface

USB features one "Universal" plug type for all USB peripheral-to-PC connections. No
separate software should be needed. USB driver support is built-in to the latest versions of
the Windows operating system. You will need Windows 95 OSR 2.1 or Windows 98.
USB carries data at the rate of 12 megabits per second, which is sufficient for "medium to
low-speed peripherals". This broad category includes telephones, digital cameras, modems,
keyboards, mice, digital joysticks, some CD-ROM drives, tape and floppy drives, digital
scanners and specialty printers. USB's data rate also accommodates a whole new generation
of peripherals, including MPEG-2 video-base products, data gloves and digitizers.
Computer-telephony integration is expected to be a big growth area for PCs, and USB can
provide an interface for Integrated Services Digital Network (ISDN) and digital PBXs.
While USB will not replace traditional PC ports overnight, it is expected to rapidly become
the preferred means of connect I/O devices (like digital joysticks) as well as "medium-speed"
peripherals such as phones, scanners and digital cameras. Higher-speed peripherals, such as
59
mass storage devices, will require connectivity with higher data rates than USB currently
provides.
Technically, you can connect up to 127 individual USB peripherals at one time. The VNS786 comes with two USB ports and further expansion may be achieved by adding external
hubs.
With USB-compliant PCs and peripherals, you just plug them in and turn them on. USB
makes the whole process automatic. There is no need to open your chassis, and you don't
need to worry about add-in cards, DIP switch settings or IRQs. USB features the ability to
"hot-swap" peripherals. This means that it is not necessary to power down and restart the
VNS-786 in order to install or remove a new device. The VNS-786 automatically detects
the peripheral and configures the necessary software.
More information on USB is available from the USB web site at www.usb.org.
12.1 Connector
J12 is 0.1 inch pitch, 10-pin, dual-in-line header strip.

J12
Pin #
1
3
5
7
9
Signal
Pin #
2
4
6
8
10
USB0 5V
USB0 DUSB0 D+
USB0 GND1
USB0 GND0
Signal
USB1 5V
USB1 DUSB1 D+
USB1 GND1
USB1 GND0
The two rows (odd & even) of J12 each have a USB channel. Each row can mate with
commonly available USB cable assemblies, which have 5x1 (or sometimes 4x1) 0.1 pitch
strip socket connectors on one end. See Appendix A for cable ordering information.
60
13. ISA and PCI Bus Expansion

For expansion, the VNS-786 provides a PC/104-Plus socket. This industry standard bus
provides both ISA and PCI bus signals. The PC/104-Plus standard is downward compatible
with PC/104 and enables the use of standard off-the-shelf PC/104 and PC/104-Plus adapter
cards.
13.1 Connectors
Ref Des
J15
J14
J13
Function
PC104/ISA16
PC104/ISA8
PCI Expansion
Samtec ESW-120-14-G-D
Samtec ESW-132-14-G-D
Samtec ESQT-130-03-L-Q-368

Samtec HCMD-20-02
Samtec HCMD-32-02
Samtec ESQT-130-02-L-Q-368
J14 is a 64-pin, dual row socket connector, with 0.1" x 0.1" pitch, which implements the
standard 8-bit ISA bus signals. J15 is a 40-pin connector of the same style and implements
the ISA bus 16-bit expansion signals. All ISA bus signals are supported.
61
The pin-out for PC/104 is shown below.
Pin #
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
J14
Signal
Pin #
\IOCHK
B1
SD7
B2
SD6
B3
SD5
B4
SD4
B5
SD3
B6
SD2
B7
SD1
B8
SD0
B9
IOCHRDY B10
AEN
B11
SA19
B12
SA18
B13
SA17
B14
SA16
B15
SA15
B16
SA14
B17
SA13
B18
SA12
B19
SA11
B20
SA10
B21
SA9
B22
SA8
B23
SA7
B24
SA6
B25
SA5
B26
SA4
B27
SA3
B28
SA2
B29
SA1
B30
SA0
B31
GND
B32
J15
Pin # Signal Pin #
C0
GND
D0
C1
\BHE
D1
C2
LA23
D2
C3
LA22
D3
C4
LA21
D4
C5
LA20
D5
C6
LA19
D6
C7
LA18
D7
C8
LA17
D8
C9
\MEMR D9
C10 \MEMW D10
C11 SD8
D11
C12 SD9
D12
C13 SD10
D13
C14 SD11
D14
C15 SD12
D15
C16 SD13
D16
C17 SD14
D17
C18 SD15
D18
C19 KEY
D19
Signal
GND
RESDRV
VCC
IRQ9
-5V
DREQ2
-12V
\WS0
+12V
GND
\SMEMW
\SMEMR
\IOW
\IOR
\DACK3
DREQ3
\DACK1
DREQ1
\REFSH
SYSCLK
IRQ7
IRQ6
IRQ5
IRQ4
IRQ3
\DACK2
TC
ALE
VCC
OSC
GND
GND
Signal
GND
\MEMCS16
\IOCS16
IRQ10
IRQ11
IRQ12
IRQ15
IRQ14
\DACK0
DREQ0
\DACK5
DREQ5
\DACK6
DREQ6
\DACK7
DREQ7
VCC
\MASTER
GND
GND
J13 is a quad row socket connector, with 2mm x 2mm pitch, which implements the standard
32-bit PCI bus signals.
The pin-out for PCI is shown below.
J13
62
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
A
5.0V KEY1
VI/O
AD05
\C/BE0
GND
AD11
AD14
+3.3V
\SERR
GND
\STOP
+3.3V
\FRAME
GND
AD18
AD21
+3.3V
IDSEL0
AD24
GND
AD29
+5V
\REQ0
GND
\GNT1
+5V
CLK2
GND
+12V
-12V
B
Reserved
AD02
GND
AD07
AD09
VI/O
AD13
\C/BE1
GND
\PERR
+3.3V
\TRDY
GND
AD16
+3.3V
AD20
AD23
GND
\C/BE3
AD26
+5V
AD30
GND
\REQ2
VI/O
CLK0
+5V
\INTD
\INTA
Reserved
C
+5V
AD01
AD04
GND
AD08
AD10
GND
AD15
\SB0
+3.3V
\LOCK
GND
\IRDY
+3.3V
AD17
GND
AD22
IDSEL1
VI/O
AD25
AD28
GND
\REQ1
+5V
GNT2GND
CLK3
+5V
\INTB
Reserved
D
AD00
+5V
AD03
AD06
GND
M66EN
AD12
+3.3V
PAR
SDONE
GND
\DEVSEL
+3.3V
C/BE2GND
AD19
+3.3V
IDSEL2
IDSEL3
GND
AD27
AD31
VI/O
\GNT0
GND
CLK1
GND
\RST
\INTC
3.3V KEY1
Note: 1. The KEY pins are used to guarantee proper voltages for PCI modules. Pin A1 is
removed and the socket side is plugged for 5V PCI boards. Pin D30 is removed
and the socket side plugged for 3.3V PCI boards
63
13.2 Adapter Card Mounting
PC/104 and PC/104-Plus adapter cards are mounted in a "stackthrough" manner. Adapter
cards are designed with plugs on their undersides that mate with the PC/104 socket
connectors of VNS-786. PC/104 adapters can support the socket connector version on their
topside and allow further "stacking" of adapters.
64
14. Power
The main power connector is used to provide all the voltages necessary to operate the VNS786. The VNS-786 requires only 5V to operate all functions. The +12V supply is passed
through to the fan, the PC/104, and PCI connectors. The 5V and 12V supplies are passed
through to the PC/104, PC/104Plus, and PCI connectors.
The fan power connector is provided to facilitate the connection of a +12V fan for cooling
the processor.
14.1 Main Power Connector
The main power connector is a 0.156, single row, 8 pin, friction lock header.
Ref Des Function
J17
Power
640445-8
AMP
65

AMP
644082-8
J17
Pin
1
2
3
4
5
6
7
8
Signal
+12V
+5V (VCC)
+5V (VCC)
GND
GND
-12V
-5V
Reserved - Do not Connect
14.2 Fan Power Connector
The fan power connector is a 0.1" pitch, single row, 2 pin, friction lock header.
Ref Des Function
J11
Fan
Amp
640456-2
Pin
1
2
J11
Signal
+12V
GND
66

Amp
640441-2
14.3 Power Consumption
The following table illustrates typical current at 5V for the Pentium processor at the speed
indicated. The test system is a VNS-786 with 128 Mbytes of memory, a 3 hard disk drive
(5V supplied by power supply), and a PS/2 mouse.
CPU
MMX 233 MHz

Tillamook 266 MHz
Tillamook 166 MHz
Pentium Classic 200
MHz
AMD K6-III 400
MHz
AMD K6-II 400
MHz
Speedy (Note 1)
Benchmark Score
190
196
171
167
5V Current Draw
(Note 2)
3.45A (17W)
2.25A (11W)
2.00A (10W)
3.15A (16W)
CPU Core (Note 3)

Current Draw
3.75A @ 2.8V (11W)
2.00A @ 1.9V (3.8W)
1.35A @ 1.9V (2.6W)
4.60A @ 3.3V (15W)
305
4.50A (23W)
6.66A @ 2.4V (16W)
225
4.10A (21W)
6.12A @ 2.2V (14W)
Notes:
1. Speedy benchmark: exercises various display functions at 800 x 600 x 16 bit color
with on-board 69000 VGA controller, under Win98. Scores vary +/- 10% depending on
what Win98 drivers are active.
2. Reflects total board power consumption.
3. Reflects CPU power consumption, except for Pentium Classic, in which case 3.3V is
used for both CPU core and 3.3V peripherals.
.
14.4 Power Management
The Power Management feature on the VNS-786 is used for controlling ATX style power
supplies. These power supplies offer standby and suspend modes, which can be used via the
connector J16.
14.4.1 Connector
The power management connector is 10-pin male, 2mm pitch, dual in-line, Hirose DF11.
The manufacturer and pin-out information for the connector is as follows:
Ref Des Function
J16
P. Management
Hirose
DF11-10DP-2DSA
67

Hirose
DF11-10DS-2C
The pin-out for J16 is as follows:

J16
Pin #
1
3
5
7
Signal
PM_PWRBTN_IN#
Reserved
Reserved
VCC Standby (Input)
Pin #
2
4
6
8
Power On# (Output)
10
Signal
GND
Reserved
Reserved
PM_RSMRST#
(Output)
GND
Pin 1 (PM_PWRBTN_IN#) can be used as a power switch, in conjunction with an ATX

supply. When pin 1 is open, J16 pin 9 will be low, signaling the ATX supply to be on.
When J16 pin 1 is pulled low, the ATX supply is signaled to be off.
Pin 7 (VCC Standby (Input)) must be connected to the appropriate ATX supply pin for these
features to work. Please refer to ATX supply documentation for details.
Pin 9 (Power On#) is an output to an ATX style power supply. When low, the ATX power
supply is powered on. Switching a high state will turn off the supply.
VNS-786 ATX Power Switching
68
15. BIOS
Physical BIOS memory is a 32-pin, PLCC device designated U29. The BIOS is a
customized version of the Award EliteBIOS. An Adobe Acrobat version of the Award BIOS
setup screens is available on the Adastra web site. There are minor differences in many of
the documented setup screens that are the result of special features added by Adastra. For
example, in the Integrated Peripherals menu, there are several additional items allowing
configuration of the SSD and the serial ports.
The physical device is a 512K 5V flash memory device. It contains the system BIOS image,
the VGA BIOS image, and the primary and alternate logo bitmaps. During the POST
(Power On Self-Test) phase of BIOS execution, the system BIOS image is expanded
(decompressed) and transferred to shadow RAM. The POST image size of BIOS is 256K,
and occupies segment E000 and F000. Just prior to boot, the image in E000 is discarded,
yielding a run-time image size of 64K located in the F000 segment.
15.1 BIOS Map
69
The standard mapping of BIOS components in the 512K device is shown below.
Device Address
00000h - 1FFFFh
20000h - 5FFFFh
60000h - 7FFFFh
BIOS Image
VGA (and other PCI) BIOS
Logo Bitmap images
System BIOS
The core chip set may be programmed to map the device into the 512K image at the top of
the 32-bit address boundary, at FFF80000h. The core is so programmed when either logo is
selected for display.
15.2 Custom Logos
During POST, just after VGA initialization, the BIOS may be directed to display a custom
logo for the remainder of the POST and OS boot process. The selection of the logo is done
in the BIOS Features Setup menu. The choices for the Logo Display item are Disabled,
Primary, or Alternate. The logo images are standard bitmap files, 256 color with
palette, concatenated with a special 512-byte header. These images are located in the 512K
BIOS device starting at offset 20000H. The primary logo is loaded first, and the alternate
logo is located immediately following. Logos must be less than 128K in size, including
header. The header includes information identifying the logo and its size.
The logo is removed by a mode-change call to the BIOS display services, interrupt 10H.
When any INT 10H mode change call (AH=0) is made, the display is cleared, the mode
switch takes place, and normal VGA operation resumes.
Contact Technical Support for information on the Logo Header specifications and how to
program the logo images into the device.
15.3 BIOS Load Utility
The BIOS device is flash memory technology. It may be reprogrammed in-circuit. A DOS
utility program is provided to facilitate the loading of BIOS images. Details on this program
and other Flash load utilities are provided separately.
70
16. Solid State Disks

The VNS-786 Solid State Disk (SSD) is field installable. A 32-pin socket (U22) on the
VNS-786 can accept memory devices of 32K, 128K, 256K, or 512K bytes. The memory
type can be EPROM, EEPROM, Static RAM (SRAM), or Flash.
BIOS extension software located in the device installed in the SSD socket allows the device
to emulate a disk during POST. This BIOS extension is suitable to provide disk emulation
for many operating systems as well (e.g. DOS). Other operating systems, notably real-time
OSs, require an OS driver to provide access to the device and any file system contained
within it.
71
16.1 SSD Setup
The VNS-786 BIOS allows easy setup of the SSD socket. Under the Integrated Peripherals
menu item, there are two SSD feature selections. Using the page-up and page-dn keys, it is
possible to set the SSD Memory Type, e.g. Flash 32-pin and the SSD Window, e.g.
16KB@D800. The BIOS will take care of setting the VNS-786 Configuration Registers
(discussed below) with the appropriate settings.
The information provided below is for advanced users that may want to write their own
driver software for the SSD. There is additional information about the configuration
registers located in Appendix C.
16.2 SSD Memory Configuration
The architecture of the PC/AT and the limitations imposed by DOS force the memory
spanned by the SSD to be "paged". That is, it is accessible in discrete blocks or "Pages". A
"window" in the Upper Memory Area of the PC/AT (A0000 - FFFFF) is reserved to "view"
the SSD memory.
Selecting a Page using a Page Selection Register in the I/O space of the PC/AT specifies the
physical memory viewed in the window.
Physical SSD Memory
Page 0 1 2 3
i
Page Register
Upper Memory Area
(A0000 - FFFFF)
The SSD Window and memory type may be may be defined in Set-up, in the Integrated
Peripherals menu. Alternatively, the values of the VNS-786 Configuration Register bits
controlling the SSD may be programmed directly as described in the following sections.
16.2.1 SSD Window Size
Bit 3 of VNS-786 Configuration Register 0512h controls the size of the SSD window.
SSD Window Size: Configuration Register 0512h, Bit 3 (write only)
72
Bit
4
3
SSD Window
Size Select
Bit 3
Value
0
1
Window
Size
64K
16K
16.2.2 SSD Window Address

The base address of the SSD Window is selected by specifying the upper address lines of the
window, A18 through A14, in the Upper Memory Area (A19 is assumed to be 1).
Programming a match pattern in VNS-786 Configuration Register 0510h specifies these
address lines. For a window size of 16K, all address lines are relevant. For a 64K window,
address lines A14 and A15 are dont care.
SSD Window Address: Configuration Register 0510h, Bits 0 4, write only
4
Window
A18
3
Window
A17
Bit
2
Window
A16
1
Window
A15
0
Window
A14
To avoid conflict with the System BIOS at F000 and the VGA BIOS at C000, some
selections for the SSD Window Address should be avoided. The following are the
recommended selections for 16K and 64K window sizes.
16K Window Size
Address Range
Bits 4:0
EC000 - EFFFF
11011
E8000 EBFFF
11010
E4000 E7FFF
11001
E0000 E3FFF
11000
DC000 - DFFFF
10111
D8000 DBFFF
10110
D4000 D7FFF
10101
D0000 D3FFF
10100
CC000 CFFFF
10011
C8000 CBFFF
10010
64K Window Size

Address Range
Bits 4:0
E0000 - EFFFF
110XX
D0000 DFFFF
101XX
X = DONT CARE
16.2.3 SSD Memory Type

73
The SSD memory type is controlled by VNS-786 Configuration Register 0512h, bits 0 and
1. The choices are 5V flash, EPROM, or SRAM/EEPROM.
SSD Mem Type Register (0512h) (write only)
Bit
4
3
2
1
28/32-pin
SSD Mem
device
Type 1
0
SSD Mem
Type 0
The SSD socket can accept either 28-pin or 32-pin devices. This selection is accomplished
with bit 2 of register 2 (0 for 28-pin, 1 for 32-pin). To load a 28-pin device in the 32-pin
socket of U22, orient the device so that pin 1 of the device lines up with pin 3 of the socket.
32-pin Device
28-pin Device
U22, Pin 1
U22, Pin 3
Bits 1 and 0 of register 0512h select the memory type.

SSD Memory Type
Memory Type Capacity
5V Flash
EPROM
SRAM
(EEPROM)
SRAM
128K
512K
128K
256K
512K
128K
512K
32K
None
Example Part Number
29F010
29F040
27C010
27C020
27C040
Register 0512h
Bits 2:0
101
110
100
000
(X = Dont care)
16.3 Socket SSD Access
74
X11
(default)
The SSD page register, VNS-786 Configuration Register 0511h, contains five bits of page
selection and is similar to the SSD Window Address register. The five bits of the register
correspond to address lines A14 through A18.
For 16K window size, there are 32 possible pages (32 x 16K = 512K, the maximum possible
device capacity). There are 8 pages in a 64K window size configuration. The page selected
by writing the page number to the Page Register. Page 0 is always at offset 0 in the device.
SSD Page Register (0511h) (read/write)
Bit
4
3
2
1
0
Page
Page
Page
Page
Page
Sel 4
Sel 3
Sel 2
Sel 1
Sel 0
Select 1 of 32 16K pages
Select 1 of 8 64K pages
16.4 SSD Page Address Calculations
The physical memory spanned by an SSD must be addressed via a Page and an Offset within
the SSD Window. Given a logical address within the linear space of the memory, the Page
and Offset values may be derived from the Window Size. The location of the SSD window
provides the segment address to complete the physical address specification to allow a
program access to the memory.
Page
Offset
Segment
= Linear Address / 4000h

= Linear Address MOD Window Size
= Window Location
The memory is addressed by calculating the Page and writing the value to the Page Selection
Register, then combining the Segment and Offset to form a physical address.
Segment
Offset
= Segment + (Offset /64K) * 4096

= Offset MOD 64K
75
16.5 M-Systems DiskOnChip
The SSD socket of the VNS-786 supports the DiskOnChip, a flash device from MSystems that includes boot and file system capabilities. The DiskOnChip is a 32-pin device,
with memory capacities from 2M bytes to 70M bytes that can be installed in the SSD socket.
A BIOS extension embedded in the device is detected and executed by the system BIOS
during Power On Self-Test (POST). This BIOS allows the device to emulate a disk and, if
properly loaded with a bootable image, can serve as the boot device. Under an OS such as
DOS, the BIOS extension provides full, read-write file system capabilities.
The DiskOnChip should be installed in the SSD socket such that pin 1 of the device,
indicated by a small dot located in one corner of the device, aligns with pin 1 of the socket.
Pin 1 on the socket is indicated by the notch on the side of the socket nearest the edge of the
board, as pictured above. The DiskOnChip should work with any SSD memory window size
and location selection. The memory type must be set to Flash. A typical setting is Flash,
with a 16K window located at D000h.
76
16.6 SSD Socket Pin Connections

EPROM
FLASH
SRAM
28-pin
Device
A18
A16
A14
32-pin
Device
1
2
3
VCC
A16
A15
A18
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
D0
D1
D2
GND
A12
A7
A6
A5
A4
A3
A2
A1
A0
D0
D1
D2
GND
28-pin
Device
28
32-pin
Device
32
31
30
A12
A7
A6
A5
A4
A3
A2
A1
A0
D0
D1
D2
GND
4
5
6
7
8
9
10
11
12
13
14
15
16
2
3
4
5
6
7
8
9
10
11
12
13
14
27
26
25
24
23
22
21
20
19
18
17
16
15
29
28
27
26
25
24
23
22
21
20
19
18
17
SRAM
FLASH
EPROM
VCC
A15
A17
VCC
WR#
A17
VCC
A18
A17
(vcc)
(vcc)
(vcc)
WR#
A13
A8
A9
A11
RD#
A10
CS#
D7
D6
D5
D4
D3
A14
A13
A8
A9
A11
RD#
A10
CS#
D7
D6
D5
D4
D3
A14
A13
A8
A9
A11
RD#
A10
CS#
D7
D6
D5
D4
D3
Note:
1) Pin connections that are different for EPROM, FLASH or SRAM settings shown in bold.
2) Socket pin 30 is connected to VCC, as shown in parenthesis, if SSD Device Setup
Register is set for 28-pin device.
3) If 64K page size selected, A18 through A16 come from socket page register; A15
through A0 from ISA bus. If 16K page size selected, A18 through A14 come from socket
page register, A13 through A0 from ISA bus.
4) If device type is set to NONE, then socket pins 22, 29 and 31 (using 32-pin numbering)
are held at VCC.
5) 28-pin devices are limited to 32KB for SRAM, 64KB for EPROM. FLASH devices not
supported in 28-pins.
6) FLASH devices are limited to 5V only varieties such as AMD 29F010 (128KB) and
AMD 29F040 (512KB).
7) There is no provision for programming EPROM devices in-system. EPROMs are read
only.
8) A17 has a slow settling time. Allow 5 microseconds for A17 to settle. See PLD Register
1 discussion.
77
78
17. Appendix A: Options and Adapters

There are several options available for the VNS-786. Use the specified part number referred
to in the description of the following options and adapters when ordering.
17.1 Cables
The following table describes the cables available for the VNS-786. These cables mate to
the on-board connectors of the VNS-786, and terminate in a connector style common to the
peripheral they serve.
Part
Number
620-234
620-007
620-008
Description
VNS-786 Cable Set (All cables below)
Parallel Port
VNS-786
Connector
J21, J22
620-009
2.5 and 1.8 IDE (3.5"drives with

adapter 800-312)
Dual Floppy, 3.5 and 5.25
J25, J26
J18
620-111
620-112
Main power (8conductor pigtail)

Serial Cable, Break-out
J17
J23
620-113
Network, 10/100Base-T
J5
620-116
VGA CRT
J4
620-118
Console (Keyboard, Mouse, Speaker)
J24
620-137
800-312
620-244
620-142
620-198
620-245
VNS Cable Adapter

3.5 IDE Adapter Board
USB
Audio In
MIDI/Joystick
Audio Out
J17
J12
J9
J10
J8
Terminating Connector
(manufacturer/part)
25-pin female DSUB
(3M U89925-8003)
44-pin, 2mm, female IDC
(Astron AT-IDCSK-44-1-GF)
(2) 34-pin, .1", female IDC
(2) 34-pin, .1" card edge
9-pin male DSUB
(3M U89809-8003)
RJ45 8-pin modular jack, high
density
15-pin DSUB
(Kycon K86-ED-155-K)
5-pin circular DIN
(Switchcraft 57 GB5F)
6-pin circular DIN
(For 4-pin PC power supplies)
Use with 620-008
Hirose DF11-20DS-2C
Hirose DF11-16DS-2C
Hirose DF11-10DS-2C
A cable set is available, part number 620-234, which includes all the adapter cables in the
above table. No cable is provided for connectors on the VNS-786 that do not require adapter
to standard connectors, such as the PS/2 keyboard and mouse, USB, and serial ports.
79
17.2 Memory DIMM 168-pin Unbuffered 3.3V, Gold Leaded

EDO
Part Number 100-227: 16 Mbytes
SDRAM
Micron MT8LD264AG-6X
Centon CADS32M/P66
Centon CADS64M/P66
Centon CADS128M/P66
Unigen UG516S6608HSGGO
17.3 Disk Drives
Part Number 920-001: 3.5", 1.44M bytes floppy disk drive
17.4 Software, Operating Systems
Part Number 930-051: MS Windows 98 OEM

Part Number 930-046: MS Windows NT Workstation OEM
80
18. Appendix B: Hardware Interrupt Assignment

The following table describes the allocation of the 16 hardware interrupt lines for the
VNS-786. The allocations shown are typical. Many subsystems that use the hardware
interrupt lines can use alternate lines if desired. These alternate choices are selectable via
the BIOS Configuration Register.
IRQ
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Interrupt Number
08H
09H
0AH
0BH
0CH
0DH
0EH
0FH
70H
71H
72H
73H
74H
75H
76H
77H
Primary Use
18.2 ms Timer
Keyboard
Slave 8259 interrupt controller
COM2 (secondary serial)
COM1 (primary serial)
Audio
Floppy disk controller
LPT1
Real time clock
Audio (joystick/gameport)
Not used
Network
PS/2 Mouse
Math coprocessor
Fixed disk controller
Secondary IDE
NA: "Not Applicable", no alternate function allowed.
81
Alternate Use
NA
NA
NA
NA
NA
Steering Controlled
Steering Controlled
Steering Controlled
NA
Steering Controlled
Steering Controlled
Steering Controlled
Steering Controlled
NA
NA
Steering Controlled
82
19. Appendix C: I/O Port Assignment

The following table shows the allocation of I/O port addresses in the VNS-786. The
PC/AT only decodes the first 10 I/O address lines. The I/O map repeats on 1K
boundaries. The VNS-786 decodes an additional line and the repeat boundary is 2K.
19.1 Standard PC/AT I/O Address Range 000 - 3FFH
Address range
000 - 01F
020 - 03F
040 - 05F
060 - 06F
070 - 07F
080 - 09F
0A0 - 0BF
0C0 - 0DF
0E0 - 0EF
0F0 - 0FF
100 - 1EF
1F0 - 1F7
1F8 - 1FF
200 - 20F
210 -277
278 - 27F
280 - 2E7
2E8 - 2EF
2F0 - 2F7
2F8 - 2FF
300 - 35F
360 - 36F
370 - 377
378 - 37F
380 - 3AF
3B0 - 3BB
3BC - 3BF
3C0 - 3CF
3D0 - 3DF
3E0 - 3E7
3E8 - 3EF
3F0 - 3F7
3F8 - 3FF
Function
DMA controller 1
Interrupt controller 1
Counter/Timer
Keyboard controller
RT Clock & NMI
DMA Page register
Interrupt controller 2
DMA controller 2
Undocumented
Math coprocessor
Unused
Fixed disk controller
Unused
Unused (game port)
Unused
Unused (LPT2)
Unused
Unused (COM4)
Unused
COM2
Unused
Network
Unused
LPT1
Unused
VGA (monochrome)
Unused
VGA (EGA)
VGA (CGA)
Unused
Unused (COM3)
Unused
COM1
83
19.2 VNS-786 Extended I/O
The I/O system is implemented in a programmable logic device (PLD). Accessing this
device is an advanced user function. The features controlled by this device are configured
in the BIOS setup utility, so there is no need to write software to manipulate these
registers unless you are attempting to integrate special features into your application.
19.3 VNS-786 Configuration Register Locations
The VNS-786 Configuration Register set occupies four I/O locations on the X bus (a
sub-set of the ISA bus). Byte wide I/O is used. Only the lower 5 bits (bits 4 0) are
actually used by the register set.
I/O
Address
0510h to
0513h
Bit
7
Not
Used
6
Not
Used
5
Not
Used
2
Data
The I/O addresses are determined in the BIOS and are set to 0510h to 0513h. If a
different set of I/O locations is required, contact Adastra technical support.
19.4 VNS-786 Configuration Register Map
The VNS-786 register map is shown on the following page. The address column refers to
the I/O addresses 0510h to 0513h. Only register 0511h is both readable and writable.
The other registers are write only.
Default values shown are valid after a hardware reset. The system BIOS may alter these
values during the boot process.
84
Address / Function
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0510h
Window A18
Window A17
Window A16
Window A15
(Dont care
for 64K page
size)
Window A14
(Dont care for
64K page size)
(Write only)
(Default: 0)
(Default: 0)
(Default: 0)
(Default: 0)
(Default: 0)
0511h
Socket A18
Socket A17
Socket A16
Socket A15
(Dont care
for 64K page
size)
Socket A14
(Dont care for
64K page size)
(Read / Write)
(Default: 0)
(Default: 0)
(Default: 0)
(Default: 0)
(Default: 0)
0512h
Not Used
1 => 16K
page
1 => 32-pin
part in socket
JEDEC Type
MSB
JEDEC Type
LSB
0 => 64K
page
0 => 28-pin
part in socket
(offset w/
device pin 1 in
socket pin 3)
(Default: 0)
(Default: 0)
(Default: 1)
(Default: 1)
1 => Transmit
gate polarity:
_RTS high
enables
transmit
Not Used
Not Used
Not Used
Window Match Pattern
Socket Page Register
SSD Device Setup
(Write only)
0513h
RS485 Setup
Not Used
0 => Transmit
gate polarity:
_RTS low
enables
transmit
(Write only)
(Default: 0)
85
JEDEC Type:
00 SRAM
01 FLASH
10 EPROM
11 NONE
19.5 Register 0 Window Match Pattern
The VNS-786 PLD compares ISA address lines A18 A14 (if window is 16K; see SSD
Device Setup register, below) or A18 A16 (if window is 64K) with the contents of this
register. If all relevant bits match, and A19 is high, and an ISA memory read or write
cycle in the 1st megabyte of memory space is in progress, and if the socket is enabled (see
SSD Device Setup) then a chip select is generated for the socket.
This arrangement allows any 16K block starting between 80000h and FC000h inclusive,
or any 64K block starting between 80000h and F0000h inclusive to be selected.
However, usually only starting block addresses between C8000h to DC000h are useful as
other blocks in the 80000h to FC000h range may be occupied by system memory, VGA
BIOS and system BIOS. The E0000h block is sometimes recoverable, depending on
system BIOS particulars.
This register is write-only.
Common Register 0 Values:
ISA Address A19:0
Block Start (hex)
C8000h
CC000h
D0000h
D4000h
D8000h
DC000h
E0000h
E4000h
E8000h
EC000h
ISA Address A19:14

Block Start (binary)
110010b
110011b
110100b
110101b
110110b
110111b
111000b
111001b
111010b
111011b
86
PLD Register 0 Value

(hex)
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
19.6 Register 1 Socket Page
The high order address lines that appear on the SSD socket are written to this register.
For a 16K window size, socket lines A18 through A14 are set in this register. For a 64K
window size, socket lines A18 through A15 are set in this register.
Socket line A17 has a somewhat slow transition time due to the hardware details of how
the relevant socket pin (pin 30 on a 32-pin device) is handled. This pin is a special case
because it is the VCC pin for 28-pin devices.
Software which is making a change to PLD register 1 bit 3 (32-pin socket A17) should
insert a delay before assuming that the address bit is valid. The recommended delay time
is 5 microseconds. This delay can be achieved by performing the register 1 write 10
times, assuming that the compiler does not optimize the writes out.
This register is read / write capable (however, the value read back on bit 3 reflects the
PLD bit register state, not the actual socket A17 line state).
87
19.7 Register 2 SSD Device Setup
Bit 4 of this register is not used.

Bit 3 of this register determines the SSD socket page size. If this bit is set to 1, the page
size is 16K. If the bit is 0, the page size is 64K. The hardware reset default is 64K. If
the page size is 64K, the lower two bits of registers 0 and 1 are ignored.
Bit 2 of this register determines whether a 32-pin or 28-pin device is used in the socket.
A bit value of 1 is used for 32-pin devices; 0 is used for 28-pin devices. Twenty-Eight
pin devices are offset with device pin 1 in socket pin 3. The hardware reset default for
this bit is 0, for 28-pin devices. This reset default ensures that both 32 and 28-pin
devices will have VCC at power on time. Socket address line A17, available only for 32pin devices, is not functional immediately after reset but can be made functional by the
BIOS before ROM scan.
Bits 1 and 0 of this register determine the type of device (SRAM, FLASH, etc.) used in
the socket. The bits are encoded as follows:
00
01
10
11
SRAM
FLASH
EPROM
NONE
The hardware reset default is NONE. A socket chip select is not generated when these
bits are set to the NONE state. This is to prevent spurious writes to battery backed
SRAM and other devices which are in the socket, before the BIOS or other software has
configured the socket.
Register 2 is write only.
88
19.8 Register 3 RS485 Setup
Bit 4 is not used.

Bit 3 is used to set a polarity option on transmit gating for full and half duplex modes. If
bit 3 is 0, then the transmitter is enabled when _RTS is low. If bit 3 is 1 and transmit
gating is enabled in full duplex mode, then the transmitter is enabled when _RTS is high.
In half duplex mode, transmit gating is always in force and the gating polarity is set by bit
3 as just described.
Usually the default state of bit 3, enable transmit when _RTS low, will be used. The
opposite polarity option is provided for compatibility with the Adastra VNS-686 RS485
scheme.
Bit 2 is not used.
Bit 1 is not used.
Bit 0 is not used.
Register 3 is write only.
89
90
20. Appendix D: Mechanical Specification
91
92
21. Appendix E: Jumper Specification

21.1 Jumper Locations
21.2 Jumper E1
Jumper E1 is a 3 pin jumper used for flat panel supply voltage selection. The outer pins
are marked 5V and 3V on the PCB silkscreen. If the 5V pin and the center pin of
the block are shunted with a jumper, the flat panel supply voltage is 5V. If the 3V pin
and the center pin of the block are shunted with a jumper, the flat panel supply voltage is
3.3V.
E1 is 0.1 pitch block and requires a 0.1 pitch shunt.
21.3 Jumper Block E2
93
Jumper block E2 is an 8 position 2mm jumper block used to define various CPU and
system options per the descriptions below.
Jumper E2-8 must be used with care as it disables the on-board 3.3V supply. It is usually
left open, enabling the on-board 3.3V supply, unless the CPU is a Pentium Classic.
E2-8
3.3V CPU
I/O Supply
Disable
IN:
on-board 3.3V switching PS disabled
OUT: on-board 3.3V switching PS enabled
This jumper is usually in the OUT position, enabling the on-board
3.3V switching power supply. Most CPUs require separate CORE
and I/O voltages. The Pentium classic is the exception both the core
and the I/O are 3.3V.
E2-7
Reserved
Reserved:
Leave OPEN
IN:
L2 cache linear burst order
OUT: L2 cache interleaved burst order
This jumper is usually OUT, resulting in the interleaved burst order
required by Intel and AMD CPUs.
E2-6
Reserved
Reserved:
Leave OPEN
Clock synthesizer option
E2-5
Bus Speed
E2-4
Bus Speed
E2-3 CPU BF2

select
E2-2 CPU BF1
select
E2-1 CPU BF0
select
IN:
OUT:
IN:
OUT:
SM Bus not used for clock synthesizer

SM Bus is used for clock synthesizer
Clock synthesizer produces 60MHz core system bus
Clock synthesizer produces 66MHz core system bus
IN:
BIOS assumes 60MHz core system bus
OUT: BIOS assumes 66MHz core system bus
To use 60MHz system bus, both E2-5 and E2-4 should be loaded
These jumpers are used for CPU core frequency / CPU bus frequency
ratio selection. If the jumper is OUT, the CPU BF pin is high. If the
jumper is IN, the CPU BF pin is low. Refer to the relevant CPU data
sheets for further details.
94
21.4 Jumper Block E3
Jumper block E3 is a 5 position 2mm jumper block used to set the CPU core voltage.
Care must be used in setting these jumpers. The wrong CPU core voltage can damage the
CPU.
5
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
Jumper Block E3
4
3
2
1
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
Core Voltage
1.30
1.35
1.40
1.45
1.50
1.55
1.60
1.65
1.70
1.75
1.80
1.85
1.90
1.95
2.00
2.05
Shutdown
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
3.0
3.1
3.2
3.3
3.4
3.5
Typical Use
Intel Tillamook (aka Low Power MMX)
AMD K6-II
AMD K6-III
Intel MMX
Intel Pentium Classic
95
96
22. Appendix F: Connectors
22.1
Connector Layout
97
22.2
Mating Connector Specifications
The following table provides connector information for on-board and mating connectors
for the VNS-786.
Ref Des
J1
J2
J3
J4
J5
J6
J7
J8
J9
J10
J11
J12
J13
J14
J15
J16
J17
J18
J19
J20
J21
J22
J23
J24
J25
J26
Function
Backlight
Flat Panel (Bit 0-23)
Flat Panel (Bit 24-35)
VGA - CRT
Ethernet 10/100Base-T RJ45
Ethernet LEDs
DSP/Option
Audio Output
Audio Input
Joystick/Midi
Fan
Universal Serial Bus (USB)
PC104-Plus (PCI)
PC104/ISA8
PC/104/ISA16
Power Management
Power
Floppy
Video Overlay
Reserved
Secondary Parallel Port
Primary Parallel Port
Serial Ports
Console Connector
Secondary IDE
Primary IDE
AMP
Astron
Astron
Hirose
Hirose
Hirose
Hirose
Hirose
Hirose
Hirose
AMP
Astron
Hirose
Samtec
Samtec
Hirose
AMP
3M
Astron
640456-5
AT-SRDPH2-50-2-0-GF
AT-SRDPH2-20-2-0-GF
DF11-14DP-2DSA
DF11-8DP-2DSA
DF11-6DP-2DSA
DF11-18DP-2DSA
DF11-10DP-2DSA
DF11-20DP-2DSA
DF11-16DP-2DSA
640456-2
AT-PH1-10-2-0-GF
DF11-16DP-2DSA(20)
ESW-132-14-G-D
ESW-120-14-G-D
DF11-10DP-2DSA
641208-8
2534-6002UG
AT-SRDH2-40-2-0-GF
Hirose
Samtec
Samtec
Hirose
AMP
3M
Astron
640441-5
AT-IDCSK2-50-11-GF
AT-IDCSK2-20-11-GF
DF11-14DS-2C
DF11-8DS-2C
DF11-6DS-2C
DF11-18DS-2C
DF11-10DS-2C
DF11-20DS-2C
DF11-16DS-2C
640441-2
USB Series A plug
DF11-16DS-2C
HCMD-32-02
HCMD-20-02
DF11-10DS-2C
641217-8
3414-6634
AT-IDCSK2-40-11-GF
3M
3M
3M
Hirose
Astron
Astron
2526-6002UG
2526-6002UG
2540-6002UG
DF11-20DP-2DSA
AT-SRDPH2-44-2-0-GF
AT-SRDPH2-44-2-0-GF
3M
3M
3M
Hirose
Astron
Astron
3399-6626
3399-6626
3414-6640
DF11-20DS-2C
AT-IDCSK2-44-11-GF
AT-IDCSK2-44-11-GF
AMP
Astron
Astron
Hirose
Hirose
Hirose
Hirose
Hirose
Hirose
Hirose
AMP
For all connectors, the position of pin 1 is marked on the PCB silkscreen. Pin numbering
on all the Hirose connectors alternate between rows.
5 7
...
...
2
Hirose 2mm Connectors

Standard pin numbering
scheme
4 6 8
98
23. Appendix G: Block Diagram
Socket 7
CPU
Pentium MMX
Tillamook
AMD K6-2/3
CPU
Control
CPU Addr
32
CPU Bus
(66 MHz)
CPU Data
64
Flat Panel
VGA
C&T 69000/2M
69030/4M
CRT
L2 Cache
64Kx64
Sync SRAM
"Northbridge"
MTXC
82439TX
Tag
Mem Addr
DRAM
168 pin Unbuff
DIMM
Mem Data
64
PCI Bus (33MHz)
PC104+ PCI
32
"Side Band"
Primary IDE
Serial
EEPROM
LEDs
10/100BT
"MAC"
Am79C973
10/100 Network
Controller
"Southbridge"
PIIX4
82371EB
Xtal,
Battery
ISA Addr
RTC
24
ISA Data 16
ISA Bus (8 MHz)
VNS-786 - CPU CORE AND PCI SUBSYSTEM
99
Secondary IDE
Pwr Management
Dual USB
PC104
Keyboard/Mouse
RS232
XCVR
COM1
RS232
XCVR
COM2
Buffer
Super I/O
FDC37B807
BIOS
Parallel
RS232/
RS485
XCVR
COM3
RS232/
RS485
XCVR
COM4
Super I/O
16
PLD
ISA Data Bus
XBus
ISA Addr Bus

24
Floppy
FDC37B807
Parallel
PWR
AMP
Audio
Out
Audio In
Sound
Processor
SSD Bus
SSD
Socket
Midi/Gameport
CS 4235
Buffer
DSP
Various
Places
VNS-786 - ISA SUBSYSTEM
100
Console
(KB lock, Spkr,
Reset, etc.)
101

VNS-786 VNS-786a3 Umanual Motherboard 990-016 Rev A.3

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VNS-786

Document P/N 990-016

FEATURE LIST __________________________________________________________1

SYSTEM MEMORY ______________________________________________________9

IDE HOST ADAPTER____________________________________________________13

FLOPPY DISK INTERFACE______________________________________________17

CONSOLE INTERFACE _________________________________________________19

6.6 DRIVE ACTIVITY LIGHTS _______________________________________________ 23

SERIAL COMMUNICATION INTERFACE ________________________________ 25

PARALLEL COMMUNICATION INTERFACE_____________________________ 33

ETHERNET INTERFACE _______________________________________________ 37

10. VGA INTERFACE ______________________________________________________ 41

11. AUDIO INTERFACE ____________________________________________________ 53

12. UNIVERSAL SERIAL BUS (USB) INTERFACE_____________________________ 59

13. ISA AND PCI BUS EXPANSION___________________________________________61

14. POWER ________________________________________________________________65

BIOS MAP __________________________________________________________69

16. SOLID STATE DISKS____________________________________________________71

18. APPENDIX B: HARDWARE INTERRUPT ASSIGNMENT ___________________81

19. APPENDIX C: I/O PORT ASSIGNMENT___________________________________83

STANDARD PC/AT I/O ADDRESS RANGE 000 - 3FFH ______________________

20. APPENDIX D: MECHANICAL SPECIFICATION __________________________ 91

21. APPENDIX E: JUMPER SPECIFICATION_________________________________ 93

JUMPER LOCATIONS _________________________________________________

22. APPENDIX F: CONNECTORS ___________________________________________ 97

CONNECTOR LAYOUT ________________________________________________ 97

23. APPENDIX G: BLOCK DIAGRAM _______________________________________ 99

Intel Pentium, MMX, Tillamook, AMD K6-2 or AMD K6-3

AMD 79C973 network controller

Chips & Technologies 69000 video controller

5.75" x 8.00" x 1.25" (with 1 inch DIMM memory)

Six mounting holes

3.45A at 5 volt (233MMX with 128MB RAM)

About This Manual

The procedure to change the processor is as follows:

Work at a suitable static-free work area.

CPU Type Jumper Settings

CPU Core Freq / Bus Freq / Core Voltage

Intel MMX 233 MHz / 66 MHz / 2.8V

400 MHz / 66 MHz / 2.4V

CPU Core Freq / Bus Freq / Core Voltage

400 MHz / 66 MHz / 2.2V

Installing DIMM Modules

Work at a suitable static-free work area.

Removing DIMM Modules

1. Work at a suitable static-free work area.

Changing Memory Configuration

Portions of the system memory may be allocated as conventional memory, extended

4. IDE Host Adapter

IDE Activity LED

Port Address and IRQ

5. Floppy Disk Interface

Mating Cable Connector

Drive Type Specification

Mating Cable Connector

The pin-out for J24 is as follows:

Keyboard and Mouse wiring diagrams:

PS/2 Mouse: 6-pin female mini-DIN

PS/2 Keyboard: 6-pin female mini-DIN

Pin-out of connector looking into plug (on mouse or keyboard)

Drive Activity Lights

To RTC & CMOS

7. Serial Communication Interface