Documenti di Didattica
Documenti di Professioni
Documenti di Cultura
Experience
Senior Hardware Engineer at Energous
August 2016 - Present (3 months)
Board level and component level near/mid/far field wireless charging transmitter and receiver design
(0-15feets)
Hardware FAE at MediaTek
April 2015 - August 2016 (1 year 5 months)
# Primary interface with tier 1 customers like Amazon, Arris, Netgear, Belkin for both pre-sales and postsales technical support includes both carrier grade and retail products.
# Supported Amazon Lab126 project "Pie" from HW design phase to a successful national-wide launch of
their 1st version IP camera product. 1M+ units deployed in the first year since launch.
# Trained customers to use our QA tool and 3rd party equipment like Litepoint to identify and to debug issue
observed during field trials and mass deployment. Over 500k devices in production line are tested and have
resulted in a reduction of technician truck rolls by identifying and addressing frequently occurring problems.
# Conducted market research through customer engagement and summarized product recommendations to
Marketing and Engineering for roadmap integration for both WiFi and Bluetooth tool products.
# Devised benchmark tests focused around customer's current and future use cases to highlight the
superiority of next generation solutions against competitive solutions. This resulted in more compelling sales
presentations which lead to several design wins with tier 1 customers.
# Managed deliverables, technical support, and project schedules for 5+ tier 2 broadband and IoT customer
accounts like Netgear, Blekin, Tyco, TPlink including OEMs targeting major US service providers.
# Collaborated with OEMs to choose the optimal HW design including eMMC, DRAM, Ethernet etc..and
feature set of the WiFi subsystem to target service provider's needs. In addition, supported them through
customer lab trials and design selection for production.
Hardware Engineer at HDHomeRun
August 2013 - March 2015 (1 year 8 months)
# Primary schematic and layout designer for TV L-band ATSC 2-3 tuners WiFi/Ethernet platform home
entertainment system.
# Supported software engineering team and system team to debug and optimize HDhomerun customized
projects form Google/Amazon etc.
# Research and develop with other team members on L-band signal solution, DISEqC, Cablecard standard,
QPSK and QAM modem, Ethernet, power layers, high speed IO, DDR3, transcoding, Xilinx Zynq Chip,etc.
Search new components and new blocks to improve the performance of the system.
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# Well report hardware engineering design status to CTO on the new projects like ATSC/DVBS /DVBT/
ISBT for different countries TV/WiFi streaming solutions.
# On-bench test for new built boards for HVT/EVT/DVT boards to guarantee the performance of the boards
with every stages. Debug and fix issues happened with software team.
# Collaborated with China ODM to guarantee MP successfully. Check BOM, footprint and ATE test
commands for good performance. Co-work with ODM to optimize schematic and layout design.
Education
Boston University
Master of Science (MS), Electrical and Electronics Engineering, 2011 - 2013
China Institute of Metrology
Bachelor of Science (BS), Electrical and Electronics Engineering, 2006 - 2010
Courses
Master of Science (MS), Electrical and Electronics
Engineering
Boston University
VLSI Principle and Application
Solar Energy System
Analog Circuit Design
Quantum Mechanics
Quantum Structure and Optic Device
Biomedical Optics
IC Fabrication Technology
RF analogy IC Design
EC571
EC573
EC301
EC574
EC774
EC765
EC578
EC582 EC782
Projects
ASIC: QPSK Transmitter with on-chip Antenna
September 2012 to May 2013
Members:John(Yuechen) Yang
Independently designed a 5mW low Power QPSK Transmitter at 18 GHz in 8HP(schematic and layout) with
on-chip Antenna in HFSS for Neural Recording Applications. Cross-coupled QVCO, CML buffer, resistive
absorptive loads are finally designed in this project. A normal on-chip Dipole antenna is designed in HFSS in
a 4mm*4mm area in 18GHz.
SilFab: Wafer Processing Mask to Packaging
September 2011 to January 2012
Members:John(Yuechen) Yang
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Fabricated several silicon wafers in Boston Univ. Silicon Fabrication Lab with some simple circuits designed
on every chips. Hundreds of processes including diffusion, exposure, etching, metalization and so on.
RFIC: Front-End Design by Cadence Virtuoso & Verilog
September 2011 to December 2012
Members:John(Yuechen) Yang
Base on unideal cells, designed RF receiver and IQ modulation transmitter. Schematic & layout design and
Verilog verification of main RF modules including VCO, LNA, Op-amp, Comparator, Filters, Switchcapacitor circuits, Mixer, PLL, ADC, DAC, IO Transceiver. And, linearity, IIP3, harmonics, noise figure,
phase noise, tuning range and some important specs are tested before and after layout extracted.
PCB: SATV to WIFI Data Transfer
January 2013 to February 2014
Members:John(Yuechen) Yang
Designed SATV solution board, capture L-band carrier signal from dish, supplied power by Allegro LNBR,
modulated by Mxl542 chip, transcoded by Xilinx Zynq 7000 SoC, Send data to modem by ethernet chip
Atheros AR8151. Design work includes schematic capture/development, layout design, BOM preparation
and release to manufacturer.
Summary
Solid background in electrical engineering, deep expertise in RF CMOS design, PCB design, Hardware design
and Silicon manufacturating process and Quantum Mechanic and Quantum Device.
* Hand-on experiences with analog and digital circuit systems design at the Component level. Design and
implement test hardware and software systems. Wrote and implement test programs and processes for MixedSignal Integrated Circuits.
* Adept in the use of schematic entry tool, PCB Layout, design verification system and Electronics Design
Aided (EDA) Software like Altium, HFSS and Cadence with TSMC 0.25 and IBM 8HP technology.
* Proficient in the usage of testing equipment to include Oscilloscopes, Multimeters, Function Generators,
Logic Analyzers, Power Supplies and Automated Testing Equipment(ATE) - Teradyne Integra-Flex Tester - to
evaluate product performance.
*Several years hand-on experiences in silicon fabricaiton labs. Fabricate single chip for several times including
process like Diffusion, Photolithography, Etching, PVD, CVD.
* Be able to solve circuit testing problem on the level of physics due to the knowledge of Quantum Mechanics
and Semiconductor materials fundamental. Offer the ability in troubleshooting and repairing of electrical/
electronics system to fabrication level.
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* Hand-on experience in embedded system development. Familiar with the internal hardware like ALU,
GPIO, Memory, ADC, PWM etc. and software like register, pointers, I2C, SPI etc. architecture. Have basic
fundamental of C language programming and digital signal verification. Good at embedded board debug and
hardware upgrade
Languages
Mandarin
English
Volunteer Experience
Sorter at MedShare
January 2015 - Present
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John(Yuechen) Yang
Senior Hardware Engineer at Energous Corporation
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