STi5206

Low-cost SD advanced decoder SoC

for set-top boxes
Data brief

Features ■ Advanced security and DRM support including

SVP, MS-DRM and DTCP-IP
■ Advanced standard-definition video decoding ■ External memory interface (EMI) with NAND-
(H264/VC-1/MPEG2/AVS) Flash, NOR-Flash, peripherals support
■ Advanced multi-channel audio decoding
■ 4 x 4 matrix key front panel switch
(MPEG 1, MPEG 2, MP3, DD/DD+,
scanner FSM with key de-bounce
AAC/AAC+, WMA9/WMA9Pro)
■ Linux and OS21 compatible ST40 applications
CPU (450 MHz)
Description
■ 16-bit DDR1/DDR2 compatible local memory The STi5206 uses ST’s state-of-the-art process
interface technology to provide a low-cost, fully featured
advanced decoding SD set-top box SoC.
■ Multi-stream, DVR capable transport stream
processing It is a highly integrated solution suitable for
■ Flexible ST231 based audio decoder DVB-S satellite/x-DSL/IP STB markets worldwide.

■ Flexible ST231 based advanced video decoder

■ Multi-channel flexible DMA controller
■ Extensive connectivity (dual USB controller,
Ethernet MAC/MII/RMII/TMII, PCI and SD-
MMC/SDIO)

Resets Analog out

Clocks PCM I/O STB peripherals I/O
JTAG Modes S/PDIF out External interrupts

CPU/FPU Audio I/O Peripherals System Flash, SFlash

Clock Gen interfaces
ST40 450MHz System serv NOR, NAND
Dual PCM players
MMU SSC
PCM reader EMI
Interrupts UART PCI Peripherals
I cache S/PDIF player MAFE PCI
FDMA DACs
D cache PWM SPI
Timer Infrared LMI Serial Flash
Debug Smartcard
Audio decoder
Bdisp Blitter DDR1/DDR2
ST231 CPU
Memory

STBus

Transport Video decoder Display Video I/O

Security USB 2.0
ST231 CPU Video planes DVOs
Delta Mu Graphic planes Denc
SD-MMC/SDIO
Cursor plane Teletext
PTI
Main VDP DACs Connectivity
TS merger
Aux VDP VTGs Ethernet
Deinterlacer
Capture
DAA

Transport streams Digital video ED/SD out

Parallel/serial in/out Analog video ED/SD out

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For further information contact your local STMicroelectronics sales office. www.st.com 10
Introduction STi5206

1 Introduction

The STi5206 is targeted at the latest operator and CE manufacturer requirements for STB
markets across all networks (cable/satellite/DTT/x-DSL/IP) worldwide.
The STi5206 provides a solution for operators to specify a range of low-cost SD STBs
including low-cost zappers, interactive STBs and DVR capable STBs, with content delivery
possible using satellite broadcast, terrestrial broadcast or broadband networks, or a
combination (Hybrid STBs).
The STi5206 is optimized for secure Pay-TV applications with integrated DVB, DES, AES,
Multi-2 and ICAM descramblers and smartcard interfaces. It also has advanced security
features normally found in mid-to-high end devices to further safeguard operator and
content investment.
The STi5206 offers enhancements in performance, features and integration to current users
of ST’s SD AVC family of audio/video decoders, while reducing cost and time-to-market for
the next generation deployments.

Features Benefits

Serial Flash based secure boot and code
storage, integrated voltage regulator,
23 mm x 23 mm PBGA package
ST40-300 applications CPU@450MHz,
32K I cache, 32K D cache
STMicroelectronics' DELTA video decoding
system with ST231 processor
Dual USB 2.0 hosts, Ethernet MAC with
MII/RMII and TMII, PCI, SD-MMC/SDIO
Low power process, design and architecture
Advanced 2D graphics and display subsystem
and 480p/576p display output
Enables further BOM optimization and cost
reduction of advanced decoding SD STBs
Up to 800 DMIPs superscalar performance from a
single CPU core, using standard tools and
operating systems (Linux, OS21)
Decoding of advanced standard definition MPEG2,
H264 and VC-1/WMV9 streams, with the
performance and flexibility for web-based content
decoding such as Flash, DivX, MJPEG and Real
Extensive high speed connectivity for the widest
range of STB peripherals, such as Flash drives,
external HDDs, home network controllers (for
example MoCA, Wi-Fi), memory cards
Best in class, low-power standby mode, to meet
emerging energy standards for STBs. Dynamic
configuration of power to individual sub-systems
enables power-efficient active standby modes
Allows visually appealing user interfaces and video
rich navigation to be offered to consumers, while
high quality progressive output can be watched on
the latest displays

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STi5206 Introduction

1.1 STi5206 features summary

The STi5206 has the following main features:

CPU
● High-performance CPU for applications, middleware, drivers, and network protocols:
– ST40-300, dual-issue, applications CPU
– FPU, MMU, 32K instruction, 32K data, 2-way, set-associative caches
– Supports OS21 and Linux operating systems
– Target speed 450 MHz delivering >800DMIPs

System and memory interfaces

● Single 16-bit wide unified local memory interface:
– Supports DDR1/DDR2 SDRAM up to 400 MHz (800 million data transfers/second)
● 16-bit External Memory and Peripheral Interface (EMI) - up to five banks:
– Support for DVB-CI/CI+ Host interface and ATAPI protocols
● Interfacing to, and boot from, NOR or NAND FLASH
● Interfacing to, and boot from, serial FLASH (standard, dual I/O or quad I/O SPI)
● 32-bit, 33 MHz, PCI Interface, shared on EMI with access interleaving possible

Video decoding
● Latest generation “Delta” video decoder with ST231 programmable CPU core:
– MPEG2, H264, VC-1/WMV9, AVS SD advanced video decoding
– Provides flexibility and performance to support other codecs (DivX, XviD, MJPEG,
Flash, Real)
– SD decoding or dual SD decoding, PIP and Mosaic capable

DVR support
● DVR supported with HDD attachment via EIDE (PIO mode) or USB
● Disc-less timeslip feature supported via NAND Flash (managed) attached to USB or
MMC interfaces

Audio
● ST231 CPU based audio decoder:
– MPEG1 I/II, MP3 decoding
– Dolby® Digital/DD+, MPEG4, AAC/AAC+ multi-channel audio decoding
– Concurrent audio description decoding
– DD+ and AAC+ transcoding for S/PDIF output
● Audio output:
– Two PCM players
– PCM reader
– Integrated stereo audio DAC
– Eight-channel audio PCM output interface
– Independent S/PDIF player and output

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Introduction STi5206

Display and output

● Main and Aux video display pipelines:
– Main: high quality H and V reformatting/resizing with sample rate
conversion/filtering. Motion adaptive spatial and temporal de-interlacing for
480p/576p progressive output
– Aux: high quality H and V reformatting/resizing with sample rate
conversion/filtering
● Two video planes for displaying Primary and Secondary (PIP) video streams
● Three independent graphics planes. Color formats supported up to 32bpp
● Link-list based 2D graphics blitter:
– For application graphics rendering and pre-composition of planes
– Up to 266 Mpixels/sec with destination alpha blending
– Anti-flicker filtering, graphics rescaling and color re-formatting
● Independent Main and Aux display compositions (Video/Graphics mixing)
● Display output:
– PAL/NTSC/SECAM encoder
– Encoding of CGMS, Teletext, WSS, VPS, Close Caption
– MacrovisionTM 7.1D and Dwight Cavendish copy protection support
– Six 10-bit Video DACs outputting component RGB/YCbCr and composite
CVBS/YC analog video signals (ED/SD formats up to 480p/576p)
– 8-bit digital video output (DVO) compliant with ITU-R BT 601/ 656 formats
– 54 MHz output data rate on DVO supporting 480p/576p output over 8 bits

Connectivity
● Ethernet MAC with MII/RMII/TMII interface to external PHY, Wake-on-LAN, 50 MHz
(200 Mbits/sec) capable
● USB 2.0 dual port host controller with integrated PHY for one port and ULPI interface to
external PHY for the other port
● SD-MMC/SDIO interface for memory cards and eMMCTM based storage
● Soft modem support: integrated MAFE, integrated system-side DAA (SiLabs)

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STi5206 Introduction

Transport/security
● DVR capable, transport sub-system:
– External TS interfaces for two transport streams from external
tuners/demodulators
– Triple internal transport streams (SWTS) from memory for network/IP stream input
and DVR playback
– TS output for routing to DVB-CI/CI+ module
– DVB compliant triple-stream transport de-multiplexing up to 200 Mbps
● DVB, DES, AES, Multi2 descrambling
● ICAM2.2 NDS conditional access
● Advanced security:
– Secure control words
– Code authentication
– JTAG interface locking
– Network/DVR copy protection

STB peripherals, system services, package

● On-chip STB peripherals:
– Two smartcard interfaces with integrated clock generation
– Four UARTs with Tx and Rx FIFOs
– Four SSCs for I²C /SPI master/slave interfaces one of which can be dedicated for
tuner control with minimum tuner disturbance
– Four 8-bits GPIO banks with alternate functions
– Infrared Transmitter/Receiver, UHF Rx/SCD
– PWM
– ILC
– HDMI CEC
– 4 x 4 key matrix scanner
– 8-bit ADC
● System services:
– All clocks generated from a single external crystal
– Integrated DCO for clock recovery
– Low-power/RTC/watchdog controller
– JTAG/TAP interface
● Multi-channel flexible DMA controller
● On chip 1.2 V (nominal) voltage regulator
● Package: 23 mm x 23 mm PBGA, 497 balls, 8R 27x27, pitch 0.8 mm, ball 0.4 mm

Doc ID 16391 Rev 1 5/10

Target applications STi5206

2 Target applications

2.1 Low-cost IP SD STB

Figure 1. Typical low-cost IP SD STB

USB 2.0
USB power
control Ethernet
USB RJ45

MII
PHY
Serial SPI
Flash

SSC2-I2C
E2PROM
DDR2 LMI
64 MB

CVBS
YC, CVBS
STi5206 Svideo

30 MHz
STV6432

Front panel
display and controls PIOs/IRRX Analog
audio, L/R Left
Smartcard
Audio
Right

SC0/UART0 S/PDIF S/PDIF

ST8024

JTAG
Power supply Reset DCU

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STi5206 Target applications

2.2 DVB-C/IP SD STB

Figure 2. Typical DVB-C/IP SD STB

USB 2.0
Ethernet
USB power
control RJ45
USB

TSin MII
PHY
Tuner STV297E SSC3-I2C
HDMI output option
DVB-C receiver
HDMI HDMI
DVO/CEC/PCM0
SSC1-I2C Tx
Serial SPI S/PDIF
Flash
Y
SD/E D
e-MMC
Time-shift MLC NAND MMC YPbPr output option Pb
STV6438
option
Flash or
Pr
STV6440

DDR2 LMI STi5206

64 MB
SSC2-I2C CVBS
SSC2-I2C YC, CVBS
E2PROM Svideo

30 MHz
STV6432
Front panel PIOs/IRRX
display and controls Analog
audio, L/R Left
Smartcard
Audio
Right
To HDMI

SC0/UART0 S/PDIF S/PDIF

ST8024

JTAG
Reset DCU

Power supply

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Target applications STi5206

2.3 Dual tuner DVB-C/IP SD DVR STB

Figure 3. Typical dual tuner DVB-C/IP SD DVR STB
2x
HDD
USB 2.0
USB power
control

USB Ethernet
PHY USB RJ45
ULPI

TSin MII
Bypass PHY
output Tuner STV297E SSC0-I2C
Bypass,
Splitter,
LNA Dual DVB-C receiver
TSin
HDMI output option
Tuner STV297E SSC1-I2C DVO/CEC/PCM0 HDMI HDMI
SSC2-I2C Tx
S/PDIF
SLC NAND
FLASH
SSC3/I2C
EMI E2 PROM

DDR2 LMI
Aux/loop-thru
64-128 MB RGB SCART
STi5206
YC STV
CVBS 6417 TV
4 digit, UART1 SCART
7 segment Display driver 30 MHz
display or FP micro

Front panel PIOs

Analog audio,
display and controls IR Rx Left
L/R
Smartcard Audio
Right
To HDMI
UART0 S/PDIF
ST8024 S/PDIF

Option UART2
RS232 ST3232

JTAG
Reset DCU
Power supply

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STi5206 Ordering information

3 Ordering information

Table 1. Ordering information

Order code Packaging Description

STi5206ZYA PBGA 23 mm × 23 mm Development version, all options

4 Revision history

Table 2. Document revision history

Date Revision Changes

09-Oct-2009 1 Initial release.

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 STi5206

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