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METAL OXIDE
SEMICONDUCTOR FIELD
EFFECT TRANSISTOR
Review of MOSFET
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Structure of MOSFET
The region identified as the gate (not to be confused with the term gate as it
is used for a logic device) was originally made of metal (aluminum). MOSFET's
used in integrated circuits use a polysilicon material (a conductor with
somewhat more resistance than metal) for the gate.
The material just below the gate is an oxide insulator that prevents the gate
from making electrical contact with the semiconductor material beneath it. It
is this sandwich of metal, oxide, and semiconductor for which MOS transistors
are named.
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Structure of MOSFET
The voltage between the gate and the substrate
will control the flow of current between the drain
and source.
When the gate voltage is positive with respect to
the substrate, the resulting electric field will
force positive charge carriers out of the region
between the source and drain, turning it into Ntype material as shown in Fig.b. This effectively
connects the source and drain, allowing current
to flow, so that the transistor acts as a closed
switch in this state. This induced conducting
region is called a channel, and since it is N-type
material, the transistor is called an N-channel
FET. When the electric field is absent or
negative, the P-type material between the
source and drain forms two back-to-back PN
junctions giving the equivalent circuit shown in
Fig. c.
Since diodes will only allow significant current to
flow from their anode to their cathode, and any
current flowing in one diode must also flow in
the other, the circuit blocks almost all current
flow between the source and drain terminals and
acts as an open switch.
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Structure of MOSFET
It is also possible to reverse the N- and P-type materials as
shown in Fig. d. This transistor is called a P-channel FET
because a negative voltage on the gate (relative to the
substrate) will induce a channel of P-type material between
the source and drain.
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Types of MOSFET
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MOS Technology
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MOS Technology
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MOSFET Technology
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MOS Technology
DS
Enhancement-type
Depletion-type
MOS Technology
D-S bias
VGS
(needed for
conduction)
RON ()
ROFF ()
P-channel
Negative
1K (typical)
1010
N-channel
Positive
1K (typical)
1010
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PMOS gates
inverter
NOR
NAND
-VDD
Q1
output
Q2
A
Q3
B
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CMOS Technology
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CMOS Inverter
When a LOW is applied to
input, Q2 will be OFF, since VGS =
0V but Q1 is ON, since its VGS is a
large negative value (-5.0V).
Therefore, Q1 presents only a
small resistance between VDD
and the output will be HIGH.
input
Q1
Q2
output
0.0 (L)
ON
OFF
5.0 (H)
5.0 (H)
OFF
ON
0.0 (L)
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