Psp103p2 Summary

Technical Note NXP-TN-2012-0080
Issued: 1/2013
PSP 103.2
The PSP model is a joint development of Delft University
of Technology and NXP Semiconductors
G.D.J. Smit, A.J. Scholten, and D.B.M. Klaassen

(NXP Semiconductors)
R. van der Toorn
(Delft University of Technology)
Unclassified Report
c NXP Semiconductors 2013
NXP-TN-2012-0080 January 2013
Unclassified
PSP 103.2
PSP developers (present and past)

At NXP Semiconductors
Geert D.J. Smit
Andries J. Scholten
Dirk B.M. Klaassen
At Delft University of Technology
Ramses van der Toorn
At Philips Research Europe
Ronald van Langevelde (until 2006)
At Arizona State University
Gennady Gildenblat (until 2011)
Hailing Wang (until 2005)
Xin Li (until 2011)
Weimin Wu (until 2011)
Authors address R. van der Toorn

G.D.J. Smit
A.J. Scholten
D.B.M. Klaassen
PSP_Support@tudelft.nl
Gert-Jan.Smit@nxp.com
Andries.Scholten@nxp.com
D.B.M.Klaassen@nxp.com
c NXP SEMICONDUCTORS 2013
All rights reserved. Reproduction or dissemination in whole or in part is prohibited without the
prior written consent of the copyright holder.
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PSP 103.2
January 2013 NXP-TN-2012-0080
Title:
PSP 103.2
Author(s):
G.D.J. Smit, A.J. Scholten, and D.B.M. Klaassen (NXP Semiconductors)

R. van der Toorn (Delft University of Technology)
Reviewer(s):
Technical Note:
NXP-TN-2012-0080
Additional
Numbers:
Subcategory:
Project:
Customer:
Keywords:
PSP Model, compact modeling, MOSFET, CMOS, circuit simulation, integrated circuits
Abstract:
The PSP model is a compact MOSFET model intended for analog, RF, and digital design. It is jointly developed by NXP Semiconductors and Delft University of Technology.
(Until 2011, it was jointly developed by NXP Semiconductors and Arizona State University. The roots of PSP lie in both MOS Model 11 (developed by NXP Semiconductors)
and SP (developed at the Pennsylvania State University and later at Arizona State University). PSP is a surface-potential based MOS Model, containing all relevant physical
effects (mobility reduction, velocity saturation, DIBL, gate current, lateral doping gradient effects, STI stress, etc.) to model present-day and upcoming deep-submicron bulk
CMOS technologies. The source/drain junction model, c.q. the JUNCAP2 model, is
fully integrated in PSP. This report contains a full description of the PSP model, including parameter sets, scaling rules, model equations, and a description of the parameter
extraction procedure.
In December 2005, the Compact Model Council (CMC) has elected PSP as the new industrial standard model for compact MOSFET modeling.
Since December 2012, Delft University of Technology replaces Arizona State University
as the supporting institution.
Conclusions:
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History of model and documentation

History of the model
April 2005 Release of PSP 100.0 (which includes JUNCAP2 200.0) as part of SiMKit 2.1. A Verilog-A
implementation of the PSP-model is made available as well. The PSP-NQS model is released as Verilog-A
code only.
August 2005 Release of PSP 100.1 (which includes JUNCAP2 200.1) as part of SiMKit 2.2. Similar to
the previous version, a Verilog-A implementation of the PSP-model is made available as well and the PSPNQS model is released as Verilog-A code only. Focus of this release was mainly on the optimization of the
evaluation speed of PSP. Moreover, the PSP implementation has been extended with operating point output
(SiMKit-version only).
March 2006 Release of PSP 101.0 (which includes JUNCAP2 200.1) as part of SiMKit 2.3. PSP 101.0 is
not backward compatible with PSP 100.1. Similar to the previous version, a Verilog-A implementation of the
PSP-model is made available as well and the PSP-NQS model is released as Verilog-A code only. Focus of this
release was on the implementation of requirements for CMC standardization, especially those which could not
preserve backward compatibility.
June 2006 Release of PSP 102.0 (which includes JUNCAP2 200.1) as part of SiMKit 2.3.2. PSP 102.0 is
backward compatible with PSP 101.0 in all practical cases, provided a simple transformation to the parameter
set is applied (see description below). Similar to the previous version, a Verilog-A implementation of the
PSP-model is made available as well and the PSP-NQS model is released as Verilog-A code only.
Global parameter sets for PSP 101.0 can be transformed to PSP 102.0 by replacing DPHIBL (in 102.0 parameter set) by DPHIBO DPHIBL (from 101.0 parameter set). After this transformation, the simulation results
of PSP 102.0 are identical to those of PSP 101.0 in all practical situations.
October 2006 Release of PSP 102.1 (which includes JUNCAP2 200.2) as part of SiMKit 2.4. PSP 102.1
is backward compatible with PSP 102.0. SiMKit 2.4 includes a preliminary implementation of the PSP-NQS
model. Similar to the previous version, a Verilog-A implementation of the PSP-model is available as well.
October 2007 Release of PSP 102.2 (which includes JUNCAP2 200.3). PSP 102.2 is backward compatible
with PSP 102.1. This release provides an express version of JUNCAP2.
April 2008 Release of PSP 102.3 (which includes JUNCAP2 200.3) as part of SiMKit 3.1. PSP 102.3 is
backward compatible with PSP 102.2. Focus of this release is on the implementation of asymmetric models for
both junction and overlap regions of the drain side.
November 2008 Release of PSP 103.0 (which includes JUNCAP 200.3) as part of SiMKit 3.2. PSP 103.0 is
not fully backward compatible with PSP 102.3. The main changes are:
Global, local and binning models are unified. When SWGEO = 1 (default) global model is used. When
SWGEO = 0 local model is selected. The binning model is invoked if SWGEO is set to 2.
Added non-uniform doping (NUD) model. The model can be invoked on by setting SWNUD = 1 or 2.
When SWNUD = 1, a separate surface potential calculation is carried out and the NUD model does not
affect the CV results. This avoids non-reciprocal capacitances. When SWNUD = 2, the extra surface
potential calculation is skipped and this may result in non-reciprocal capacitances.
Added related model parameters GFACNUDO, GFACNUDL, GFACNUDLEXP, GFACNUDW, GFACNUDLW,
VSBNUDO and DVSBNUDO to global, GFACNUD, VSBNUD and DVSBNUD to local and POGFACNUD,
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PSP 103.2
PLGFACNUD, PWGFACNUD, PLWGFACNUD, POVSBNUD and PODVSBNUD to binning models.

Added Vth -adjustment model for CV. It can be turned on by setting SWDELVTAC = 1. Note that
this requires extra computation of surface potentials. Added related model parameters FACNEFFACO,
FACNEFFACL, FACNEFFACW, FACNEFFACLW, DELVTACO, DELVTACL, DELVTACLEXP,
DELVTACW and DELVTACLW to global, FACNEFFAC and DELVTAC to local and POFACNEFFAC,
PLFACNEFFAC, PWFACNEFFAC, PLWFACNEFFAC, PODELVTAC, PLDELVTAC, PWDELVTAC
and PLWDELVTAC to binning model.
Added external diffusion resistances to source and drain. Added instance parameters NRS and NRD;
added model parameters RSH to global and binning, RSE and RDE to local model.
Modified the geometrical scaling rules of following parameters: VFB, STVFB, DPHIB, STBET and
STTHESAT.
Modified the binning rule of BETN.
Removed the effect of FETA from CV.
Added local parameter values to OP-output.
Some minor bug-fixes and implementation changes.
May 2009
are:
Release of PSP 103.1 (which includes JUNCAP 200.3) as part of SiMKit 3.3. The main changes
Added external sheet resistance RSHD for drain diffusion (used when SWJUNASYM = 1)
Bug-fix and minor implementation change in NUD-model
Minor bug fix in conditional for SP-calculation of overlap areas.
Added noise source labeling (vA-code only)
December 2009
changes are:
Release of PSP 103.1.1 (which includes JUNCAP 200.3) as part of SiMKit 3.4. The main
Modified implementation of the asymmetrical junction model to improve simulation speed of verilog-A
code.
Modified implementation of the stand-alone JUNCAP2 model.
Modified implementation of the MULT-scaling factor.
Modified implementation of NUD model.
Minor bug fixes.
July 2010 Release of PSP 103.1.2 as part of SiMKit 3.5. The main changes are:
Changes in the calculation of the surface-potential in the overlap regions and the calculation of the gatecurrent. These modifications lead to an 7% simulation speed increase, but leads to some small changes
in the overlap-capacitance, gate-current, and GIDL-current w.r.t. the previous version.
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PSP 103.2
December 2012
changes are:
Release of PSP 103.2.0 (which includes JUNCAP 200.4) as part of SiMKit 4.0.1. The main
Changes in the calculation of the surface potential in the overlap regions (see July 2010).
Introduction of self heating. The self heating version of the model has a fifth terminal (dt) to represent the
temperature increase. New parameters: RTH, CTH, STRTH (local model), RTHO, CTHO, STRTHO
(global model and binning model).
The expression for qlim2 in QM correction was modified to avoid unphysical behavior when oxide
thickness is large. This modification makes the model more suitable for high-k dielectrics.
Some minor bug-fixes in the calculation of the OP-output.
Several improvements in the noise-model implementation
Fixed sign of correlation coefficient (Verilog-A only).
Simplified implementation and better scaled noise amplitude at internal nodes (Verilog-A only).
Improved behavior when crossing Vds = 0 at high-frequency.
Scaled junction parameters added to OP-output.
New parameter PARAMCHK to set level of clip warnings (SiMKit only).
More efficient model evaluation when MULT = 0 (SiMKit only).
History of the documentation

April 2005
August 2005
First release of PSP (PSP 100.0) documentation.

Documentation updated for PSP 100.1, errors corrected and new items added.
March 2006 Documentation adapted to PSP 101.0. Added more details on noise-model implementation and
a full description of the NQS-model.
June 2006
Documentation adapted to PSP 102.0 and some errors corrected.
October 2006 Documentation adapted to PSP 102.1 and some errors corrected.
October 2007 Documentation adapted to PSP 102.2 and some errors corrected.
April 2008
November 2008
June 2009
December 2012
Documentation adapted to PSP 103.2.
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Contents
1
Introduction
1.1
Origin and purpose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2
Structure of PSP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3
Availability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3.1
SiMKit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Constants and Parameters
2.1
Nomenclature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2
Parameter clipping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3
Circuit simulator variables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.4
Model constants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.5
Model parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.5.1
Instance parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.5.2
Intrinsic model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.5.3
Parameters for stress model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
25
2.5.4
Parameters for well proximity effect model . . . . . . . . . . . . . . . . . . . . . . .
26
2.5.5
Parameters for source-bulk and drain-bulk junction model . . . . . . . . . . . . . . .
27
2.5.6
Parameters for parasitic resistances . . . . . . . . . . . . . . . . . . . . . . . . . . .
34
2.5.7
Parameters for self heating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
35
2.5.8
Parameters for NQS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
36
Geometry dependence and Other effects
37
3.1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
37
3.2
Geometrical scaling rules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
37
3.3
Binning equations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
46
3.4
Parasitic resistances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
55
3.5
Stress effects . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
56
3.5.1
Layout effects for multi-finger devices . . . . . . . . . . . . . . . . . . . . . . . . . .
56
3.5.2
Layout effects for regular shapes . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
56
3.5.3
Parameter modifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
58
Well proximity effects . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
59
3.6.1
59
3.6
Parameters for pre-layout simulation . . . . . . . . . . . . . . . . . . . . . . . . . . .
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3.6.2
3.7
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Calculation of parameter modifications . . . . . . . . . . . . . . . . . . . . . . . . .
60
Asymmetric junctions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
61
PSP Model Equations
63
4.1
Internal Parameters (including Temperature Scaling) . . . . . . . . . . . . . . . . . . . . . .
63
4.2
Current Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
68
4.2.1
Conditioning of Terminal Voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . .
68
4.2.2
Bias-Dependent Body Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
69
4.2.3
Surface Potential at Source Side and Related Variables . . . . . . . . . . . . . . . . .
69
4.2.4
Drain Saturation Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
70
4.2.5
Surface Potential at Drain Side and Related Variables . . . . . . . . . . . . . . . . . .
72
4.2.6
Mid-Point Surface Potential and Related Variables . . . . . . . . . . . . . . . . . . .
73
4.2.7
Polysilicon Depletion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
73
4.2.8
Potential Mid-Point Inversion Charge and Related Variables . . . . . . . . . . . . . .
74
4.2.9
Drain-Source Channel Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
75
4.2.10 Impact Ionization or Weak-Avalanche . . . . . . . . . . . . . . . . . . . . . . . . . .
76
4.2.11 Surface Potential in Gate Overlap Regions . . . . . . . . . . . . . . . . . . . . . . . .
76
4.2.12 Gate Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
77
4.2.13 Gate-Induced Drain/Source Leakage Current . . . . . . . . . . . . . . . . . . . . . .
79
4.2.14 Total Terminal Currents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
79
Charge Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
80
4.3.1
Quantum-Mechanical Corrections . . . . . . . . . . . . . . . . . . . . . . . . . . . .
80
4.3.2
Intrinsic Charge Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
80
4.3.3
Extrinsic Charge Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
80
4.3.4
Total Terminal Charges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
81
4.4
Noise Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
82
4.5
Self heating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
84
4.3
PSP 103.2
Non-quasi-static RF model
85
5.1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
85
5.2
NQS-effects . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
85
5.3
NQS Model Equations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
85
5.3.1
Internal constants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
86
5.3.2
Position independent quantities . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
87
5.3.3
Position dependent surface potential and charge . . . . . . . . . . . . . . . . . . . . .
87
5.3.4
Cubic spline interpolation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
89
5.3.5
Continuity equation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
89
5.3.6
Non-quasi-static terminal charges . . . . . . . . . . . . . . . . . . . . . . . . . . . .
90
Embedding
92
6.1
Model selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
92
6.2
Case of parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
92
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6.3
Embedding PSP in a Circuit Simulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
92
6.3.1
Selection of device type . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
93
6.4
Integration of JUNCAP2 in PSP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
95
6.5
Verilog-A versus C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
96
6.5.1
Implementation of GMIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
96
6.5.2
Implementation of parasitic resistances . . . . . . . . . . . . . . . . . . . . . . . . .
96
6.5.3
Implementation of the noise-equations . . . . . . . . . . . . . . . . . . . . . . . . . .
97
6.5.4
Clip warnings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
Parameter extraction
103
7.1
Measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
7.2
Extraction of local parameters at room temperature . . . . . . . . . . . . . . . . . . . . . . . 104
7.3
Extraction of Temperature Scaling Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . 108
7.4
Extraction of Geometry Scaling Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
7.5
Summary Geometrical scaling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
7.6
Extraction of Binning Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111

7.6.1
PSP 103.2
Binning of BETN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
DC Operating Point Output
113
A Auxiliary Equations
122
B Layout parameter calculation
124
B.1 Stress parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124

B.1.1
Layout effects for irregular shapes . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
B.2 Well proximity effect parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
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Section 1
Introduction
1.1 Origin and purpose
The PSP model is a compact MOSFET model intended for analog, RF, and digital design. It is jointly developed
by NXP Semiconductors and Delft University of Technology. (Until 2011, it was jointly developed by NXP
Semiconductors and Arizona State University. The roots of PSP lie in both MOS Model 11 (developed by NXP
Semiconductors) and SP (developed at the Pennsylvania State University and later at Arizona State University).
PSP is a surface-potential based MOS Model, containing all relevant physical effects (mobility reduction,
velocity saturation, DIBL, gate current, lateral doping gradient effects, STI stress, etc.) to model present-day
and upcoming deep-submicron bulk CMOS technologies. The source/drain junction model, c.q. the JUNCAP2
model, is fully integrated in PSP.
PSP not only gives an accurate description of currents, charges, and their first order derivatives (i.e. transconductance, conductance and capacitances), but also of the higher order derivatives, resulting in an accurate
description of electrical distortion behavior. The latter is especially important for analog and RF circuit design.
The model furthermore gives an accurate description of the noise behavior of MOSFETs. Finally, PSP has an
option for simulation of non-quasi-static (NQS) effects.
The source code of PSP and the most recent version of this documentation are available on the PSP model web
site: psp.ewi.tudelft.nl and the NXP Semiconductors web site: www.nxp.com/models.
1.2 Structure of PSP

The PSP model has a hierarchical structure, similar to that of MOS Model 11 and SP. This means that there is
a strict separation of the geometry scaling in the global model and the model equations in the local model.
As a consequence, PSP can be used at either one of two levels.
Global level One uses a global parameter set, which describes a whole geometry range. Combined
with instance parameters (such as L and W ), a local parameter set is internally generated and further
processed at the local level in exactly the same way as a custom-made local parameter set.
Local level One uses a custom-made local parameter set to simulate a transistor with a specific geometry.
Temperature scaling is included at this level.
The set of parameters which occur in the equations for the various electrical quantities is called the local
parameter set. In PSP, temperature scaling parameters are included in the local parameter set. An overview of
the local parameters in PSP is given in Section 2.5.2. Each of these parameters can be determined by purely
electrical measurements. As a consequence, a local parameter set gives a complete description of the electrical
properties of a device of one particular geometry.
Global level
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PSP 103.2
Global parameter set
Geometry scaling
L, W
SA, SB, SD
Stress parameters
SCA, SCB, SCC, SC

Well proximity effect (WPE) parameters
Stress model
WPE model
Local parameter set
Local level
Local parameter set
Temperature scaling
TA
Terminal
voltages
Model equations
Currents
Charges
Noise
Local model
Figure 1.1: Simplified schematic overview of PSPs hierarchical structure.
Since most of these (local) parameters scale with geometry, all transistors of a particular process can be described by a (larger) set of parameters, called the global parameter set. An overview of the global parameters
in PSP is given in Section 2.5.2. Roughly speaking, this set contains all local parameters for a long/wide device
plus a number of sensitivity coefficients. From the global parameter set, one can obtain a local parameter set for
a specific device by applying a set of scaling rules (see Section 3.2). The geometric properties of that specific
device (such as its length and width) enter these scaling rules as instance parameters.
From PSP 101.0 onwards it is possible to use a set of binning rules (see Section 3.3) as an alternative to the
geometrical (physics based) scaling rules. These binning rules come with their own set of parameters (see
Section 2.5.2). Similar to the geometrical scaling rules, the binning rules yield a local parameter set which is
used as input for the local model.
PSP is preferably used at global level when designing a circuit in a specific technology for which a global
parameter set is available. On the other hand, using PSP at local level can be advantageous during parameter
extraction.
As an option, it is possible to deal with the modifications of transistor properties due to stress and well proximity
effect (WPE). In PSP, this is implemented by additional sets of transformation rules, which are optionally
applied to the intermediate local parameter set generated at the global level. The parameters associated with
the stress and WPE models are consequently part of the global parameter set (both geometrical and binning).
The model structure described above is schematically depicted in Fig. 1.1.
The JUNCAP2 model is implemented in such a way that the same set of JUNCAP2 parameters can be used at
2
Unclassified
PSP 103.2
both the global and the local level. This is further explained in Section 6.4.
1.3 Availability
The PSP model developers (Delft University of Technology and NXP Semiconductors) distribute the PSP code
in two formats:
1. Verilog-A code
2. C-code (as part of SiMKit-library)
The C-version is automatically generated from the Verilog-A version by the software package ADMS [1].
This procedure guarantees the two implementations to contain identical equations. Neverthelessdue to some
specific limitations/capabilities of the two formatsthere are a few minor differences, which are described in
Section 6.5.
1.3.1
SiMKit
SiMKit is a simulator-independent compact transistor model library. Simulator-specific connections are handled
through so-called adapters that provide the correct interfacing to the circuit simulator of choice. Currently,
adapters to the following circuit simulators are provided:
1. Spectre (Cadence)
2. Pstar (NXP Semiconductors)
3. ADS (Agilent)
Some other circuit simulators vendors provide their own SiMKit adapter, such that simulations with models in
SiMKit are possible.
Unclassified
PSP 103.2
Section 2
Constants and Parameters

2.1 Nomenclature
The nomenclature of the quantities listed in the following sections has been chosen to express their purpose
and their relation to other quantities and to preclude ambiguity and inconsistency. Throughout this document,
all PSP parameter names are printed in boldface capitals. Parameters which refer to the long transistor limit
and/or the reference temperature have a name containing an O, while the names of scaling parameters end
with the letter L and/or W for length or width scaling, respectively. Parameters for temperature scaling start
with ST, followed by the name of the parameter to which the temperature scaling applies. Parameters used
for the binning model start with PO, PL, PW, or PLW, followed by the name of the local parameter
they refer to.
2.2 Parameter clipping

For most parameters, a maximum and/or minimum value is given in the tables below. In PSP, all parameters
are limited (clipped) to this pre-specified range in order to prevent difficulties in the numerical evaluation of
the model, such as division by zero.
N.B. After computation of the scaling rules (either physical or binning), stress and well proximity effect equations, the resulting local parameters are subjected to the clipping values as given in Section 2.5.2.
2.3 Circuit simulator variables

External electrical variables
The definitions of the external electrical variables are illustrated in Fig. 2.1. The relationship between these
external variables and the internal variables used in Chapter 4 is given in Fig. 6.1.
Symbol
Unit
Description
VDe
VGe
VSe
VBe
e
ID
V
V
V
V
A
Potential applied to drain node

Potential applied to gate node
Potential applied to source node
Potential applied to bulk node
DC current into drain node
continued on next page. . .
Unclassified
PSP 103.2
. . . continued from previous page
Symbol
Unit
Description
e
IG
ISe
IBe
Se
e
Sid
e
Sig,S
e
Sig,D
e
Sigs
e
Sigd
e
Sj,S
e
Sj,D
e
Sigid
A
A
A
A2 s
A2 s
A2 s
A2 s
A2 s
A2 s
A2 s
A2 s
A2 s
DC current into gate node

DC current into source node
DC current into bulk node
Spectral density of flicker noise current in the channel
Spectral density of thermal noise current in the channel
Spectral density of induced gate noise at source side
Spectral density of induced gate noise at drain side
Spectral density of gate current shot noise at source side
Spectral density of gate current shot noise at drain side
Spectral density of source junction shot noise
Spectral density of drain junction shot noise
e
e
e
and (SigS
or SigD
)
Cross spectral density between Sid
Other circuit simulator variables

Next to the electrical variables described above, the quantities in the table below are also provided to the model
by the circuit simulator.
Symbol
Unit
Description
TA
fop
Ambient circuit temperature

Operation frequency
C
Hz
2.4 Model constants

In the following table the symbolic representation, the value and the description of the various physical constants used in the PSP model are given.
No.
Symbol
Unit
Value
Description
T0
273.15
2
3
4
5
6
7
8
kB
~
q
m0
0
r,Si
QMN
J/K
Js
C
kg
F/m
4
2
V m 3 C 3
1.3806505 1023
1.05457168 1034
1.6021918 1019
9.1093826 1031
8.8541878176 1012
11.8
5.951993
QMP
V m 3 C 3
7.448711
Offset between Celsius and Kelvin temperature scale

Boltzmann constant
Reduced Planck constant
Elementary unit charge
Electron rest mass
Permittivity of free space
Relative permittivity of silicon
Constant of quantum-mechanical behavior of
electrons
Constant of quantum-mechanical behavior of
holes
Unclassified
PSP 103.2
VGe
ieG
e
Sigs
e
Sig,S
e
Sig,D
e
Sigd
VSe
e
ieD = ID
+
dQeD
dt
e
ieG = IG
+
dQeG
dt
VDe
ieS
e
Sid
ieD
Se
e
Sj,S
ieS = ISe +
dQeS
dt
ieB = IBe +
dQeB
dt
e
Sj,D
ieB
VBe
Figure 2.1: Definition of external electrical quantities.
2.5
Model parameters
In this section all parameters of the PSP-model are described. The parameters for the intrinsic MOS model,
the stress and well proximity effect models and the junction model are given in separate tables. The complete
parameter list for each of the model entry levels is composed of several parts, as indicated in the table below.
Entry level
Sections
Global (geometrical scaling)
2.5.1 (instance parameters)

2.5.2 (intrinsic MOS)
2.5.3 (stress)
2.5.4 (well proximity effect)
2.5.5 (junctions)
2.5.6 (parasitic resistances)
Binning

2.5.3 (stress)
2.5.4 (well proximity effect)
2.5.5 (junctions)
Local

2.5.5 (junctions)
Unclassified
2.5.1
PSP 103.2
Instance parameters
The instant parameters for global, local and binning models are listed in the table below. The last column of
Geo. shows for which value of SWGEO the listed parameter is used. Note that, as explained in Section 6.4,
the instance parameters for the JUNCAP2 model are used at the local level as well.
No.
Name
Unit
Default
Min.
Max.
0
1
2
3
L
W
ABSOURCE
LSSOURCE
m
m
m2
m
106
106
1012
106
109
109
0
0
LGSOURCE
106
5
6
ABDRAIN
LSDRAIN
m2
m
1012
106
0
0
LGDRAIN
106
AS
m2
1012
PS
106
10
AD
m2
1012
11
PD
106
12
13
14
15
JW
DELVTO
FACTUO
SA
m
V
1 106
0
1
0
16
SB
17
SD
18
SCA
19
SCB
20
SCC
21
SC
22
NRS
23
NRD
24
NGCON
Description
Geo.
Drawn channel length

Drawn channel width (total width)
Source junction area
STI-edge part of source junction
perimeter
Gate-edge part of source junction
perimeter
Drain junction area
STI-edge part of drain junction
perimeter
Gate-edge part of drain junction
perimeter
Source junction area (alternative
spec.)
Source STI-edge perimeter
(alternative spec.)
Drain junction area (alternative
spec.)
Drain STI-edge perimeter
(alternative spec.)
Junction width
Threshold voltage shift parameter
Zero-field mobility pre-factor
Distance between OD-edge and
poly at source side
poly at drain side
Distance between neighboring
fingers
Integral of the first distribution
function for scattered well dopant
Integral of the second distribution
Integral of the third distribution
Distance between OD edge and
nearest well edge
Number of squares of source
diffusion
Number of squares of drain
diffusion
Number of gate contacts
1, 2
1, 2
0, 1, 2
0, 1, 2
0, 1, 2
0, 1, 2
0, 1, 2
0, 1, 2
0, 1, 2
0, 1, 2
0, 1, 2
0, 1, 2
0
0, 1, 2
0, 1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
PSP 103.2
Unclassified
Description
Geo.
Distance from the gate contact to

the channel edge
Number of fingers; internally
rounded to the nearest integer
Number of devices in parallel
1, 2
No.
Name
Unit
Default
Min.
Max.
25
XGW
107
26
NF
27
MULT
1, 2
0, 1, 2
Note that if both SA and SB are set to 0 the stress-equations are not computed. If SCA, SCB, SCC and SC are
all set to 0 the well proximity effect equations are not computed.
The switching parameter SWJUNCAP is used to determine the meaning and usage of the junction instance
parameters, where AB (junction area), LS (STI-edge part of junction perimeter), and LG (gate-edge part of
junction perimeter) are the instance parameters of a single instance (source or drain) of the JUNCAP2 model.
source
SWJUNCAP
0
1
2
3
drain
AB
LS
LG
AB
LS
LG
0
ABSOURCE
AS
AS
0
LSSOURCE
PS
PS WE
0
LGSOURCE
WE
WE
0
ABDRAIN
AD
AD
0
LSDRAIN
PD
PD WE
0
LGDRAIN
WE
WE
At the local level, the switching parameter SWJUNCAP is used to determine the meaning and usage of the
junction instance parameters, where AB (junction area), LS (STI-edge part of junction perimeter), and LG
(gate-edge part of junction perimeter) are the instance parameters of a single instance (source or drain) of the
JUNCAP2 model. Because the transistor width W is not available at the local level, an additional instance
parameter JW (junction width) is required when SWJUNCAP = 2 or 3.
source
SWJUNCAP
0
1
2
3
drain
AB
LS
LG
AB
LS
LG
0
ABSOURCE
AS
AS
0
LSSOURCE
PS
PS JW
0
LGSOURCE
JW
JW
0
ABDRAIN
AD
AD
0
LSDRAIN
PD
PD JW
0
LGDRAIN
JW
JW
Unclassified
2.5.2
PSP 103.2
Intrinsic model
The model parameters for the intrinsic part of the MOSFET are listed in the table below. The last column
labeled Geo.shows for which value of SWGEO the parameter is used. The convention used in this table
is that, if a scaling rule exists for a local parameter its scaling (global and/or binning) parameters are grouped
underneath. Note also some parameters do not have their local counterparts.
No.
Name
Unit
LEVEL
103
TYPE
2
3
TR
DTA
21
0
273
C
K
Default
Min. Max. Description
Geo.
Model selection parameter; see

Sec. 6.1
Channel type parameter; 1
NMOS, 1 PMOS1
Reference temperature
Temperature offset w.r.t. ambient
circuit temperature
0, 1, 2
0, 1, 2
0, 1, 2
0, 1, 2
Switches
4
5
PARAMCHK
SWGEO
0
1
6
7
SWIGATE
SWIMPACT
0
0
0
0
1
1
SWGIDL
9
10
SWJUNCAP
SWJUNASYM
0
0
11
12
SWNUD
SWDELVTAC
0
0
0
0
2
1
13
QMC
Level of clip-warning info2

Flag for geometrical model (0
local, 1 global, 2 binning )
Flag for gate current (0 off)
Flag for impact ionization current
(0 off)
Flag for GIDL/GISL current (0
off)
Flag for JUNCAP (0 off)
Flag for asymmetric junctions (0
off)
Flag for NUD-effect (0 off)
Flag for separate charge calculation
(0 off)
Quantum-mechanical correction
factor
0, 1, 2
0, 1, 2
0, 1, 2
0, 1, 2
0, 1, 2
0, 1, 2
0, 1, 2
0, 1, 2
0, 1, 2
0, 1, 2
Labels for binning set

14
LMIN
15
LMAX
16
WMIN
17
WMAX
Dummy parameter to label binning

set
set
set
set
2
2
2
2
Process Parameters
18
LVARO
Geometry independent difference

between actual and programmed
poly-silicon gate length
1, 2

1 See
Section 6.3.1 for more information on usage of TYPE in various simulators.

in SiMKit-version of PSP. See Section 6.5.4 for more information.
2 Only
Unclassified
PSP 103.2
No.
Name
Unit
Default
Geo.
19
20
21
LVARL
LVARW
LAP
0
0
0
22
WVARO
23
24
25
WVARL
WVARW
WOT
0
0
0
26
DLQ
27
DWQ
28
VFB
Flat-band voltage at TR
Length dependence of LPS

Width dependence of LPS
Effective channel length reduction
per side due to lateral diffusion of
source/drain dopant ions
Geometry independent difference
between actual and programmed
field-oxide opening
Length dependence of WOD
Width dependence of WOD
Effective reduction of channel
width per side due to lateral
diffusion of channel-stop dopant
ions
Effective channel length offset for
CV
Effective channel width offset for
CV
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
29
30
31
32
VFBO
VFBL
VFBW
VFBLW
V
V
V
V
1
0
0
0
Geometry-independent part
Length dependence
Width dependence
Area dependence
1
1
1
1
33
34
35
36
POVFB
PLVFB
PWVFB
PLWVFB
V
V
V
V
1
0
0
0
Geometry independent part

Length dependence
Width dependence
Length times width dependence
2
2
2
2
V/K
5 104
Temperature dependence of VFB
37
STVFB
38
39
40
41
STVFBO
STVFBL
STVFBW
STVFBLW
V/K
V/K
V/K
V/K
5 104
0
0
0
Length dependence
Width dependence
Area dependence
1
1
1
1
42
43
44
45
POSTVFB
PLSTVFB
PWSTVFB
PLWSTVFB
V/K
V/K
V/K
V/K
5 104
0
0
0

Length dependence
Width dependence
2
2
2
2
2 109
1010
Gate oxide thickness
46
TOX
47
TOXO
2 109
1010
Gate oxide thickness
48
POTOX
2 109
3.9
Relative permittivity of gate

dielectric
49
EPSROX
10
Unclassified
PSP 103.2
No.
Name
Unit
Default
Geo.
50
EPSROXO
3.9
51
POEPSROX
3.9
52
NEFF
m3
5 1023
1020 1026 Substrate doping
3 1023
1020
53
NSUBO
m3
54
NSUBW
55
WSEG
108
1010
56
57
NPCK
NPCKW
m3
1024
0
58
WSEGP
108
1010
59
LPCK
108
1010
60
LPCKW
61
FOL1
62
FOL2
63
64
65
66
PONEFF
PLNEFF
PWNEFF
PLWNEFF
m3
m3
m3
m3
5 1023
0
0
0
67
FACNEFFAC
Geometry independent substrate

doping
Width dependence of substrate
doping due to segregation
Characteristic length for
segregation of substrate doping
Pocket doping level
Width dependence of NPCK due
to segregation
Characteristic length for
segregation of pocket doping
Characteristic length for lateral
doping profile
Width dependence of LPCK due to
segregation
First order length dependence of
short channel body-effect
Second order length dependence of
short channel body-effect

Length dependence
Width dependence
2
2
2
2
1
1
1
1
1
1
1
1
1
68
69
70
71
FACNEFFACO
FACNEFFACL
FACNEFFACW
FACNEFFACLW
1
0
0
0
Pre-factor for effective substrate

doping in separate charge
calculation when
SWDELVTAC = 1
Length dependence
Width dependence
Area dependence
72
73
74
75
POFACNEFFAC
PLFACNEFFAC
PWFACNEFFAC
PLWFACNEFFAC
1
0
0
0

Length dependence
Width dependence
Area dependence
2
2
2
2
0.01
Bodyfactor change due to

NUD-effect
1
0

Length dependence
1
1
76
77
78
GFACNUD
GFACNUDO
GFACNUDL
1
1
1
1
11
Unclassified
PSP 103.2
No.
Name
Unit
Default
Geo.
79
80
81
GFACNUDLEXP
GFACNUDW
GFACNUDLW
1
0
0
Exponent for length dependence

Width dependence
Area dependence
1
1
1
82
83
84
85
POGFACNUD
PLGFACNUD
PWGFACNUD
PLWGFACNUD
1
0
0
0

Length dependence
Width dependence
Area dependence
2
2
2
2
Lower VSB -value for NUD-effect
86
VSBNUD
87
VSBNUDO
88
POVSBNUD
0.1
VSB -range for NUD-effect
89
DVSBNUD
90
DVSBNUDO
91
PODVSBNUD
Effective doping bias-dependence

parameter
92
VNSUB
93
VNSUBO
94
POVNSUB
0.05
103

parameter
95
NSLP
96
NSLPO
0.05
97
PONSLP
0.05
V1

parameter
98
DNSUB
99
DNSUBO
V1
100
PODNSUB
V1
Offset of B
101
DPHIB
102
103
104
105
106
DPHIBO
DPHIBL
DPHIBLEXP
DPHIBW
DPHIBLW
V
V
V
V
0
0
1
0
0

Length dependence
Width dependence
Area dependence
1
1
1
1
1
107
108
109
110
PODPHIB
PLDPHIB
PWDPHIB
PLWDPHIB
V
V
V
V
0
0
0
0

Length dependence
Width dependence
2
2
2
2
12
Unclassified
PSP 103.2
No.
Name
Unit
Default
Geo.
111
DELVTAC
Offset of B in separate charge

calculation when
SWDELVTAC = 1
112
113
114
115
116
DELVTACO
DELVTACL
DELVTACLEXP
DELVTACW
DELVTACLW
V
V
V
V
0
0
1
0
0

Length dependence
Width dependence
Area dependence
1
1
1
1
1
117
118
119
120
PODELVTAC
PLDELVTAC
PWDELVTAC
PLWDELVTAC
V
V
V
V
0
0
0
0

Length dependence
Width dependence
2
2
2
2
m3
1026
Gate poly-silicon doping
121
NP
122
123
NPO
NPL
m3
1026
0
Length dependence
1
1
124
125
126
127
PONP
PLNP
PWNP
PLWNP
m3
m3
m3
m3
1026
0
0
0

Length dependence
Width dependence
2
2
2
2
Interface states factor
128
CT
129
130
131
132
133
CTO
CTL
CTLEXP
CTW
CTLW
0
0
1
0
0
Length dependence
Width dependence
Area dependence
1
1
1
1
1
134
135
136
137
POCT
PLCT
PWCT
PLWCT
0
0
0
0

Length dependence
Width dependence
2
2
2
2
2 109
1010
Overlap oxide thickness
138
TOXOV
139
TOXOVO
2 109
1010
140
POTOXOV
2 109
2 109
1010
Overlap oxide thickness for drain

side
141
TOXOVD
142
TOXOVDO
2 109
1010
143
POTOXOVD
2 109
144
LOV
Overlap length for overlap

capacitance
13
Unclassified
PSP 103.2
No.
145
146
Name
LOVD
NOV
Unit
m
Default
0
m3
5 1025

0
Geo.
Overlap length for gate/drain

overlap capacitance
1020 1027 Effective doping of overlap region
1
0
147
NOVO
m3
5 1025
148
149
150
151
PONOV
PLNOV
PWNOV
PLWNOV
m3
m3
m3
m3
5 1025
0
0
0

Length dependence
Width dependence
2
2
2
2
m3
5 1025
152
NOVD
1020 1027 Effective doping of overlap region

for drain side
153
NOVDO
m3
5 1025
154
155
156
157
PONOVD
PLNOVD
PWNOVD
PLWNOVD
m3
m3
m3
m3
5 1025
0
0
0

Length dependence
Width dependence
2
2
2
2
DIBL Parameters
158
CF
DIBL parameter
159
160
161
CFL
CFLEXP
CFW
0
2
0
Length dependence
Width dependence
1
1
1
162
163
164
165
POCF
PLCF
PWCF
PLWCF
0
0
0
0

Length dependence
Width dependence
2
2
2
2
V1
Back-bias dependence of CF
166
CFB
167
CFBO
V1
168
POCFB
V1
Mobility Parameters
169
BETN
m2 /V/s
7 102
Product of channel aspect ratio and

zero-field mobility at TR
5 102
0
Zero-field mobility at TR
Relative mobility decrease due to
first lateral profile
Width dependence of FBET1
Mobility-related characteristic
length of first lateral profile
Width dependence of LP1
1
1
170
171
UO
FBET1
m2 /V/s
172
173
FBET1W
LP1
0
108
1010
174
LP1W
1
1
1
14
Unclassified
PSP 103.2
No.
Name
Unit
Default
175
FBET2
176
LP2
108
1010
177
BETW1
178
BETW2
179
WBET
109
1010
180
181
182
183
POBETN
PLBETN
PWBETN
PLWBETN
m2 /V/s
m2 /V/s
m2 /V/s
m2 /V/s
7 102
0
0
0
184
STBET
Geo.
Relative mobility decrease due to

second lateral profile
Mobility-related characteristic
length of second lateral profile
First higher-order width scaling
coefficient of BETN
Second higher-order width scaling
coefficient of BETN
Characteristic width for width
scaling of BETN

Length dependence
Width dependence
2
2
2
2
Temperature dependence of BETN
1
1
1
1
185
186
187
188
STBETO
STBETL
STBETW
STBETLW
1
0
0
0

Length dependence
Width dependence
Area dependence
1
1
1
1
189
190
191
192
POSTBET
PLSTBET
PWSTBET
PLWSTBET
1
0
0
0

Length dependence
Width dependence
2
2
2
2
m/V
0.5
Mobility reduction coefficient at

TR
193
MUE
194
195
MUEO
MUEW
m/V
0.5
0

Width dependence
1
1
196
197
198
199
POMUE
PLMUE
PWMUE
PLWMUE
m/V
m/V
m/V
m/V
0.5
0
0
0

Length dependence
Width dependence
2
2
2
2
Temperature dependence of MUE
200
STMUE
201
STMUEO
202
POSTMUE
1.5
Mobility reduction exponent at TR
203
THEMU
204
THEMUO
1.5
205
POTHEMU
1.5
1.5
Temperature dependence of
THEMU
206
STTHEMU
15
Unclassified
PSP 103.2
No.
Name
Unit
Default
Geo.
207
STTHEMUO
1.5
208
POSTTHEMU
1.5
Coulomb scattering parameter at

TR
209
CS
210
211
212
213
214
CSO
CSL
CSLEXP
CSW
CSLW
0
0
1
0
0

Length dependence
Width dependence
Area dependence
1
1
1
1
1
215
216
217
218
POCS
PLCS
PWCS
PLWCS
0
0
0
0

Length dependence
Width dependence
2
2
2
2
Temperature dependence of CS
219
STCS
220
STCSO
221
POSTCS
V1
Non-universality parameter
222
XCOR
223
224
225
226
XCORO
XCORL
XCORW
XCORLW
V1
0
0
0
0

Length dependence
Width dependence
Area dependence
1
1
1
1
227
228
229
230
POXCOR
PLXCOR
PWXCOR
PLWXCOR
V1
V1
V1
V1
0
0
0
0

Length dependence
Width dependence
2
2
2
2
Temperature dependence of XCOR
231
STXCOR
232
STXCORO
233
POSTXCOR
Effective field parameter
234
FETA
235
FETAO
236
POFETA
Series Resistance Parameters

237
238
RS
RSW1
30
Source/drain series resistance at

TR
50
Source/drain series resistance for a

channel width WEN
16
Unclassified
PSP 103.2
No.
Name
Unit
Default
Geo.
239
RSW2
Higher-order width scaling
240
241
242
243
PORS
PLRS
PWRS
PLWRS
30
0
0
0

Length dependence
Width dependence
2
2
2
2
Temperature dependence of RS
244
STRS
245
STRSO
Geometry dependent part
246
POSTRS
V1
0.5
Back-bias dependence of RS
247
RSB
248
RSBO
V1
249
PORSB
V1
V1
0.5
Gate-bias dependence of RS
250
RSG
251
RSGO
V1
252
PORSG
V1
Velocity Saturation Parameters

253
THESAT
V1
Velocity saturation parameter at

TR
254
255
256
257
258
THESATO
THESATL
THESATLEXP
THESATW
THESATLW
V1
V1
0
0.05
1
0
0

Length dependence
Width dependence
Area dependence
1
1
1
1
1
259
260
261
262
POTHESAT
PLTHESAT
PWTHESAT
PLWTHESAT
V1
V1
V1
V1
1
0
0
0

Length dependence
Width dependence
2
2
2
2
THESAT
Geometry independent temperature

dependence
Length dependence
Width dependence
Area dependence

Length dependence
Width dependence
Length times width dependence of
temperature dependence
2
2
2
2
263
STTHESAT
264
STTHESATO
265
266
267
STTHESATL
STTHESATW
STTHESATLW
0
0
0
268
269
270
271
POSTTHESAT
PLSTTHESAT
PWSTTHESAT
PLWSTTHESAT
1
0
0
0
1
1
1
17
Unclassified
PSP 103.2
No.
Name
Unit
Default
Geo.
272
THESATB
V1
0.5
Back-bias dependence of velocity

saturation
273
THESATBO
V1
274
275
276
277
POTHESATB
PLTHESATB
PWTHESATB
PLWTHESATB
V1
V1
V1
V1
0
0
0
0

Length dependence
Width dependence
2
2
2
2
V1
0.5
Gate-bias dependence of velocity

saturation
278
THESATG
279
THESATGO
V1
280
281
282
283
POTHESATG
PLTHESATG
PWTHESATG
PLWTHESATG
V1
V1
V1
V1
0
0
0
0

Length dependence
Width dependence
2
2
2
2
Saturation Voltage Parameter

284
AX
Linear/saturation transition factor
285
286
AXO
AXL
18
0.4
Geometry independent
Length dependence
1
1
287
288
289
290
POAX
PLAX
PWAX
PLWAX
3
0
0
0

Length dependence
Width dependence
2
2
2
2
Channel Length Modulation (CLM) Parameters

291
292
293
294
ALP
ALPL
ALPLEXP
ALPW
0.01
5 104
1
0
CLM pre-factor
Length dependence
Width dependence
0
1
1
1
295
296
297
298
POALP
PLALP
PWALP
PLWALP
0.01
0
0
0

Length dependence
Width dependence
2
2
2
2
CLM enhancement factor above

threshold
299
ALP1
300
301
302
303
ALP1L1
ALP1LEXP
ALP1L2
ALP1W
0
0.5
0
0
Length dependence
Second order length dependence
Width dependence
1
1
1
1
304
POALP1
18
Unclassified
PSP 103.2
No.
305
306
307
308
Name
PLALP1
PWALP1
PLWALP1
ALP2
Unit
Geo.
0
0
0
Length dependence
Width dependence
2
2
2
V1
CLM enhancement factor below

threshold
0
0.5
0
0
Length dependence
Second order length dependence
Width dependence
1
1
1
1
0
0
0
0

Length dependence
Width dependence
2
2
2
2
0.05
1010
CLM logarithmic dependence

parameter
ALP2L1
ALP2LEXP
ALP2L2
ALP2W
313
314
315
316
POALP2
PLALP2
PWALP2
PLWALP2
V1
V1
V1
V1
VP
V
V
V
309
310
311
312
317
Default
318
VPO
0.05
319
POVP
0.05
Impact Ionization (II) Parameters

320
A1
Impact-ionization pre-factor
321
322
323
A1O
A1L
A1W
1
0
0

Length dependence
Width dependence
1
1
1
324
325
326
327
POA1
PLA1
PWA1
PLWA1
1
0
0
0

Length dependence
Width dependence
2
2
2
2
10
Impact-ionization exponent at TR
328
A2
329
A2O
10
330
POA2
10
Temperature dependence of A2
331
STA2
332
STA2O
333
POSTA2
Saturation-voltage dependence of
II
1
0
0

Length dependence
Width dependence
1
1
1
334
335
336
337
A3
A3O
A3L
A3W
19
Unclassified
PSP 103.2
No.
338
339
340
341
342
Name
POA3
PLA3
PWA3
PLWA3
A4
Unit
Default
Geo.
1
0
0
0

Length dependence
Width dependence
2
2
2
2
V 2
Back-bias dependence of II
343
344
345
A4O
A4L
A4W
V 2
0
0
0

Length dependence
Width dependence
1
1
1
346
347
348
349
POA4
PLA4
PWA4
PLWA4
V 2
1
V 2
1
V 2
1
V 2
0
0
0
0

Length dependence
Width dependence
2
2
2
2
Gate Current Parameters

350
GCO
10
10
Gate tunnelling energy adjustment
351
GCOO
352
POGCO
Gate channel current pre-factor
353
IGINV
354
IGINVLW
Gate channel current pre-factor for

a channel area of WEN LEN
355
356
357
358
POIGINV
PLIGINV
PWIGINV
PLWIGINV
A
A
A
A
0
0
0
0

Length dependence
Width dependence
2
2
2
2
Gate overlap current pre-factor
359
IGOV
360
IGOVW
Gate overlap current pre-factor for

a channel width of WEN
361
362
363
364
POIGOV
PLIGOV
PWIGOV
PLWIGOV
A
A
A
A
0
0
0
0

Length dependence
Width dependence
2
2
2
2

drain side
365
IGOVD
366
IGOVDW

a channel width of WEN for drain
side
367
368
369
POIGOVD
PLIGOVD
PWIGOVD
A
A
A
0
0
0

Length dependence
Width dependence
2
2
2
20
Unclassified
PSP 103.2
No.
370
371
Name
PLWIGOVD
STIG
Unit
Default
Geo.
Temperature dependence of gate

current
372
STIGO
373
POSTIG
0.375
10
Gate current slope factor
374
GC2
375
GC2O
0.375
376
POGC2
3.75 101
0.063
Gate current curvature factor
377
GC3
378
GC3O
0.063
379
POGC3
6.3 102
3.1
Tunnelling barrier height
380
CHIB
381
CHIBO
3.1
382
POCHIB
3.1
Gate-Induced Drain Leakage (GIDL) Parameters

383
AGIDL
A/V3
GIDL pre-factor
384
AGIDLW
A/V3
Width dependence
385
386
387
388
POAGIDL
PLAGIDL
PWAGIDL
PLWAGIDL
A/V3
A/V3
A/V3
A/V3
0
0
0
0

Length dependence
Width dependence
2
2
2
2
A/V3
GIDL pre-factor for drain side
389
AGIDLD
390
AGIDLDW
A/V3
Width dependence
391
392
393
394
POAGIDLD
PLAGIDLD
PWAGIDLD
PLWAGIDLD
A/V3
A/V3
A/V3
A/V3
0
0
0
0

Length dependenceof
Width dependenceof
2
2
2
2
41
GIDL probability factor at TR
395
BGIDL
396
BGIDLO
41
397
POBGIDL
41
41
GIDL probability factor at TR for

drain side
398
BGIDLD
399
BGIDLDO
41
400
POBGIDLD
41
21
Unclassified
PSP 103.2
No.
Name
Unit
Default
Geo.
401
STBGIDL
V/K
BGIDL
402
STBGIDLO
V/K
403
POSTBGIDL
V/K
V/K
BGIDL for drain side
404
STBGIDLD
405
STBGIDLDO
V/K
406
POSTBGIDLD
V/K
Back-bias dependence of GIDL
407
CGIDL
408
CGIDLO
409
POCGIDL
Back-bias dependence of GIDL for

drain side
410
CGIDLD
411
CGIDLDO
412
POCGIDLD
Charge Model Parameters

413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
COX
POCOX
PLCOX
PWCOX
PLWCOX
CGOV
POCGOV
PLCGOV
PWCGOV
PLWCGOV
CGOVD
POCGOVD
PLCGOVD
PWCGOVD
PLWCGOVD
CGBOV
1014
Oxide capacitance for intrinsic

channel
F
F
F
F
1014
0
0
0

Length dependence
Width dependence
2
2
2
2
1015
Oxide capacitance for

gatedrain/source overlap
F
F
F
F
1015
0
0
0

Length dependence
Width dependence
2
2
2
2
1015
Oxide capacitance for

gatedrain/source overlap for drain
side
F
F
F
F
1015
0
0
0

Length dependence
Width dependence
2
2
2
2
Oxide capacitance for gatebulk

overlap
22
Unclassified
PSP 103.2
No.
Name
Unit
Default
Geo.
429
CGBOVL
Oxide capacitance for gatebulk

overlap for a channel length of
LEN
430
431
432
433
POCGBOV
PLCGBOV
PWCGBOV
PLWCGBOV
F
F
F
F
0
0
0
0

Length dependence
Width dependence
2
2
2
2
Outer fringe capacitance
434
CFR
435
CFRW
Outer fringe capacitance for a

channel width of WEN
436
437
438
439
POCFR
PLCFR
PWCFR
PLWCFR
F
F
F
F
0
0
0
0

Length dependence
Width dependence
2
2
2
2
Outer fringe capacitance for drain

side
440
CFRD
441
CFRDW
Outer fringe capacitance for a

channel width of WEN for drain
side
442
443
444
445
POCFRD
PLCFRD
PWCFRD
PLWCFRD
F
F
F
F
0
0
0
0

Length dependence
Width dependence
2
2
2
2
Noise Model Parameters

446
FNT
Thermal noise coefficient
447
FNTO
448
POFNT
V1 /m4
8 1022
First coefficient of flicker noise
449
NFA
450
NFALW
V1 /m4
8 1022
First coefficient of flicker noise for

a channel area of WEN LEN
451
452
453
454
PONFA
PLNFA
PWNFA
PLWNFA
V1 /m4
V1 /m4
V1 /m4
V1 /m4
8 1022
0
0
0

Length dependence
Width dependence
2
2
2
2
V1 /m2
3 107
Second coefficient of flicker noise
455
NFB
456
NFBLW
V1 /m2
3 107
Second coefficient of flicker noise

for a channel area of WEN LEN
457
PONFB
V1 /m2
3 107
23
Unclassified
PSP 103.2
No.
458
459
460
461
Name
PLNFB
PWNFB
PLWNFB
NFC
Unit
Default
Geo.
V1 /m2
V1 /m2
V1 /m2
0
0
0
Length dependence
Width dependence
2
2
2
V1
Third coefficient of flicker noise
462
NFCLW
V1
Third coefficient of flicker noise

for a channel area of WEN LEN
463
464
465
466
PONFC
PLNFC
PWNFC
PLWNFC
V1
V1
V1
V1
0
0
0
0

Length dependence
Width dependence
2
2
2
2
Flicker noise frequency exponent
467
EF
468
EFO
469
POEF
470
LINTNOI
Length offset for flicker noise
471
ALPNOI
Exponent for length offset
24
Unclassified
2.5.3
PSP 103.2
Parameters for stress model
The stress model of BSIM4.4.0 has been adopted in PSP with as little modifications as possible. Parameter
names have been copied, but they have been subjected to PSP conventions by replacing every zero by an O.
Moreover, the parameters STK2 and LODK2 are not available in PSP. Except for these changes, stress parameters determined for BSIM can be directly applied in PSP. Some trivial conversion of parameters BSIMPSP
is still necessary, see [2].
The parameters in this section are part of PSPs global parameter set (both geometrical and binning).
No.
Name
Unit
SAREF
106
109
SBREF
106
109
2
3
WLOD
KUO
m
m
0
0
KVSAT
5
6
7
8
9
TKUO
LKUO
WKUO
PKUO
LLODKUO
mLLODKUO
mWLODKUO
mLLODKUO+WLODKUO
0
0
0
0
0
10
WLODKUO
11
12
13
14
KVTHO
LKVTHO
WKVTHO
PKVTHO
0
0
0
0
15
LLODVTH
16
WLODVTH
17
STETAO
18
LODETAO
Vm
mLLODVTH
mWLODVTH
mLLODVTH+WLODVTH
Default Min. Max. Description

Reference distance between OD
edge to Poly from one side
Reference distance between OD
edge to Poly from other side
Width parameter
Mobility degradation/enhancement
coefficient
Saturation velocity
degradation/enhancement
parameter
Temperature coefficient of KUO
Length dependence of KUO
Width dependence of KUO
Cross-term dependence of KUO
Length parameter for mobility
stress effect
Width parameter for mobility stress
effect
Threshold shift parameter
Length dependence of KVTHO
Width dependence of KVTHO
Cross-term dependence of
KVTHO
Length parameter for threshold
voltage stress effect
Width parameter for threshold
voltage stress effect
ETAO shift factor related to
threshold voltage change
ETAO shift modification factor
Geo.
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
25
2.5.4
Unclassified
PSP 103.2
Parameters for well proximity effect model
The WPE model of BSIM4.5.0 has been adopted in PSP with as little modifications as possible. Parameter
names have been copied, but they have been subjected to PSP conventions by replacing every zero by an O.
Moreover, the parameter K2WE is not available in PSP. Except for some trivial conversion of parameters
BSIMPSP [2], WPE parameters from BSIM can be used directly in PSP. The WPE parameters have both
geometrical and binning rules included as explained in Section 3.6.2. The last columnlabeled Geo.shows
for which value of SWGEO the parameter is used.
No.
Name
Unit
Default
Min.
Max.
SCREF
1 106
1
2
WEB
WEC
0
0
KVTHOWEO
4
5
6
KVTHOWEL
KVTHOWEW
KVTHOWELW
0
0
0
POKVTHOWE
8
9
10
PLKVTHOWE
PWKVTHOWE
PLWKVTHOWE
0
0
0
11
KUOWEO
12
13
14
KUOWEL
KUOWEW
KUOWELW
0
0
0
15
POKUOWE
16
17
18
PLKUOWE
PWKUOWE
PLWKUOWE
0
0
0
26
Description
Geo.

well edge of a reference device
Coefficient for SCB
Coefficient for SCC
1, 2
Geometry independent threshold

shift parameter
Length dependence
Width dependence
Area dependence
Geometry independent part of

threshold shift parameter
Length dependence
Width dependence
Geometry independent mobility

degradation factor
Length dependence
Width dependence
Area dependence
Geometry independent part of

mobility degradation factor
Length dependence
Width dependence
1, 2
1, 2
1
1
1
2
2
2
1
1
1
2
2
2
Unclassified
2.5.5
PSP 103.2
Parameters for source-bulk and drain-bulk junction model
The JUNCAP2 parameters are part of both the global and the local parameter sets. The last column of Asym.
shows for which value of SWJUNASYM the listed parameter is enabled: i.e., when SWJUNASYM = 0,
parameters No. 3-45 are used for both source-bulk and drain-bulk junctions and parameters No. 46-88 are
ignored; when SWJUNASYM = 1, parameters No. 3-45 are used for source-bulk junction and No. 46-88 are
used for drain-bulk junction; parameters No. 0-2 are used in both situations.
No.
Name
Unit
Default
Min.
Max. Description
0
1
TRJ
SWJUNEXP
21
0
Tmin
0
IMAX
1000
1012
Asym.
Reference temperature
Flag for JUNCAP2 Express; 0
full JUNCAP2 model, 1
Express model
Maximum current up to which
forward current behaves
exponentially
0, 1
0, 1
Zero-bias capacitance per

unit-of-area of bottom component
for source-bulk junction
unit-of-length of STI-edge
component for source-bulk
junction
unit-of-length of gate-edge
junction
Built-in voltage at the reference
temperature of bottom component
temperature of STI-edge
junction
temperature of gate-edge
junction
Grading coefficient of bottom
junction
Grading coefficient of STI-edge
junction
Grading coefficient of gate-edge
junction
0, 1
0, 1
Capacitance Parameters
3
CJORBOT
F/m2
103
1012
CJORSTI
F/m
109
1018
CJORGAT
F/m
109
1018
VBIRBOT
Vbi,low
VBIRSTI
Vbi,low
VBIRGAT
Vbi,low
PBOT
0.5
0.05
0.95
10
PSTI
0.5
0.05
0.95
11
PGAT
0.5
0.05
0.95
0, 1
0, 1
0, 1
0, 1
0, 1
0, 1
0, 1
0, 1
Ideal-current Parameters
27
PSP 103.2
Unclassified
No.
Name
Unit
Default
Min.
12
PHIGBOT
13
Max. Description
1.16
PHIGSTI
1.16
14
PHIGGAT
1.16
15
IDSATRBOT
A/m2
1012
16
IDSATRSTI
A/m
1018
17
IDSATRGAT
A/m
1018
Asym.
Zero-temperature bandgap voltage

of bottom component for
source-bulk junction
of STI-edge component for
of gate-edge component for
Saturation current density at the
reference temperature of bottom
junction
reference temperature of STI-edge
junction
reference temperature of gate-edge
junction
0, 1
0, 1
0, 1
0, 1
0, 1
0, 1
Shockley-Read-Hall Parameters
18
CSRHBOT
A/m3
102
19
CSRHSTI
A/m2
104
20
CSRHGAT
A/m2
104
21
XJUNSTI
107
109
22
XJUNGAT
107
109
Shockley-Read-Hall prefactor of
bottom component for source-bulk
junction
STI-edge component for
gate-edge component for
Junction depth of STI-edge
junction
Junction depth of gate-edge
junction
0, 1
0, 1
0, 1
0, 1
0, 1
Trap-assisted Tunneling Parameters

23
CTATBOT
A/m3
102
24
CTATSTI
A/m2
104
25
CTATGAT
A/m2
104
Trap-assisted tunneling prefactor of

bottom component for source-bulk
junction
0, 1
0, 1
0, 1
28
Unclassified
PSP 103.2
No.
Name
Unit
Default
Min.
26
MEFFTATBOT
27
28
Max. Description
0.25
.01
MEFFTATSTI
0.25
.01
MEFFTATGAT
0.25
.01
Asym.
Effective mass (in units of m0 ) for

trap-assisted tunneling of bottom
junction
trap-assisted tunneling of STI-edge
junction
trap-assisted tunneling of gate-edge
junction
0, 1
0, 1
0, 1
Band-to-band Tunneling Parameters

29
CBBTBOT
AV3
1012
30
CBBTSTI
AV3 m
1018
31
CBBTGAT
AV3 m
1018
32
FBBTRBOT
Vm1
109
33
FBBTRSTI
Vm1
109
34
FBBTRGAT
Vm1
109
35
STFBBTBOT
K1
103
36
STFBBTSTI
K1
103
37
STFBBTGAT
K1
103
Band-to-band tunneling prefactor

Normalization field at the reference
temperature for band-to-band
tunneling of bottom component for
tunneling of STI-edge component
tunneling of gate-edge component
Temperature scaling parameter for
band-to-band tunneling of bottom
junction
band-to-band tunneling of
0, 1
0, 1
0, 1
0, 1
0, 1
0, 1
0, 1
0, 1
0, 1
Avalanche and Breakdown Parameters

29
PSP 103.2
Unclassified
No.
Name
Unit
Default
Min.
38
VBRBOT
39
Max. Description
10
0.1
VBRSTI
10
0.1
40
VBRGAT
10
0.1
41
PBRBOT
0.1
42
PBRSTI
0.1
43
PBRGAT
0.1
Asym.
Breakdown voltage of bottom

junction
Breakdown voltage of STI-edge
junction
Breakdown voltage of gate-edge
junction
Breakdown onset tuning parameter
0, 1
0, 1
0, 1
0, 1
0, 1
0, 1
JUNCAP Express Parameters

44
VJUNREF
2.5
0.5
45
FJUNQ
0.03
Typical maximum source-bulk

junction voltage; usually about
2 Vsup
Fraction below which source-bulk
junction capacitance components
are neglected
0, 1
0, 1
Capacitance Parameters
46
CJORBOTD
F/m2
103
1012
47
CJORSTID
F/m
109
1018
48
CJORGATD
F/m
109
1018
49
VBIRBOTD
Vbi,low
50
VBIRSTID
Vbi,low
51
VBIRGATD
Vbi,low
52
PBOTD
0.5
0.05
0.95

unit-of-area of bottom component
for drain-bulk junction
unit-of-length of STI-edge
component for drain-bulk junction
unit-of-length of gate-edge
temperature of bottom component
temperature of STI-edge
temperature of gate-edge
Grading coefficient of bottom
30
Unclassified
PSP 103.2
No.
Name
Unit
Default
Min.
Max. Description
53
PSTID
0.5
0.05
0.95
54
PGATD
0.5
0.05
0.95
Asym.
Grading coefficient of STI-edge

Grading coefficient of gate-edge

drain-bulk junction
drain-bulk junction
drain-bulk junction
reference temperature of bottom
reference temperature of STI-edge
reference temperature of gate-edge
Ideal-current Parameters
55
PHIGBOTD
1.16
56
PHIGSTID
1.16
57
PHIGGATD
1.16
58
IDSATRBOTD
A/m2
1012
59
IDSATRSTID
A/m
1018
60
IDSATRGATD
A/m
1018
Shockley-Read-Hall Parameters
61
CSRHBOTD
A/m3
102
62
CSRHSTID
A/m2
104
63
CSRHGATD
A/m2
104
64
XJUNSTID
107
109
65
XJUNGATD
107
109
bottom component for drain-bulk
junction
STI-edge component for drain-bulk
junction
drain-bulk junction
Junction depth of STI-edge
Junction depth of gate-edge
1
1
Trap-assisted Tunneling Parameters

66
CTATBOTD
A/m3
102
67
CTATSTID
A/m2
104

bottom component for drain-bulk
junction
junction
31
PSP 103.2
Unclassified
No.
Name
Unit
Default
Min.
Max. Description
68
CTATGATD
A/m2
104
69
MEFFTATBOTD
0.25
.01
70
MEFFTATSTID
0.25
.01
71
MEFFTATGATD
0.25
.01
Asym.

drain-bulk junction
trap-assisted tunneling of bottom
trap-assisted tunneling of STI-edge
trap-assisted tunneling of gate-edge
Band-to-band Tunneling Parameters

72
CBBTBOTD
AV3
1012
73
CBBTSTID
AV3 m
1018
74
CBBTGATD
AV3 m
1018
75
FBBTRBOTD
Vm1
109
76
FBBTRSTID
Vm1
109
77
FBBTRGATD
Vm1
109
78
STFBBTBOTD
K1
103
79
STFBBTSTID
K1
103
80
STFBBTGATD
K1
103

drain-bulk junction
drain-bulk junction
drain-bulk junction
tunneling of bottom component for
drain-bulk junction
tunneling of STI-edge component
tunneling of gate-edge component
band-to-band tunneling of bottom
junction
drain-bulk junction
Avalanche and Breakdown Parameters

32
Unclassified
PSP 103.2
No.
Name
Unit
Default
Min.
81
VBRBOTD
82
Max. Description
10
0.1
VBRSTID
10
0.1
83
VBRGATD
10
0.1
84
PBRBOTD
0.1
85
PBRSTID
0.1
86
PBRGATD
0.1
Breakdown voltage of bottom

Breakdown voltage of STI-edge
Breakdown voltage of gate-edge
drain-bulk junction
drain-bulk junction
drain-bulk junction
Asym.
1
1
1
1
JUNCAP Express Parameters

87
VJUNREFD
2.5
0.5
88
FJUNQD
0.03
Typical maximum drain-bulk

junction voltage; usually about
2 Vsup
Fraction below which drain-bulk
junction capacitance components
are neglected
33
2.5.6
Unclassified
PSP 103.2
Parameters for parasitic resistances
The parameters for parasitic resistances are listed in the table below. The last columnlabeled Geo.shows
for which value of SWGEO the parameter is used.
No.
0
Name
Unit
Default
Min.
Max.
RG
Gate resistance Rgate

Gate resistance Rgate
Contact resistance between silicide
and ploy
Vertical poly resistance
Gate electrode diffusion sheet
resistance
Silicide extension over the physical
gate length
1
2
RGO
RINT
m2
0
0
3
4
RVPOLY
RSHG
m2
/
0
0
0
0
DLSIL
Description
Geo.
0
1, 2
1, 2
1, 2
1, 2
1, 2
RSE
External source resistance
RDE
External drain resistance
RSH
/
Sheet resistance of source diffusion
1, 2
RSHD
/
Sheet resistance of drain diffusion
1, 2
10
RBULK
Bulk resistance Rbulk
Bulk resistance Rbulk
1, 2
Well resistance Rwell
Well resistance Rwell
1, 2
Source-side bulk resistance Rjuns
Source-side bulk resistance Rjuns
1, 2
Drain-side bulk resistance Rjund
Drain-side bulk resistance Rjund
1, 2
11
12
13
14
15
16
17
34
RBULKO
RWELL
RWELLO
RJUNS
RJUNSO
RJUND
RJUNDO
Unclassified
2.5.7
PSP 103.2
Parameters for self heating
The parameters for self heating are listed below. They are only available in the self heating version of the
model. The last columnlabeled Geo.shows for which value of SWGEO the parameter is used.
No.
Name
Unit
Default
Min.
Max.
RTH
K/W
Thermal resistance
K/W
K/W
0
0
0
0

Width dependence
Offset in width dependence
Length-correction to width
dependence
J/K
Thermal capacitance
J/K
J/K
0
0
0
0

Width dependence
Offset in width dependence
Length-correction to width
dependence
Temperature sensitivity of RTH
1
2
3
4
5
6
7
8
9
10
11
RTHO
RTHW1
RTHW2
RTHLW
CTH
CTHO
CTHW1
CTHW2
CTHLW
STRTH
STRTHO
Description
Geo.
0
1, 2
1, 2
1, 2
1, 2
0
1, 2
1, 2
1, 2
1, 2
0
1, 2
35
2.5.8
Unclassified
PSP 103.2
Parameters for NQS
The parameters for non-quasi-static effects are listed below. They are only available in the NQS-version of the
model. The last columnlabeled Geo.shows for which value of SWGEO the parameter is used.
No.
Name
Unit
SWNQS
MUNQS
36
MUNQSO
Default
Min.
Max.
Description
Geo.
Switch for NQS effects / number of

collocation points
Relative mobility for NQS

modeling
Relative mobility for NQS

modeling
1, 2
0, 1, 2
Unclassified
PSP 103.2
Section 3
Geometry dependence and Other effects

3.1 Introduction
The physical geometry scaling rules of PSP (Section 3.2) have been developed to give a good description over
the whole geometry range of CMOS technologies. As an alternative, the binning-rules can be used (Section 3.3)
to allow for a more phenomenological geometry dependency. (Note that the user has to choose between the
two options; the geometrical scaling rules and the binning scaling rules cannot be used at the same time.) In
both cases, the result is a local parameter set (for a transistor of the specified L and W ), which is fed into the
local model.
Stress and well proximity effects are included in PSP. Use of the stress model (Section 3.5) and/or well proximity effect model (Section 3.6) leads to modification of some of the local parameters calculated from the
geometrical or binning scaling rules.
3.2 Geometrical scaling rules

The physical scaling rules to calculate the local parameters from a global parameter set are given in this section.
Note:
After calculation of the local parameters (and possible application of the stress equations in Section 3.5),
clipping is applied according to Section 2.5.2.
The geometrical scaling equations are only calculated when SWGEO = 1.
Effective length and width
Wf =
W
NF
(3.1)
LEN = 106
(3.2)
WEN = 106
(3.3)
LPS
WOD
(
) (
)
LEN
WEN
= LVARO 1 + LVARL
1 + LVARW
L
Wf
(3.4)
(
) (
)
LEN
WEN
= WVARO 1 + WVARL
1 + WVARW
L
Wf
(3.5)
37
Unclassified
PSP 103.2
L + LPS
gate
pp p pp p pp p pp p pp p pp p pp p pp p pp p pp p pp p pp p pp p pp p pp p pp p pp p pp p pp p pp p pp p pp p pp p pp p pp p pp p pp p pp p pp p pp
source
LAP
-
LE
LAP
-
6
source
Wf + WOD
Cross section
drain
"
drain
?
WOT
6
WE
?
WOT
6
Top view
Figure 3.1: Specification of the dimensions of a MOS transistor

LE = L L = L + LPS 2 LAP
(3.6)
WE = Wf W = Wf + WOD 2 WOT
(3.7)
LE,CV = L + LPS 2 LAP + DLQ
(3.8)
WE,CV = Wf + WOD 2 WOT + DWQ
(3.9)
LG,CV = L + LPS + DLQ
(3.10)
WG,CV = Wf + WOD + DWQ
(3.11)
Note: If the calculated LE , WE , LE,CV , WE,CV , LG,CV , or WG,CV is smaller than 1 nm (109 m), the value
is clipped to this lower bound of 1 nm.
Process Parameters
VFB
VFBO + VFBL
LEN
WEN
WEN LEN
+ VFBW
+ VFBLW
LE
WE
WE LE
(3.12)
LEN
WEN
WEN LEN
+ STVFBW
+ STVFBLW
LE
WE
WE LE
(3.13)
STVFB = STVFBO + STVFBL
38
TOX = TOXO
(3.14)
EPSROX = EPSROXO
(3.15)
Unclassified
PSP 103.2
([
(
)]
)
WEN
WE
1 + NSUBW
ln 1 +
, 103
WE
WSEG
(3.16)
Npck,e
([
(
)]
)
WEN
WE
3
= NPCK MAX 1 + NPCKW
ln 1 +
, 10
WE
WSEGP
(3.17)
Lpck,e
)
([
(
)]
WEN
WE
3
= LPCK MAX 1 + LPCKW
ln 1 +
, 10
WE
WSEGP
(3.18)
Nsub0,e = NSUBO MAX
a = 7.5 1010
b=
Nsub0,e + 0.5 Npck,e Nsub0,e
Nsub0,e + Npck,e
Nsub0,e + Npck,e
Nsub =
(3.19)
[
2
LE
]
for LE < Lpck,e
Lpck,e
Lpck,e
LE
for Lpck,e LE 2 Lpck,e
Nsub0,e +
(
[
( )
])]2
L
b
pck,e
a ln 1 + 2 LE exp a 1
(
NEFF = Nsub
(3.20)
(3.21)
for LE > 2 Lpck,e
[
]2 )
LEN
LEN
1 FOL1
FOL2
LE
LE
FACNEFFAC = FACNEFFACO + FACNEFFACL

+ FACNEFFACW
[
GFACNUD = GFACNUDO + GFACNUDL
LEN
LE
WEN
LEN WEN
+ FACNEFFACLW
WE
LE WE
LEN
LE
(3.22)
(3.23)
]GFACNUDLEXP
+ GFACNUDW
WEN
LEN WEN
+ GFACNUDLW
WE
LE WE
(3.24)
VSBNUD = VSBNUDO
(3.25)
DVSBNUD = DVSBNUDO
(3.26)
VNSUB = VNSUBO
(3.27)
NSLP = NSLPO
(3.28)
39
PSP 103.2
Unclassified
DNSUB = DNSUBO
(3.29)
[
DPHIB = DPHIBO + DPHIBL
LEN
LE
]DPHIBLEXP
+ DPHIBW
LEN
DELVTAC = DELVTACO + DELVTACL
LE
WEN
WEN LEN
+ DPHIBLW
WE
WE LE
]DELVTACLEXP
+ DELVTACW
WEN LEN
WEN
+ DELVTACLW
WE
WE LE
(
)
LEN
6
NP = NPO MAX 10 , 1 + NPL
LE
(
CT =
LEN
CTO + CTL
LE
(3.30)
(3.31)
(3.32)
]CTLEXP ) (
)
WEN
1 + CTW
WE
(
)
WEN LEN
1 + CTLW
(3.33)
WE LE
TOXOV = TOXOVO
(3.34)
TOXOVD = TOXOVDO
(3.35)
NOV = NOVO
(3.36)
NOVD = NOVDO
(3.37)
DIBL Parameters
[
LEN
CF = CFL
LE
CFB = CFBO
40
]CFLEXP (
)
WEN
1 + CFW
WE
(3.38)
(3.39)
Unclassified
PSP 103.2
Mobility Parameters
(
)
WEN
F1,e = FBET1 1 + FBET1W
WE
([
]
)
WEN
1 + LP1W
, 103
WE
(3.41)
[
(
)]
LP1,e
LE
1 exp
LE
LP1,e
(3.42)
LP1,e = LP1 MAX
GP,E = 1 + F1,e
(3.40)
[
(
)]
LP2
LE
+ FBET2
1 exp
LE
LP2
GW,E
BETN =
(
)
WEN
WEN
WE
= 1 + BETW1
+ BETW2
ln 1 +
WE
WE
WBET
UO WE
GW,E
GP,E LE
STBET = STBETO + STBETL
(3.43)
(3.44)
LEN
WEN
WEN LEN
+ STBETW
+ STBETLW
LE
WE
WE LE
(3.45)
[
]
WEN
MUE = MUEO 1 + MUEW
WE
(3.46)
STMUE = STMUEO
(3.47)
THEMU = THEMUO
(3.48)
STTHEMU = STTHEMUO
(3.49)
(
CS =
LEN
CSO + CSL
LE
]CSLEXP ) (
)
WEN
1 + CSW
WE
(
)
WEN LEN
1 + CSLW
(3.50)
WE LE
STCS = STCSO
(3.51)
) (
)
(
WEN
LEN
1 + XCORW
XCOR = XCORO 1 + XCORL
LE
WE
)
(
WEN LEN
1 + XCORLW
(3.52)
WE LE
STXCOR = STXCORO
(3.53)
FETA = FETAO
(3.54)
41
PSP 103.2
Unclassified

[
]
WEN
WEN
RS = RSW1
1 + RSW2
WE
WE
(3.55)
STRS = STRSO
(3.56)
RSB = RSBO
(3.57)
RSG = RSGO
(3.58)

(
THESAT =
[
]THESATLEXP )
GW,E
LEN
THESATO + THESATL
GP,E
LE
(
) (
)
WEN
WEN LEN
1 + THESATW
(3.59)
1 + THESATLW
WE
WE LE
STTHESAT = STTHESATO + STTHESATL
LEN
LE
+ STTHESATW
WEN
WEN LEN
+ STTHESATLW
WE
WE LE
(3.60)
THESATB = THESATBO
(3.61)
THESATG = THESATGO
(3.62)
Saturation Voltage Parameter

AXO
AX =
1 + AXL
(3.63)
LEN
LE

[
ALP = ALPL
LEN
LE
]ALPLEXP (
)
WEN
1 + ALPW
WE
]ALP1LEXP
LEN
(
)
ALP1L1
WEN
LE
1
+
ALP1W
ALP1 =
]ALP1LEXP+1
[
WE
LEN
1 + ALP1L2
LE
(3.64)
(3.65)
42
]ALP2LEXP
LEN
(
)
ALP2L1
WEN
LE
ALP2 =
]ALP2LEXP+1 1 + ALP2W
[
WE
LEN
1 + ALP2L2
LE
(3.66)
VP = VPO
(3.67)
Unclassified
PSP 103.2

(
) (
)
LEN
WEN
1 + A1W
A1 = A1O 1 + A1L
LE
WE
(3.68)
A2 = A2O
(3.69)
STA2 = STA2O
(3.70)
(
) (
)
LEN
WEN
A3 = A3O 1 + A3L
1 + A3W
LE
WE
(3.71)
(
) (
)
LEN
WEN
A4 = A4O 1 + A4L
1 + A4W
LE
WE
(3.72)

GCO = GCOO
(3.73)
WE LE
WEN LEN
IGINV = IGINVLW
IGOV = IGOVW
WE LOV
WEN LEN
WE LOVD
WEN LEN
IGOVD = IGOVDW
(3.74)
(3.75)
(3.76)
STIG = STIGO
(3.77)
GC2 = GC2O
(3.78)
GC3 = GC3O
(3.79)
CHIB = CHIBO
(3.80)

AGIDL = AGIDLW
WE LOV
WEN LEN
AGIDLD = AGIDLDW
WE LOVD
WEN LEN
(3.81)
(3.82)
BGIDL = BGIDLO
(3.83)
BGIDLD = BGIDLDO
(3.84)
STBGIDL = STBGIDLO
(3.85)
STBGIDLD = STBGIDLDO
(3.86)
CGIDL = CGIDLO
(3.87)
CGIDLD = CGIDLDO
(3.88)
43
Unclassified
PSP 103.2
ox = 0 EPSROX
COX = ox
(3.89)
WE,CV LE,CV
TOX
(3.90)
WE,CV LOV
TOXOV
(3.91)
CGOV = ox
CGOVD = ox
WE,CV LOVD
TOXOVD
CGBOV = CGBOVL
CFR = CFRW
(3.92)
LG,CV
LEN
(3.93)
WG,CV
WEN
CFRD = CFRDW
(3.94)
WG,CV
WEN
(3.95)

(
Lnoi
Lred
2 LINTNOI
= MAX 1
, 103
LE
1
= ALPNOI
Lnoi
)
(3.96)
(3.97)
NFA = Lred NFALW
WEN LEN
WE LE
(3.98)
NFB = Lred NFBLW
WEN LEN
WE LE
(3.99)
NFC = Lred NFCLW
WEN LEN
WE LE
(3.100)
EF = EFO
(3.101)
WPE parameters
Kvthowe = KVTHOWEO + KVTHOWEL
WEN
LEN
+ KVTHOWEW
LE
WE
+ KVTHOWELW
44
LEN WEN
LE WE
(3.102)
Unclassified
PSP 103.2
Kuowe = KUOWEO + KUOWEL
LEN
WEN
+ KUOWEW
LE
WE
+ KUOWELW
LEN WEN
LE WE
(3.103)
Self heating parameters

RTH = RTHO +
RTHW1
[
]
WE
LE
RTHW2 +
1 + RTHLW
WEN
LEN
(3.104)
[
{
]}
LE
WE
1 + CTHLW
CTH = CTHO + CTHW1 CTHW2 +
WEN
LEN
(3.105)
STRTH = STRTHO
(3.106)
NQS parameters
MUNQS = MUNQSO
(3.107)
45
Unclassified
PSP 103.2
3.3 Binning equations

The binning equations are provided as a (phenomenological) alternative to the physical scaling equations for
computing local parameters. The physical geometrical scaling rules have been developed to give a good description over the whole geometry range of CMOS technologies. For processes under development, however,
it is sometimes useful to have more flexible scaling relations. In that case on could opt for a binning strategy,
where the accuracy with geometry is mostly determined by the number of bins used. The physical scaling rules
of Section 3.2 are generally not suitable for binning strategies, since they may result in discontinuities in local
parameter values at the bin boundaries. Consequently, special binning geometrical scaling relations have been
developed, which guarantee continuity of the resulting local model parameters at the bin boundaries.
Note: The binning equations are only calculated when SWGEO = 2.
Only four different types of binning scaling rules are used, which are based on first order developments of the
geometrical scaling rules in terms of LE , 1/LE , WE , and 1/WE (examples below are for a fictitious parameter
YYY):
1. Type I
YYY = POYYY + PLYYY
LEN
WEN
LEN WEN
+ PWYYY
+ PLWYYY
LE
WE
LE WE
(3.108)
LE
WE
LE WE
+ PWYYY
+ PLWYYY
LEN
WEN
LEN WEN
(3.109)
LEN
WE
WE LEN
+ PWYYY
+ PLWYYY
LE
WEN
WEN LE
(3.110)
2. Type II
YYY = POYYY + PLYYY
3. Type III
YYY = POYYY + PLYYY
4. Type IV (no binning)
YYY = POYYY
(3.111)
In Table 3.1 a survey of the binning type used for each local parameter is given. In some cases where the
geometrical scaling rule is constant, the binning rule is chosen to be more flexible.
When using the binning rules above, the binning parameters for one bin can be directly calculated from the
local parameter sets of the four corner devices of the bin (see Sec. 7.6). This results in a separate parameter set
for each bin. The binning scheme ensures that the local parameters are exactly reproduced at the bin corners
and that no humps occur in the local parameter values across bin boundaries.
Note: After calculation of the local parameters from the binning rules (and possible applications of the stress
equations in Section 3.5 and well proximity equations in Section 3.6), clipping is applied according to Section 2.5.2.
46
Unclassified
PSP 103.2
Table 3.1: Overview of local parameters and binning type. The third column indicates
whether there is a physical geometrical scaling rule for the local parameters.
#
parameter
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
VFB
STVFB
TOX
EPSROX
NEFF
FACNEFFAC
GFACNUD
VSBNUD
DVSBNUD
VNSUB
NSLP
DNSUB
DPHIB
DELVTAC
NP
CT
TOXOV
TOXOVD
NOV
NOVD
CF
CFB
BETN
STBET
MUE
STMUE
THEMU
STTHEMU
CS
STCS
XCOR
STXCOR
FETA
RS
STRS
RSB
RSG
THESAT
STTHESAT
THESATB
physical scaling
binning
parameter
yes
yes
no
no
yes
yes
yes
no
no
no
no
no
yes
yes
yes
yes
no
no
no
no
yes
no
yes
yes
yes
no
no
no
yes
no
yes
no
no
yes
no
no
no
yes
yes
no
type I
type I
no
no
type I
type I
type I
no
no
no
no
no
type I
type I
type I
type I
no
no
type I
Type I
type I
no
type III
type I
type I
no
no
no
type I
no
type I
no
no
type I
no
no
no
type I
type I
type I
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
THESATG
AX
ALP
ALP1
ALP2
VP
A1
A2
STA2
A3
A4
GCO
IGINV
IGOV
IGOVD
STIG
GC2
GC3
CHIB
AGIDL
AGIDLD
BGIDL
BGIDLD
STBGIDL
STBGIDLD
CGIDL
CGIDLD
COX
CGOV
CGOVD
CGBOV
CFR
CFRD
FNT
NFA
NFB
NFC
EF
DTA
physical scaling
binning
no
yes
yes
yes
yes
no
yes
no
no
yes
yes
no
yes
yes
yes
no
no
no
no
yes
yes
no
no
no
no
no
no
yes
yes
yes
yes
yes
yes
no
yes
yes
yes
no
no
type I
type I
type I
type I
type I
no
type I
no
no
type I
type I
no
type II
type III
type III
no
no
no
no
type III
type III
no
no
no
no
no
no
type II
type III
type III
type II
type III
type III
no
type I
type I
type I
no
no
47
Unclassified
PSP 103.2
Effective length and width
LEN = 106
(3.112)
WEN = 106
(3.113)
(
LPS
WOD
LEN
= LVARO 1 + LVARL
L
)
(3.114)
(
)
WEN
= WVARO 1 + WVARW
Wf
(3.115)
LE = L L = L + LPS 2 LAP
(3.116)
WE = Wf W = Wf + WOD 2 WOT
(3.117)
LE,CV = L + LPS 2 LAP + DLQ
(3.118)
WE,CV = Wf + WOD 2 WOT + DWQ
(3.119)
LG,CV = L + LPS + DLQ
(3.120)
WG,CV = Wf + WOD + DWQ
(3.121)
Note: If the calculated LE , WE , LE,CV , WE,CV , LG,CV , or WG,CV is smaller than 1 nm (109 m), the value
is clipped to this lower bound of 1 nm.
Process Parameters
VFB = POVFB + PLVFB
LEN
WEN
LEN WEN
+ PWVFB
+ PLWVFB
LE
WE
LE WE
STVFB = POSTVFB + PLSTVFB
LEN
LE
+ PWSTVFB
WEN
LEN WEN
+ PLWSTVFB
WE
LE WE
(3.123)
TOX = POTOX
(3.124)
EPSROX = POEPSROX
(3.125)
NEFF = PONEFF + PLNEFF
LEN
WEN
LEN WEN
+ PWNEFF
+ PLWNEFF
LE
WE
LE WE
FACNEFFAC = POFACNEFFAC + PLFACNEFFAC

+ PWFACNEFFAC
48
(3.122)
(3.126)
LEN
LE
WEN
LEN WEN
+ PLWFACNEFFAC
WE
LE WE
(3.127)
Unclassified
PSP 103.2
GFACNUD = POGFACNUD + PLGFACNUD
LEN
LE
+ PWGFACNUD
WEN
LEN WEN
+ PLWGFACNUD
WE
LE WE
(3.128)
VSBNUD = POVSBNUD
(3.129)
DVSBNUD = PODVSBNUD
(3.130)
VNSUB = POVNSUB
(3.131)
NSLP = PONSLP
(3.132)
DNSUB = PODNSUB
(3.133)
DPHIB = PODPHIB + PLDPHIB
LEN
LE
WEN
LEN WEN
+ PLWDPHIB
WE
LE WE
(3.134)
WEN
LEN WEN
+ PLWDELVTAC
WE
LE WE
(3.135)
+ PWDPHIB
DELVTAC = PODELVTAC + PLDELVTAC
LEN
LE
+ PWDELVTAC
NP = PONP + PLNP
LEN
WEN
LEN WEN
+ PWNP
+ PLWNP
LE
WE
LE WE
(3.136)
CT = POCT + PLCT
LEN
WEN
LEN WEN
+ PWCT
+ PLWCT
LE
WE
LE WE
(3.137)
TOXOV = POTOXOV
(3.138)
TOXOVD = POTOXOVD
(3.139)
NOV = PONOV + PLNOV
LEN
WEN
LEN WEN
+ PWNOV
+ PLWNOV
LE
WE
LE WE
NOVD = PONOVD + PLNOVD
LEN
WEN
LEN WEN
+ PWNOVD
+ PLWNOVD
LE
WE
LE WE
(3.140)
(3.141)
DIBL Parameters
CF = POCF + PLCF
CFB = POCFB
LEN
WEN
LEN WEN
+ PWCF
+ PLWCF
LE
WE
LE WE
(3.142)
(3.143)
49
Unclassified
PSP 103.2
Mobility Parameters
WE
BETN =
LE
(
POBETN + PLBETN
LEN
LE
WEN
LEN WEN
+ PWBETN
+ PLWBETN
WE
LE WE
)
(3.144)
(See Section 7.6.1 for an explanation of this binning rule.)

STBET = POSTBET + PLSTBET
LEN
LE
+ PWSTBET
MUE = POMUE + PLMUE
WEN
LEN WEN
+ PLWSTBET
WE
LE WE
LEN
WEN
LEN WEN
+ PWMUE
+ PLWMUE
LE
WE
LE WE
(3.145)
(3.146)
STMUE = POSTMUE
(3.147)
THEMU = POTHEMU
(3.148)
STTHEMU = POSTTHEMU
(3.149)
CS = POCS + PLCS
LEN
WEN
LEN WEN
+ PWCS
+ PLWCS
LE
WE
LE WE
(3.150)
STCS = POSTCS
(3.151)
XCOR = POXCOR + PLXCOR
LEN
WEN
LEN WEN
+ PWXCOR
+ PLWXCOR
LE
WE
LE WE
(3.152)
STXCOR = POSTXCOR
(3.153)
FETA = POFETA
(3.154)

RS = PORS + PLRS
50
LEN
WEN
LEN WEN
+ PWRS
+ PLWRS
LE
WE
LE WE
(3.155)
STRS = POSTRS
(3.156)
RSB = PORSB
(3.157)
RSG = PORSG
(3.158)
Unclassified
PSP 103.2
THESAT = POTHESAT + PLTHESAT
LEN
LE
+ PWTHESAT
STTHESAT = POSTTHESAT + PLSTTHESAT

+ PWSTTHESAT
THESATB = POTHESATB + PLTHESATB
(3.159)
LEN
LE
LEN WEN
WEN
+ PLWSTTHESAT
WE
LE WE
(3.160)
LEN
LE
+ PWTHESATB
THESATG = POTHESATG + PLTHESATG
WEN
LEN WEN
+ PLWTHESAT
WE
LE WE
WEN
LEN WEN
+ PLWTHESATB
WE
LE WE
(3.161)
LEN
LE
+ PWTHESATG
LEN WEN
WEN
+ PLWTHESATG
WE
LE WE
(3.162)
Saturation Voltage Parameters

AX = POAX + PLAX
WEN
LEN WEN
LEN
+ PWAX
+ PLWAX
LE
WE
LE WE
(3.163)

ALP = POALP + PLALP
LEN
WEN
LEN WEN
+ PWALP
+ PLWALP
LE
WE
LE WE
(3.164)
ALP1 = POALP1 + PLALP1
LEN
WEN
LEN WEN
+ PWALP1
+ PLWALP1
LE
WE
LE WE
(3.165)
ALP2 = POALP2 + PLALP2
WEN
LEN WEN
LEN
+ PWALP2
+ PLWALP2
LE
WE
LE WE
(3.166)
VP = POVP
(3.167)

A1 = POA1 + PLA1
WEN
LEN WEN
LEN
+ PWA1
+ PLWA1
LE
WE
LE WE
(3.168)
A2 = POA2
(3.169)
STA2 = POSTA2
(3.170)
51
Unclassified
PSP 103.2
A3 = POA3 + PLA3
LEN
WEN
LEN WEN
+ PWA3
+ PLWA3
LE
WE
LE WE
(3.171)
A4 = POA4 + PLA4
LEN
WEN
LEN WEN
+ PWA4
+ PLWA4
LE
WE
LE WE
(3.172)

GCO = POGCO
(3.173)
IGINV = POIGINV + PLIGINV
LE
LEN
WE
LE WE
+ PLWIGINV
WEN
LEN WEN
+ PWIGINV
IGOV = POIGOV + PLIGOV
LEN
WE
WE LEN
+ PWIGOV
+ PLWIGOV
LE
WEN
WEN LE
IGOVD = POIGOVD + PLIGOVD
(3.174)
(3.175)
LEN
LE
+ PWIGOVD
WE
WE LEN
+ PLWIGOVD
WEN
WEN LE
(3.176)
STIG = POSTIG
(3.177)
GC2 = POGC2
(3.178)
GC3 = POGC3
(3.179)
CHIB = POCHIB
(3.180)
AGIDL = POAGIDL + PLAGIDL
LEN
LE
WE
WE LEN
+ PLWAGIDL
WEN
WEN LE
(3.181)
WE
WE LEN
+ PLWAGIDLD
WEN
WEN LE
(3.182)
+ PWAGIDL
AGIDLD = POAGIDLD + PLAGIDLD
LEN
LE
+ PWAGIDLD
52
Unclassified
PSP 103.2
BGIDL = POBGIDL
(3.183)
BGIDLD = POBGIDLD
(3.184)
STBGIDL = POSTBGIDL
(3.185)
STBGIDLD = POSTBGIDLD
(3.186)
CGIDL = POCGIDL
(3.187)
CGIDLD = POCGIDLD
(3.188)

COX = POCOX + PLCOX
LE,CV
WE,CV
LE,CV WE,CV
+ PWCOX
+ PLWCOX
LEN
WEN
LEN WEN
CGOV = POCGOV + PLCGOV
LEN
LE,CV
WE,CV
WE,CV LEN
+ PLWCGOV
WEN
WEN LE,CV
(3.190)
WE,CV
WE,CV LEN
+ PLWCGOVD
WEN
WEN LE,CV
(3.191)
WG,CV
LG,CV WG,CV
+ PLWCGBOV
WEN
LEN WEN
(3.192)
+ PWCGOV
CGOVD = POCGOVD + PLCGOVD
LEN
LE,CV
+ PWCGOVD
CGBOV = POCGBOV + PLCGBOV
LG,CV
LEN
+ PWCGBOV
CFR = POCFR + PLCFR
WG,CV
WG,CV LEN
LEN
+ PWCFR
+ PLWCFR
LG,CV
WEN
WEN LG,CV
CFRD = POCFRD + PLCFRD
(3.189)
(3.193)
LEN
WG,CV
WG,CV LEN
+ PWCFRD
+ PLWCFRD
(3.194)
LG,CV
WEN
WEN LG,CV

FNT = POFNT
NFA = PONFA + PLNFA
(3.195)
WEN
LEN WEN
LEN
+ PWNFA
+ PLWNFA
LE
WE
LE WE
(3.196)
53
Unclassified
PSP 103.2
NFB = PONFB + PLNFB
LEN
WEN
LEN WEN
+ PWNFB
+ PLWNFB
LE
WE
LE WE
(3.197)
NFC = PONFC + PLNFC
LEN
WEN
LEN WEN
+ PWNFC
+ PLWNFC
LE
WE
LE WE
(3.198)
EF = POEF
(3.199)
WPE parameters
Kvthowe = POKVTHOWE + PLKVTHOWE
LEN
WEN
+ PWKVTHOWE
LE
WE
+ PLWKVTHOWE
Kuowe = POKUOWE + PLKUOWE
LEN WEN
LE WE
(3.200)
LEN WEN
LE WE
(3.201)
LEN
WEN
+ PWKUOWE
LE
WE
+ PLWKUOWE
Self heating parameters

(Also for SWGEO = 2, the geometrical scaling rules are used.)
RTH = RTHO +
RTHW1
[
]
WE
LE
RTHW2 +
1 + RTHLW
WEN
LEN
(3.202)
{
[
]}
WE
LE
CTH = CTHO + CTHW1 CTHW2 +
1 + CTHLW
WEN
LEN
(3.203)
STRTH = STRTHO
(3.204)
NQS parameters
(Also for SWGEO = 2, the geometrical scaling rules are used.)
MUNQS = MUNQSO
54
(3.205)
Unclassified
PSP 103.2
3.4 Parasitic resistances

PSP model contains a network of parasitic elements: a gate resistance, two diffusion resistances for source
and drain, and four bulk resistances. Note that the junction diodes are no longer directly connected to the bulk
terminal of the intrinsic MOS-transistor. The complete circuit is shown in Fig. 3.2. At this moment, only the
gate resistance is scaled with geometry (facilitating the implementation of multi-finger devices).
Note: The resistance equations are calculated when SWGEO = 1 or 2.
Lf = L + LPS
(3.206)
Lsil,f = Lf + DLSIL
(3.207)
WE,f = Wf + WOD
(3.208)
XGWE = XGW 0.5 WOD
RG = RGO +
NF
RSHG
WE,f
3NGCON
(3.209)
)
+ XGWE
+
NGCON Lsil,f
RINT + RVPOLY
WE,f Lf
(3.210)
RSE = NRS RSH
(3.211)
RDE = NRD RSHD
(3.212)
RBULK = RBULKO
(3.213)
RWELL = RWELLO
(3.214)
RJUNS = RJUNSO
(3.215)
RJUND = RJUNDO
(3.216)
Note: The values of Lf , Lsil,f , WE,f and XGWE are clipped to a minimum value of 1 nm. The calculated local
parameters are subject to the boundaries specified in Section 2.5.6.
G
Rgate
GP
S Rsource SI
BP
DI Rdrain
Rbulk
BS
Rjuns
BI Rjund
BD
Rwell
B
Figure 3.2: Parasitics circuit

55
Unclassified
PSP 103.2
3.5 Stress effects

The stress model of BSIM4.4.0 [3] has been adopted in PSP without any modifications, except for two changes:
(1) in the original BSIM parameter names all zeros have been replaced by Os, in order to comply with PSP
conventions and (2) the BSIM parameters STK2 and LODK2 are not available in PSP. Some trivial conversion
of parameters BSIMPSP is still necessary, see [2].
The local PSP parameters affected by the stress equations are BETN, THESAT, VFB, and CF.
Calculation of SA and SB for irregular layouts is given in Section B.1.
Note:
After modification of the local parameters by the stress equations, clipping is applied according to Section 2.5.2.
If both SA and SB are set to 0, the stress-equations are not computed.
The stress equations are calculated when SWGEO = 1 or 2.
3.5.1
Layout effects for multi-finger devices
For multi-finger devices, effective values SAe and SBe for the instance parameters are calculated (see Fig.
3.3).
3.5.2
SAe
NF1
1
1
1
=
+ 0.5 L
NF i=0 SA + 0.5 L + i (SD + L)
(3.217)
SBe
NF1
1
1
1
=
+ 0.5 L
NF i=0 SB + 0.5 L + i (SD + L)
(3.218)
Layout effects for regular shapes

RA =
RB =
56
1
+ 0.5 L
(3.219)
1
SBe + 0.5 L
(3.220)
SAe
RA,ref =
1
SAREF + 0.5 L
(3.221)
RB,ref =
1
SBREF + 0.5 L
(3.222)
Unclassified
PSP 103.2
W
SA
SD
SB
LOD
Figure 3.3: A typical layout of multi-finger devices with an additional instance parameters SD.
Trench
isolation
edge
W
SA
SB
L OD
Figure 3.4: Typical layout of a MOSFET. Note that LOD = SA + SB + L, where OD is the active region
definition.
57
3.5.3
Unclassified
PSP 103.2
Parameter modifications
Mobility-related equations
(
Ku0 =
1+
LKUO
(L + LPS )
LLODKUO
WKUO
WLODKUO
(Wf + WOD + WLOD)
)
+
PKUO
LLODKUO
(L + LPS )
(Wf + WOD + WLOD)WLODKUO

)]
[
(
TKA
1
1 + TKUO
(3.223)
TKR
KUO
(RA + RB )
Ku0
,ref =
(3.224)
KUO
(RA,ref + RB,ref )
Ku0
BETN =
(3.225)
1 +
BETNref
1 + ,ref
THESAT =
(3.226)
1 +
1 + KVSAT ,ref
THESATref
1 + ,ref
1 + KVSAT
(3.227)
Threshold-voltage-related equations
Kvth0 = 1 +
LKVTHO
(L + LPS )
LLODVTH
58
WKVTHO
WLODVTH
(Wf + WOD + WLOD)
PKVTHO
(L + LPS )LLODVTH (Wf + WOD + WLOD)WLODVTH
(3.228)
R = RA + RB RA,ref RB,ref
(3.229)
VFB = VFBref + KVTHO
R
Kvth0
(3.230)
CF = CFref + STETAO
R
LODETAO
Kvth0
(3.231)
Unclassified
PSP 103.2
3.6 Well proximity effects

The well proximity effect (WPE) model from BSIM4.5.0 [4, 5, 6] has been adopted in PSP with two changes
relative to BSIM4.5.0: (1) in the original BSIM parameter names all zeros have been replaced by Os in order
to comply with PSP naming convention and (2) the BSIM parameter K2WE is not available in PSP. Except for
some trivial conversion of parameters BSIMPSP [2], WPE parameters from BSIM can be used directly in
PSP.
The local PSP parameters affected by the WPE equations are VFB and BETN.
How to calculate SCA, SCB, and SCC is shown in Section B.2.
Note:
After modification of the local parameters by the WPE equations, clipping is applied according to Section 2.5.2.
If SCA, SCB, SCC and SC are all set to 0, the WPE equations are not computed.
The WPE equations are calculated when SWGEO = 1 or 2.
3.6.1
Parameters for pre-layout simulation
If SCA = SCB = SCC = 0 and SC > 0, SCA, SCB, and SCC will be computed from SC according to
Eqs. (B.9)(B.11), as shown below. Here, SC should be taken as the distance to the nearest well edge (see Fig.
3.5). If any of the parameters SCA, SCB, or SCC is positive, all three values as supplied will be used and SC
will be ignored.
If SCA = SCB = SCC = 0 and SC > 0
SCA =
SCREF2
Wf
1
1
SC SC + Wf
)
(3.232)
SC
Figure 3.5: A layout of MOS devices for pre-layout simulation using estimated value for SC.
59
Unclassified
PSP 103.2
[
(
)
(
)
1
SCREF
SC
SCREF2
SC
+
SCB =
SC exp 10
exp 10
Wf SCREF
10
SCREF
100
SCREF
(
)
SCREF
SC + Wf
(SC + Wf ) exp 10
10
SCREF
(
)]
SC + Wf
SCREF2
exp 10
(3.233)
100
SCREF
[
(
)
(
)
1
SCREF
SC
SCREF2
SC
SCC =
SC exp 20
+
exp 20
Wf SCREF
20
SCREF
400
SCREF
(
)
SCREF
SC + Wf
(SC + Wf ) exp 20
20
SCREF
(
)]
SCREF2
SC + Wf
(3.234)
exp 20
400
SCREF
3.6.2
Calculation of parameter modifications
The calculation of Kvthowe and Kuowe is given in Section 3.2 (global model) or 3.3 (binning model).
60
VFB = VFBref + Kvthowe (SCA + WEB SCB + WEC SCC)
(3.235)
BETN = BETNref [1 + Kuowe (SCA + WEB SCB + WEC SCC)]
(3.236)
Unclassified
PSP 103.2
3.7 Asymmetric junctions

From PSP 102.3 onwards, asymmetric junction can be modeled in PSP. This includes asymmetric source-bulk
and drain-bulk junctions, GIDL/GISL, overlap gate currents, overlap capacitances and outer fringe capacitances. The asymmetric junction model can be switched on by means of the parameter SWJUNASYM. Note
that if SWJUNASYM = 1, the new parameters for the drain side are used all together. Those whose values
are not explicitly specified in the model card are set to their default value, not to their counterparts for the
source side. In other words, it is not possible to activate the parameters for the drain side on a one-by-one basis.
The physical scaling and binning rules to calculate the related local parameters for the drain side are given in
Section 3.2 and 3.3.
If SWJUNASYM = 0, the related parameters for the drain side are ignored. Effectively, the following assignments are applied before evaluation of the calculations described in Section 4.
If SWJUNASYM = 0:
TOXOVD = TOXOV
(3.237)
NOVD = NOV
(3.238)
AGIDLD = AGIDL
(3.239)
BGIDLD = BGIDL
(3.240)
STBGIDLD = STBGIDL
(3.241)
CGIDLD = CGIDL
(3.242)
IGOVD = IGOV
(3.243)
CGOVD = CGOV
(3.244)
CFRD = CFR
(3.245)
RSHD = RSH
(3.246)
61
62
PSP 103.2
Unclassified
Unclassified
PSP 103.2
Section 4
PSP Model Equations

4.1 Internal Parameters (including Temperature Scaling)
In this section, bias-independent internal parameters will be calculated, including temperature scaling. These
parameters are computed from local parameters. Local parameters are (as usual) denoted by capital characters
in bold font, whereas the internal parameters are denoted by symbols in bold font.
Transistor temperature
TKR = T0 + TR
(4.1)
TKA = T0 + TA + DTA
(4.2)
TKD = TKA + Vdt
(4.3)
T = TKD TKR
(4.4)
TA = TKA TKR
(4.5)
T =
kB TKD
q
TA =
kB TKA
q
Local process parameters

(
)
TKR
*T = T 1 + CT
TKD
V FB = VFB + STVFB T + DELVTO
(4.6)
(4.7)
(4.8)
(4.9)
Eg /q = 1.179 9.025 105 TKD 3.05 107 TKD 2
(4.10)
(
) (
)
rT = 1.045 + 4.5 104 TKD 0.523 + 1.4 103 TKD 1.48 106 TKD 2
(4.11)
63
PSP 103.2
ni = 2.5 10
25
rT
3/4
(TKD /300)
3/2
Eg /q
exp
2 T
Unclassified
)
(4.12)
cl
B,dc = MAX (DPHIB + 2 T ln [NEFF/ni ] , 0.05)
(4.13)
Ne,ac = MIN[MAX(FACNEFFAC NEFF, 1020 ), 1026 ]
(4.14)
cl
B,ac = MAX (DPHIB + DELVTAC + 2 T ln [Ne,ac /ni ] , 0.05)
(4.15)
ox = EPSROX 0
(4.16)
Cox = ox /TOX
(4.17)
Si = r,Si 0
0,dc = 2 q Si NEFF/Cox
0,ac = 2 q Si Ne,ac /Cox
Gcl
0,dc = 0,dc / T
(4.18)
Gcl
0,ac
(4.19)
(4.20)
(4.21)
= 0,ac / T
(4.22)
Polysilicon depletion parameter

{
kP = 0
if
NP
=
0
NP1 = MAX(NP, 8 107 /TOX2 )
kP =
24
if NP > 0 NP2 = MAX(NP1 , 5 10 )
2
kP = 2 T Cox
/(q Si NP2 )
(4.23)
Quantum-mechanical correction parameters

q lim = 10 T
2/3
0.4 QMC QM N Cox

qq =
2/3
0.4 QMC QM P Cox
qb0,dc = 0,dc cl
B,dc
qb0,ac = 0,ac
cl
B,ac
for NMOS
(4.25)
for PMOS
(4.26)
(4.27)
2/3
(4.28)
B,ac = cl
B,ac + 0.75 q q qb0,ac
2/3
(4.29)
)
(
1/3
G0,dc = Gcl
0,dc 1 + q q qb0,dc
(4.30)
(
)
1/3
G0,ac = Gcl
0,ac 1 + q q qb0,ac
(4.31)
B,dc = cl
B,dc + 0.75 q q qb0,dc
64
(4.24)
Unclassified
PSP 103.2
VSB -clipping parameters

X,dc = 0.95 B,dc
(4.32)
X,ac = 0.95 B,ac
(4.33)
a,dc = 2.5 103 2B,dc
(4.34)
a,ac = 2.5 103 2B,ac
(4.35)
b,dc = 2.5 103 2B,dc
(4.36)
b,ac = 2.5 103 2B,ac
(4.37)
X,dc = 0.5
b,dc
(4.38)
X,ac = 0.5
b,ac
(4.39)
(
)
*X,dc = MINA X,dc X,dc , 0, a,dc
(4.40)
(
)
*X,ac = MINA X,ac X,ac , 0, a,ac
(4.41)
NUD parameters
us1 = VSBNUD + B B
us21 =
DVSBNUD + B
B us1
Local process parameters in gate overlap regions
ov = 2 q Si NOV TOXOV/ox
dov =
2 q Si NOVD TOXOVD/ox
(4.42)
(4.43)
(4.44)
(4.45)
Gov = ov / T
(4.46)
Gdov = dov / T
(4.47)
ov = 3.1 Gov + 8.5
(4.48)
64/Gov
22/Gov + 3
aov =
for 1/Gov < 0.06

for 0.06 1/Gov 0.45
7.2/Gov + 15.5 for 0.45 < 1/Gov 1.6
Gov
for 1/Gov > 1.6
(4.49)
65
PSP 103.2
Unclassified
ov
ov
G2
=
+ ov Gov
2
2
ov
G2
+ ov + aov
2
4
dov = 3.1 Gdov + 8.5
(4.51)
64/Gdov
22/Gdov + 3
adov =
(4.50)
for 1/Gdov < 0.06

for 0.06 1/Gdov 0.45
7.2/Gdov + 15.5 for 0.45 < 1/Gdov 1.6
Gdov
for 1/Gdov > 1.6
(4.52)
dov
dov
G2
=
+ dov Gdov
2
2
dov
G2
+ dov + adov
2
4
(4.53)
Mobility parameters
STBET
= FACTUO BETN Cox (TKR /TKD )

STTHEMU
= THEMU (TKR /TKD )

E = MUE (TKR /TKD )
STMUE
STXCOR
X cor = XCOR (TKR /TKD )

STCS
(4.54)
(4.55)
(4.56)
(4.57)
C S = CS (TKR /TKD )
(4.58)
E eff0 = 108 Cox /Si
(4.59)
1/2 FETA
for NMOS
for PMOS
(4.60)
1/3 FETA
1/2
,ac =
for NMOS
(4.61)
1/3
for PMOS
Series resistance parameter

STRS
Rs = RS (TKR /TKD )
(4.62)
R = 2 Rs
(4.63)
Velocity saturation parameter

sat = THESAT (TKR /TKD )
66
STTHESAT
(4.64)
Unclassified
PSP 103.2
Impact-ionization parameter
a2 = A2 (TKD /TKR )
STA2
(4.65)
Gate current parameters

STIG
I GINV = IGINV (TKA /TKR )

I GOV = IGOV (TKA /TKR )
STIG
I GOVD = IGOVD (TKA /TKR )

B=
(4.66)
(4.67)
STIG
(4.68)
4 TOX
2 q m0 CHIB = 6.830909 109 TOX CHIB

3
~
(4.69)
B ov = B TOXOV/TOX
(4.70)
B ovd = B TOXOVD/TOX
GC2
0.99
2 GC3
GC Q =
(4.71)
for GC3 < 0
(4.72)
for GC3 0
Eg /q + B
2
(4.73)
D ch = GCO *T
(4.74)
D ov = GCO TA
(4.75)
b =
Gate-induced drain leakage parameters

(
AGIDL = AGIDL
2 109
TOXOV
(
AGIDLD = AGIDLD
)2
2 109
TOXOVD
(4.76)
)2
(4.77)
(
)
TOXOV
B GIDL = BGIDL MAX ([1 + STBGIDL TA ] , 0)
2 109
(
)
TOXOVD
B GIDLD = BGIDLD MAX ([1 + STBGIDLD TA ] , 0)
2 109
(4.78)
(4.79)
Self heating
(
RTH = RTH
TKA
TKR
)STRTH
(4.80)
Noise parameter
N T = FNT 4 kB TKD
(4.81)
Additional internal parameters

x1 = 1.25
(4.82)
67
PSP 103.2
Unclassified
4.2 Current Model

In this section, the current model equations of the PSP-model are given. Use is made of the applied terminal bias values VGS , VDS and VSB , the local parameters listed in Section 2.5.2 and the internal parameters
introduced in Section 4.1. Local parameters are denoted by capital characters in bold font, whereas internal
(bias-independent) parameters are denoted by symbols in bold font.
The definitions of the auxiliary functions MINA(.), MAXA(.), (.) and 1,2 (.) can be found in Appendix A.
Depending on the value of the parameters SWNUD and SWDELVTAC, the surface potential (at source- and
drain-side of the channel) and associated computations, i.e., Eqs. (4.94)(4.185), may be evaluated twice: once
for the dc-characteristics and a second time for the ac-characteristics of the model. Details are given below.
4.2.1
Conditioning of Terminal Voltages

Vdsx =
VDS 2 + 0.01 0.1
(4.83)
V,dc = MINA (VSB , VSB + VDS , b,dc ) + X,dc
(4.84)
V,ac = MINA (VSB , VSB + VDS , b,ac ) + X,ac
(4.85)
VSB,dc
= VSB MINA (V , 0, a,dc ) + *X,dc
(4.86)
= VSB MINA (V , 0, a,ac ) + *X,ac

VSB,ac
(4.87)
Nonuniform doping effect. Eqs. (4.88)(4.93) are only evaluated when SWNUD = 0 and GFACNUD = 1:
VmB = VSB
+ 0.5 (VDS Vdsx )
us = VmB + B B
p=2
us us1
1
us21
(4.88)
(4.89)
(4.90)
{
}
2
us,nud = us 0.25 (1 GFACNUD) us21 p + p2 + [ln(2)]
(4.91)
(
)
VmB,nud = us,nud + 2 B us,nud
(4.92)
= VmB,nud 0.5 (VDS Vdsx )

VSB,dc
(4.93)
The surface potential (at source- and drain-side of the channel) and associated computations, i.e., Eqs. (4.94)
(4.185), are evaluated using VSB

= VSB,dc
, B = B,dc , and G0 = G0,dc .
If SWNUD = 1 or SWDELVTAC = 1, Eqs. (4.94)(4.185) are evaluated a second time using VSB
= VSB,ac
,
B = B,ac , and G0 = G0,ac .
VDB
= VDS + VSB
VDS Vdsx
2
Drain-induced barrier lowering:
68
(4.94)
Vsbx = VSB
+
(4.95)
VG = CF Vdsx (1 + CFB Vsbx )
(4.96)
VGB
= VGS + VSB
+ VG V FB
(4.97)
xg = VGB
/*T
(4.98)
Unclassified
4.2.2
PSP 103.2
Bias-Dependent Body Factor

(
)
Dnsub = DNSUB MAXA 0, VGS + VSB VNSUB, NSLP
G = G0
4.2.3
1 + Dnsub
(4.99)
(4.100)
Surface Potential at Source Side and Related Variables
= 1 + G/ 2
xns =
(4.101)
B + VSB
*T
(4.102)
ns = exp (xns )
(4.103)
xmrg = 105
(4.104)
if xg < xmrg
yg = xg
z = 1.25 yg /
]
[
= z + 10 (z 6)2 + 64 /2
2
a = (yg ) + G2 ( + 1)
c = 2 (yg ) G2
(
)
= + ln a/G2
y0 = 1 (a, c, , )
0 = exp (y0 )
p = 2 (yg y0 ) + G2 [0 1 + ns (1 (y0 ) 1/0 )]
2
q = (yg y0 ) + G2 [y0 0 + 1 + ns (1 + (y0 ) 1/0 2 y0 )]

xs = y0
{
if |xg | xmrg
(4.105)
xs =
p+
2q
p2
2 q {2
[
]
1 ns
xg
1 + G xg
2 6 2
G2
[0 + ns (1/0 (y0 ))]}
(4.106)
69
if xg > xmrg
x
g1 = x1 + G
Unclassified
PSP 103.2
exp(x1 ) + x1 1
]
xg [
1 + xg ( x1 x
g1 )/
x2g1
x0 = xg + G2 /2 G xg + G2 /4 1 + exp(
x)
x
=
bx = xns + 3
)
(
= MINA(x0 , bx , 5) bx b2x + 5 /2
a = (xg )2 G2 [exp() + 1 ns ( + 1 + ())]
b = 1 G2 /2 [exp() ns ()]
c = 2 (xg ) + G2 [1 exp() ns (1 + ())]
(
)
= xns + ln a/G2
(4.107)
y0 = 2 (a, b, c, , )
0 = exp (y0 )
p = 2 (xg y0 ) + G2 [1 1/0 + ns (0 1 (y0 ))]
2
q = (xg y0 ) G2 [y0 + 1/0 1 + ns (0 y0 1 (y0 ))]

xs = y0 +
2q
2
2
p + p 2 q {2 G [1/0 + ns (0 (y0 ))]}
Eqs. (4.108)-(4.110) are only calculated for xg > 0.

Es = exp (xs )
(4.108)
Ds = [1/Es xs 1 (xs )] ns
(4.109)
Ps = xs 1 + Es
(4.110)
xg xs
xgs =
G Ds + P s
for xg 0
(4.111)
for xg > 0
ss = *T xs
4.2.4
(4.112)
Drain Saturation Voltage

qis =
G2 *T Ds
xgs + G Ps
s = 1 +
G (1 Es )
2 Ps
qbs = *T G
70
Ps
(4.113)
(4.114)
(4.115)
Unclassified
1 + RSB Vsbx
b =
PSP 103.2
(4.116)
1
1 RSB Vsbx
for RSB < 0
1
1 + RSG qis
for RSG 0
1 RSG qis
for RSG < 0
g,s =
for RSB 0
(4.117)
s = R b g,s qis
(4.118)
1 + X cor Vsbx
1 + 0.2 X cor Vsbx
(4.119)
(
)
Ee,s = E eff0 qbs + qis
(4.120)
x =
1 + (E Ee,s )
+ CS
Gmob,s =
wsat,s =
sat,s
=
)2
+ s
(4.121)
1 + THESATB Vsbx
tb =
qbs
qis + qbs
1
1 THESATB Vsbx
for THESATB 0
(4.122)
for THESATB < 0
100 qis tb
100 + qis tb
(4.123)
sat
(1 + THESATG wsat,s )
Gmob,s
for THESATG 0
(4.124)
sat
1
Gmob,s 1 THESATG wsat,s
for THESATG < 0
= qis /s + *T
sat,s
/ 2
ysat =
za =
sat,s
/ 2
1 + sat,s
/ 2
(4.125)
for NMOS
(4.126)
for PMOS
1 + 1 + 4 ysat
[
1 za2 ysat
0 = za 1 + 0.86 za ysat
2
1 + 4 za3 ysat
asat = xgs + G2 /2
(4.127)
]
(4.128)
(4.129)
71
2 =
Unclassified
PSP 103.2
*T 0.98 G2 Ds
asat + a2sat 0.98 G2 Ds
sat =
(4.130)
2 0 2
2
0 + 2 + (0 + 2 ) 3.96 0 2
(4.131)
(
)
sat sat 2 asat *T
= sat *T ln 1 +
2
G2 Ds *T
Vdsat
(4.132)
VDS
Vdse = [
]1/AX
AX
1 + (VDS /Vdsat )
4.2.5
(4.133)
Surface Potential at Drain Side and Related Variables

xnd =
B + VSB
+ Vdse
*
T
(
)
kds = exp Vdse /*T
(4.135)
nd = ns kds
(4.136)
{
if xg xmrg
xd =
if xg > xmrg
xds = xd xs
72
(4.134)
[
]
xg
1 nd
1 + G xg
2 6 2
(4.137)
bx = xnd + 3.0
)
(
= MINA(x0 , bx , 5) bx b2x + 5 /2
a = (xg )2 G2 [exp() + 1 nd ( + 1 + ())]
b = 1 G2 /2 [exp() nd ()]
c = 2 (xg ) + G2 [1 exp() nd (1 + ())]
(
)
= xnd + ln a/G2
(4.138)
y0 = 2 (a, b, c, , )
0 = exp (y0 )
p = 2 (xg y0 ) + G2 [1 1/0 + nd (0 1 (y0 ))]
2
q = (xg y0 ) G2 [y0 + 1/0 1 + nd (0 y0 1 (y0 ))]

xd = y0 +
2q
2
2
p + p 2 q {2 G [1/0 + nd (0 (y0 ))]}
(4.139)
Unclassified
if xds
p = 2 xgs + G2 [1 Es + nd (1/Es 1 (xs ))]
q = G2 (1 kds ) Ds
= 1 G2 /2 [Es + nd (1/Es (xs ))]

10
< 10
2q
xds =
p + p2 4 q
x =x +x
d
4.2.6
(4.140)
ds
Ed = exp (xd )
(4.141)
Dd = (1/Ed xd 1 (xd )) nd
(4.142)
= *T xds
(4.143)
sd = *T xd
(4.144)
Mid-Point Surface Potential and Related Variables
if xg > 0
if xg 0
4.2.7
PSP 103.2
xm = (xs + xd ) /2
Em = Es Ed
= (Ds + Dd ) /2
D
(4.145)
(
)
+ x2 /8 Em 2/G2
Dm = D
ds
Pm = x m 1 + E m
x = G D + P
gm
m
m
xm = xs
(4.146)
x =x x
gm
g
s
Polysilicon Depletion
Eqs. (4.147)-(4.161) are only calculated for kP > 0 and xg > 0 (otherwise p = 1):
(0)
x(0)
m = xm ,
(0)
Dm
= Dm ,
xds = xds ,
(0)
Em
= Em ,
(4.147)
(0)
d0 = 1 Em
+ 2 xgm /G2
(4.148)
p = 1/ 1 + kP xgm
(4.149)
[
xpm = kP
p xgm
1 + p
]2
(0)
Dm
(0)
(
)
(0)
(0)
p = 2 (xgm xpm ) + G2 1 Em
+ Dm
(4.150)
Dm + Pm
(4.151)
73
Unclassified
PSP 103.2
q = xpm (xpm 2 xgm )
(4.152)
(
)
(0)
(0)
p = 1 G2 /2 Em
+ Dm
(4.153)
pq
p q
(4.154)
xm = x(0)
m + up
(4.155)
(0)
Em = Em
exp (up )
(4.156)
(0)
Dm = Dm
exp (up )
(4.157)
Pm = x m 1 + E m
xgm = G Dm + Pm
(4.158)
up =
xds =
p2
(0)
xds
(4.159)
[
]
+ d0
exp (up ) D
1 Em + 2 xgm p /G2 + exp (up ) D
(4.160)
= *T xds
4.2.8
(4.161)
Potential Mid-Point Inversion Charge and Related Variables

qim =
G2 *T Dm
xgm + G Pm
m = p +
(4.162)
G (1 Em )
2 Pm
(4.163)
= qim + *T m
qim
(4.164)
Pm
(4.165)
qbm = *T G
Series resistance:
1 + RSG q
im
g =
1 RSG qim
for RSG 0
(4.166)
for RSG < 0
s = R b g qim
(4.167)
Mobility reduction:
(
)
Ee = E eff0 qbm + qim
(4.168)
qe1 = qbm + ,ac qim
(4.169)
Gmob =
74
1 + (E Ee )
+ CS
x
qbm
qim +qbm
)2
+
(4.170)
Unclassified
4.2.9
PSP 103.2
Drain-Source Channel Current
Eqs. (4.171)-(4.182) are only calculated for xg > 0:

Channel length modulation:
R1 = qim /qim
(4.171)
R2 = *T m /qim
(4.172)
VDS
VP
T1 = ln
Vdse
1+
VP
1+
(4.173)
(
)
Vdsx
T2 = ln 1 +
VP
(4.174)
L/L = ALP T1
(4.175)
1
1 + L/L + (L/L)2
GL =
(4.176)
[
]
ALP1
L1 /L = ALP + R1 T1 + ALP2 qbm R22 T2
qim
(4.177)
[
]
FL = 1 + L1 /L + (L1 /L)2 GL
(4.178)
Velocity saturation:
wsat =
sat
=
100 qim tb
100 + qim tb
(4.179)
sat
(1 + THESATG wsat )
Gmob,s GL
(4.180)
sat
1
Gmob,s GL 1 THESATG wsat
( )
sat
zsat =
for THESATG < 0
for NMOS
(sat
)

1 + sat
Gvsat =
for THESATG 0
(4.181)
for PMOS
Gmob GL (
1 + 1 + 2 zsat
2
(4.182)
Auxiliary Variables for Calculation of Intrinsic Charges and Gate Current. Eqs. (4.183)-(4.185) are only calculated for xg > 0.
Voxm = *T xgm
[
zsat
= m 1 +
(4.183)
(
Gmob GL
Gvsat
)2 ]
(4.184)
75
H=
Unclassified
PSP 103.2
Gmob GL qim

Gvsat
m
(4.185)
In the remainder of this document, some variables (e.g., xg ) are labeled dc or ac (e.g., xg,dc or xg,ac ).
Variables labeled dc result from the first evaluation of Eqs. (4.94)(4.185). For variables labeled ac, there
are two possibilities. If SWNUD = 1 or SWDELVTAC = 1, their values result from the second evaluation of
Eqs. (4.94)(4.185). In any other case, their value is equal to their dc-counterpart.
This applies to the following variables: xg , qe1 , Voxm , qim , qim

, m , , GL , FL , H, p , Gvsat , Vdse ,
Gmob , xm , G, xgm , sat .

Drain-Source channel current:
IDS =
q
FL,dc im,dc dc
Gvsat,dc
for xg,dc 0
(4.186)
for xg,dc > 0
4.2.10 Impact Ionization or Weak-Avalanche

The equations in this Section are only calculated when SWIMPACT = 1 and xg > 0.
[
(
)]
a2 = a2 1 + A4
VSB,dc
+ B B
(4.187)
Vsat = VDS A3 dc
(4.188)
Mavl =
for Vsat 0
(
)
A1 Vsat exp 2
for Vsat > 0
Vsat
(4.189)
Iavl = Mavl IDS
(4.190)
4.2.11 Surface Potential in Gate Overlap Regions
(
)/
2
xg = xg + x2g + 2ov
xsov (xg ) =
xsov = x G2 /2 + Gov
g
ov
xg + G2ov /4 + aov + ov
(
)/
2
xg = xg + x2g + 2dov
xdov (xg ) =
xdov = x G2 /2 + Gdov
g
dov
sov = TA
76
)
(
VGS
xsov
TA
(4.191)
(4.192)
xg + G2dov /4 + adov + dov
(4.193)
)
(
VGS VDS
dov = TA xdov
TA
(4.194)
Vov0 = VGS sov
(4.195)
VovL = VGS VDS dov
(4.196)
Unclassified
PSP 103.2
4.2.12 Gate Current

The equations in this Section are only calculated when SWIGATE = 1.
Source/Drain gate overlap current:
2 + 106
Vov
= Vov
)
(
Vov
,
GC
,
10
for GC3 < 0
MINA
Q
CHIB
zg =
Vov
for GC3 0
CHIB
3.0 TA + ov
FS1 =
TA
IGSov (VGX , ov , Vov ) =
FS2 = 3.0 GCO
FS3 = 30 VGX
FSov = MXE (FS2 , MNE (FS1 , FS3 , 0.9) , 0.3)
IGov = I GOV FSov
])
(
[
exp B ov + zg (GC2 + GC3 zg )

2
(4.197)
2 + 106
Vov
= Vov
)
(
Vov
, GC Q , 10
for GC3 < 0
MINA
CHIB
zg =
Vov
for GC3 0
CHIB
3.0 TA + ov
FS1 =
TA
IGDov (VGX , ov , Vov ) =
FS2 = 3.0 GCO
FS3 = 30 VGX
FSov = MXE (FS2 , MNE (FS1 , FS3 , 0.9) , 0.3)
IGov = I GOVD FSov
(
[
])
exp B dov + zg (GC2 + GC3 zg )

2
(4.198)
IGSov = IGSov (VGS , sov , Vov0 )
(4.199)
IGDov = IGDov (VGS VDS , dov , VovL )
(4.200)
Gate-channel current:
[
Vm =
VSB,dc
*T
xds,dc
ln
2
1 + exp(xds,dc Vdse,dc /*T )

2
)]
(4.201)
77
Unclassified
PSP 103.2
t = MINA (0, Voxm,dc + D ch , 0.01)
Voxm
=
2
Voxm,dc
+ 106
(
)
Voxm
6
MINA
,
GC
,
10
Q
CHIB
zg =
(4.202)
Voxm
CHIB
(4.203)
for GC3 < 0

(4.204)
for GC3 0
(
)
b + Vm t
Si = exp xm,dc
*T
FS = ln
1 + Si
(
)
VGS + VSB,dc Vm
1 + Si exp
*T
(4.206)
IGCO = I GINV FS exp (B [3/2 + zg (GC2 + GC3 zg )])
(4.207)
if xg,dc > 0
if xg,dc 0
u0 = CHIB/ [B (GC2 + 2 GC3 zg )]

x = dc / (2 u0 )
b = u0 /Hdc
Bg = b (1 b) /2
Ag = 1/2 3 Bg
sinh(x)
+ b cosh(x)
pgc = (1 b)
[
]
sinh(x)
1
p
pgd = gc Bg sinh(x) Ag
coth(x)
2
x
x
(4.208)
pgc = 1
(4.209)
pgd = 1/2
xg,dc
1
Sg = 1 +
2
2
6
xg,dc + 10
78
(4.205)
(4.210)
IGC = IGCO pgc Sg
(4.211)
IGCD = IGCO pgd Sg
(4.212)
IGCS = IGC IGCD
(4.213)
IGB = IGCO pgc (1 Sg )
(4.214)
Unclassified
PSP 103.2
4.2.13 Gate-Induced Drain/Source Leakage Current

The equations in this section are only calculated when SWGIDL = 1.
2 + CGIDL2 V 2 + 106
V
=
Vov
tov
t = V Vtov Vov
(
)
Igisl (Vov , V ) =
B GIDL
exp
for Vov < 0

GIDL
Vtov
Igisl =
0
for Vov 0
(4.215)
2 + CGIDLD2 V 2 + 106
Vov
V
=
tov
t = V Vtov Vov
)
(
Igidl (Vov , V ) =
B GIDLD
exp
for Vov < 0

GIDLD
Vtov
Igidl =
0
for Vov 0
(4.216)
Igisl = Igisl (Vov0 , VSB )
(4.217)
Igidl = Igidl (VovL , VDS + VSB )
(4.218)
4.2.14 Total Terminal Currents

ID = IDS + Iavl IGDov IGCD + Igidl
(4.219)
IS = IDS IGSov IGCS + Igisl
(4.220)
IG = IGC + IGB + IGDov + IGSov
(4.221)
IB = Iavl IGB Igidl Igisl
(4.222)
79
PSP 103.2
Unclassified
4.3 Charge Model

In this section, the charge model equations of the PSP-model are given. Use is made of the applied terminal bias values VGS , VDS and VSB , the local parameters listed in Section 2.5.2 and the internal parameters
introduced in Section 4.1. Local parameters are denoted by capital characters in bold font, whereas internal
(bias-independent) parameters are denoted by symbols in bold font.
The definitions of the auxiliary functions MINA(.), MAXA(.), (.) and 1,2 (.) can be found in Appendix A.
4.3.1
Quantum-Mechanical Corrections
qe,ac =
qm
COX
4.3.2
Voxm,ac
for xg,ac 0
for xg,ac > 0
(4.223)
qe1,ac
COX
for q q = 0
COX
1 + q /(q
2
2 1/6
e,ac + q lim )
q
(4.224)
for q q > 0
Intrinsic Charge Model
Fj = ac / (2 Hac )
qL = (1 GL,ac ) (qim,ac m,ac ac /2)
qL
= qL,ac (1 + GL,ac )
(
)]
[
(i)
GL,ac
p,ac ac
qm
F
+
G
1
Q
=
C
V
+
j
L,ac
oxm,ac
G
OX
if xg > 0
(4.225)
2
3
[
(
)
]
(i)
m,ac ac
qm
Q
=
C
q
+
F
+
q
L,ac
im,ac
j
L,ac
I
OX
[
(
[
])
]
qm
2
F
C
m,ac
ac
j
(i)
+ Fj 1
+ qL
QD = OX G2L,ac qim,ac +
2
6
5
(i)
QG
(i)
if xg 0
QI
(i)
QD
(i)
(i)
qm
= COX
Voxm,ac
=0
=0
(i)
QS = QI QD
(i)
(i)
(i)
QB = QI QG
4.3.3
(4.226)
(4.227)
(4.228)
Extrinsic Charge Model
The charges of the source and drain overlap regions:

Qsov = CGOV (VGS sov )
80
(4.229)
Unclassified
PSP 103.2
Qdov = CGOVD (VGS VDS dov )
(4.230)
The charge of the bulk overlap region

Qbov = CGBOV (VGS + VSB )
(4.231)
Outer fringe charge:
4.3.4
Qofs = CFR VGS
(4.232)
Qofd = CFRD (VGS VDS )
(4.233)
Total Terminal Charges

(i)
(4.234)
(i)
(4.235)
(i)
(4.236)
(i)
(4.237)
QG = QG + Qsov + Qdov + Qofs + Qofd + Qbov

QS = QS Qsov Qofs
QD = QD Qdov Qofd
QB = QB Qbov
81
Unclassified
PSP 103.2
4.4 Noise Model

Eqs. (4.238)-(4.254) are only
calculated for xg > 0. In these equations fop represents the operation frequency
of the transistor and j = 1.
N =
Cox
m,dc T
q
(4.238)
Nm
=
Cox
qim,dc
q
(4.239)
Cox
m,dc dc
q
(4.240)
N =
q 2T IDS
S =
EF
(fop )
Cox Gvsat,dc N
(NFA NFB N + NFC N

(
+ NFB + NFC
H0 =
t1 =
(
) ln
[Nm
Nm
+ N/2
N/2
Nm
qim,dc
m,dc
2 N ] N
]
(4.241)
(4.242)
qim,dc
qim,dc
t2 =
(4.243)
dc
12 H0
)2
(4.244)
H0
1
H
(4.245)
lc = 1 12 t2 R
(4.246)
R=
gideal =
qim,dc
FL,dc
Gvsat,dc
(
CGe =
mid =
Gvsat,ac
Gmob,ac GL,ac
(4.247)
)2
qm
COX
p,ac
(4.248)
gideal
[t1 + 12 t2 24 (1 + t1 ) t2 R]
lc2
(4.249)
Sid = N T mid
(4.250)
[
(
)
]
1
t1
1
8
mig = 2
t2 t1 + 12 t2 t2 (t1 + 1 12 t2 ) R
lc gideal
12
5
5
(4.251)
Sig = N T
82
(2 fop CGe )2 mig

1 + (2 fop CGe mig )2
(4.252)
Unclassified
migid
PSP 103.2
[
(
) ]
t2
96
= 2 1 12 t2 t1 +
t2 12 t1 t2 R
lc
5
Sigid = N T
2 j fop CGe migid

1 + 2 j fop CGe mig
(4.253)
(4.254)
Gate current shot noise:

Sigs = 2 q (IGCS + IGSov )
(4.255)
Sigd = 2 q (IGCD + IGDov )
(4.256)
Avalanche current shot noise:

Savl = 2 q (1 + Mavl ) Iavl
(4.257)
Thermal noise for parasitic resistances (see Fig. 3.2):

SRG = 4 kB TKD /Rgate
(4.258)
SRBULK = 4 kB TKD /Rbulk
(4.259)
SRWELL = 4 kB TKD /Rwell
(4.260)
SRJUNS = 4 kB TKD /Rjuns
(4.261)
SRJUND = 4 kB TKD /Rjund
(4.262)
83
PSP 103.2
Unclassified
4.5 Self heating

Fig. 4.1 shows the simple thermal network that is implemented in PSP. The current that reflects the power
dissipation is given by
Pdiss = IDS VDS + Iimpact (VDS + VSB ) +
2
VSIS
V2
+ DID .
Rsource
Rdrain
(4.263)
If RTH < 103 , Pdiss = 0. This can be used to switch off self heating.
The built-in thermal network of PSP can be bypassed (e.g., to replace it with an externally connected thermal
network) by setting CTH = 0 and assigning a very large value to RTH.
Vdt
RTH
CTH
Pdiss
Figure 4.1: Internal thermal network of PSP
84
Unclassified
PSP 103.2
Section 5
Non-quasi-static RF model
5.1 Introduction
For high-frequency modeling and fast transient simulations, a special version of the PSP model is available,
which enables the simulation of non-quasi-static (NQS) effects, and includes several parasitic resistances.
5.2 NQS-effects
In the PSP-NQS model, NQS-effects are introduced by applying the one-dimensional current continuity equation (I/y /t) to the channel. A full numerical solution of this equation is too inefficient for compact
modeling, therefore an approximate technique is used. The channel is partitioned into N + 1 sections of equal
length by assigning N equidistant collocation points. The charge density (per unit channel area) along the
channel is then approximated by a cubic spline through these collocation points, assuring that both the charge
and its first and second spatial derivatives are continuous along the channel. Within this approximation, the
current continuity equation reduces to a system of N coupled first order ordinary differential equations, from
which the channel charge at each collocation point can be found:
dQ1
dt
..
.
dQ
N
dt
= f1 (Q1 , . . . , QN )
..
.
(5.1)
= fN (Q1 , . . . , QN )
Here, Qi is the charge density at the i-th collocation point and fi are functions, which contain the complete
PSP-charge model. These equations are implemented by the definition of appropriate subcircuits (see left part
of Fig. 5.1) and solved by the circuit simulator. Finally, the four terminal charges are calculated from the
channel charges, using the Ward-Dutton partitioning scheme for the source and drain charges.
A full description of the PSP-NQS model is given in Section 5.3. More background information can be found
in literature [7, 8].
5.3 NQS Model Equations

In this section, several symbols and notations are used which were defined in Section 4. Moreover, y denotes
the (normalized) position along the channel (y = 0 is source side, y = 1 is drain side), while x denotes the
surface potential (normalized to *T ) at a certain position.
85
Unclassified
PSP 103.2
Vi
Ii
CNQS
RNQS
Figure 5.1: The subcircuit used to solve one of the differential equations of Eq. (5.1). The current is set to
Ii = CNQS f (V1 , . . . , VN ), where the voltage Vi represents the charge density Qi at the i-th collocation
point and is solved by the circuit simulator. N of these circuits are defined and they are coupled through the
dependence of Ii on the voltages of the other circuits. The resistance RNQS has a very large value and is present
only for convergence purposes. Right: The full network of parasitic elements in the PSP-NQS model. The large
full dots indicate the five additional internal nodes.
5.3.1
Internal constants
Eqs. (5.2)(5.7) are independent of bias conditions and time. Consequently, they have to be computed only
once.
Note: In PSP only SWNQS = 0, 1, 2, 3, 5, 9 are allowed!
n = SWNQS + 1
(5.2)
h = 1/n
(5.3)
The matrix A is a square (n + 1) (n + 1)-matrix with elements Ai,j (0 i, j n), which are used in
Eq. 5.25. They are computed using the following algorithm (adapted from [9]):
1. Initial values:
for 0 i, j n
Ai,j = 0
vi = 0
(5.4)
for 0 i n
(5.5)
2. First loop:
p = 2 + vi1 /2
vi = 1/(2 p)
Ai,i1 = 1/h
Ai,i+1 = 1/h
Ai,j = (3 Ai,j /h Ai1,j /2) for j = 0 . . . n
p
Ai,i = 2/h
86
for i = 1 . . . (n 1)
(5.6)
Unclassified
PSP 103.2
3. Second loop (back substitution):
Ai,j = vi Ai+1,j + Ai,j
5.3.2
for j = 0 . . . n
for i = (n 1) . . . 0
(5.7)
Position independent quantities
The following quantities depend on the bias conditions, but are constant along the channel:
if xg,ac
if xg,ac
5.3.3
(
)
ac
1
ym = 1 +
2
4 Hac
xgm,ac
>0
pd =
xg,ac xm,ac
Gp = Gac /pd
ym = 1/2
0
pd = 1
Gp = Gac
(5.8)
(5.9)
ap = 1 + Gp / 2
(5.10)
pmrg = 105 ap
(5.11)
Position dependent surface potential and charge
Interpolated (quasi-static) surface potential along the channel:

Hac
(y) = xm,ac + *
T
(
1
)
2 ac
(y ym )
1
Hac
(5.12)
Normalized bulk-charge and its first two derivatives as functions of surface potential:
qb (x) = sgn(x) Gp
qb (x) =
exp(x) + x 1
G2p [1 exp(x)]
2 qb (x)
qb (x) = qb (x)
qb (x)2 G2p /2
qb (x)
(5.13)
(5.14)
(5.15)
87
Unclassified
PSP 103.2
Surface potential as a function of normalized inversion charge (note that these equations are identical to
Eq. (4.191), despite the different notation and physical background):
if xg < pmrg
(xg ) =
if |xg | pmrg
if xg > pmrg
yg = xg
z = 1.25 yg /ap
]
[
= z + 10 (z 6)2 + 64 /2
2
a = (yg ) + G2p ( + 1)
c = 2 (yg ) G2p
)
(
= + ln a/G2p
y0 = 1 (a, c, , )
0 = exp(y0 )
= 1 G2p 0 /2
p = 2 (yg y0 ) + G2p (0 1)
2
q = (yg y0 ) + G2p (y0 0 + 1)

= y0
=
(5.16)
2q
p+
xg
ap
x
g1 = x1 + Gp
p2 4 q
exp(x1 ) + x1 1
xg
[1 + xg (x1 ap /
xg1 1)/
xg1 ]
ap
x0 = xg + G2p /2 Gp xg + G2p /4 1 + exp(

x)
x
=
0 = exp(x0 )
= 1 G2p 0 /2
p = 2 (xg x0 ) + G2p (1 0 )
q = (xg x0 )2 G2p (x0 + 0 1)
= x0 +
X(xg , qinv ) = (xg + qinv /pd )
2q
p + p2 4 q
(5.17)
Auxiliary functions:
q(x) = pd (xg x) qb (x)
(q, qx1 ) =
q
1
qx1
(q, qx1 , qx2 ) =
88
(
)
q qx2
1 2
/qx1
qx1
(5.18)
(5.19)
(5.20)
Unclassified
PSP 103.2
Normalized right-hand-side of continuity equation:
f (xg , q, q , q ) =
xz = X(xg , q)
q
(xz ) = pd qb (xz )
x
2q
=
(xz ) = qb (xz )
x2
qx1 =
qx2
f0 = (q, qx1 ) q + (q, qx1 , qx2 ) q 2

xz
= q /qx1
y
(
)2
sat,ac
*T xy1
(
)2
=
*
y1
T
sat,ac
1 + sat,ac
ac
xy1 =
zsat
for NMOS
(5.21)
for PMOS
1 + 2 zsat
Fvsat = 2/(1 + )
[
]
zsat
f = Fvsat f0 Fvsat
(q, qx1 ) (q + xy1 qb (xz ))
Normalization constant:
Tnorm =
5.3.4
MUNQS *T
Gmob,ac GL,ac
qm
COX
(5.22)
Cubic spline interpolation
Using cubic spline interpolation, the spatial derivatives

qi (t).
qi
y (t)
and
2 qi
y 2 (t)
can be expressed as functions of the
q0 = 0
(5.23)
qn = 0
(5.24)
qi =
Ai,j qi
for 1 i n 1
(5.25)
j=0
qi =
5.3.5
qi+1 qi
h
(2 qi + qi+1
)
h
6
for 1 i n 1
(5.26)
Continuity equation
Initial value for the qi (0 i n). These values are used for the DC operating point.
xi,0 = (i h)
(5.27)
qi,0 = q(xi,0 )
(5.28)
89
Unclassified
PSP 103.2
Note: x0,0 = xs and xn,0 = xd . Moreover, these values coincide with those in the quasi-static part of PSP.
The core of the NQS-model is the solution of q(y, t) from the charge continuity equation along the channel.
By approximating the y-dependence by a cubic spline through a number of collocation points, the problem is
reduced to solving the qi (t) from the following set of coupled differential equations.
(
)
qi
qi
2 qi
(t) + Tnorm f xg,ac , qi (t),

(t),
=0
(t)
t
y
y 2
q (0) = q
i
i,0
for 1 i n 1
(5.29)
Note that the boundary points q0 (t) = q(xs ) = qis and qn (t) = q(xd ) = qid remain fixed to their quasi-static
values; they are not solved from the equation above.
The set of differential equations defined above is solved by the circuit simulator via the subcircuits shown in
the left part of Fig. 5.1.
5.3.6
Non-quasi-static terminal charges
Once the qi are known, the NQS terminal charges can be computed:
S0 =
n1
qi
(5.30)
qi
(5.31)
i=1
S2 =
n1
i=1
qINQS =
U0 =
q(y) dy = h S0 +
0
n1
h
h3
(u0 + un )
S2
2
12
(5.32)
i qi
(5.33)
i qi
(5.34)
i=1
U2 =
n1
i=1
NQS
qD
=
y q(y) dy = h2 U0 +
0
h2
h4
[q0 + (3n 1)un ]
U2
6
12
(5.35)
NQS
qSNQS = qINQS qD
(5.36)
Currently, only SWNQS = 0, 1, 2, 3, 5, 9 are allowed. For odd values of SWNQS the gate charge is integrated
along the channel using Simpsons rule. If SWNQS = 2, Simpsons 3/8-rule is used.
If SWNQS is odd (that is, n is even):
[
(
n/2
h
NQS
qG = pd xg,ac X(xg,ac , q0 ) + 4
X(xg,ac , q2i1 )+
3
i=1
)]
n/21
X(xg,ac , q2i ) + X(xg,ac , qn )
(5.37)
i=1
90
Unclassified
PSP 103.2
If SWNQS = 2 (that is, n = 3):

[
NQS
qG
]
3h
= pd xg,ac
(X(xg,ac , q0 ) + 3 X(xg,ac , q1 ) + 3 X(xg,ac , q2 ) + X(xg,ac , q3 )) (5.38)
8
Convert back to conventional units:

qm
QNQS
= COX
*T qSNQS
S
(5.39)
qm
NQS
QNQS
= COX
*T qD
D
(5.40)
NQS
qm
QNQS
= COX
*T qG
G
(5.41)
QNQS
= (QNQS
+ QNQS
+ QNQS
)
B
S
D
G
(5.42)
91
Unclassified
PSP 103.2
Section 6
Embedding
6.1 Model selection
Circuit simulators have different ways for the user to determine which model must be used for simulation.
Typically, model selection is either done by name or by assigning a value to the parameter LEVEL. The
method to be used is prescribed by the circuit simulator vendor. If selection is done by name, the value of
the parameter LEVEL is generally ignored. When Verilog-A code is used, model selection is always done by
name.
For the SiMKit and the Verilog-A code provided by the PSP model developers, the method and values to be
used are given in the table below. For other implementations, the method/value provided by the circuit simulator
vendor is to be used.
From PSP 103.0 onwards, the global, local and binning models are unified. All three models are called by the
same name or LEVEL. Model flavor selection is done by setting parameter SWGEO.
Simulator
Model selection by
Global (geom.)
Global (binning)
Local
Spectre
Pstar
ADS
Verilog-A
psp103
LEVEL = 103
psp103
PSP103VA
SWGEO = 1
SWGEO = 2
SWGEO = 0
6.2 Case of parameters

Throughout this document, all parameter names are printed in uppercase characters. Similarly, in the Verilog-A
code provided by the PSP model developers, the parameters are in upper case characters. However, in other
PSP implementations a different choice can be made. For example, the parameter names may be in lowercase
characters (possibly first character capitalized) if this is conform the conventions of the circuit simulator.
6.3 Embedding PSP in a Circuit Simulator

In CMOS technologies both n- and p-channel MOS transistors are supported. It is convenient to use the
same set of equations for both types of transistor instead of two separate models. This is accomplished by
mapping a p-channel device with its bias conditions and parameter set onto an equivalent n-channel device
with appropriately changed bias conditions (i.e. currents, voltages and charges) and parameters. In this way
both types of transistor can be treated internally as an n-channel transistor. Nevertheless, the electrical behavior
92
Unclassified
PSP 103.2
of electrons and holes is not exactly the same (e.g., the mobility and tunneling behavior), and consequently
slightly different equations have to be used in case of n- or p-type transistors.
Designers are used to the standard terminology of source, drain, gate and bulk. Therefore, in the context of
a circuit simulator it is traditionally possible to address, say, the drain of MOST number 17, even if in reality
the corresponding source is at a higher potential (n-channel case). More strongly, most circuit simulators
provide for model evaluation values for VDS , VGS , and VSB based on an a priori assignment of source, drain,
and bulk, independent of the actual bias conditions. Since PSP assumes that saturation occurs at the drain
side of the MOSFET, the basic model cannot cope with bias conditions that correspond to VDS < 0. Again
a transformation of the bias conditions is necessary. In this case, the transformation corresponds to internally
reassigning source and drain, applying the standard electrical model, and then reassigning the currents and
charges to the original terminals. In PSP care has been taken to preserve symmetry with respect to drain and
source at VDS = 0. In other words, no singularities will occur in the higher-order derivatives at VDS = 0.
In detail, for correct embedding of PSP into a circuit simulator, the following procedureillustrated in Fig. 6.1
is followed. It is assumed that the simulator provides the nodal potentials VDe , VGe , VSe and VBe based on an a
priori assignment of drain, gate, source and bulk.
, and VSB
are calculated from the nodal potentials provided by the circuit simu, VGS
Step 1 The voltages VDS
lator. In the same step, the value of the parameter TYPE is used to deal with the polarity of the device.
From here onwards, all transistors can be treated as n-channel devices.
Step 2 Depending on the sign of VDS

, source-drain interchange is performed. At this level, the voltages
comply to all the requirements for input quantities of PSP.
Step 3 All the internal output quantities (i.e. channel current, weak-avalanche current, gate current, nodal
charges, and noise-power spectral densities) are evaluated using the standard PSP equations (Section 4)
and the internal voltages.
Step 4 The internal output quantities are corrected for a possible source-drain interchange.
Step 5 External output are corrected for a possible p-channel transformation and MULT is applied. The quantities of the intrinsic MOSFET and the junctions are combined.
In general, separate parameter sets are used for n- and p-channel transistors, which are distinguished by the
value of TYPE. As a consequence, the changes in the parameter values necessary for a p-channel type transistor
are normally already included in the parameter sets on file. The changes should therefore not be included in
the simulator.
6.3.1
Selection of device type
In the SiMKit-based and built-in version of PSP in certain circuit simulators, the selection of device type (nmos
or pmos) is done using a different parameter, or using different parameter values. The correct values for some
circuit simulators are given in the table below.
Simulator
Parameter
Value NMOS
value PMOS
Spectre
Pstar
ADS
type
type
gender
n
1
1
p
1
0
Verilog-A
TYPE
93
PSP 103.2
Unclassified
VDe , VGe , VSe , VBe
VGS
= TYPE (VGe VSe )
VSB
= TYPE (VSe VBe )
VDS
= TYPE (VDe VSe )
yes
VDS
0
VDS = VDS
no
VDS = VDS
VGS
VDS
VGS = VGS
VSB = VSB
VSB = VSB
+ VDS
VGS =
Calculate ID , IS , IG , IB , QD , QS , QG , QB , S , Sid , Sig ,
Calculate Ij,S , Qj,S , and Sj,S as a function of (VBe VSe )
Sigs , and Sigd as a function of VDS , VGS , and VSB
and Ij,D , Qj,D , and Sj,D as a function of (VBe VDe )
according to the model equations in Section 4.
using the JUNCAP2 equations, TYPE, and MULT
yes
VDS
0
no
ID
= ID
QD = QD
ID
= IS
QD = QS
IS
QS
IS
= ID
QS = QD
= IS
= QS
IG
= IG
QG = QG
IG
= IG
QG = QG
IB
QB
IB
= IB
QB = QB
= IB
= QB
S = S
Sid
= Sid
S = S
Sid
= Sid
Sig,S
= Sig
Sigs
= Sigs
Sig,S
=0
Sigs
= Sigd
Sig,D
Sigd
Sig,D
Sigd
= Sigs
=0
= Sigd
= Sig
ID
= MULT TYPE ID
Ij,D
ISe = MULT TYPE IS Ij,S

e
IG
= MULT TYPE IG
IBe = MULT TYPE IB + Ij,D + Ij,S

QeD = MULT TYPE QD Qj,D
QeS = MULT TYPE QS Qj,S
QeG = MULT TYPE QG
QeB = MULT TYPE QB + Qj,D + Qj,S
Se = MULT S
e
Sig,S
= MULT Sig,S
e
Sig,D
= MULT Sig,D
e
Sigs
= MULT Sigs
e
= MULT Sigd
Sigd
e
Sid
= MULT Sid
e
Sj,S
= Sj,S
e
Sj,D
= Sj,D
Figure 6.1: Schematic overview of source-drain interchange and handling of TYPE and MULT. Note that
TYPE and MULT are included in the JUNCAP2 model equations.
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PSP 103.2
Figure 6.2: Topology of the PSP model. Left: n-channel MOSFET; Right: p-channel MOSFET. In PSP, the
correct diode polarity is automatically chosen via the TYPE-parameter.
6.4 Integration of JUNCAP2 in PSP

Introduction
The JUNCAP2 model 200.3 is an integral part of PSP 102.2. In addition, it is available as a stand-alone
model. A complete description of the JUNCAP2-model (including all model equations) can be found in the
documentation of JUNCAP2s stand alone version [10]. In this section, only the integration of JUNCAP2 in
PSP is described.
Topology
In a MOS transistor, there are two junctions: one between source and bulk, and one between drain and bulk. In
case of an n-channel MOSFET, the junction anode corresponds to the MOSFET bulk terminal, and the junction
cathodes correspond to the source and the drain. In case of a p-channel MOSFET, it is the other way around:
now the junction cathode corresponds to the MOSFET bulk terminal, and the junction anodes correspond to
the source and the drain. The connections are schematically given in Fig. 6.2. In PSP, this change of junction
terminal connections in case of a p-MOSFET is handled automatically via the TYPE parameter.
In most cases, the MOSFET is operated in such a way that the junctions are either biased in the reverse mode
of operation or not biased at all. In some applications, however, the source-bulk junction has a small forward
bias. This is also the case in partially depleted SOI (PDSOI).
As indicated in Fig. 6.1, the interchange of source and drain for VDS < 0 (as explained above for the intrinsic
MOS model) does not apply to the junctions. For example, ABDRAIN always refers to junction between the
bulk and the terminal known as drain to the simulator, independent of the sign of VDS .
Global and local model level
As explained in the introduction, the PSP model has a local and a global level. The JUNCAP2 model is a
geometrically scaled model, i.e. it is valid for a range of junction geometries (as described by the geometrical
parameters AB, LS, and LG). It has turned out that it is very unnatural to create a local parameter set for
JUNCAP2, valid for one particular junction geometry: such a parameter set would have as many parameters
as the global parameter set, and would be of no use. (Note that, in contrast, the local model for the intrinsic
MOSFET is very useful in, e.g., parameter extraction; this is not the case for JUNCAP2.)
Therefore, the JUNCAP2 model is connected in exactly the same way to both the local and global model levels
of PSP. That means that the resulting PSP local model is valid for a MOSFET with one particular channel width
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PSP 103.2
and length, but with arbitrary junction geometry.

Parameters
Both junctions in the MOSFET are modeled with the same set of JUNCAP2 parameters. In the PSP model, the
geometrical parameters AB, LS, and LG need to be specified for both source and drain. They will be denoted
as ABSOURCE, LSSOURCE, and LGSOURCE for the source junction, and ABDRAIN, LSDRAIN, and
LGDRAIN for the drain junction. For compatibility with BSIM instance parameters, there is also an option
to use AS, AD, PS, and PD. The complete list of instance parameters (PSP and JUNCAP2) can be found in
Sections 2.5.1.
The parameter MULT is merged with the parameter MULT of the intrinsic MOSFET model. In other words,
both intrinsic currents, charges, and noise as well as junction currents, charges and noise are multiplied by
one single parameter MULT. Beside MULT, also the parameters DTA and TYPE are shared by the intrinsic
MOSFET model and the junction model. For clarity, we mention here that the reference temperatures of the
intrinsic MOSFET model and junction model are not merged; they each have their own value and name (TR
and TRJ, respectively). The currents, charges and spectral noise densities of the source and drain junctions are
labeled Ij,S , Qj,S , Sj,S , Ij,D , Qj,D , and Sj,D in Fig. 6.1.
6.5 Verilog-A versus C

As mentioned in Section 1.3, two implementations of the PSP-model are distributed: in Verilog-A language and
in C-language (as part of the SiMKit). The C-version is automatically generated from the Verilog-A version
by a software package called ADMS [1]. This procedure guarantees that the two implementations contain
identical model equations.
Nevertheless, there are a few minor differences between the two, which are due to certain limitations of either
the Verilog-A language or the circuit simulators supported in the SiMKit-framework. These differences are
described below.
6.5.1
Implementation of GMIN
In both implementations, there is an additional term in Eqs. (4.219) and (4.220), resulting in
ID = IDS + Iavl IGDov IGCD + Igidl + Gmin VDS
(6.1)
IS = IDS IGSov IGCS + Igisl Gmin VDS .
(6.2)
and
In the SiMKit, Gmin is a variable which is accessible by the circuit simulator. This allows the circuit simulator
to improve the convergence properties of a circuit by making use of so-called Gmin -stepping.
In the Verilog-A version of PSP, Gmin is set to a fixed value Gmin = 1 1015 S.1
6.5.2
Implementation of parasitic resistances
From PSP 102.2 and PSP 103.0 onwards, a network of parasitic resistors has been inserted around the intrinsic
MOSFET. If the user sets one or more of these resistance values to zero, the associated internal node(s) could
be shorted to one of its neighbors, reducing the size of the matrix in the circuit simulator. This phenomenon is
called node collapse and is supported by most major circuit simulators.
1 If supported by the circuit simulator, Verilog-A version 2.2 allows the value of G
min to be accessed by the circuit simulator. Once
this feature is generally available in Verilog-A compilers, it will be included in PSP as well.
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PSP 103.2
ig
igs
igd
is
id
ids
Figure 6.3: Definition of noise currents.
Flexible topology (and thus node collapse) is presently supported by most Verilog-A compilers. As a result,
node collapse is functional in the official PSP Verilog-A in the majority of todays circuit simulators.
From SiMKit 3.0 onwards, the SiMKit architecture allows for flexible topologies and therefore supports node
collapse in PSP. This functionality is therefore available in circuit simulations with that can work with SiMKit.
Besides, many circuit simulators that have a native implementation of PSP support node collapse.
6.5.3
Implementation of the noise-equations
Definition of noise model

Eqs. (4.250), (4.252), and (4.254) describe the noise power spectral density of the thermal noise. In this section,
the relationship between the quantities Sid , Sig , and Sigid (as calculated in these equations) and noise sources
in the model is defined.
Fig. 6.3 shows a schematic representation of a noiseless transistor (model) and three noise sources. The smallsignal noise currents of these noise current sources are indicated by ids , igs , and igd . The two noise sources
connected to G are fully correlated. Moreover, each of them is partly correlated with the noise source between
S and D. More precisely, the noise powers and correlations associated with these sources are given by
ids ids
igd ids
igs ids
igd igd
igs igd
igs igs
=
=
=
=
=
=
Sid
Sigid /2
Sigid /2
Sig /4
Sig /4
Sig /4
(6.3)
The non-listed elements follow from the fact that this is a complex correlation matrix and therefore self-adjoint.
This defines the noise model of PSP.
For completeness, we will give the noise correlation matrix associated with the terminal currents id , ig and is ,
because it is closer related to the numbers that are obtained in a circuit simulation. Because id = ids igs ,
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PSP 103.2
ig = igs + igd and is = igs ids , we find by straightforward substitution and some basic arithmetic
id id
ig id
is id
ig ig
is ig
is is
=
=
=
=
=
=
Sid + Sig /4 Re(Sigid )

Sigid Sig /2
Sid + Sig /4 Im(Sigid )
Sig
Sigid
Sig /2
Sid + Sig /4 + Re(Sigid )
(6.4)
Verilog-A
In Verilog-A it is not possible to define noise sources that are frequency dependent (except for 1/f -noise), nor
is it possible to directly define correlations between noise sources. Instead, the desired model must be created
by using controlled sources and the frequency transfer of passive elements.2
The goal is to create the three noise sources shown in Fig. 6.3 with the noise powers (including frequency
dependence and correlation) as described by Eq. (6.3).
To simplify notation, we rewrite Eqs. (4.252) and (4.254) as
Sig =
NT
|T |2
mig
(6.5)
and
Sigid =
NT
migid T,
mig
(6.6)
where
T =
j
,
1+j
(6.7)
= mig CGe and is the operating frequency.

Correlation between noise sources in verilog-A can be created by making linear combinations of independent
sources. Therefore, we start with two independent white noise sources with current noise spectral densities S1
and S2 and noise currents i1 and i2 . If we set
igs = igd
ids
1
1 i1
2
= 1 i1 + 2 i2 ,
=
(6.8)
(6.9)
where 1 , 1 , and 2 are certain (complex) coefficients, we get

4 igd igd = |1 |2 i1 i1
Sig
Sid
= |1 |2 S1
= ids ids = |1 |2 i1 i1 + 1 2 i1 i2 + |2 |2 i2 i2
= |1 |2 S1 + |2 |2 S2
Sigid
ids
= 2 igd
= 1
= 1 1 S1 .
i1
i1
+ 1
i1
(6.10)
(6.11)
i2
(6.12)
Here we used that the noise currents i1 and i2 are independent, such that i1 i2 = 0. We need to choose proper
values for the coefficients 1 , 1 and 2 , as well as S1 and S2 , such that Sig , Sid , and Sigid get the correct value.
2 Although this appears to be a limitation, it is in fact very helpful to ensure that the resulting noise model is consistent with time-domain
simulations.
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PSP 103.2
V1
V2
R1
i1
R2
C2
ix
(a)
(b)
Figure 6.4: The two subcircuits used in PSPs Verilog-A implementation to model the correct frequency dependence of induced gate noise and its correlation with the channel thermal noise.
There is some freedom in choosing the numbers; the values that are used in the verilog-A implementation of
PSP are
1
(6.13)
1
2
=
=
migid
1
(6.14)
(6.15)
S1
S2
=
=
N T /mig
2
N T (1 Cigid
) mid ,
(6.16)
(6.17)
where
migid
Cigid =
,
mig mid
(6.18)
and mid , mig , and migid are given by Eqs. (4.249), (4.251), and (4.253), respectively.
To achieve this, we make use of the subcircuits depicted in Fig. 6.4. The first subcircuit (a) contains a parallel
connection of a white noise source with current small-signal noise current i1 and a resistor R1 . The voltage
over the elements is denoted by V1 . The second subcircuit (b) contains a voltage-controlled current source with
current ix , a resistor R2 , and a capacitor C2 . The nodal voltage is denoted by V2 .
The parameters of these components are given by
S1
0
= i1 i1 = Sig
s2f
(6.19)
R1
ix
= 1
= V1 /sf
(6.20)
(6.21)
R2
C2
= mig
= CGe
(6.22)
(6.23)
where the values of CGe is given by Eqs. (4.248) and

0
Sig
=
NT
.
mig
(6.24)
Moreover, we introduce a scaling factor sf = 0 mig CGe with 0 = 1 MHz. Note that the value of sf and
0 do not affect the final result, but help to give the noise power of V1 a reasonable value.
Choosing the elements in this way, creates a frequency dependent current iC through the capacitor C2 given by
iC = T ix .
(6.25)
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PSP 103.2
The two noise sources connected to the gate in Fig. 6.3 are now realized as two current-controlled current
sources with
igd = igs =
1
iC .
2
(6.26)
The third source in Fig. 6.3 (between source and drain) is realized by putting two elements in parallel:
A voltage controlled current source with value (migid /sf ) V1 and
2
A white noise source with current power spectral density S2 = N T (1 Cigid
) mid .
To complete the model, we remark that from Fig. 6.3 it is clear that source-drain interchange only affects the
sign of ids .
In summary, the relevant portion of the verilog-A implementation is given by (mult-scaling and labels are not
included for clarity):
electrical NOI;
electrical NOI2;
branch (NOI) NOII;
branch (NOI) NOIR;
branch (NOI) NOIC;
// subcircuit (a)
I(NOI2)
<+ V(NOI2);
I(NOI2)
<+ white_noise(sqig * sqig * sf * sf);
// subcircuit
I(NOII)
<+
I(NOIR)
<+
I(NOIC)
<+
(b)
-V(NOI2) / sf;
V(NOIR) / mig;
ddt(CGeff * V(NOIC));
// noise sources ids, igs, and igd

I(DI,SI) <+ white_noise(sqid * sqid * (1.0 - c_igid * c_igid));
I(DI,SI) <+ sigVds * migid * V(NOI2) / sf;
I(GP,SI) <+ ddt(0.5 * CGeff * V(NOIC));
I(GP,DI) <+ ddt(0.5 * CGeff * V(NOIC));
It is straightforward to verify that this implementation of PSPs noise model in Verilog-A naturally yields the
desired correlations and frequency dependence. However, it requires two additional internal nodes.
SiMKit C-code
Contrary to the limitation of Verilog-A language, most circuit simulators are able to directly deal with correlated and frequency dependent noisewithout the use of additional internal nodes. In order to minimize
the simulation time of the model, C-implementations should therefore avoid the use of such internal nodes
whenever possible.
In SiMKit, the frequency dependence and correlation of the noise sources indicated in Fig. 6.3 are implemented
directly according to Eq. (6.3). The result is therefore equivalent to the verilog-A implementation.
In summary, even though the SiMKit-implementation of the noise model in PSP is different from that in verilogA (as it does not make use of additional internal nodes) the result of noise noise simulations will be identical.
6.5.4
Clip warnings
From SiMKit 3.7 onwards, it is possible to set the level of clip-warning information through the value of the
parameter PARAMCHK. This functionality is available for most SiMKit models. It is not available in the
verilog-A version of PSP.
If the value of PARAMCHK is
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PSP 103.2
< 0 All clip warnings are suppressed.

0 (default) Clip warnings for instance parameters.
1 Clip warnings for model parameters.
2 Clip warnings for internally computed local parameters during model initialization.
3 Clip warnings for internally computed local parameters during model evaluation.
This works in an accumulative manner: if a higher value of PARAMCHK is used, the warnings associated
with lower levels are still included. Note that the highest level is of interest only for self heating models, where
electrical parameters may change dependent on temperature. Also note that the default value (0) results in less
clip warnings than in earlier versions of the model.
101
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PSP 103.2
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PSP 103.2
Section 7
Parameter extraction
The parameter extraction strategy for PSP consists of four main steps:
1. Measurements
2. Extraction of local parameters at room temperature
3. Extraction of temperature scaling parameters
4. Extraction of geometry scaling (global) parameters
The above steps will be briefly described in the following sections. Note that the description of the extraction
procedure is not complete in the sense that only the most important parameters are discussed and in cases at
hand it may be advantageous (or even necessary) to use an adapted procedure.
Throughout this section, bias and current conditions are given for an n-channel transistor only; for a p-channel
transistor, all voltages and currents should be multiplied by 1.
As explained in the introduction, the hierarchical setup of PSP (local and global level) allows for the twostep parameter extraction procedure described in this section; this is the recommended method of operation.
Nevertheless, it is possible to skip the first steps and start extracting global parameters directly. This procedure
is not described here, but the directions below may still be useful.
7.1 Measurements
The parameter extraction routine consists of six different DC-measurements (two of which are optional) and
two capacitance measurements.1 Measurement V and VI are only used for extraction of gate-current, avalanche,
and GIDL/GISL parameters.
Measurement I (idvg): ID vs. VGS
VGS = 0 . . . Vsup (with steps of maximum 50 mV).
VDS = 25 or 50 mV
VBS = 0 . . . Vsup (3 or more values)
Measurement II (idvgh): ID vs. VGS
VGS = 0 . . . Vsup (with steps of maximum 50 mV).
VDS = Vsup
VBS = 0 . . . Vsup (3 or more values)
1 The bias conditions to be used for the measurements are dependent on the supply voltage of the process. Of course it is advisable to
restrict the range of voltages to this supply voltage Vsup . Otherwise physical effects atypical for normal transistor operationand therefore
less well described by PSPmay dominate the characteristics.
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PSP 103.2
Measurement III (idvd): ID vs. VDS

VGS = 0 . . . Vsup (3 or more values)
VDS = 0 . . . Vsup (with steps of maximum 50 mV).
VBS = 0 V
Measurement IV (idvdh, optional):ID vs. VDS
VGS = 0 . . . Vsup (3 or more values)
VDS = 0 . . . Vsup (with steps of maximum 50 mV).
VBS = Vsup
Measurement V (igvg): IG and IB vs. VGS
VGS = Vsup . . . Vsup (with steps of maximum 50 mV).
VDS = 0 . . . Vsup (3 or more values)
VBS = 0 V
Measurement VI (igvgh, optional): IG and IB vs. VGS
VDS = 0 . . . Vsup (3 or more values)
VBS = Vsup
Measurement VII (cggvg): CGG vs. VGS
VDS = 0 V
VBS = 0 V
Measurement VIII (ccgvg): CCG vs. VGS
VDS = 0 V
VBS = 0 V
For the extraction procedure, the transconductance gm (for Measurement I and II) and the output conductance gDS (for Measurement III and IV) are obtained by numerical differentiation of the measured I-V -curves.
Furthermore, Imin is the smallest current which can reliably measured by the system (noise limit) and IT is
defined as 10% of the largest measured value of |ID | in Measurement I. The latter will be used to make a rough
distinction between the subthreshold and superthreshold region.
The channel-to-gate capacitance CCG in Measurement VIII is the summation of the drain-to-gate capacitance CDG and the source-to-gate capacitance CSG (i.e., source and drain are short-circuited); it is needed
to extract overlap capacitance parameters.
The local parameter extraction measurements I through VI have to be performed at room temperature for every
device. In addition, capacitance measurements VII and VIII need to be performed for at least a long/wide and
a short/wide (i.e., L = Lmin ) transistor (at room temperature). Furthermore, for the extraction of temperature
scaling parameters measurements I, III, and V have to be performed at different temperatures (at least two extra,
typically 40 C and 125 C) for at least a long wide and a short wide transistor.
7.2 Extraction of local parameters at room temperature

General remarks
The simultaneous determination of all local parameters for a specific device is not advisable, because the value
of some parameters can be wrong due to correlation and suboptimization. Therefore it is more practical to
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Unclassified
PSP 103.2
split the parameters into several small groups, where each parameter group can be determined using specific
measurements. In this section, such a procedure will be outlined.
The extraction of local parameters is performed for every device. In order to ensure that the temperature scaling
relations do not affect the behavior at room temperature, the reference temperature TR should be set equal to
room temperature.
Before starting the parameter extraction procedure, one should make sure that SWIGATE, SWIMPACT,
SWGIDL, SWJUNCAP, and TYPE are set to the desired value. Moreover, QMC should be set to 1, in order
to include quantum mechanical corrections in the simulations.
It is not the case that all local parameters are extracted for every device. Several parameters are only extracted
for one or a few devices, while they are kept fixed for all other devices. Moreover, a number of parameters
can generally be kept fixed at their default values and need only occasionally be used for fine-tuning in the
optimization procedure. Details are given later in this section.
As a special case, it is generally not necessary to extract values for AX. In stead, they can be calculated from
Eq. (3.63), using AXO 18 and AXL 0.25. It may be necessary to tune the latter value such that the value
of AX is between 2 and 3 for the shortest channel in the technology under study.
It is recommended to start the extraction procedure with the long(est) wide(st) device, then the shortest device
with the same width, followed by all remaining devices of the same width in order of decreasing length. Then
the next widest-channel devices are extracted, where the various lengths are handled in the same order. In this
way, one works ones way down to the narrowest channel devices.
AC-parameters
Some parameters (such as TOX and NP) that do affect the DC-behavior of a MOSFET can only be extracted
accurately from C-V -measurements.2 This should be done before the actual parameter extraction from DCmeasurements is started. In Tables 7.1 and 7.2 the extraction procedure for the AC-parameters is given.
Table 7.1: AC-parameter extraction procedure for a long channel MOSFET.
Step
Optimized parameters
Fitted on
Abs./Rel.
Conditions
1
2
VFB,NEFF, DPHIB, NP, COX

Repeat Step 1
VII: CGG
Relative
Table 7.2: AC-parameter extraction procedure for a short channel MOSFET. The values of VFB and NP are taken from the long-channel case.
Step
Fitted on
Abs./Rel.
Conditions
1
2
3
NEFF, DPHIB, COX

CGOV, NOV
Repeat Steps 1 and 2
VII: CGG
VIII: CCG
Relative
Relative
VGS < 0
Starting from the default parameter set and setting TOX to a reasonable value (as known from technology),
VFB, NEFF, DPHIB, COX, and NP can be extracted from CGG in Measurement VII for a long, wide device.
Next, NOV and CGOV can be extracted from CCG in Measurement VIII for a short, wide device (see also
Table 7.1), where VFB and NP are taken from the long channel case. In general, one can assume TOXOV =
TOX.
The value of TOX can be determined from COX = ox L W/TOX. If the device is sufficiently long and
wide, drawn length and width can be used in this formula. Even better, if Measurement VII is available for a
2 Although parameter NOV can be determined from overlap gate current, it is nonetheless more accurately determined from Measurement VIII.
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PSP 103.2
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few short/wide devices of different lengths, one can extract TOX and L from a series of extracted values of
COX vs. Ldraw .
Some remarks:
If C-V -measurements are not available, one could revert to values known from the fabrication process.
Note that TOX and TOXOV are physical oxide thicknesses; poly-depletion and quantum-mechanical
effects are taken care of by the model. If the gate dielectric is not pure SiO2 , one should manually
compensate for the deviating dielectric constant.
In general, VFB and NP can be assumed independent of channel length and width (so, the long/widechannel values can be used for all other devices as well). Only if no satisfactory fits are obtained,
one could allow for a length dependence (for NP) or length and width dependence (for VFB). Then,
one should proceed by extracting VFB and/or NP from capacitance measurements for various channel
geometries, fit Eq. (3.12) / Eq. (3.32) to the result and use interpolated values in the DC parameter
extraction procedure.
The value of parameter TOX profoundly influences both the DC- and AC-behavior of the PSP-model and
thus the values of many other parameters. It is therefore very important that this parameter is determined
(as described above) and fixed before the rest of the extraction procedure is started.
If desired (e.g., for RF-characterization), parameters for several parasitic capacitances (gate-bulk overlap, fringe
capacitance, etc.) can be extracted as well (CGBOV and CFR). However, this requires additional capacitance
measurements.
The obtained values of VFB, TOX, TOXOV, NP, and NOV can now be used in the DC-parameter extraction
procedure. The above values of NEFF and DPHIB can be disregarded; they will be determined more accurately
from the DC-measurements.
In devices with strong lateral non-uniform doping, the threshold voltage in AC-measurements may deviate
significantly from that in DC-measurements. If that is the case, values for NEFF and DPHIB obtained from
DC-measurements may not be satisfactory to describe AC-measurements. Then, one has the option to set
SWDELVTAC = 1, DELVTAC = DPHIBac DPHIBdc , and FACNEFFAC = NEFFac /NEFFdc to get a
good description of both the DC and the AC measurements.
DC-parameters
Before the optimization is started a reasonably good starting value has to be determined, both for the parameters
to be extracted and for the parameters which remain constant. For most parameters to be extracted for a
long channel device, the default values from local parameters in Section 2.5.2 can be taken as initial values.
Exceptions are given in Table 7.3. Starting from these values, the optimization procedure following the scheme
below is performed. This method yields a proper set of parameters after the repetition indicated as the final
step in the scheme. Experiments with transistors of several processes show that repeating those steps more than
once is generally not necessary.
For an accurate extraction of parameter values, the parameter set for a long-channel transistor has to be determined first. In the long-channel case most of the mobility related parameters (i.e. MUE and THEMU) and
the gate tunneling parameters (GCO, GC2, and GC3) are determined and subsequently fixed for the shorterchannel devices.
In Table 7.4 the complete DC extraction procedure for long-channel transistors is given. The magnitude of
the simulated ID and the overall shape of the simulated ID -VGS -curve is roughly set in Step 1. Next the
parameters NEFF, DPHIB, and CTwhich are important for the subthreshold behaviorare optimized in
Step 2, neglecting short-channel effects such as drain-induced barrier-lowering (DIBL). After that, the mobility
parameters are optimized in Step 3, neglecting the influence of series-resistance. In Step 4 a preliminary value
of the velocity saturation parameter is obtained, and subsequently the conductance parameters ALP, ALP1,
ALP2, and VP are determined in Step 5. A more accurate value of THESAT can now be obtained using Step
6. The gate current parameters are determined in Steps 7 and 8, where it should be noted that GCO should
only be extracted if the influence of gate-to-bulk tunneling is visible in the measurements. This is usually the
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PSP 103.2
Table 7.3: Initial values for local parameter extraction for a long-channel device. For
parameters which are not listed in this table, the default value (as given in
Section 2.5.2) can be used as initial value.
Parameter
Initial value
BETN
RS
THESAT
AX
A1
0.03 W/L
0
0.1
12
0
Table 7.4: DC-parameter extraction procedure for a long-channel MOSFET. The parameters VFB, TOX, TOXOV, NP, and NOV must be taken from C-V measurements. The optimization is either performed on the absolute or relative deviation between model and measurements, as shown in the table.
Step
Fitted on
Abs./Rel.
Conditions
1
2
3
4
5
6
7
8
9
10
11
12
13
NEFF, BETN, MUE, THEMUa

NEFF, DPHIB, CT, GFACNUD
MUE, THEMUa , CS, XCOR, BETN
THESAT
ALP, ALP1, ALP2, VPa , (AX)
THESAT
IGINV, GC2a , GC3a
IGOV, (GCOa )
A1, A2a , A3
A4
AGIDL, BGIDLa
CGIDLa
Repeat Steps 2 12
I: ID
I: ID
I: ID , gm
III: ID
III: gDS
II: ID
V: IG
V: IG
V: IB
VI: IB
V: IB
VI: IB
Absolute
Relative
Absolute
Absolute
Relative
Absolute
Relative
Relative
Relative
Relative
Relative
Relative
Imin < ID < IT
IG > Imin
VGS < 0 V, IG < Imin
VGS > 0 V, IB < Imin
VGS < 0 V, IB < Imin
a Only
extracted for the widest long channel device and fixed for all other geometries.
case if Vsup & |VFB|. This is followed by the weak-avalanche parameters in Step 9 and (optionally) 10, and
finally, the gate-induced leakage current parameters are optimized in Step 11 and (optionally) 12.
After completion of the extraction for the long-channel device, it is recommended to first extract parameters
for the shortest-channel device (of the same width). The mobility-reduction parameters (MUE, THEMU) and
the gate tunneling probability factors (GCO, GC2, GC3) found from the corresponding long-channel device
should be used. The extraction procedure as given in Table 7.5 should be used.
Once the value for RS has been found from the shortest device, it should be copied into the long-channel
parameter set and steps 23 (Table 7.4) should be repeated, possibly leading to some readjustment of MUE
and THEMU. If necessary, this procedure must be repeated. Similarlyonce the value of THESATG and
THESATB have been determined from the shortest widest channel devicesteps 4, 5, and 6 of the longchannel extraction procedure (Table 7.4) must be repeated to obtain updated values for THESAT, ALP, ALP1,
and ALP2.
If consistent parametersets have been found for the longest and shortest channel device, the extraction procedure
107
Unclassified
PSP 103.2
Table 7.5: DC-parameter extraction procedure for a short-channel MOSFET. Parameters MUE, THEMU, VP, GCO, GC2, GC3, A2, A4, BGIDL, and CGIDL
are taken from the corresponding long-channel case. The optimization is
either performed on the absolute or relative deviation between model and
measurements, as indicated in the table.
Step
Fitted on
Abs./Rel.
Conditions
1
2
NEFF, DPHIB, BETN, RSa

NEFF, DPHIB, CT, GFACNUD, VSBNUDb , DVSBNUDb
BETN, RSa , XCOR
THESAT
ALP, ALP1, ALP2, CF, (AX)
CFBb
THESAT, THESATGb , THESATBb
IGINV, IGOV
A1, A3
AGIDL
Repeat Steps 2 10
I: ID
I: ID
Absolute
Relative
Imin < ID < IT
I: ID , gm
III: ID
III: gDS
IV: gDS
II: ID , gm
V: IG
V: IB
V: IB
Absolute
Absolute
Relative
Relative
Absolute
Relative
Relative
Relative
|IG | > Imin

3
4
5
6
7
8
9
10
11
a Only
b Only
extracted for the shortest channel of each width and fixed for all other geometries.
extracted for the shortest widest device and fixed for all other geometries.
as given in Table 7.5 can be executed for all intermediate channel lengths. The extracted parameter values of
the next-longer device can be used as initial values.
Finally, the parameters GFACNUD, VSBNUD, and DVSBNUD should only be used if the description of the
body effect is not satisfactory otherwise. For this, the NUD-model must be invoked by setting SWNUD = 1.
7.3 Extraction of Temperature Scaling Parameters

For a specific device, the temperature scaling parameters can be extracted after determination of the local
parameters at room temperature. In order to do so, measurements I, II and IV need to be performed at various
temperature values (at least two values different from room temperature, typically 40 C and 125 C), at least
for a long wide device and a short wide device. If the reference temperature TR has been chosen equal to room
temperature (as recommended in Section 7.2), the modeled behavior at room temperature is insensitive to the
value of the temperature scaling parameters. As a first-order estimate of the temperature scaling parameter
values, the default values as given by local parameters in Section 2.5.2 can be used. Again the parameter
extraction scheme is slightly different for the long-channel and for the short-channel case.
For an accurate extraction, the temperature scaling parameters for a long-wide-channel device have to be determined first. In the long-wide-channel case the carrier mobility parameters can be determined, and they are
subsequently fixed for all other devices. In Table 7.6 the appropriate extraction procedure is given. In Step
1 the subthreshold temperature dependence is optimized, followed by the optimization of mobility reduction
parameters in Step 2. Next the temperature dependence of velocity saturation is optimized in Step 3. In the
subsequent steps, parameters for the temperature dependence of the gate current, the impact ionization current
and gate-induced drain leakage are determined. The determined values of the mobility reduction temperature
scaling parameters (i.e., STMUE, STTHEMU, STCS, and STXCOR) are copied to all other devices and kept
fixed during the remainder of the temperature-scaling parameter extraction procedure. Step 1 and 2 could then
be performed on one or more long narrow devices as well (for STVFB, STBETN, and STTHESAT only).
Next the extraction procedure as given in Table 7.7 is carried out for several short devices of different widths.
Preferably, the extraction is done first for a short narrow device, such that the determined value of STRS can
108
Unclassified
PSP 103.2
Table 7.6: Temperature scaling parameter extraction procedure for a long wide channel MOSFET. This scheme only makes sense if measurements have been
performed at one or (preferably) more temperatures which differ from room
temperature.
Step
Fitted on
Abs./Rel.
Conditions
1
2
STVFBa
STBETNa , STMUE, STTHEMU,
STCS, STXCOR
STTHESATa
STIG
STA2
STBGIDL
I: ID
I: ID
Relative
Absolute
ID < I T
II: ID
V: IG
V: IB
V: IB
Absolute
Relative
Relative
Relative
|IG | > Imin

3
4
5
6
a Also
extracted for one or more long narrow devices.
Table 7.7: Temperature scaling parameter extraction procedure for short-channel

MOSFETs (both wide and narrow). This scheme only makes sense if measurements have been performed at one or (preferably) more temperatures
which differ from room temperature.
a Only
Step
Fitted on
Abs./Rel.
Conditions
1
2
3
STVFB
STBETN, STRSa
STTHESAT
I: ID
I: ID
II: ID
Relative
Absolute
Absolute
VGS < VT
VGS > VT
extracted for a short narrow device and fixed for all other geometries.
be used during the extraction of the wider devices.
7.4 Extraction of Geometry Scaling Parameters

The aim of the complete extraction procedure is the determination of the geometry scaling parameters (global
parameters), i.e., a single set of parameters (see Section 2.5.2) which gives a good description of the MOSFETbehavior over the full geometry range of a CMOS technology.
Determination of L and W
An extremely important part of the geometry scaling extraction scheme is an accurate determination of L
and W , see Eqs. (3.6) and (3.7).3 Since it affects the DC-, the AC- as well as the noise model and, moreover,
it can heavily influence the quality of the resulting global parameter set, it is very important that this step is
carried out with care.
Traditionally, W can be determined from the extrapolated zero-crossing in BETN versus mask width W . In
a similar way L can be determined from 1/BETN versus mask length L. For modern MOS devices with
pocket implants, however, it has been found that the above L extraction method is no longer valid [11, 12].
Another, more accurate method is to measure the gate-to-bulk capacitance CGB in accumulation for different
channel lengths [12, 13]. In this case the extrapolated zero-crossing in the CGB versus mask length L curve will
3 Note that L
PS and WOD are expected to be known from the fabrication process. So, in fact, only LAP and WOT are extracted
from the electrical measurements.
109
Unclassified
PSP 103.2
give L. Similarly, the extracted values for COX (from the procedure in Table 7.1 and 7.2) vs. mask length L
may be used for this purpose. Unfortunately for CMOS technologies in which gate current is non-negligible,
capacitance measurements may be hampered by gate current [14]. In this case gate current parameter IGINV
plotted as a function of channel length L may be used to extract L [14]. If possible, L extraction from
C-V -measurements is the preferred method.
Finally, LOV can be obtained from (a series of) extracted values of CGOV from one or more short devices.
From local to global
First of all, the global parameters TYPE, QMC, and the switch-parameters should be set to the appropriate
value. Next, parameters for which no geometrical scaling rules exist must be taken directly from the local set
(this applies to TR, TOXO, VNSUBO, NSLPO, DNSUBO, TOXOVO, NOVO, CFBO, STMUEO, THEMUO, STTHEMUO, STCSO, STXCORO, FETAO, STRSO, RSBO, RSGO, THESATBO, THESATGO,
VPO, A2O, STA2O, GCOO, STIGO, GC2O, GC3O, CHIBO, BGIDLO, STBGIDLO, CGIDLO, and
DTA). Generally, these parameters have been left at their default values or they have been extracted for one device only and subsequently fixed for all other devices. The parameters LVARO, LVARL, LVARW, WVARO,
WVARL, and WVARW should be known from technology.
Once the values of L and W are firmly established (as described above), LAP and WOT can be set and the
actual extraction procedure of the geometry scaling parameters can be started. It consists of several independent
sub-steps (which can be carried out in random order), one for each geometry dependent local parameter.
To illustrate such a sub-step, the local parameter CT is taken as an example. The relevant geometry scaling
equation from Section 3.2 is Eq. (3.33), from which it can be seen that CTO, CTL, CTLEXP, and CTW are
the global parameters which determine the value of CT as a function of L and W . First, the extracted CT of
each device in a length-series of measured (preferably wide) devices are considered as a function of L. In this
context CTO, CTL, and CTLEXP are optimized such that the fit of Eq. (3.33) to the extracted CT-values is
as good as possible, while keeping CTW fixed at 0. Then CTW is determined by considering the extracted
CT-values from a length-series of measured narrow devices. Finally, the four global parameters may be finetuned by optimizing all four parameters to all extracted CT-values simultaneously. The default values given in
Section 2.5.2 are good initial values for the optimization procedure.
All other parameters can be extracted in a similar manner. The local parameters BETN and NEFF have quite
complicated scaling rules, particularly due to the non-uniform doping profiles employed in modern CMOS
technologies. Therefore, a few additional guidelines are in place.
def
The optimization procedure for BETN is facilitated if not BETN, but BETNsq = BETN LE /WE is
considered.
Starting from the default values, first UO, FBET1, LP1, FBET2, and LP2 should be determined from a
length-series of wide devices. Then BETW1, BETW2, and WBET should be determined from a widthseries of long devices. Finally, FBET1W and LP1W can be found by considering some short narrow
devices.
Starting from the default values, first extract FOL1, FOL2, NSUBO, NPCK, and LPCK from a lengthseries of wide devices. Here, NSUBO determines the long-channel value of NEFF. Moreover, NPCK
and LPCK determine the increase of NEFF for shorter channels (reverse short channel effect), while
FOL1 and FOL2 are used to describe the decrease of NEFF for very short channels (short channel
effect).
Then NSUBW and WSEG can be determined form a width-series of long devices. Finally, NPCKW,
LPCKW and WEGP are determined from a width-series of short devices.
Especially for BETN and NEFF it is advisableafter completing the procedure described aboveto fine
tune the global parameters found by considering all extracted values of BETN (or NEFF) simultaneously.
Note that in many cases it may not be necessary to use the full flexibility of PSPs parameter scaling, e.g.,
for many technologies NP and VFB may be considered as independent of geometry. If such a geometry110
Unclassified
PSP 103.2
independence is anticipated, the corresponding local parameter should be fixed during local parameter extraction. Only if the resulting global parameter set is not satisfactory, the parameter should be allowed to vary
during a subsequent optimization round.
Fine tuning
Once the complete set of global parameters is found, the global model should give an accurate description of
the measured I-V -curves and capacitance measurements. Either for fine tuning or to facilitate the extraction
of global parameters for which the geometry scaling of the corresponding extracted local parameters is not
well-behaved, there are two more things that can be done.
Local parameters for which the fitting of global parameters was completed satisfactorily could be replaced by the values calculated from the geometrical scaling rules and fixed. Then one could redo (parts
of) the local parameter extraction procedure for the remaining local parameters, making them less sensitive for cross-correlations.
Small groups of global parameters may be fitted directly to the measurements of a well-chosen series of
devices, using the global model.
7.5 Summary Geometrical scaling

Summarizing, for the determination of a full parameter set, the following procedure is recommended.
1. Determine local parameter sets (VFB, NEFF, . . .) for all measured devices, as explained in Section 7.2
and 7.3.
2. Find L and W .
3. Determine the global parameters by fitting the appropriate geometry scaling rules to the extracted local
parameters.
4. Finally, the resulting global can be fine-tuned, by fitting the result of the scaling rules and current equations to the measured currents of all devices simultaneously.
7.6 Extraction of Binning Parameters

In this section, expressions will be given for the parameters in the binning scaling rules, POYYY, PLYYY,
PWYYY, and PLWYYY, as given in Section 3.3. These coefficients will be expressed in terms of parameter
values at the corners of bin (see Fig. 7.1). These expressions can be easily found by substituting the parameter
values at the bin corners into the binning scaling rules and inverting the resulting four equations. Note once
more that this results in a separate parameter set for each bin.
In the expression below, the value of parameter YYY at bin corner (Li , Wj ) is denoted by Yij (i = 1, 2,
j = 1, 2). Moreover, L = L2 L1 , W = W2 W1 , A = 1/(L W ).
1. Coefficients for type I scaling
POYYY = A (L1 W1 Y11 L1 W2 Y12 L2 W1 Y21 + L2 W2 Y22 )
PLYYY = A
(7.1)
L1 L2
(W1 Y11 + W2 Y12 + W1 Y21 W2 Y22 )
LEN
(7.2)
W1 W2
(L1 Y11 + L1 Y12 + L2 Y21 L2 Y22 )
WEN
(7.3)
PWYYY = A
PLWYYY = A
L1 L2 W1 W2
(Y11 Y12 Y21 + Y22 )
LEN WEN
(7.4)
111
Unclassified
PSP 103.2
W
L2
L
bin
L1
W2
W1
W
Figure 7.1: Schematic view of a bin, showing the coordinates of the four corners. Note that L1 , L2 , W1 , and
W2 denote the effective length and width (LE and WE ) at the bin corners.
2. Coefficients for type II scaling
POYYY = A (L2 W2 Y11 L2 W1 Y12 L1 W2 Y21 + L1 W1 Y22 )
(7.5)
PLYYY = A LEN (W2 Y11 + W1 Y12 + W2 Y21 W1 Y22 )
(7.6)
PWYYY = A WEN (L2 Y11 + L2 Y12 + L1 Y21 L1 Y22 )
(7.7)
PLWYYY = A LEN WEN (Y11 Y12 Y21 + Y22 )
(7.8)
3. Coefficients for type III scaling

POYYY = A (L1 W2 Y11 + L1 W1 Y12 + L2 W2 Y21 L2 W1 Y22 )
PLYYY = A
L1 L2
(W2 Y11 W1 Y12 W2 Y21 + W1 Y22 )
LEN
PWYYY = A WEN (L1 Y11 L1 Y12 L2 Y21 + L2 Y22 )

PLWYYY = A
L1 L2 WEN
(Y11 + Y12 + Y21 Y22 )
LEN
(7.9)
(7.10)
(7.11)
(7.12)
Note: For L1 , L2 , W1 , and W2 in the formulas above one must take the effective length and width (LE and
WE ) as defined in Section 3.2.
7.6.1
Binning of BETN
From PSP 103.0 onwards, the binning rule of BETN is changed to better match its typical scaling behavior.
Extract the parameters POBETN, PLBETN, PWBETN, and PLWBETN for type I binning by applying
Eq. (7.1)-(7.4) to (LE /WE ) BETN (i.e., not to BETN itself).
112
Unclassified
PSP 103.2
Section 8
DC Operating Point Output

The DC operating point output facility gives information on the state of a device at its operation point. Beside
terminal currents and voltages, the magnitudes of linearized internal elements are given. In some cases meaningful quantities can be derived which are then also given (e.g., fT ). The objective of the DC operating point
facility is twofold:
Calculate small-signal equivalent circuit element values
Open a window on the internal bias conditions of the device and its basic capabilities.
All accessible quantities are described in the table below. The symbols in the value column are defined in
Section 4. Besides, the following notation is used: PD = 1 + kp G/4, where kp is defined in Eq. (4.23).
Important note: For all operating point output the signs are such as if the device is an NMOS. Moreover,
whenever there is a reference to the drain, this is always the terminal which is acting as drain for the actual
bias conditions. This is even true for variables such as vds (which is therefore always nonnegative) and the
junction-related variables. The output variable sdint shows whether or not this drain is the same as the
terminal which was named drain in the simulator.
No.
Name
Unit
0
1
ctype
sdint
Value
Description
1 for NMOS, 1 for PMOS
1 if VDS
0, 1 otherwise
Flag for channel-type

Flag for source-drain interchange
Current components
2
3
4
5
6
ise
ige
ide
ibe
ids
A
A
A
A
A
IS IJS
IG
ID IJD
IB + IJS + IJD
IDS
7
8
9
10
11
12
idb
isb
igs
igd
igb
igcs
A
A
A
A
A
A
Iavl + Igidl IJD

Igisl IJS
IGCS + IGSov
IGCD + IGDov
IGB
IGCS
Total source current

Total gate current
Total drain current
Total bulk current
Drain current, excl. avalanche and
tunnel currents
Drain-to-bulk current
Source-to-bulk current
Gate-source tunneling current
Gate-drain tunneling current
Gate-bulk tunneling current
Gate-channel tunneling current
(source component)
113
Unclassified
PSP 103.2
No.
Name
Unit
Value
Description
Gate-channel tunneling current
(drain component)
Substrate current due to weakavalanche
Gate-induced source leakage current
Gate-induced drain leakage current
13
igcd
IGCD
14
iavl
Iavl
15
igisl
Igisl
16
igidl
Igidl
Junction currents
17
18
ijs
ijsbot
A
A
IJS
IJS,bot
19
ijsgat
IJS,gat
20
ijssti
IJS,sti
21
22
ijd
ijdbot
A
A
IJD
IJD,bot
23
ijdgat
IJD,gat
24
ijdsti
IJD,sti
Total source junction current

Source junction current, bottom
component
Source junction current, gate-edge
component
Source junction current, STI-edge
component
Total drain junction current
Drain junction current, bottom
component
Drain junction current, gate-edge
component
Drain junction current, STI-edge
component
Voltages
25
26
27
28
vds
vgs
vsb
vto
V
V
V
V
VDS
VGS
VSB
VFB + PD (B + 2 *T ) + G
Drain-source voltage
Gate-source voltage
Source-bulk voltage
Zero-bias threshold voltage
*T (B + 2 *T )
29
vts
*
nud
nud
VFB+P
D (VSB +B +2T )VSB +
nud + + 2 * )
G *T (VSB
B
T
Threshold voltage including backbias effects
30
vth
vts VG
31
vgt
vgs vth
32
vdss
Vdsat
33
vsat
VDS Vdsat
Threshold voltage including backbias and drain-bias effects

Effective gate drive voltage including drain- and back-bias effects
Drain saturation voltage at actual
bias
Saturation limit
(Trans-)conductances
34
35
36
37
gm
gmb
gds
gjs
A/V
A/V
A/V
A/V
ide/VGS
ide/VSB
ide/VDS
ijs/VSB
Transconductance
Substrate-transconductance
Output conductance
Source junction conductance
114
Unclassified
PSP 103.2
No.
38
Name
Unit
Value
Description
gjd
A/V
(ijd/VDS + ijd/VSB )
Drain junction conductance
Capacitances
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
cdd
cdg
cds
cdb
cgd
cgg
cgs
cgb
csd
csg
css
csb
cbd
cbg
cbs
cbb
cgsol
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
(i)
QD /VDS
(i)
QD /VGS
56
cgdol
(Qdov + Qofd )/VDS
cdd cdg cdb

(i)
QD /VSB
(i)
QG /VDS
(i)
QG /VGS
cgg cgd cgb
(i)
QG /VSB
(i)
QS /VDS
(i)
QS /VGS
csg + csd + csb
(i)
QS /VSB
(i)
QB /VDS
(i)
QB /VGS
cbb cbd cbg
(i)
QB /VSB
(Qsov + Qofs )/VGS
Drain capacitance
Drain-gate capacitance
Drain-source capacitance
Drain-bulk capacitance
Gate-drain capacitance
Gate capacitance
Gate-source capacitance
Gate-bulk capacitance
Source-drain capacitance
Source-gate capacitance
Source capacitance
Source-bulk capacitance
Bulk-drain capacitance
Bulk-gate capacitance
Bulk-source capacitance
Bulk capacitance
Total gate-source overlap capacitance
Total gate-drain overlap capacitance
Junction capacitances
57
58
cjs
cjsbot
F
F
CJS
CJS,bot
59
cjsgat
CJS,gat
60
cjssti
CJS,sti
61
62
cjd
cjdbot
F
F
CJD
CJD,bot
63
cjdgat
CJD,gat
64
cjdsti
CJD,sti
Total source junction capacitance

Source junction capacitance, bottom component
Source junction capacitance, gateedge component
Source junction capacitance, STIedge component
Total drain junction capacitance
Drain junction capacitance, bottom
component
Drain junction capacitance, gateedge component
Drain junction capacitance, STIedge component
Miscellaneous
65
weff
WE
66
leff
LE
67
gm/gds
Effective channel width for geometrical models

Effective channel length for geometrical models
Transistor gain
115
Unclassified
PSP 103.2
No.
Name
Unit
Value
Description
68
69
70
71
72
rout
vearly
beff
fug
rg
V
A/V2
Hz
1/gds
|ide|/gds
2 |ide|/vgt2
gm/[2 (cgg + cgsol + cgdol)]
RG
Small-signal output resistance

Equivalent Early voltage
Gain factor
Unity gain frequency at actual bias
Gate resistance
Noise
73
sfl
A2 /Hz
S (1 Hz)
74
sqrtsff
V/ Hz
S (1 kHz)/gm
75
sqrtsfw
V/ Hz
Sid /gm
76
sid
A2 /Hz
Sid
77
sig
A2 /Hz
Sig (1 kHz)
78
cigid
migid
mig mid
79
fknee
Hz
80
sigs
A2 /Hz
Sigs
81
sigd
A2 /Hz
Sigd
82
siavl
A2 /Hz
Savl
83
ssi
A2 /Hz
SS,I
84
sdi
A2 /Hz
SD,I
Flicker noise current spectral density at 1 Hz

Input-referred RMS white noise
voltage spectral density at 1 kHz
Input-referred RMS white noise
voltage spectral density
Channel thermal noise current spectral density
Induced gate noise current spectral
density at 1 kHz
Imaginary part of correlation coefficient between Sig and Sid
Cross-over frequency above which
white noise is dominant
Gate-source current noise spectral
density
Gate-drain current noise spectral
density
Impact ionization current noise
spectral density
Total source junction current noise
spectral density
Total drain junction current noise
spectral density
1Hz S (1Hz)/Sid
Self heating
85
86
87
116
tk
pdiss
dtsh
K
W
K
TKD
Pdiss
TKD TKA
Device temperature
Power dissipation
Temperature rise due to self heating
Unclassified
PSP 103.2
From PSP 103.0 onwards, the values of local parameters are provided in the operating point output. They are
listed in the table below.
No.
Name
Unit
Description
Process Parameters
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
lp_vfb
lp_stvfb
lp_tox
lp_epsrox
lp_neff
lp_facneffac
lp_gfacnud
lp_vsbnud
lp_dvsbnud
lp_vnsub
lp_nslp
lp_dnsub
lp_dphib
lp_delvtac
lp_np
lp_ct
lp_toxov
lp_toxovd
lp_nov
lp_novd
V
V/K
m
m3
V
V
V
V
V1
V
V
m3
m
m
m3
m3
Local parameter VFB after T-scaling and clipping

Local parameter STVFB after clipping
Local parameter TOX after clipping
Local parameter EPSROX after clipping
Local parameter NEFF after clipping
Local parameter FACNEFFAC after clipping
Local parameter GFACNUD after clipping
Local parameter VSBNUD after clipping
Local parameter DVSBNUD after clipping
Local parameter VNSUB after clipping
Local parameter NSLP after clipping
Local parameter DNSUB after clipping
Local parameter DPHIB after clipping
Local parameter DELVTAC after clipping
Local parameter NP after clipping
Local parameter CT after clipping
Local parameter TOXOV after clipping
Local parameter TOXOVD after clipping
Local parameter NOV after clipping
Local parameter NOVD after clipping
DIBL Parameters
20
21
lp_cf
lp_cfb
V1
Local parameter CF after clipping

Local parameter CFB after clipping
Mobility Parameters
22
23
24
25
26
27
28
29
30
31
32
lp_betn
lp_stbet
lp_mue
lp_stmue
lp_themu
lp_stthemu
lp_cs
lp_stcs
lp_xcor
lp_stxcor
lp_feta
m /V/s
m/V
V1
Local parameter BETN after T-scaling and clipping

Local parameter STBET after clipping
Local parameter MUE after T-scaling and clipping
Local parameter STMUE after clipping
Local parameter THEMU after T-scaling and clipping
Local parameter STTHEMU after clipping
Local parameter CS after T-scaling and clipping
Local parameter STCS after clipping
Local parameter XCOR after T-scaling and clipping
Local parameter STXCOR after clipping
Local parameter FETA after clipping

33
34
lp_rs
lp_strs
Local parameter RS after T-scaling and clipping

Local parameter STRS after clipping
117
Unclassified
PSP 103.2
No.
Name
Unit
Description
35
36
lp_rsb
lp_rsg
V1
V1
Local parameter RSB after clipping

Local parameter RSG after clipping

37
38
39
40
lp_thesat
lp_stthesat
lp_thesatb
lp_thesatg
V1
V1
V1
Local parameter THESAT after T-scaling and clipping

Local parameter STTHESAT after clipping
Local parameter THESATB after clipping
Local parameter THESATG after clipping
Saturation Voltage Parameters

41
lp_ax
Local parameter AX after clipping

42
43
44
45
lp_alp
lp_alp1
lp_alp2
lp_vp
V
V1
V
Local parameter ALP after clipping

Local parameter ALP1 after clipping
Local parameter ALP2 after clipping
Local parameter VP after clipping

46
47
48
49
50
lp_a1
lp_a2
lp_sta2
lp_a3
lp_a4
1/ V
Local parameter A1 after clipping

Local parameter A2 after T-scaling and clipping
Local parameter STA2 after clipping
51
52
53
54
55
56
57
58
lp_gco
lp_iginv
lp_igov
lp_igovd
lp_stig
lp_gc2
lp_gc3
lp_chib
A
A
A
Local parameter GCO after clipping

Local parameter IGINV after T-scaling and clipping
Local parameter IGOV after T-scaling and clipping
Local parameter IGOVD after T-scaling and clipping
Local parameter STIG after clipping
Local parameter GC2 after clipping
Local parameter GC3 after clipping
Local parameter CHIB after clipping
Gate-Induced Drain Leakage Parameters

59
60
61
62
63
64
65
66
lp_agidl
lp_agidld
lp_bgidl
lp_bgidld
lp_stbgidl
lp_stbgidld
lp_cgidl
lp_cgidld
A/V3
A/V3
V
V
V/K
V/K
Local parameter AGIDL after clipping

Local parameter AGIDLD after clipping
Local parameter BGIDL after T-scaling and clipping
Local parameter BGIDLD after T-scaling and clipping
Local parameter STBGIDL after clipping
Local parameter STBGIDLD after clipping
Local parameter CGIDL after clipping
Local parameter CGIDLD after clipping
118
Unclassified
PSP 103.2
No.
Name
Unit
Description
67
68
69
70
71
72
lp_cox
lp_cgov
lp_cgovd
lp_cgbov
lp_cfr
lp_cfrd
F
F
F
F
F
F
Local parameter COX after clipping

Local parameter CGOV after clipping
Local parameter CGOVD after clipping
Local parameter CGBOV after clipping
Local parameter CFR after clipping
Local parameter CFRD after clipping
73
74
75
76
77
lp_fnt
lp_nfa
lp_nfb
lp_nfc
lp_ef
1/V/m4
1/V/m2
V1
Local parameter FNT after clipping

Local parameter NFA after clipping
Local parameter NFB after clipping
Local parameter NFC after clipping
Local parameter EF after clipping
Parasitic Resistance Parameters

78
79
80
81
82
83
84
lp_rg
lp_rse
lp_rde
lp_rbulk
lp_rwell
lp_rjuns
lp_rjund
Local parameter RG after clipping

Local parameter RSE after clipping
Local parameter RDE after clipping
Local parameter RBULK after clipping
Local parameter RWELL after clipping
Local parameter RJUNS after clipping
Local parameter RJUND after clipping
Self Heating Parameters
85
86
87
lp_rth
lp_cth
lp_strth
K/W
J/K
Local parameter RTH after T-scaling and clipping

Local parameter CTH after clipping
Local parameter STRTH after clipping
Junction Parameters
88
cjosbot
89
cjossti
90
cjosgat
91
vbisbot
92
vbissti
93
vbisgat
94
95
96
idsatsbot
idsatssti
idsatsgat
A
A
A
Bottom component of total zero-bias source junction capacitance at device temperature

STI-edge component of total zero-bias source junction
capacitance at device temperature
Gate-edge component of total zero-bias source junction
capacitance at device temperature
Built-in voltage of source-side bottom junction at device
temperature
Built-in voltage of source-side STI-edge junction at device temperature
Built-in voltage of source-side gate-edge junction at device temperature
Total source-side bottom junction saturation current
Total source-side STI-edge junction saturation current
Total source-side gate-edge junction saturation current
119
Unclassified
PSP 103.2
No.
Name
Unit
97
cjosbotd
98
cjosstid
99
cjosgatd
100
vbisbotd
101
vbisstid
102
vbisgatd
103
104
105
idsatsbotd
idsatsstid
idsatsgatd
A
A
A
Description
Bottom component of total zero-bias drain junction capacitance at device temperature
STI-edge component of total zero-bias drain junction capacitance at device temperature
Gate-edge component of total zero-bias drain junction capacitance at device temperature
Built-in voltage of drain-side bottom junction at device
temperature
Built-in voltage of drain-side STI-edge junction at device
temperature
Built-in voltage of drain-side gate-edge junction at device
temperature
Total drain-side bottom junction saturation current
Total drain-side STI-edge junction saturation current
Total drain-side gate-edge junction saturation current
NQS Parameters
106
120
lp_munqs
Local parameter MUNQS after clipping
Unclassified
PSP 103.2
References
[1] L. Lemaitre, C. C. McAndrew, and S. Hamm ,ADMS Automatic Device Model Synthesize, Proc.
IEEE CICC, 2002. See also http://mot-adms.sourceforge.net/
[2] G. Gildenblat et al., From BSIM3/4 to PSP: Translation of Flicker Noise and Junction Parameters,
available for download at http:/pspmodel.asu.edu/downloads/
[3] X. Xi et al., BSIM4.4.0 MOSFET Model, Users Manual, 2004, available for download at http://
www-device.eecs.berkeley.edu/~bsim3/BSIM4/BSIM440/
[4] T.B. Hook et al., Lateral Ion Implant Straggle and Mask Proximity Effect, IEEE Trans. on Electron
Devices, Vol. 50, No. 9, pp. 1946-1951, 2003.
[5] X. Xi et al., BSIM4.5.0 MOSFET Model, Users Manual, 2005, available for download at http://
www-device.eecs.berkeley.edu/~bsim3/bsim4_get.html
[6] M. Basel, J. Watts et al., Guidelines for Extracting Well Proximity Instance Parameters, March 2006,
available for download at http://www.eigroup.org/CMC/
[7] H. Wang, T.-L. Chen, and G. Gildenblat, Quasi-static and Nonquasi-static Compact MOSFET Models
Based on Symmetric Linearization of the Bulk and Inversion Charges, IEEE trans. Electron Dev. 50(11),
pp. 2262-2272, 2003.
[8] H. Wang et al., Unified Non-Quasi-Static MOSFET Model for Large-Signal and Small-Signal Simulations, CICC 2005.
[9] W. H. Press et al., Numerical recipes in C, 2nd edition, Cambridge University Press (1993), available
for download at http://www.library.cornell.edu/nr/bookcpdf.html
[10] A.J. Scholten et al., JUNCAP2, version 200.3, available for download at http://pspmodel.asu.
edu/downloads/
[11] M. Minondo, G. Gouget, and A. Juge, New Length Scaling of Current Gain Factor and Characterization
Method for Pocket Implanted MOSFETs, Proc. ICMTS 2001, pp. 263-267, 2001.
[12] A.J. Scholten, R. Duffy, R. van Langevelde, and D.B.M. Klaassen, Compact Modelling of PocketImplanted MOSFETs, Proc. ESSDERC 2001, pp. 311-314, 2001.
[13] T.S. Hsieh, Y.W. Chang, W.J. Tsai, and T.C. Lu, A New Leff Extraction Approach for Devices with
Pocket Implants, Proc. ICMTS 2001, pp. 15-18, 2001.
[14] R. van Langevelde et al., Gate Current: modelling, L Extraction and Impact on RF Performance,
IEDM 2001 Tech. Digest, pp. 289-292, 2001.
121
Unclassified
PSP 103.2
Appendix A
Auxiliary Equations
In this Appendix, some auxiliary functions which are used in the model equations are defined.
The MINA-smoothing function:
MINA (x, y, a) =
[
]
1
2
x + y (x y) + a
2
(A.1)
The MAXA-smoothing function:

MAXA (x, y, a) =
]
[
1
2
x + y + (x y) + a
2
(A.2)
The MNE- and MXE-smoothing functions:

MNE (x, y, ) =
MXE (x, y, ) =
A = 4 ;
[
]
2
2
x + y (x + y) A xy
A
]
[
2
2
x + y + (x + y) A xy
A
(0, 1)
(A.3)
(A.4)
(A.5)
The functions (y), its derivatives, 1 , and 2 , which are used in the explicit approximation of surface potential:
(y) =
y2
2 + y2
(A.6)
(y) =
4y
(2 + y 2 )2
(A.7)
(y) =
8 12y 2
(2 + y 2 )3
(A.8)
=a+c
1 =
122
v2
c2
+
a
(A.9)
(A.10)
Unclassified
PSP 103.2
1 (a, c, , ) =
2 =
a
+
1 + (c2 /3 a) c /1
v2
c2
+
ab
2 (a, b, c, , ) =
a
+
2 + (c2 /3 a b) c /2
(A.11)
(A.12)
(A.13)
123
Unclassified
PSP 103.2
Appendix B
Layout parameter calculation

In post-layout simulations, various PSP instance parameters should be supplied either manually or by a layout
extraction tool. In this appendix, it is shown how these parameters should be calculated.
Note: These equations are not part of the PSP model.
B.1
Stress parameters
B.1.1
Layout effects for irregular shapes
For irregular shapes the following effective values for SA and SB are to be used (see Fig B.1).
SAe
SWi
1
1
=
+ 0.5 L
W
SAi + 0.5 L
i=1
(B.1)
SBe
SWi
1
1
=
+ 0.5 L
W
SBi + 0.5 L
i=1
(B.2)
B.2
Well proximity effect parameters
The values of the instance parameters SCA, SCB and SCC can be calculated from layout parameters using the
equations below.
fA (u) =
SCREF2
u2
(B.3)
(
u
u )
exp 10
SCREF
SCREF
(
u )
u
exp 20
fC (u) =
SCREF
SCREF
fB (u) =
Acorner =
m+k
i=m+1
(B.4)
(B.5)
)
SCXi +SCYi +W
fA (u) du
SCXi +SCYi
n+k
i=n+1
124
SCXi +SCYi +L
)
fA (u) du
(B.6)
SCXi +SCYi
Unclassified
Bcorner =
PSP 103.2
m+k
i=m+1
SCXi +SCYi +W
fB (u) du
SCXi +SCYi
n+k
i=n+1
Ccorner =
m+k
i=m+1
SCXi +SCYi +L
fB (u) du
(B.7)
SCXi +SCYi
SCXi +SCYi +W
fC (u) du
SCXi +SCYi
n+k
i=n+1
SCXi +SCYi +L
fC (u) du
(B.8)
SCXi +SCYi
[ n (
)
SCi +L
1
SCA =
Wi
fA (u) du
W L
SCi
i=1
(
n+m
Li
SCi +W
fA (u) du
+ Acorner
(B.9)
SCi
i=n+1
[ n (
)
SCi +L
1
Wi
fB (u) du
SCB =
W L
SCi
i=1
+
n+m
SCi +W
Li
fB (u) du
+ Bcorner
(B.10)
SCi
i=n+1
[ n (
)
SCi +L
1
SCC =
Wi
fC (u) du
W L
SCi
i=1
+
n+m
i=n+1
Li
SCi +W
)
fC (u) du
]
+ Ccorner
(B.11)
SCi
Here, m and n are the number of projections of the well edge along the length and width of the devices,
respectively. Moreover, k is the number of corners selected to account for the corner effects.
125
SW1
Unclassified
PSP 103.2
SA1
SB1
SB2
SA2
SA3
SW3
SW2
SB3
L
Figure B.1: A typical layout of MOS devices with more instance parameters (SWi , SAi and SBi ) in addition
to the traditional L and W .
L6
L5
SC6
SC5
W1
SC1
SC3
W3
W
W2
SC4
SC2
W4
SC7
L
Figure B.2: A typical layout of MOS devices with WPE instance parameters
126
Unclassified
PSP 103.2
SCX1
SCX2
SCY2
SCY1
SCY4
SCY3
SCX4
SCX3
L
Figure B.3: A layout of MOS devices for corner terms calculation
127
128
PSP 103.2
Unclassified

Psp103p2 Summary

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Technical Note NXP-TN-2012-0080

G.D.J. Smit, A.J. Scholten, and D.B.M. Klaassen

c NXP Semiconductors 2013

NXP-TN-2012-0080 January 2013

PSP developers (present and past)

Authors address R. van der Toorn

c NXP SEMICONDUCTORS 2013

c NXP Semiconductors 2013

January 2013 NXP-TN-2012-0080

G.D.J. Smit, A.J. Scholten, and D.B.M. Klaassen (NXP Semiconductors)

c NXP Semiconductors 2013

NXP-TN-2012-0080 January 2013

c NXP Semiconductors 2013

January 2013 NXP-TN-2012-0080

History of model and documentation

NXP-TN-2012-0080 January 2013

PLGFACNUD, PWGFACNUD, PLWGFACNUD, POVSBNUD and PODVSBNUD to binning models.

c NXP Semiconductors 2013

January 2013 NXP-TN-2012-0080

History of the documentation

First release of PSP (PSP 100.0) documentation.

Documentation adapted to PSP 102.0 and some errors corrected.

Documentation adapted to PSP 102.3 and some errors corrected.

Documentation adapted to PSP 103.0 and some errors corrected.

Documentation adapted to PSP 103.1 and some errors corrected.

Documentation adapted to PSP 103.2.

c NXP Semiconductors 2013

NXP-TN-2012-0080 January 2013

c NXP Semiconductors 2013

January 2013 NXP-TN-2012-0080

Origin and purpose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Constants and Parameters

Circuit simulator variables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Parameters for stress model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Parameters for well proximity effect model . . . . . . . . . . . . . . . . . . . . . . .

Parameters for source-bulk and drain-bulk junction model . . . . . . . . . . . . . . .

Parameters for parasitic resistances . . . . . . . . . . . . . . . . . . . . . . . . . . .

Parameters for self heating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Parameters for NQS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Geometry dependence and Other effects

Geometrical scaling rules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Layout effects for multi-finger devices . . . . . . . . . . . . . . . . . . . . . . . . . .

Layout effects for regular shapes . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Well proximity effects . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Parameters for pre-layout simulation . . . . . . . . . . . . . . . . . . . . . . . . . . .

c NXP Semiconductors 2013

NXP-TN-2012-0080 January 2013

Calculation of parameter modifications . . . . . . . . . . . . . . . . . . . . . . . . .

PSP Model Equations

Internal Parameters (including Temperature Scaling) . . . . . . . . . . . . . . . . . . . . . .

Conditioning of Terminal Voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Bias-Dependent Body Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Surface Potential at Source Side and Related Variables . . . . . . . . . . . . . . . . .

Drain Saturation Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Surface Potential at Drain Side and Related Variables . . . . . . . . . . . . . . . . . .

Mid-Point Surface Potential and Related Variables . . . . . . . . . . . . . . . . . . .

Potential Mid-Point Inversion Charge and Related Variables . . . . . . . . . . . . . .

Drain-Source Channel Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.2.10 Impact Ionization or Weak-Avalanche . . . . . . . . . . . . . . . . . . . . . . . . . .

4.2.11 Surface Potential in Gate Overlap Regions . . . . . . . . . . . . . . . . . . . . . . . .

4.2.12 Gate Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.2.13 Gate-Induced Drain/Source Leakage Current . . . . . . . . . . . . . . . . . . . . . .

4.2.14 Total Terminal Currents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Intrinsic Charge Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .