Sei sulla pagina 1di 137

Colour Television

Chassis

QFU1.1E
LA

Contents

Page

1.
2.
3.
4.
5.
6.
7.
8.

2
2
5
9
16
35
39

Revision List
Technical Specs, Diversity, and Connections
Precautions, Notes, and Abbreviation List
Mechanical Instructions
Service Modes, Error Codes, and Fault Finding
Alignments
Circuit Descriptions
Block Diagrams
Wiring diagram 7000 series 40"
Wiring diagram 8000 series 40"
Wiring diagram 7000 series 46"
Wiring diagram 8000 series 46"
Wiring diagram 7000 series 55"
Wiring diagram 8000 series 55"
9. Circuit Diagrams and PWB Layouts
B 310431365664
E 272217190673 - 272217190698 Keyboard
J 272217190536 Sensor board
AL 310431365771 16 LED AmbiLight
AL 310431365781 15 LED AmbiLight
AL 310431365804 12 LED AmbiLight
AL 310431365813 10 LED AmbiLight
AL 310431365823 9 LED AmbiLight
AL 310431365833 7 LED AmbiLight
10. Styling Sheets
7000 series 40"
8000 series 40"
7000 series 46"
8000 series 46"
7000 series 55"
8000 series 55"

Published by ER/EL 1266 Quality

49
50
51
52
53
54
Drawing PWB
60
112-113
114
115
116
117
120
123
125
128
130
132
133
134
135
136
137

Printed in the Netherlands

Subject to modification

EN 3122 785 19211


2012-Jun-29

2012

TP Vision Netherlands B.V.

All rights reserved. Specifications are subject to change without notice. Trademarks are the
property of Koninklijke Philips Electronics N.V. or their respective owners.
TP Vision Netherlands B.V. reserves the right to change products at any time without being obliged to adjust
earlier supplies accordingly.
PHILIPS and the PHILIPS Shield Emblem are used under license from Koninklijke Philips Electronics N.V.

EN 2

1.

Revision List

QFU1.1E LA

1. Revision List
Manual xxxx xxx xxxx.0
First release.

Manual xxxx xxx xxxx.1


Chapter 4: added additional LVDS cable handling info; see
section 4.3.2.
Chapter 5: added white tone alignment values; see section
6.3.1.

2. Technical Specs, Diversity, and Connections


Index of this chapter:
2.1 Technical Specifications
2.2 Directions for Use
2.3 Connections
2.4 Chassis Overview

2.1

Technical Specifications
For on-line product support please use the CTN links in Table
2-1. Here is product information available, as well as getting
started, user manuals, frequently asked questions and
software & drivers.

Notes:
Figures can deviate due to the different set executions.
Specifications are indicative (subject to change).
Table 2-1 Described Model Numbers and Diversity

Sheet

J (Sensor Board)

SSB

Supply lines

I2C

Audio

Video

Power Supply

Assembly Removal

E (Keyboard/Leading Edge)

Styling

Power Supply

11

Schematics

Control & Clock

10

Block Diagrams

Wiring Diagram

Descr.
Wire Dressing rear cover

Mechanics

Wire Dressing

CTN

2.2

Connection Overview

40PFL7007H/12

2.3

4-1

4-2

4.3

7.2

9-1

9-7

9-8

9-9

9-10

9-11

10.1

10.2

10.4

10.3

11.1

40PFL7007K/12

2.3

4-1

4-2

4.3

7.2

9-4

9-7

9-8

9-9

9-10

9-11

10.2

10.4

10.3

11.3

40PFL7007T/12

2.3

4-1

4-2

4.3

7.2

9-2

9-7

9-8

9-9

9-10

9-11

10.2

10.4

10.3

11.2

40PFL8007K/12

2.3

4-1

4-3

4.3

7.2

9-3

9-7

9-8

9-9

9-10

9-11

10.2

10.4

10.3

11.2

40PFL8007T/12

2.3

4-1

4-3

4.3

7.2

9-5

9-7

9-8

9-9

9-10

9-11

10.2

10.4

10.3

11.2

46PFL7007H/12

2.3

4-4

4-5

4.3

7.2

9-2

9-7

9-8

9-9

9-10

9-11

10.2

10.4

10.3

11.2

46PFL7007K/12

2.3

4-4

4-5

4.3

7.2

9-3

9-7

9-8

9-9

9-10

9-11

10.2

10.4

10.3

11.2

46PFL7007T/12

2.3

4-4

4-5

4.3

7.2

9-5

9-7

9-8

9-9

9-10

9-11

10.2

10.4

10.3

11.2

46PFL8007K/12

2.3

4-4

4-6

4.3

7.2

9-6

9-7

9-8

9-9

9-10

9-11

10.2

10.4

10.3

11.4

46PFL8007T/12

2.3

4-4

4-6

4.3

7.2

9-1

9-7

9-8

9-9

9-10

9-11

10.1

10.2

10.4

10.3

11.1

55PFL7007H/12

2.3

4-7

4-8

4.3

7.2

9-4

9-7

9-8

9-9

9-10

9-11

10.2

10.4

10.3

11.3

55PFL7007K/12

2.3

4-7

4-8

4.3

7.2

9-2

9-7

9-8

9-9

9-10

9-11

10.2

10.4

10.3

11.2

55PFL7007T/12

2.3

4-7

4-8

4.3

7.2

9-3

9-7

9-8

9-9

9-10

9-11

10.2

10.4

10.3

11.2

55PFL8007K/12

2.3

4-7

4-9

4.3

7.2

9-5

9-7

9-8

9-9

9-10

9-11

10.2

10.4

10.3

11.2

55PFL8007T/12

2.3

4-7

4-9

4.3

7.2

9-6

9-7

9-8

9-9

9-10

9-11

10.2

10.4

10.3

11.4

Directions for Use


You can download this information from the following websites:
http://www.philips.com/support
http://www.p4c.philips.com

2012-Jun-29

back to
div. table

Technical Specs, Diversity, and Connections


2.3

QFU1.1E LA

2.

EN 3

Connections

SIDE CONNECTORS

REAR CONNECTORS
1

12
CI

SERV.U

NETWORK

Y/Pb/Pr

L/R

13

AUDIO IN
DVI/VGA

USB 3

10
USB 2

10

BOTTOM REAR CONNECTORS

HDMI 5

11
6

10

11

11

11
HDMI 4

11
DIGITAL
AUDIO OUT
(OPTICAL)

VGA

SCART

75

(RGB/CVBS)

SATELLITE

USB 1

(1)

(2)

TV ANTENNA

(3)

14

HDMI

19210_062_120504.eps
120504

Figure 2-1 Connection overview xxPFL7xxx, ..8xxx, ..9xxx sets


Note: The following connector colour abbreviations are used
(acc. to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy=
Grey, Rd= Red, Wh= White, Ye= Yellow.
2.3.1

2,4 - Cinch: Video YPbPr - In, Audio - In (optional via breakout cable)
jq
Gn - Video Y
1 VPP / 75 ohm
Bu - Video Pb
0.7 VPP / 75 ohm
jq
jq
Rd - Video Pr
0.7 VPP / 75 ohm
jq
Rd - Audio - R
0.5 VRMS / 10 kohm
Wh - Audio - L
0.5 VRMS / 10 kohm
jq

Connections
1 - RJ45: Ethernet

3 - Service Connector (UART)


1 - Ground
Gnd
2 - UART_TX
Transmit
3 - UART_RX
Receive

10000_025_090121.eps
120320

5 - Cinch: Audio - In (VGA/DVI)


Rd - Audio R
0.5 VRMS / 10 kohm
Wh - Audio L
0.5 VRMS / 10 kohm

Figure 2-2 Ethernet connector


1
2
3
4
5
6
7
8

- TD+
- TD- RD+
- CT
- CT
- RD- GND
- GND

Transmit signal
Transmit signal
Receive signal
Centre Tap: DC level fixation
Centre Tap: DC level fixation
Receive signal
Gnd
Gnd

k
k
j

H
k
j

jq
jq

6 - VGA: Video RGB - In


1
6
11

5
10
15

10000_002_090121.eps
090127

j
H
H

Figure 2-3 VGA Connector


1
back to
div. table

- Video Red

0.7 VPP / 75 ohm

j
2012-Jun-29

EN 4
2
3
4
5
6
7
8
9
10
11
12
13
14
15

2.

QFU1.1E LA

- Video Green
- Video Blue
- n.c.
- Ground
- Ground Red
- Ground Green
- Ground Blue
- +5VDC
- Ground Sync
- n.c.
- DDC_SDA
- H-sync
- V-sync
- DDC_SCL

Technical Specs, Diversity, and Connections

0.7 VPP / 75 ohm


0.7 VPP / 75 ohm

j
j

Gnd
Gnd
Gnd
Gnd
+5 V
Gnd

H
H
H
H
j
H

DDC data
0-5V
0-5V
DDC clock

j
j
j
j

10 - USB2.0

1
2
3
4

2.4

- Audio R
- Audio R
- Audio L
- Ground Audio
- Ground Blue
- Audio L
- Video Blue
- Function Select

9
10
11
12
13
14
15
16

- Ground Green
- n.c.
- Video Green
- n.c.
- Ground Red
- Ground P50
- Video Red
- Status/FBL

17
18
19
20
21

- Ground Video
- Ground FBL
- Video CVBS/Y
- Video CVBS
- Shield

Gnd

1
2

Figure 2-6 HDMI (type A) connector

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

k
j
k
H
H
j
jk
j
H

0.7 VPP / 75 ohm

Gnd
Gnd
0.7 VPP / 75 ohm
0 - 0.4 V: INT
1 - 3 V: EXT / 75 ohm
Gnd
Gnd
1 VPP / 75 ohm
1 VPP / 75 ohm
Gnd

H
H
j
j
H
H
k
j
H

8 - Aerial - In
- - IEC-type (EU)

Coax, 75 ohm

9 - SAT - In
- - F-type

Coax, 75 ohm

- D2+
- Shield
- D2- D1+
- Shield
- D1- D0+
- Shield
- D0- CLK+
- Shield
- CLK- Easylink/CEC
- ARC
- DDC_SCL
- DDC_SDA
- Ground
- +5V
- HPD
- Ground

Data channel
Gnd
Data channel
Data channel
Gnd
Data channel
Data channel
Gnd
Data channel
Data channel
Gnd
Data channel
Control channel
Audio Return Channel
DDC clock
DDC data
Gnd
Hot Plug Detect
Gnd

12 - Head phone (Output)


Bk - Head phone
32 - 600 ohm / 10 mW

Chassis Overview
Refer to chapter 8. Block Diagrams for PWB/CBA locations.

2012-Jun-29

k
jk
jk
H

10000_017_090121.eps
090428

10000_001_090121.eps
090121

0.5 VRMS / 1 kohm


0.5 VRMS / 10 kohm
0.5 VRMS / 1 kohm
Gnd
Gnd
0.5 VRMS / 10 kohm
0.7 VPP / 75 ohm
0 - 2 V: INT
4.5 - 7 V: EXT 16:9
9.5 - 12 V: EXT 4:3
Gnd

- +5V
- Data (-)
- Data (+)
- Ground

19
18

Figure 2-4 SCART connector


1
2
3
4
5
6
7
8

11 - HDMI 1, 2, 3, 4, 5 (optional): Digital Video - In, Digital


Audio with ARC - In/Out

21

Figure 2-5 USB (type A)

7 - Video RGB - In, CVBS - In/Out, Audio - In/Out (optional


via break-out cable)
20

10000_022_090121.eps
090121

back to
div. table

j
H
j
j
H
j
j
H
j
j
H
j
jk
k
j
jk
H
j
j
H

ot

13 - Common Interface
68p - See Figure 9-1-47 B07D, Common interface

jk

14 - Cinch: S/PDIF - Out


Bk - Coaxial
0.4 - 0.6VPP / 75 ohm

kq

Precautions, Notes, and Abbreviation List

QFU1.1E LA

3.

EN 5

3. Precautions, Notes, and Abbreviation List


Index of this chapter:
3.1 Safety Instructions
3.2 Warnings
3.3 Notes
3.4 Abbreviation List

3.3.2

Schematic Notes

3.1

Safety Instructions
Safety regulations require the following during a repair:
Connect the set to the Mains/AC Power via an isolation
transformer (> 800 VA).
Replace safety components, indicated by the symbol h,
only by components identical to the original ones. Any
other component substitution (other than original type) may
increase risk of fire or electrical shock hazard.

Safety regulations require that after a repair, the set must be


returned in its original condition. Pay in particular attention to
the following points:
Route the wire trees correctly and fix them with the
mounted cable clamps.
Check the insulation of the Mains/AC Power lead for
external damage.
Check the strain relief of the Mains/AC Power cord for
proper function.
Check the electrical DC resistance between the Mains/AC
Power plug and the secondary side (only for sets that have
a Mains/AC Power isolated power supply):
1. Unplug the Mains/AC Power cord and connect a wire
between the two pins of the Mains/AC Power plug.
2. Set the Mains/AC Power switch to the on position
(keep the Mains/AC Power cord unplugged!).
3. Measure the resistance value between the pins of the
Mains/AC Power plug and the metal shielding of the
tuner or the aerial connection on the set. The reading
should be between 4.5 M and 12 M.
4. Switch off the set, and remove the wire between the
two pins of the Mains/AC Power plug.
Check the cabinet for defects, to prevent touching of any
inner parts by the customer.

3.2

3.3.3

3.3.4

Notes

3.3.1

General

BGA (Ball Grid Array) ICs


Introduction
For more information on how to handle BGA devices, visit this
URL: http://www.atyourservice-magazine.com. Select
Magazine, then go to Repair downloads. Here you will find
Information on how to deal with BGA-ICs.
BGA Temperature Profiles
For BGA-ICs, you must use the correct temperature-profile.
Where applicable and available, this profile is added to the IC
Data Sheet information section in this manual.

3.3.5

Lead-free Soldering
Due to lead-free technology some rules have to be respected
by the workshop during a repair:
Use only lead-free soldering tin. If lead-free solder paste is
required, please contact the manufacturer of your soldering
equipment. In general, use of solder paste within
workshops should be avoided because paste is not easy to
store and to handle.
Use only adequate solder tools applicable for lead-free
soldering tin. The solder tool must be able:
To reach a solder-tip temperature of at least 400C.
To stabilize the adjusted temperature at the solder-tip.
To exchange solder-tips for different applications.
Adjust your solder tool so that a temperature of around
360C - 380C is reached and stabilized at the solder joint.
Heating time of the solder-joint should not exceed ~ 4 sec.
Avoid temperatures above 400C, otherwise wear-out of
tips will increase drastically and flux-fluid will be destroyed.
To avoid wear-out of tips, switch off unused equipment or
reduce heat.
Mix of lead-free soldering tin/parts with leaded soldering
tin/parts is possible but PHILIPS recommends strongly to
avoid mixed regimes. If this cannot be avoided, carefully
clear the solder-joint from old tin and re-solder with new tin.

All ICs and many other semiconductors are susceptible to


electrostatic discharges (ESD w). Careless handling
during repair can reduce life drastically. Make sure that,
during repair, you are connected with the same potential as
the mass of the set by a wristband with resistance. Keep
components and tools also at this same potential.
Be careful during measurements in the high voltage
section.
Never replace modules or other components while the unit
is switched on.
When you align the set, use plastic rather than metal tools.
This will prevent any short circuits and the danger of a
circuit becoming unstable.

3.3

Spare Parts
For the latest spare part overview, consult your Philips Spare
Part web portal.

Warnings

All resistor values are in ohms, and the value multiplier is


often used to indicate the decimal point location (e.g. 2K2
indicates 2.2 k).
Resistor values with no multiplier may be indicated with
either an E or an R (e.g. 220E or 220R indicates 220 ).
All capacitor values are given in micro-farads ( 10-6),
nano-farads (n 10-9), or pico-farads (p 10-12).
Capacitor values may also use the value multiplier as the
decimal point indication (e.g. 2p2 indicates 2.2 pF).
An asterisk (*) indicates component usage varies. Refer
to the diversity tables for the correct values.
The correct component values are listed on the Philips
Spare Parts Web Portal.

Measure the voltages and waveforms with regard to the


chassis (= tuner) ground (H), or hot ground (I), depending
on the tested area of circuitry. The voltages and waveforms
shown in the diagrams are indicative. Measure them in the
Service Default Mode with a colour bar signal and stereo
sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and
picture carrier at 475.25 MHz for PAL, or 61.25 MHz for
NTSC (channel 3).
Where necessary, measure the waveforms and voltages
with (D) and without (E) aerial signal. Measure the
voltages in the power supply section both in normal
operation (G) and in stand-by (F). These values are
indicated by means of the appropriate symbols.

3.3.6

Alternative BOM identification


It should be noted that on the European Service website,
Alternative BOM is referred to as Design variant.
The third digit in the serial number (example:
AG2B0335000001) indicates the number of the alternative
B.O.M. (Bill Of Materials) that has been used for producing the
specific TV set. In general, it is possible that the same TV
model on the market is produced with e.g. two different types
of displays, coming from two different suppliers. This will then

back to
div. table

2012-Jun-29

EN 6

3.

QFU1.1E LA

Precautions, Notes, and Abbreviation List

result in sets which have the same CTN (Commercial Type


Number; e.g. 28PW9515/12) but which have a different B.O.M.
number.
By looking at the third digit of the serial number, one can
identify which B.O.M. is used for the TV set he is working with.
If the third digit of the serial number contains the number 1
(example: AG1B033500001), then the TV set has been
manufactured according to B.O.M. number 1. If the third digit is
a 2 (example: AG2B0335000001), then the set has been
produced according to B.O.M. no. 2. This is important for
ordering the correct spare parts!
For the third digit, the numbers 1...9 and the characters A...Z
can be used, so in total: 9 plus 26= 35 different B.O.M.s can be
indicated by the third digit of the serial number.

AARA

ACI

ADC
AFC

AGC
Identification: The bottom line of a type plate gives a 14-digit
serial number. Digits 1 and 2 refer to the production centre (e.g.
SN is Lysomice, RJ is Kobierzyce), digit 3 refers to the B.O.M.
code, digit 4 refers to the Service version change code, digits 5
and 6 refer to the production year, and digits 7 and 8 refer to
production week (in example below it is 2010 week 10 / 2010
week 17). The 6 last digits contain the serial number.

AM
AP
AR
ASF

ATSC

ATV
Auto TV

AV
AVC
AVIP
B/G
BDS
BLR
BTSC

10000_053_110228.eps
110228

B-TXT
C
CEC

Figure 3-1 Serial number (example)


3.3.7

Board Level Repair (BLR) or Component Level Repair


(CLR)

CL
CLR
ComPair
CP
CSM
CTI

If a board is defective, consult your repair procedure to decide


if the board has to be exchanged or if it should be repaired on
component level.
If your repair procedure says the board should be exchanged
completely, do not solder on the defective board. Otherwise, it
cannot be returned to the O.E.M. supplier for back charging!
3.3.8

3.4

CVBS

Practical Service Precautions

DAC
DBE

It makes sense to avoid exposure to electrical shock.


While some sources are expected to have a possible
dangerous impact, others of quite high potential are of
limited current and are sometimes held in less regard.
Always respect voltages. While some may not be
dangerous in themselves, they can cause unexpected
reactions that are best avoided. Before reaching into a
powered TV set, it is best to test the high voltage insulation.
It is easy to do, and is a good service precaution.

DCM

DDC
D/K
DFI
DFU
DMR
DMSD
DNM

Abbreviation List
0/6/12

2012-Jun-29

SCART switch control signal on A/V


board. 0 = loop through (AUX to TV),

back to
div. table

6 = play 16 : 9 format, 12 = play 4 : 3


format
Automatic Aspect Ratio Adaptation:
algorithm that adapts aspect ratio to
remove horizontal black bars; keeps
the original aspect ratio
Automatic Channel Installation:
algorithm that installs TV channels
directly from a cable network by
means of a predefined TXT page
Analogue to Digital Converter
Automatic Frequency Control: control
signal used to tune to the correct
frequency
Automatic Gain Control: algorithm that
controls the video input of the feature
box
Amplitude Modulation
Asia Pacific
Aspect Ratio: 4 by 3 or 16 by 9
Auto Screen Fit: algorithm that adapts
aspect ratio to remove horizontal black
bars without discarding video
information
Advanced Television Systems
Committee, the digital TV standard in
the USA
See Auto TV
A hardware and software control
system that measures picture content,
and adapts image parameters in a
dynamic way
External Audio Video
Audio Video Controller
Audio Video Input Processor
Monochrome TV system. Sound
carrier distance is 5.5 MHz
Business Display Solutions (iTV)
Board-Level Repair
Broadcast Television Standard
Committee. Multiplex FM stereo sound
system, originating from the USA and
used e.g. in LATAM and AP-NTSC
countries
Blue TeleteXT
Centre channel (audio)
Consumer Electronics Control bus:
remote control bus on HDMI
connections
Constant Level: audio output to
connect with an external amplifier
Component Level Repair
Computer aided rePair
Connected Planet / Copy Protection
Customer Service Mode
Color Transient Improvement:
manipulates steepness of chroma
transients
Composite Video Blanking and
Synchronization
Digital to Analogue Converter
Dynamic Bass Enhancement: extra
low frequency amplification
Data Communication Module. Also
referred to as System Card or
Smartcard (for iTV).
See E-DDC
Monochrome TV system. Sound
carrier distance is 6.5 MHz
Dynamic Frame Insertion
Directions For Use: owner's manual
Digital Media Reader: card reader
Digital Multi Standard Decoding
Digital Natural Motion

Precautions, Notes, and Abbreviation List


DNR
DRAM
DRM
DSP
DST

DTCP

DVB-C
DVB-T
DVD
DVI(-d)
E-DDC

EDID
EEPROM
EMI
EPG
EPLD
EU
EXT
FDS
FDW
FLASH
FM
FPGA
FTV
Gb/s
G-TXT
H
HD
HDD
HDCP

HDMI
HP
I
I 2C
I2D
I2S
IF
IR
IRQ
ITU-656

Digital Noise Reduction: noise


reduction feature of the set
Dynamic RAM
Digital Rights Management
Digital Signal Processing
Dealer Service Tool: special remote
control designed for service
technicians
Digital Transmission Content
Protection; A protocol for protecting
digital audio/video content that is
traversing a high speed serial bus,
such as IEEE-1394
Digital Video Broadcast - Cable
Digital Video Broadcast - Terrestrial
Digital Versatile Disc
Digital Visual Interface (d= digital only)
Enhanced Display Data Channel
(VESA standard for communication
channel and display). Using E-DDC,
the video source can read the EDID
information form the display.
Extended Display Identification Data
(VESA standard)
Electrically Erasable and
Programmable Read Only Memory
Electro Magnetic Interference
Electronic Program Guide
Erasable Programmable Logic Device
Europe
EXTernal (source), entering the set by
SCART or by cinches (jacks)
Full Dual Screen (same as FDW)
Full Dual Window (same as FDS)
FLASH memory
Field Memory or Frequency
Modulation
Field-Programmable Gate Array
Flat TeleVision
Giga bits per second
Green TeleteXT
H_sync to the module
High Definition
Hard Disk Drive
High-bandwidth Digital Content
Protection: A key encoded into the
HDMI/DVI signal that prevents video
data piracy. If a source is HDCP coded
and connected via HDMI/DVI without
the proper HDCP decoding, the
picture is put into a snow vision mode
or changed to a low resolution. For
normal content distribution the source
and the display device must be
enabled for HDCP software key
decoding.
High Definition Multimedia Interface
HeadPhone
Monochrome TV system. Sound
carrier distance is 6.0 MHz
Inter IC bus
Inter IC Data bus
Inter IC Sound bus
Intermediate Frequency
Infra Red
Interrupt Request
The ITU Radio communication Sector
(ITU-R) is a standards body
subcommittee of the International
Telecommunication Union relating to
radio communication. ITU-656 (a.k.a.
SDI), is a digitized video format used
for broadcast grade video.
Uncompressed digital component or
digital composite signals can be used.

iTV
LS

LATAM
LCD
LED
L/L'

LPL
LS
LVDS
Mbps
M/N
MHEG

MIPS

MOP
MOSFET
MPEG
MPIF
MUTE
MTV
NC
NICAM

NTC
NTSC

NVM
O/C
OSD
OAD

OTC
P50
PAL

PCB
PCM
back to
div. table

QFU1.1E LA

3.

EN 7

The SDI signal is self-synchronizing,


uses 8 bit or 10 bit data words, and has
a maximum data rate of 270 Mbit/s,
with a minimum bandwidth of 135
MHz.
Institutional TeleVision; TV sets for
hotels, hospitals etc.
Last Status; The settings last chosen
by the customer and read and stored
in RAM or in the NVM. They are called
at start-up of the set to configure it
according to the customer's
preferences
Latin America
Liquid Crystal Display
Light Emitting Diode
Monochrome TV system. Sound
carrier distance is 6.5 MHz. L' is Band
I, L is all bands except for Band I
LG.Philips LCD (supplier)
Loudspeaker
Low Voltage Differential Signalling
Mega bits per second
Monochrome TV system. Sound
carrier distance is 4.5 MHz
Part of a set of international standards
related to the presentation of
multimedia information, standardised
by the Multimedia and Hypermedia
Experts Group. It is commonly used as
a language to describe interactive
television services
Microprocessor without Interlocked
Pipeline-Stages; A RISC-based
microprocessor
Matrix Output Processor
Metal Oxide Silicon Field Effect
Transistor, switching device
Motion Pictures Experts Group
Multi Platform InterFace
MUTE Line
Mainstream TV: TV-mode with
Consumer TV features enabled (iTV)
Not Connected
Near Instantaneous Compounded
Audio Multiplexing. This is a digital
sound system, mainly used in Europe.
Negative Temperature Coefficient,
non-linear resistor
National Television Standard
Committee. Color system mainly used
in North America and Japan. Color
carrier NTSC M/N= 3.579545 MHz,
NTSC 4.43= 4.433619 MHz (this is a
VCR norm, it is not transmitted off-air)
Non-Volatile Memory: IC containing
TV related data such as alignments
Open Circuit
On Screen Display
Over the Air Download. Method of
software upgrade via RF transmission.
Upgrade software is broadcasted in
TS with TV channels.
On screen display Teletext and
Control; also called Artistic (SAA5800)
Project 50: communication protocol
between TV and peripherals
Phase Alternating Line. Color system
mainly used in West Europe (colour
carrier = 4.433619 MHz) and South
America (colour carrier
PAL M = 3.575612 MHz and
PAL N = 3.582056 MHz)
Printed Circuit Board (same as PWB)
Pulse Code Modulation
2012-Jun-29

EN 8

3.

PDP
PFC
PIP
PLL

POD

POR
PSDL
PSL
PSLS

PTC
PWB
PWM
QRC
QTNR
QVCP
RAM
RGB

RC
RC5 / RC6
RESET
ROM
RSDS
R-TXT
SAM
S/C
SCART

SCL
SCL-F
SD
SDA
SDA-F
SDI
SDRAM
SECAM

SIF
SMPS
SoC
SOG
SOPS
SPI

S/PDIF
SRAM
SRP
SSB
SSC
STB
STBY
SVGA
SVHS
SW

2012-Jun-29

QFU1.1E LA

Precautions, Notes, and Abbreviation List

Plasma Display Panel


Power Factor Corrector (or Preconditioner)
Picture In Picture
Phase Locked Loop. Used for e.g.
FST tuning systems. The customer
can give directly the desired frequency
Point Of Deployment: a removable
CAM module, implementing the CA
system for a host (e.g. a TV-set)
Power On Reset, signal to reset the uP
Power Supply for Direct view LED
backlight with 2D-dimming
Power Supply with integrated LED
drivers
Power Supply with integrated LED
drivers with added Scanning
functionality
Positive Temperature Coefficient,
non-linear resistor
Printed Wiring Board (same as PCB)
Pulse Width Modulation
Quasi Resonant Converter
Quality Temporal Noise Reduction
Quality Video Composition Processor
Random Access Memory
Red, Green, and Blue. The primary
color signals for TV. By mixing levels
of R, G, and B, all colors (Y/C) are
reproduced.
Remote Control
Signal protocol from the remote
control receiver
RESET signal
Read Only Memory
Reduced Swing Differential Signalling
data interface
Red TeleteXT
Service Alignment Mode
Short Circuit
Syndicat des Constructeurs
d'Appareils Radiorcepteurs et
Tlviseurs
Serial Clock I2C
CLock Signal on Fast I2C bus
Standard Definition
Serial Data I2C
DAta Signal on Fast I2C bus
Serial Digital Interface, see ITU-656
Synchronous DRAM
SEequence Couleur Avec Mmoire.
Colour system mainly used in France
and East Europe. Colour
carriers = 4.406250 MHz and
4.250000 MHz
Sound Intermediate Frequency
Switched Mode Power Supply
System on Chip
Sync On Green
Self Oscillating Power Supply
Serial Peripheral Interface bus; a 4wire synchronous serial data link
standard
Sony Philips Digital InterFace
Static RAM
Service Reference Protocol
Small Signal Board
Spread Spectrum Clocking, used to
reduce the effects of EMI
Set Top Box
STand-BY
800 600 (4:3)
Super Video Home System
Software

SWAN
SXGA
TFT
THD
TMDS
TS
TXT
TXT-DW
UI
uP
UXGA
V
VESA
VGA
VL
VSB
WYSIWYR

WXGA
XTAL
XGA
Y
Y/C
YPbPr

YUV

back to
div. table

Spatial temporal Weighted Averaging


Noise reduction
1280 1024
Thin Film Transistor
Total Harmonic Distortion
Transmission Minimized Differential
Signalling
Transport Stream
TeleteXT
Dual Window with TeleteXT
User Interface
Microprocessor
1600 1200 (4:3)
V-sync to the module
Video Electronics Standards
Association
640 480 (4:3)
Variable Level out: processed audio
output toward external amplifier
Vestigial Side Band; modulation
method
What You See Is What You Record:
record selection that follows main
picture and sound
1280 768 (15:9)
Quartz crystal
1024 768 (4:3)
Luminance signal
Luminance (Y) and Chrominance (C)
signal
Component video. Luminance and
scaled color difference signals (B-Y
and R-Y)
Component video

Mechanical Instructions

QFU1.1E LA

4.

EN 9

4. Mechanical Instructions
Index of this chapter:
4.1 Cable Dressing
4.2 Service Positions
4.3 Assy/Panel Removal
4.4 Set Re-assembly
Notes:
Figures below can deviate slightly from the actual situation,
due to the different set executions.

4.1

Cable Dressing

19210_069_120504.eps
120504

Figure 4-1 Cable dressing 40" 7000/8000 series

back to
div. table

2012-Jun-29

EN 10

4.

QFU1.1E LA

Mechanical Instructions

19210_070_120504.eps
120504

Figure 4-2 Cable dressing 40" rear cover 7000 series

19210_071_120504.eps
120504

Figure 4-3 Cable dressing 40" rear cover 8000 series

2012-Jun-29

back to
div. table

Mechanical Instructions

QFU1.1E LA

4.

EN 11

19210_072_120504.eps
120504

Figure 4-4 Cable dressing 46" 7000/8000 series

19210_073_120504.eps
120504

Figure 4-5 Cable dressing 46" rear cover 7000 series

back to
div. table

2012-Jun-29

EN 12

4.

QFU1.1E LA

Mechanical Instructions

19210_074_120504.eps
120504

Figure 4-6 Cable dressing 46" rear cover 8000 series

19210_103_120516.eps
120516

Figure 4-7 Cable dressing 55" 7000/8000 series

2012-Jun-29

back to
div. table

Mechanical Instructions

QFU1.1E LA

4.

EN 13

e
l
b
a
l

i
a
v
a
t

No

19210_104_120516.eps
120516

Figure 4-8 Cable dressing 55" rear cover 7000 series

19210_105_120516.eps
120516

Figure 4-9 Cable dressing 55" rear cover 8000 series

4.2

Service Positions

display. Caution: Failure to follow these guidelines can


seriously damage the display!
Ensure that ESD safe measures are taken.

For easy servicing of a TV set, the set should be put face down
on a soft flat surface, foam buffers or other specific workshop
tools. Ensure that a stable situation is created to perform
measurements and alignments. When using foam bars take
care that these always support the cabinet and never only the
back to
div. table

2012-Jun-29

EN 14

4.3.1

4.

QFU1.1E LA

Mechanical Instructions
4.3

Assy/Panel Removal

4.3.2

SSB

Rear Cover
Warning: Disconnect the mains power cord before removing
the rear cover.
Attention: All sets are equipped with a hatch to disconnect the
keyboard control panel. Ambilight sets are in addition equipped
with a hatch to disconnect the Ambilight units.
These hatches are indicated on the rear cover with
SERVICE h.
It is mandatory to open the hatches and disconnect the
cables prior to removal of the rear cover!
See Figure 4-10 and Figure 4-11 for details.
1. For sets equipped with Ambilight: open the hatch that
covers the Ambilight connector and unplug the connector
[1].
2. Remove the hatch that covers the keyboard control panel
connector by removing the screws [3].
3. For sets equipped with Ambilight: remove the stand and
swivel block [4].
4. Unplug the keyboard control panel connector located
underneath the keyboard control hatch.
5. Remove remaining fixation screws.
6. Lift the rear cover from the TV. Make sure that wires and
flat foils are not damaged while lifting the rear cover from
the set.

Refer to Figure 4-12 and Figure 4-13 for details.


Some SSBs have a dedicated LVDS connector, requiring
pressing two catches as indicated in the figure, before
removing the LVDS cable.

19054_001_111010.eps
111010

Figure 4-12 SSB LVDS connector catches (optional) -1Upon re-connecting the LVDS cable, ensure the catches are
locked after having inserted the LVDS cable.

Click!

LVDS flat foil


19300_053_120418.eps
120418

Click!

Figure 4-10 Rear cover removal -all models -1-

19222_001_120626.eps
120626

Figure 4-13 SSB LVDS connector catches (optional) -2Underneath the SSB an adhesive heat path is located.
Refer to Figure 4-14 for details.
After board swap, it should be located at the correct position.

4
3
4
4
3

19300_054_120418.eps
120418

19210_089_120509.eps
120509

Figure 4-11 Rear cover removal -all models -22012-Jun-29

Figure 4-14 SSB adhesive heath path


back to
div. table

Mechanical Instructions
4.4

QFU1.1E LA

4.

EN 15

Set Re-assembly
To re-assemble the whole set, execute all processes in reverse
order.
Notes:
While re-assembling, make sure that all cables are placed
and connected in their original position.
Pay special attention not to damage the EMC foams in the
set. Ensure that EMC foams are mounted correctly.

back to
div. table

2012-Jun-29

EN 16

5.

QFU1.1E LA

Service Modes, Error Codes, and Fault Finding

5. Service Modes, Error Codes, and Fault Finding


Index of this chapter:
5.1 Test Points
5.2 Service Modes
5.3 Start-up
5.4 Service Tools
5.5 Error Codes
5.6 The Blinking LED Procedure
5.7 Protections
5.8 Fault Finding and Repair Tips
5.9 Software Upgrading

5.1

Test Points
As most signals are digital, it will be difficult to measure
waveforms with a standard oscilloscope. However, several key
ICs are capable of generating test patterns, which can be
controlled via ComPair. In this way it is possible to determine
which part is defective.

Note: It is possible that, together with the SDM, the main


menu will appear. To switch it off, push the MENU (or
"HOME") button again.
Analogue SDM can also be activated by grounding the
solder path on the SSB, with the indication SDM (see
figures Service mode pad - front) and Service mode pad back.
Digital SDM: use the RC-transmitter and key in the code
062593, directly followed by the MENU (or "HOME")
button.
Note: It is possible that, together with the SDM, the main
menu will appear. To switch it off, push the MENU (or
"HOME") button again.

Perform measurements under the following conditions:


Service Default Mode.
Video: Colour bar signal.
Audio: 3 kHz left, 1 kHz right.

5.2

SDM

Service Modes
Service Default mode (SDM) and Service Alignment Mode
(SAM) offers several features for the service technician, while
the Customer Service Mode (CSM) is used for communication
between the call centre and the customer.
This chassis also offers the option of using ComPair, a
hardware interface between a computer and the TV chassis. It
offers the abilities of structured troubleshooting, error code
reading, and software version read-out for all chassis.
(see also section 5.4.1 ComPair).

19210_082_120507.eps
120507

Figure 5-1 Service mode pad - front

Note: For the new model range, a new remote control (RC) is
used with some renamed buttons. This has an impact on the
activation of the Service modes. For instance the old MENU
button is now called HOME (or is indicated by a house icon).
5.2.1

Service Default Mode (SDM)

SDM

Purpose
To create a pre-defined setting, to get the same
measurement results as given in this manual.
To override SW protections detected by the standby
processor and make the TV start up to the step just before
protection. See section 5.3 Start-up.
To start the blinking LED procedure where only LAYER 2
errors are displayed. (see also section 5.5 Error Codes).

19210_083_120507.eps
120507

Specifications
Figure 5-2 Service mode pad - back
Table 5-1 SDM default settings
Region

Freq. (MHz)

Default system

Europe, AP(PAL/Multi)

475.25

PAL B/G

Europe, AP DVB-T

546.00 PID Video: 0B


DVB-T
06 PID PCR: 0B 06 PID
Audio: 0B 07

After activating this mode, SDM will appear in the upper right
corner of the screen (when a picture is available).
How to Exit SDM
Use one of the following methods:
Switch the set to STANDBY via the RC-transmitter.
Via a standard customer RC-transmitter: key in 00sequence.

All picture settings at 50% (brightness, colour, contrast).


Sound volume at 25%.
5.2.2

How to Activate SDM


For this chassis there are two kinds of SDM: an analogue SDM
and a digital SDM. Tuning will happen according Table 5-1.
Analogue SDM: use the RC-transmitter and key in the
code 062596, directly followed by the MENU (or
HOME) button.

2012-Jun-29

Service Alignment Mode (SAM)


Purpose
To perform (software) alignments.
To change option settings.
To easily identify the used software version.
To view operation hours.
To display (or clear) the error code buffer.

back to
div. table

Service Modes, Error Codes, and Fault Finding


How to Activate SAM
Via a standard RC transmitter: Key in the code 062596
directly followed by the INFO or OK button. After activating
SAM with this method a service warning will appear on the
screen, continue by pressing the OK button on the RC.

QFU1.1E LA

5.

EN 17

Display Option
Code

Contents of SAM
Hardware Info.
A. SW Version. Displays the software version of the
main software (example: QF1XX-1.2.3.4 =
AAABB_X.Y.W.Z).
AAA= the chassis name.
BB= Product ID.
X.Y.W.Z= the software version, where X is the
main version number (different numbers are not
compatible with one another) and Y.W.Z is the sub
version number (a higher number is always
compatible with a lower number).
B. Standby processor version. Displays the software
version of the standby processor.
C. Production Code. Displays the production code of
the TV, this is the serial number as printed on the back
of the TV set. Note that if an NVM is replaced or is
initialized after corruption, this production code has to
be re-written to NVM. The update can be done via the
NVM editor available in SAM.
Operation hours. Displays the accumulated total of
operation hours (not the standby hours). Every time the TV
is switched on/off, 0.5 hours is added to this number.
Errors (followed by maximum 10 errors). The most recent
error is displayed at the upper left (for an error explanation
see section 5.5 Error Codes).
Reset Error Buffer. When cursor right (or OK button)
pressed here, followed by the OK button, the error buffer
is reset.
Alignments. This will activate the ALIGNMENTS submenu. See Chapter 6. Alignments.
Options numbers. Extra features for Service. For more
info regarding option codes, see chapter 6. Alignments.
Note that if the option code numbers are changed, these
have to be confirmed with pressing the OK button before
the options are stored, otherwise changes will be lost.
Initialise NVM. The moment the processor recognizes a
corrupted NVM, the initialise NVM line will be highlighted.
Now, two things can be done (dependent of the service
instructions at that moment):
Save the content of the NVM via ComPair for
development analysis, before initializing. This will give
the Service department an extra possibility for
diagnosis (e.g. when Development asks for this).
Initialise the NVM.

39mm

27mm

PHILIPS

040

MODEL:
32PF9968/10
PROD.SERIAL NO:
AG 1A0620 000001

(CTN Sticker)

10000_038_090121.eps
090819

Figure 5-3 Location of Display Option Code sticker

Note: When the NVM is corrupted, or replaced, there is a high


possibility that no picture appears because the display code is
not correct. So, before initializing the NVM via the SAM, a
picture is necessary and therefore the correct display option
has to be entered. Refer to Chapter 6. Alignments for details.
To adapt this option, its advised to use ComPair (the correct
values for the options can be found in Chapter 6. Alignments)
or a method via a standard RC (described below).
Changing the display option via a standard RC: Key in the
code 062598 directly followed by the MENU (or "HOME")
button and XXX (where XXX is the 3 digit decimal display
code as mentioned on the sticker in the set). Make sure to key
in all three digits, also the leading zeros. If the above action is
successful, the front LED will go out as an indication that the
RC sequence was correct. After the display option is changed
in the NVM, the TV will go to the Standby mode. If the NVM was
corrupted or empty before this action, it will be initialized first
(loaded with default values). This initializing can take up to 20
seconds.

back to
div. table

Store - go right. All options and alignments are stored


when pressing cursor right or the OK button.
Software maintenance.
SW Events. In case of specific software problems, the
development department can ask for this info.
HW Events. In case of specific software problems, the
development department can ask for this info :
- Event 26: refers to a power dip, this is logged after
the TV set reboots due to a power dip.
- Event 17: refers to the power OK status, sensed even
before the 3 x retry to generate the error code.
Test settings. For development purposes only.
RF4CE pairing tables. Clear paired remote control. Repairing (coldboot of platform possibly needed) can be done
by pressing the red/blue hot keys simultaneously for a few
seconds.(be sure the distance between the remote control
and TV set RF4CE receiver is less then 30cm). Message
like Pairing successful, confirms the match-make.
Development 1 file versions. Not useful for Service
purposes, this information is mainly used by the
development department.
Development 2 file versions. Not useful for Service
purposes, this information is mainly used by the
development department.
Upload to USB. To upload several settings from the TV to
an USB stick, which is connected to the SSB. The items are
Personal settings, Option codes, Alignments,
Identification data (includes the set type and prod code +
all 12NC like SSB, display, boards), History list. The All
item supports the upload of all several items at once.
A directory repair\ will be created in the root of the
USB stick.
To upload the settings, select each item separately, press
cursor right (or the OK button), confirm with OK and
wait until the message Done appears. In case the
download to the USB stick was not successful, Failure will
be displayed. In this case, check if the USB stick is
connected properly and if the directory repair is present in
the root of the USB stick. Now the settings are stored onto
the USB stick and can be used to download into another TV
or other SSB. Uploading is of course only possible if the
software is running and preferably a picture is available.
This method is created to be able to save the customers
TV settings and to store them into another SSB.
Important remark : to upload the channel list, select
Home => Setup => TV settings => General settings
=> Channel list copy => Copy to USB.The procedure is
also described in the (electronic) user manual.
Download from USB. To download several settings from
the USB stick to the TV, same way of working needs to be
followed as described in Upload to USB. The All item
supports to download all several items at once.
Important remark : to download the channel list, select
Home => Setup => TV settings => General settings
=> Channel list copy => Copy to TV. The procedure is
also described in the (electronic) user manual.

2012-Jun-29

EN 18

5.

QFU1.1E LA

Service Modes, Error Codes, and Fault Finding

NVM editor. For NET TV the set Type number must be


entered correctly.
Also the Production code (factory location code), 12NC
SSB, 12NC display and 12NC supply can be entered
here via the RC-transmitter.Be sure the cursor is put fully
to the left (use back key) of the dialog box before enter the
new data.
Correct data can be found on the side/rear sticker.

Key in the code 123654 via the standard RC transmitter.


Note: Activation of the CSM is only possible if there is no (user)
menu on the screen!
How to Navigate
By means of the CURSOR-DOWN/UP knob on the RCtransmitter, can be navigated through the menus.
Contents of CSM
The contents are reduced to 3 pages: General, Software
versions and Quality items. The group names itself are not
shown anywhere in the CSM menu.

How to Navigate
In SAM, the menu items can be selected with the
CURSOR UP/DOWN key on the RC-transmitter. The
selected item will be highlighted. When not all menu items
fit on the screen, move the CURSOR UP/DOWN key to
display the next/previous menu items.
With the CURSOR LEFT/RIGHT keys, it is possible to:
(De) activate the selected menu item.
(De) activate the selected sub menu.
With the OK key, it is possible to activate the selected
action.

General
Set type. This information is very helpful for a helpdesk/
workshop as reference for further diagnosis. In this way, it
is not necessary for the customer to look at the rear of the
TV set. Note that if an NVM is replaced or is initialized after
corruption, the set type content has to be re-written to
NVM.The update can be done via the NVM editor available
in SAM.
Production code. Displays the production code (the serial
number) of the TV. Note that if an NVM is replaced or is
initialized after corruption, the production code content has
to be re-written to NVM. The update can be done via the
NVM editor available in SAM.
Installed date. Indicates the date of the first installation of
the TV. This date is acquired by time extraction.
Options 1. Displays the option codes numbers of option
group 1 as set in SAM (Service Alignment Mode).
Options 2. Displays the option codes numbers of option
group 2 as set in SAM (Service Alignment Mode).
12NC SSB. Gives an identification of the SSB as stored in
NVM. Note that if an NVM is replaced or is initialized after
corruption, this identification number has to be re-written to
NVM. The update can be done via the NVM editor available
in SAM. This identification number is the 12nc number of
the SSB.
12NC display. Shows the 12NC of the display. Note that if
an NVM is replaced or is initialized after corruption, this
identification number has to be re-written to NVM. The
update can be done via the NVM editor available in SAM.
12NC supply. Shows the 12NC of the power supply. Note
that if an NVM is replaced or is initialized after corruption,
this identification number has to be re-written to NVM. The
update can be done via the NVM editor available in SAM.
12NC RF4CE board. Shows the 12NC of the RF4CE
board.

How to Exit SAM


Use one of the following methods:
Switch the TV set to STAND-BY via the RC-transmitter.
Via a standard RC-transmitter, key in 00 sequence, or
select the BACK key.
5.2.3

Customer Service Mode (CSM)


Purpose
When a customer is having problems with his TV-set, he can
call his dealer or the Customer Helpdesk. The service
technician can then ask the customer to activate the CSM, in
order to identify the status of the set. Now, the service
technician can judge the severity of the complaint. In many
cases, he can advise the customer how to solve the problem,
or he can decide if it is necessary to visit the customer.
The CSM is a read only mode; therefore, modifications in this
mode are not possible.
Provided CSM is activated, every menu from CSM can be used
as check for the back end chain video.So for all CSM content
displayed, it could be determined that the back end video chain
is working.
When CSM is activated and there is a USB stick connected to
the TV set, the software will dump the CSM content to the USB
stick. The file (CSM_model number_serial number.txt) will be
saved in the root of the USB stick. This info can be handy if no
information is displayed.

Software versions
Current main software. Displays the build-in main
software version. In case of field problems related to
software, software can be upgraded. As this software is
consumer upgradeable, it will also be published on the
Internet.
Example: QF1xx-1.2.3.4
Standby software. Displays the build-in standby
processor software version. Upgrading this software will be
possible via USB (see section 5.9 Software Upgrading).
Example: STDBY_61.0.0.7
e-UM version. Displays the electronic user manual SWversion (12NC version number). Most significant number
here is the last digit.
Strings database version. Reflects the latest embedded
string database version .
FPGA video version.Displays the Scan/backlight FPGA
software version.Device processes the backlight + boost
pwm control, scanning, 3D drive and ambilight buffering.
3D dongle software version. not applicable.
FRC-V software.not applicable.
RF4CE software.version for the RF4CE board, comes
along with the main software.

Additional in CSM mode (with USB stick connected), pressing


OK will create an extended CSM dump file on the USB stick.
This file (Extended_CSM_model number_serial number.txt)
contains:
The normal CSM dump information,
All items (from SAM load to USB, but in readable format),
Operating hours,
Error codes,
SW/HW event logs.
To have fast feedback from the field, a flashdump can be
requested by development. When in CSM, push the red
button and key in serial digits 2679 (same keys to form the
word COPY with a cellphone). A file Dump_model
number_serial number.bin will be written on the connected
USB device. This can take 1/2 minute, depending on the
quantity of data that needs to be dumped.
Also when CSM is activated, the LAYER 1 error is displayed via
blinking LED.(see also section 5.5 Error Codes).
How to Activate CSM

2012-Jun-29

back to
div. table

Service Modes, Error Codes, and Fault Finding


Quality items
Signal quality. Bad / average /good (not for DVB-S).
Ethernet MAC address. Displays the MAC address
present in the SSB.
Wireless MAC address. Displays the wireless MAC
address to support the Wi-Fi functionality.
BDS key. Indicates if the set is in the BDS status.
CI module. Displays status if the common interface
module is detected.
CI + protected service. Yes/No.
Event counter :
S : 000X 0000(number of software recoveries : SW
EVENT-LOG #(reboots)
S : 0000 000X (number of software events : SW EVENTLOG #(events)
H : 000X 0000(number of hardware errors)
H : 0000 000X (number of hardware events : SW EVENTLOG #(events).
Coldboot counter. Neglect BDS mode settings
Fastcoldboot counter. Neglect BDS mode settings
Hotboot counter. Neglect BDS mode settings
Application hotboot counter. Neglect BDS mode
settings

QFU1.1E LA

5.

EN 19

How to Exit CSM


Press MENU (or "HOME") / Back key on the RC-transmitter.

5.3

Start-up
As described, the start-up diagrams below, documents which
supplies are present at any certain moment.

Off
Mains
off

Mains
on

WakeUp
requested

- WakeUp requested
- Acquisition needed

St by

Semi
St by

- stby requested and


no data Acquisition
required

GoToProtection
(triggered during startup
by standby P)

Active
St by
requested

WakeUp
requested
(SDM)
GoToProtection
GoToProtection

Protection

On

19210_076_120504.eps
120504

Figure 5-4 Transition diagram

back to
div. table

2012-Jun-29

EN 20

5.

QFU1.1E LA

Service Modes, Error Codes, and Fault Finding

Off
Stand by or
Protection

AC~ Mains is applied

Standby Supply starts running.


All standby supply voltages become available.

st-by P resets, resulting in a high impedant output


stage of the I/O ports.

Initialise I/O pins of the st-by P


- Keep AVC system in reset (internal signal)
- Switch RESET-FUSION-OUTn LOW
- Switch RESET-HDMI-MUXn LOW
- Switch RESET-ETHERNETn LOW
- Switch AUDIO-MUTEn LOW
- Switch SPLASH-ON LOW
- Switch LCD-PWR-ONn High

If the protection state was left by short circuiting the


SDM pins, detection of a protection condition during
startup shall stall the startup. Protection conditions
occuring in a playing set shall be ignored. The
protection mode shall not be entered.

Switch ENABLE-WOLAN high to power Ethernet PHY


and Wifi dongle

Switch ENABLE-WOLANn high to power Ethernet


PHY and internal Wifi dongle if Networked Standby
was Off in the Standby mode.

start keyboard scanning, RC detection.


Wake up reasons are off.

Switch ON Platform supply by switching High the


STANDBYn line.
Startup shall continue from the
moment a valid detection is received.

12V platform is turned on, automatically enabling the


low voltage DCDC converter outputs

Detect2 high received


within 2 seconds?

No

Yes

12V error:
Layer1: 3
Layer2: 16

Enter protection

Wait 300ms

Enable the supply detection algorithm

All display related I/O lines should be


LOW as long as the Tcon is not
powered to avoid leakage current and
tcon startup problems.
These lines will furtheron be
dynamically controlled by the mainSW.

Start AVC system


No
Switch following lines asap:(part of preBOOT)
(GPIO2): LOW
CTRL-DISP2 (GPIO3): LOW
CTRL-DISP3 (GPIO8): LOW
CTRL-DISP4 (BKLGON): LOW
3D-LR (PWM0): LOW
BL-SPI-CS_BL-I-CTRL (PWM1): LOW
BL-DIM (BOOST): LOW

Small delay between AVC boot and


other platform ICs is preferred to limit
rush-in current on Platform.

Wait 10ms

Switch RESET-FUSION-OUTn, RESETHDMI-MUXn , RESET-ETHERNETn High

19210_080_120504.eps
120504

Figure 5-5 Off to Semi Stand-by flowchart (part 1)

2012-Jun-29

back to
div. table

Service Modes, Error Codes, and Fault Finding

QFU1.1E LA

No

5.

EN 21

Wake up reason
coldboot to Active mode?

yes

No

AUDIO-MUTEn is switched by MIPS code


later on in the startup process when audio
needs to be released

Standby P monitors
boot process and will
init a restart if Boot
process hampers

No

Startup screen cfg file


present?

MIPS boots

yes

Reset-lines are switched

MIPS sends out startup screen

TV application starts

MIPS starts up the display.

Boot is failing

Set was
started with
SDM pin?

Startup screen visible

Wait 4 seconds before restarting


No
Yes

No

Switch AVC in reset

Switch RESET-FUSION-OUTn, RESETHDMI-MUXn , RESET-ETHERNETn Low

Semi-Standby

3-th try?Switch Standby I/O line LOW

Yes
Blink error code
Layer 1 error 2

Ignore boot failure:


Stall the startup process.
Blink Layer2 error 53.
Enter protection without
turning off the supplies

Enter protection
19210_081_120504.eps
120504

Figure 5-6 Off to Semi Stand-by flowchart (part 2)

back to
div. table

2012-Jun-29

EN 22

5.

QFU1.1E LA

Service Modes, Error Codes, and Fault Finding

Semi Standby
The assumption here is that a fast toggle (<2s) can
only happen during ON->SEMI ->ON. In these states,
the AVC is still active and can provide the 2s delay. A
transition ON->SEMI->STB Y->SEMI->ON cannot be
made in less than 2s, because the standby state will
be maintained for at least 4s.

Wait until previous on-state is left more than 2


seconds ago. (to prevent LCD display problems)

Assert RGB video blanking


and audio mute

Display already on?


(cold boot with splash
screen)

Yes
Initialize audio and video
processing IC's and functions
according needed use case.

No

Startup display
(see separate tab)

Start POWER-OK line


detection algorithm as defined
in the CHS service.

Wait until valid and stable audio and video, corresponding to the
requested output is delivered
AND
the backlight has been switched on for at least the time which is
indicated in the display file as preheat time

return
Release audio mute

unblank the video

Set the Ambilight functionality according the last status


settings

Display cfg file present


and up to date, according
correct display option?
No
Yes
Prepare Start screen Display config
file and copy to Flash

Active
19210_079_120504.eps
120504

Figure 5-7 Semi Stand-by to Active flowchart

2012-Jun-29

back to
div. table

Service Modes, Error Codes, and Fault Finding

QFU1.1E LA

5.

EN 23

Active
Mute all sound outputs according
information in the FMS AUDIO

Wait 100ms

Switch off POK line detection


algorithm (see CHS service)

Switch Off LCD backlight

Mute all video outputs

switch off Ambilight (see CHS ambilight)

Shut down the display


(see separate sheet)

Wait until Ambilight has faded out:


Output power Observer should be zero

Semi Standby
19210_077_120504.eps
120504

Figure 5-8 Active to Semi Stand-by flowchart

back to
div. table

2012-Jun-29

EN 24

5.

Service Modes, Error Codes, and Fault Finding

QFU1.1E LA

Semi Stand by

If ambientlight functionality was used in semi-standby


(lampadaire mode), switch off ambient light (see CHS
ambilight)

*) If this is not performed and the set is


switched to standby when the switch off of
the ambilights is still ongoing, the lights will
switch off abruptly when the supply is cut.

Delay transition until ramping down of ambient light is


finished. *)

transfer Wake up reasons to the Stand by P.

transfer specific Firmware and Wake up reasons to the


Wifi dongle to allow networked standby

Switch AVC system in reset state


Switch reset-USB, Reset-Ethernet and Reset-DVBs
LOW

Switch RESET-FUSION-OUTn, RESET-HDMI-MUXn ,


RESET-ETHERNETn Low

Wait 10ms

Disable all supply related protections and switch off


the DC/DC converters (ENABLE-3V3n)

Switch OFF all supplies by switching HIGH the


Standby I/O line

Important remarks:
release reset audio 10 sec after entering
standby to save power

Networked Standby
required?

No

Switch ENABLE-WOLAN Low to


power off the Ethernet PHY and
Internal Wifi dongle.

Also here, the standby state has to be


maintained for at least 4s before starting
another state transition.
Yes

Stand by
19210_078_120504.eps
120504

Figure 5-9 Semi Stand-by to Stand-by flowchart

2012-Jun-29

back to
div. table

Service Modes, Error Codes, and Fault Finding

QFU1.1E LA

5.4

Service Tools

5.5

Error Codes

5.4.1

ComPair

5.5.1

Introduction

Introduction
ComPair (Computer Aided Repair) is a Service tool for Philips
Consumer Electronics products and offers the following:
1. ComPair helps to quickly get an understanding on how to
repair the chassis in a short and effective way.
2. ComPair allows very detailed diagnostics and is therefore
capable of accurately indicating problem areas. No
knowledge on I2C or UART commands is necessary,
because ComPair takes care of this.
3. ComPair speeds up the repair time since it can
automatically communicate with the chassis (when the P
is working) and all repair information is directly available.
4. ComPair features TV software up possibilities.

How to Connect
This is described in the chassis fault finding database in
ComPair.

TO TV

ComPair II
RC in

RC out

TO
I2C SERVICE
CONNECTOR

TO
UART SERVICE
CONNECTOR

Multi
function

Optional Power Link/ Mode


Switch
Activity

I2C

RS232 /UART

If no errors are there, the LED should not blink at all in


CSM or SDM. No spacer must be displayed as well.
There is a simple blinking LED procedure for board
level repair (home repair) so called LAYER 1 errors
next to the existing errors which are LAYER 2 errors (see
Table 5-2).
LAYER 1 errors are one digit errors.
LAYER 2 errors are 2 digit errors.
In protection mode.
From consumer mode: LAYER 1.
From SDM mode: LAYER 2.
Fatal errors, if I2C bus is blocked and the set reboots,
CSM and SAM are not selectable.
From consumer mode: LAYER 1.
From SDM mode: LAYER 2.
In CSM mode.
When entering CSM: error LAYER 1 will be displayed
by blinking LED.
In SDM mode.
When SDM is entered via Remote Control code or the
hardware pins, LAYER 2 is displayed via blinking LED.
Error display on screen.
In CSM no error codes are displayed on screen.
In SAM the complete error list is shown.

Basically there are three kinds of errors:


Errors detected by the Standby software which lead to
protection. These errors will always lead to protection and
an automatic start of the blinking LED LAYER 1 error.
(see section 5.6 The Blinking LED Procedure).
Errors detected by the Standby software which not
lead to protection. In this case the front LED should blink
the involved error. See also section 5.5 Error Codes, 5.5.4
Error Buffer. Note that it can take up several minutes
before the TV starts blinking the error (e.g. LAYER 1
error = 2, LAYER 2 error = 15 or 53).
Errors detected by main software (MIPS). In this case
the error will be logged into the error buffer and can be read
out via ComPair, via blinking LED method LAYER 1-2
error, or in case picture is visible, via SAM.

PC

ComPair II Developed by Philips Brugge

HDMI
I2C only

EN 25

The error code buffer contains all detected errors since the last
time the buffer was erased. The buffer is written from left to
right, new errors are logged at the left side, and all other errors
shift one position to the right.
When an error occurs, it is added to the list of errors, provided
the list is not full. When an error occurs and the error buffer is
full, then the new error is not added, and the error buffer stays
intact (history is maintained).
To prevent that an occasional error stays in the list forever, the
error is removed from the list after more than 50 hrs. of
operation.
When multiple errors occur (errors occurred within a short time
span), there is a high probability that there is some relation
between them.

Specifications
ComPair consists of a Windows based fault finding program
and an interface box between PC and the (defective) product.
The ComPair II interface box is connected to the PC via an
USB cable. For the TV chassis, the ComPair interface box and
the TV communicate via a bi-directional cable via the service
connector(s).
The ComPair fault finding program is able to determine the
problem of the defective television, by a combination of
automatic diagnostics and an interactive question/answer
procedure.

TO
UART SERVICE
CONNECTOR

5.

Optional power
5V DC

10000_036_090121.eps
091118

Figure 5-10 ComPair II interface connection


Caution: It is compulsory to connect the TV to the PC as
shown in the picture above (with the ComPair interface in
between), as the ComPair interface acts as a level shifter. If
one connects the TV directly to the PC (via UART), ICs can be
blown!

5.5.2

How to Read the Error Buffer


Use one of the following methods:
On screen via the SAM (only when a picture is visible).
E.g.:
00 00 00 00 00: No errors detected
23 00 00 00 00: Error code 23 is the last and only
detected error.
37 23 00 00 00: Error code 23 was first detected and
error code 37 is the last detected error.
Note that no protection errors can be logged in the
error buffer.
Via the blinking LED procedure. See section 5.5.3 How to
Clear the Error Buffer.

How to Order
ComPair II order codes:
ComPair II interface: 3122 785 91020.
Software is available via the Philips Service web portal.
ComPair UART interface cable for QF1x.x.
(using 3.5 mm Mini Jack connector): 3138 188 75051.
Note: When you encounter problems, contact your local
support desk.
back to
div. table

2012-Jun-29

EN 26

5.5.3

5.

Service Modes, Error Codes, and Fault Finding

QFU1.1E LA

Via ComPair.

If possible, check the entire contents of the error buffer. In


some situations, an error code is only the result of another error
code and not the actual cause.(e.g. a fault in the protection
detection circuitry can also lead to a protection)
There are several mechanisms of error detection:
Via error bits in the status registers of ICs.
Via polling on I/O pins going to the standby processor.
Via sensing of analog values on the standby processor or
the Mips.
Via a not acknowledge of an I2C communication.

How to Clear the Error Buffer


Use one of the following methods:
By activation of the RESET ERROR BUFFER command
in the SAM menu.
If the content of the error buffer has not changed for 50+
hours, it resets automatically.

5.5.4

Error Buffer

Take notice that some errors need several minutes before they
start blinking or before they will be logged. So in case of
problems wait 2 minutes from start-up onwards, and then
check if the front LED is blinking or if an error is logged.

In case of non-intermittent faults, clear the error buffer before


starting to repair (before clearing the buffer, write down the
content, as this history can give significant information). This to
ensure that old error codes are no longer present.
Table 5-2 Error code overview

Description

Layer 1

Layer 2

Monitored
by

Error/
Prot

Error Buffer/
Blinking LED

Device

Defective Board

I2CM3 (SSB + SRF bus)

13

MIPS

BL / EB

SSB

SSB

I2CM2 (BE bus)

14

MIPS

BL / EB

SSB

SSB

I2CM1(FE bus)

18

MIPS

BL / EB

SSB

SSB

Fusion doesnt boot (HW cause)

15

Stby P

BL

Fusion

SSB

12V

16

Stby P

BL

Supply

Display supply (POK)

17

MIPS

EB

Supply

HDMI mux

23

MIPS

EB

SII9387

SSB

I2C switch

24

MIPS

EB

PCA9540

SSB

Channel dec DVB-T2

27

MIPS

EB

CXD2834

SSB

Channel dec DVB-S2

28

MIPS

EB

STV0903

SSB

Lnb controller

31

MIPS

EB

LNBH25

SSB

Hybrid Tuner

34

MIPS

EB

SUT-RE214Z

SSB

Main NVM

35

MIPS

EB

STM24C64

SSB

Tuner DVB-S2

36

MIPS

EB

STV6110

SSB

Class-D

37

MIPS

EB

TAS 5731 PHP

SSB

FPGAScanBacklight

38

MIPS

EB

XC6SLX4

SSB

T sensor SSB/set

42

MIPS

EB

LM 75

T sensor/SSB

Light sensor

43

MIPS

EB

TSL2571

Set

P touch control

44

MIPS

EB

Set

RF4CE

46

MIPS

EB

Set

MIPS doesnt boot (SW cause)

53

Stby P

BL

FUSION

SSB

Extra Info
Rebooting. When a TV is constantly rebooting due to
internal problems, most of the time no errors will be logged
or blinked. This rebooting can be recognized via a ComPair
interface and Hyperterminal (for Hyperterminal settings,
see section 5.8 Fault Finding and Repair Tips, 5.8.6
Logging). Its shown that the loggings which are generated
by the main software keep continuing.
Error 13 (I2C bus M3, SSB + SRF bus blocked). Current
situation: when this error occurs, the TV can reboot due to
the blocked bus. The best way for further diagnosis here, is
to check the logging output.
Error 14 (I2C bus M2, BE bus blocked). Current situation:
when this error occurs. The best way for further diagnosis
here, is to check the logging output.
Error 18 (I2C bus M1, FE bus blocked). Current situation:
when this error occurs. The best way for further diagnosis
here, is to check the logging output.
Error 15 (Fusion doesnt boot). Indicates that the main
processor was not able to read his bootscript. This error will
point to a hardware problem around the Fusion (supplies
not OK, Fusion device completely dead, link between Mips
and Stand-by Processor broken, etc...)
Other root causes for this error can be due to hardware
problems regarding the DDRs and the bootscript reading
from the Fusion device.
Error 16 (12V). This voltage is made in the power supply
and results in protection (LAYER 1 error = 3) in case of
absence. When SDM (maintain grounding continuously) is
activated we see blinking LED LAYER 2 error = 16.

2012-Jun-29

back to
div. table

Error 17 (Display Supply). Here the status of the Power


OK is checked by software, no protection will occur during
failure of the display supply, only error logging. LED
blinking of LAYER 1 error = 3 in CSM, in SDM this gives
LAYER 2 error = 17.
Error 23 (HDMI mux). When there is no I2C
communication towards the HDMI mux after start-up,
LAYER 2 error = 23 will be logged and displayed via the
blinking LED procedure if SDM is switched on.
Error 24 (I2C switch). When there is no I2C
communication towards the I2C switch, LAYER 2
error = 24 will be logged and displayed via the blinking LED
procedure when SDM is switched on.
Error 27 (Channel dec DVB-T2). When there is no I2C
communication towards the DVB-T channel decoder,
LAYER 2 error = 27 will be logged and displayed via the
blinking LED procedure if SDM is switched on.
Error 28 (Channel dec DVB-S2). When there is no I2C
communication towards the DVB-S channel decoder,
LAYER 2 error = 28 will be logged and displayed via the
blinking LED procedure if SDM is switched on.
Error 31 (Lnb controller). When there is no I2C
communication towards this device, LAYER 2 error = 31
will be logged and displayed via the blinking LED
procedure if SDM is activated.
Error 34 (Tuner). When there is no I2C communication
towards the tuner during start-up, LAYER 2 error = 34 will
be logged and displayed via the blinking LED procedure
when SDM is switched on.
Error 35 (main NVM). When there is no I2C
communication towards the main NVM during start-up,

Service Modes, Error Codes, and Fault Finding

LAYER 2 error = 35 will be displayed via the blinking LED


procedure when SDM is switched on. All service modes
(CSM, SAM and SDM) are accessible during this failure,
observed in the Uart logging as follows: "<< ERRO >>>
PFPOW_.C: First Error (id19, Layer_1= 2 Layer_= 35)".
Error 36 (Tuner DVB-S). When there is no I2C
communication towards the DVB-S tuner during start-up,
LAYER 2 error = 36 will be logged and displayed via the
blinking LED procedure when SDM is switched on.
Error 37 (Class-D). When there is no I2C communication
towards the Class-D amplifier during start-up, LAYER 2
error = 37 will be logged and displayed via the blinking LED
procedure when SDM is switched on.
Error 38 (FPGA ScanBacklight). When there is no I2C
communication towards this FPGA device during start-up,
LAYER 2 error = 38 will be logged and displayed via the
blinking LED procedure when SDM is switched on. This
device supports the backlight + boost pwm control,
scanning, 3D drive and ambilight buffering.
Error 42 (Temp sensor). Only applicable for TV sets
equipped/stuffed with temperature devices.
Error 43 (Light sensor). When there is no I2C
communication towards the light sensor device during
start-up, LAYER 2 error = 43 will be logged and displayed
via the blinking LED procedure when SDM is switched on.
Error 44 (Touch control). When there is no I2C
communication towards the touch control micro processor
during start-up, LAYER 2 error = 44 will be logged and
displayed via the blinking LED procedure when SDM is
switched on.
Error 46 (RF4CE). When there is no I2C communication
towards the RF4CE driver during start-up, LAYER 2
error = 46 will be logged and displayed via the blinking LED
procedure when SDM is switched on.
Error 53. This error will indicate that the Fusion device has
read his bootscript (when this would have failed, error 15
would blink) but initialization was never completed because
of hardware problems (NAND flash, DDR...) or software
initialization problems. Possible cause could be that there
is no valid software loaded (try to upgrade to the latest main
software version). Note that it can take a few minutes
before the TV starts blinking LAYER 1 error = 2 or in SDM
(maintain grounding continuously), LAYER 2 error = 53.

5.6

The Blinking LED Procedure

5.6.1

Introduction

QFU1.1E LA

5.

EN 27

4. A pause of approximately 3 s,
5. When all the error codes are displayed, the sequence
finishes with a LED blink of 3 s (spacer).
6. The sequence starts again.
Example: Error 12 8 6 0 0.
After activation of the SDM, the front LED will show:
1. One long blink of 750 ms (which is an indication of the
decimal digit) followed by a pause of 1.5 s
2. Two short blinks of 250 ms followed by a pause of 3 s
3. Eight short blinks followed by a pause of 3 s
4. Six short blinks followed by a pause of 3 s
5. One long blink of 3 s to finish the sequence (spacer).
6. The sequence starts again.
5.6.2

How to Activate
Use one of the following methods:
Activate the CSM. The blinking front LED will show the
layer 1 error(s), this works in normal operation mode or
automatically when the error/protection is monitored by the
Standby processor.
In case no picture is shown and there is no LED blinking,
read the logging to detect whether error devices are
mentioned. (see section 5.8 Fault Finding and Repair
Tips, 5.8.6 Logging).
Activate the SDM. The blinking front LED will show the
entire content of the LAYER 2 error buffer, this works in
normal operation mode or when SDM (via hardware pins)
is activated when the tv set is in protection.

5.7

Protections

5.7.1

Software Protections
Most of the protections and errors use either the standby
microprocessor or the MIPS controller as detection device.
Since in these cases, checking of observers, polling of ADCs,
and filtering of input values are all heavily software based,
these protections are referred to as software protections.
There are several types of software related protections, solving
a variety of fault conditions:
Related to supplies: presence of the +5V, +3V3 and 1V2
needs to be measured, no protection triggered here.
Protections related to breakdown of the safety check
mechanism. E.g. since the protection detections are done
by means of software, failing of the software will have to
initiate a protection mode since safety cannot be
guaranteed any more.

The blinking LED procedure can be split up into two situations:


Blinking LED procedure LAYER 1 error. In this case the
error is automatically blinked when the TV is put in CSM.
This will be only one digit error, namely the one that is
referring to the defective board (see table 5-2 Error code
overview) which causes the failure of the TV. This
approach will especially be used for home repair and call
centres. The aim here is to have service diagnosis from a
distance.
Blinking LED procedure LAYER 2 error. Via this
procedure, the contents of the error buffer can be made
visible via the front LED. In this case the error contains
2 digits (see table 5-2 Error code overview) and will be
displayed when SDM (hardware pins) is activated. This is
especially useful for fault finding and gives more details
regarding the root cause of the defective board.
Important remark:
For an empty error buffer, the LED should not blink at all in
CSM or SDM. No spacer will be displayed.

Remark on the Supply Errors


The detection of a supply dip or supply loss during the normal
playing of the set does not lead to a protection, but to a cold
reboot of the set. If the supply is still missing after the reboot,
the TV will go to protection.
Protections during Start-up
During TV start-up, some voltages and IC observers are
actively monitored to be able to optimize the start-up speed,
and to assure good operation of all components. If these
monitors do not respond in a defined way, this indicates a
malfunction of the system and leads to a protection. As the
observers are only used during start-up, they are described in
the start-up flow in detail (see section 5.3 Start-up).

5.8

Fault Finding and Repair Tips


Read also section 5.5 Error Codes, 5.5.4 Error Buffer, Extra
Info.

When one of the blinking LED procedures is activated, the front


LED will show (blink) the contents of the error buffer. Error
codes greater then 10 are shown as follows:
1. n long blinks (where n = 1 to 9) indicating decimal digit
2. A pause of 1.5 s
3. n short blinks (where n= 1 to 9)

5.8.1

Ambilight
Due to the aging process on the LEDs fitted on the Ambilight
module, there can be a difference in the colour and/or light

back to
div. table

2012-Jun-29

EN 28

5.

QFU1.1E LA

Service Modes, Error Codes, and Fault Finding

output of the spare ambilight modules in comparison with the


originals ones contained in the TV set. Via SAM => alignments
=> ambilight, the spare module can be fine-tuned.
Other possibility: the original values can also be recovered via
SAM, Upload to USB => alignments. Now the original settings
are on the USB stick and can be reloaded into another SSB
(NVM).
5.8.2

Supply voltages +1V1-FD, +1V5 and +1V2-MIPS are started


immediately when +12V rises above the 5V level. The rest of
the supply voltages (+5V, +3V3, +2V5, +1V2-FA and +1V1-FA
are turned on by signal DETECT12V when becomes high. The
tuners are supplied from their respective linear voltage
regulators when +5V starts.+1V0-DVBS is started almost at the
same time, when +2V5-DVBS (derived from +3V3-DVBS via
the equivalent diode 7RC2) rises.

CSM
When CSM is activated and there is a USB stick connected to
the TV, the software will dump the complete CSM content to the
USB stick. The file (Csm.txt) will be saved in the root of the USB
stick. If this mechanism works it can be concluded that a large
part of the operating system is already working (MIPS, USB...)

5.8.3

DETECT12V becomes high when +12V rises above 10V and


stays above 9.5V (0.5V hysteresis).

DC/DC Converter

+3V3AL will become available when enabled via software


(signal ENABLE-3V3-AMBI high).In case of TV sets having
Ambilight consumption from 12V + higher than 1A, the
electronic protection circuit (7UAC and surrounding
components) is used instead of fuse 1UA2. AMBI-POWER
should be available shortly (100 ms) after +12V starts if there
is no load on it. The over-current trigger level is around 4.1A.
Once triggered, it can be reset by removing the shortcircuit
cause and keeping it under no load condition for about 100 ms.

Description
Input power for the TV platform comes from the main power
supply that delivers +3V3STANDBY (pin 1 of connector 1M95)
and +12V (pins 5,6 of the same connector). +3V3STANDBY
(3.3V nominal) is the permanent voltage, supplying the standby
microprocessor inside the Fusion chip while +12V is started by
the STANDBY signal (connector 1M95, pin 2) when going from
high to low. +12V is split in three branches via fuses 1UA0
(+12Va), 1UA1 (+12Vb) and 1UP1(+12-DVBS):
+12Va serves as input voltage for the switching voltage
regulators that deliver +1V1-FD and +1V5.
+12Vb is used as input voltage for the switching voltage
regulators that deliver +3V3 and +5V.
+12V-DVBS (if DVB-S functionality is present) goes to 12V
to +1V0-DVBS and 12V to +V-LNB switching regulators.

+V-LNB value is determined via software: around 13V for


vertical polarized satellite channels and around 18V for the
horizontal ones. Maximum current is limited in both cases to
400mA
Debugging
The best way to find a failure in the DC/DC converters is to
check their start-up sequence at power on, presuming that
the external supply is operational. Take the STANDBY signal
"high"-to-"low" transition as trigger reference and check the
power start-up sequence as described above.

The on board power supply consists of 4 switching voltage


regulators (6 in case of DVB-S version), 6 linear voltage
regulators (7 in case of DVB-S version) one power switch
delivering +3V3AL for Ambilight driver boards and an overcurrent protection for 12V (AMBI-POWER) Ambilight boards.

Tips
Behaviour comparison with a working Fusion platform can
be a fast way to locate failures.
Check first the integrity of fuses 1UA0, 1UA1 and (if
present) 1UA2 and 1UP1.
If a fuse is found interrupted: check the respective +12Va
(or +12Vb or +12V-DVBS) short circuit with all of the
derived supply voltages, for example: a +12Va ->+1V5
short circuit will probably be caused by a defective 7UB5
integrated circuit.
Switching frequency should be around 400KHz for 12V to
+V-LNB switching voltage regulator, 500KHz for +12V to
+1V1-FD and 600KHz...700KHz for the others.
When a short circuit to GND is found on one of the supply
voltage delivered by a switching voltage regulator, then try
first removing the power coil(s) from the output filter of the
converter, this to point the location of the short circuit (at
converter side or at load side).

All switching voltage regulators have 12V input voltage and


deliver:
+1V0-DVBS core supply voltage for DVB-S2 demodulator
(1.02V nominal), stabilized close to the point of load by
means of SENSE+1V0-DVBS signal.
+1V1-FD Fusion main core supply voltage (0.95V...1.2V depending on DVS1 signal), stabilized close to the point of
load by means of SENSE+1V1-FD signal.
+1V5 supply voltage (1.53V nominal), for the DDR3
memories and DDR3 interface of the Fusion chip.
+3V3 supply voltage (3.37V nominal): overall 3.3V for on
board ICs and for WiFi module, also used as input voltage
for linear voltage regulators delivering +1V1-FA, +1V2-FA
and +2V5.
+5V (5.15V nominal) for USB, WiFi, Conditional Access
Module and via linear voltage regulators, the DVB-T and
DVB-S tuner supplies.
+V-LNB (13V or 18V) supply for outdoor satellite reception
equipment.

5.8.4

Power Supply Unit


For fault finding tips, refer to section 7.2.1.

The linear voltage regulators are providing:


+1V1-FA supply voltage (1.10V nominal, from +3V3) for
low power analog (PLL) blocks inside Fusion chip.
+1V2-MIPS supply voltage (1.05...1.3V depending on
DVS2 signal, input voltage: +1V5) for Fusion auxiliary core.
+1V2-FE supply voltage (1.20V nominal, from +1V5) for
HDMI multiplexer and (if present) DVB-T2 demodulator IC
device.
+1V2-FA supply voltage (1.20V nominal, from +3V3) for
higher power analog Fusion internal blocks (mainly video
ADCs).

2012-Jun-29

+2V5 supply voltage (2.5V nominal, from +3V3) for LVDS


(or Vby1) interface and various other internal blocks of
Fusion.
+3V3 supply voltages (3.3V nominal, from +5V) for RF
tuners, separate linear regulator per tuner.

5.8.5

Exit Factory Mode


To exit this mode, push the VOLUME minus button on the
TVs local keyboard for 10 seconds (this disables the
continuous mode).
Then push the SOURCE button for 10 seconds until to exit the
Factory mode.

back to
div. table

Service Modes, Error Codes, and Fault Finding


5.8.6

Logging

5.

EN 29

Starting up the TV set in the Manual Software Upgrade mode


will show access to USB, meant to copy software content from
USB to the DRAM. Progress feedback can be found in the
logging.

When something is wrong with the TV set (f.i. the set is


rebooting) you can check for more information via the logging
in Hyperterminal. The Hyperterminal is available in every
Windows application via Programs, Accessories,
Communications, Hyperterminal. Connect a ComPair UARTcable (3138 188 75051) from the service connector in the TV to
the multi function jack at the front of ComPair II box.
Required settings in ComPair before starting to log:
- Start up the ComPair application.
- Select the correct database (open file QFU1X.X, this will set
the ComPair interface in the appropriate mode).
- Close ComPair
After start-up of the Hyperterminal, fill in a name (f.i. logging)
in the Connection Description box, then apply the following
settings:
1. COMx
2. Bits per second = 115200
3. Data bits = 8
4. Parity = none
5. Stop bits = 1
6. Flow control = none
During the start-up of the TV set, the logging will be displayed.
This is also the case during rebooting of the TV set (the same
logging appears time after time). Also available in the logging
is the Display Option Code (useful when there is no picture),
look for item display number xxx in the beginning of the
logging. Tip: when there is no picture available during rebooting
you are able to check for error devices in the logging (LAYER
2 error) which can be very helpful to determine the failure cause
of the reboot. For protection state, there is no logging.
5.8.7

QFU1.1E LA

Startup in Jett Mode:


Check Uart logging in Jet mode mentioned as : JETT UART
READY.
5.8.8

Loudspeakers
Make sure that the volume is set to minimum during
disconnecting the speakers in the ON-state of the TV. The
audio amplifier can be damaged by disconnecting the speakers
during ON-state of the set!

5.8.9

Power Supply
In case of no picture when CSM (test pattern) is activated and
backlight doesnt light up, its recommended first to check the
LED drivers on the PSL(S) + wiring (LAYER 2 error = 17 is
displayed in SDM).

5.8.10 Display option code


Attention: In case the SSB is replaced, always check the
display option code number (group 2, first option number e.g.
44855) in SAM, even when picture is available. Performance
with the incorrect display option code can lead to unwanted
side-effects for certain conditions.
Also supported in this chassis:
While in the download application (start up in TV mode + OK
button pressed), the display option code can be changed via
062598 HOME XXX special SAM command (XXX=display
option in 3 digits).

Guidelines Uart logging


Description possible cases:
Uart loggings are displayed:
When Uart loggings are coming out, the first conclusion we
can make is that the TV set is starting up and
communication with the flash RAM seems to be supported.
The Fusion processor is able to read and write in the
DRAMs.
We can not yet conclude: Flash RAM and DRAMs are fully
operational/reliable.There still can be errors in the data
transfers, DRAM errors, read/write speed and timing
control.
No Uart logging at all:
No startup will end up in a blinking LED status: error
LAYER 1 = 2, error LAYER 2 = 53 (startup with SDM
solder paths continuous short).
Error LAYER 2 = 15 (hardware cause) is more related to
a supply issue while error LAYER 2 = 53 (software cause)
refers more to boot issues.
Uart loggings reporting fault conditions, error messages, error
codes, fatal errors:
Some failures are indicated by error codes in the logging,
check with error codes table (see Table 5-2 Error code
overview). e.g. => <<<ERROR>>>PLFPOW_MERR.C :
First Error (id=10,Layer_1=2,Layer_2=23).
I2C bus errors.
Not all failures or error messages should be interpreted as
fault. For instance root cause can be due to wrong option
codes settings => e.g. FpgaDimmingPresent: False/True.
In the Uart log startup script we can observe and check the
enabled loaded option codes.
Defective sectors (bad blocks) in the Nand Flash can also be
reported in the logging.
Startup in the SW upgrade application and observe the Uart
logging:
back to
div. table

2012-Jun-29

EN 30

5.

QFU1.1E LA

Service Modes, Error Codes, and Fault Finding

5.8.11 SSB Replacement

For a more general overview of steps to follow, refer to figure


5-13 SSB replacement flowchart.

Follow the instructions in the flowchart in case a SSB has to be


exchanged. See table 5-3 SSB replacement instructions.

Table 5-3 SSB replacement instructions

Step #

Action to do

Advise / Attention points / Remarks

Ensure ESD protection by using a wristband

If SSB is still functional: Go via SAM to upload to USB and copy Personal
settings - Option codes - Alignments (Presets) - Set Identification.
Advice: because of differences in memory allocation, it is advised to upgrade
main SW before copying data from existing SSB. Copy of Preset list is
possible from normal user interface.

Upload to USB: A directory repair will be created on the USB, and all data will be copied in this
directory. On sets with software before Q552-xx-140-x-x, there was an issue by copying the
program map table, so it is advised to reinstall the programs from Virgin mode instead of using
copy via USB.

Disconnect set from mains and from antenna.

Safety and ESD!

Open the set and disconnect LVDS flat cable. Disconnect other cables /
connections.

Always take care for ESD! Be extra careful when removing connectors!

Dismount the (defective) SSB from the set.

Do not damage SSB copper tracks with your tools! Do not scratch bottom of SSB (be very careful
by moving SSB over SSB supports). See Figure 5-11 and Figure 5-12.

Place new SSB in the set, and fixate/mount carefully.

Do not damage SSB copper tracks with your tools! Do not scratch bottom of SSB (be very careful
by moving SSB over SSB supports). See Figure 5-11 and Figure 5-12.

Connect PSU and other connectors. Insert the optional WiFi module.

Make sure that the connectors are correctly plugged-in and locked (click). Special attention for the
optional WiFi module: a defective WiFi module can give reboots or no start-up of the SSB. In this
case do a trial without WiFi module.

Connect LVDS connector(s).

Be very careful: wrong or bad connection can damage the TCON part on the SSB and damage
the LCD display. Check if flat cables are fitted correctly before closing the connector lock.

Connect set to mains and switch TV On.

Check start-up of the set, backlight switching On.

10

If the set does not start (or reboots) check:


- The connectors from the power supply,
- The power supply cable and connection pins,
- LVDS cable connection.

Power supply connector must snap into the socket.

11

Before programming the new SSB, upgrade to latest software. If set is starting Some SSBs will start-up in software upgrade mode, and software needs to be installed before you
up in software upgrade mode, then first install new software via software
can program the Display Option codes. Its adviced to use an autorun.upg file for software
Upgrade Menu or via the autorun.upg file.
upgrade, this in case you have no OSD on the screen.

12

If set is starting up without picture or menu (OSD), first program the correct
Display Option codes.

Use blind service mode 062598 + Home button, directly followed by the
Display Option code (3 digits). Set will switch to Standby after Display Option code is entered.

13

Go to SAM and program Set type and Serial number. This is possible via
the NVM editor and virtual keyboard. In case personal settings were
recovered from the defective SSB, you can use an Upload from USB.

Programming Set type and Serial number is mandatory to have all functionality of the set, like
DLNA, Net TV For certain sets you may need to use ComPair for this.

14

Check if option codes are correct, and keys are present. SSBs with integrated Validity of HDCP, CI+, Marlin, and WDRM keys can be checked via ComPair.
TCON needs TCON alignment in SAM.

15

Update to latest software (Standby and main software). This step is necessary Even when the SSB already has the latest software, it is mandatory to upgrade again the software
to make sure that the (optional) 200 Hz T-CON board has the latest software. to update the 200 Hz T-CON part. At the end of the main software update process, a dedicated
software is loaded, from the main processor via the LVDS connection, to upgrade the
200 Hz T-CON part. For certain LCD displays, a dedicated Display software patch (autoscript) is
available. See General Service info GSC_85590.

16

Once the set is playing, check cable connection between PSU and SSB, by
moving the cable if there are no bad connections.

17

Fill in the Electronic DDF (Defect Description Form): Fault symptom, TV type It is mandatory to fill in the E-DDF form (see the At Your Service web portal).
and TV serial number.

18

Install presets or check if all presets are OK. Check in CSM if Type number,
Serial number, Main and Standby software are correct.

19

Check connectivity to Net TV and DLNA. Check AmbiLight functionality.

Only for sets having these functionalities.

20

Inform customer about Memory Card, USB, or Hard drive PVR (Personal
Video Recording) recordings.

Inform customer that previous recordings made on Memory Card (movie download), USB, or Hard
drive will be lost. USB or Hard drive needs to be re-formatted and matched with new SSB (WDRM
Keys!).

Check the two power connectors 1M95 and 1M99. Bad contact or bad connection here can give
reboots.

Special attention for Standby software: check if Standby software ID is matching with the D-RAMs
mounted on the SSB (2 Elpida = 73, 4 Elpida = 64, 2 Hynix = 72, 4 Hynix = 63).

SSB fixation points

Significant risk of damaging the board


by the fixation point
Blue arrows: traces of friction
Red arrows: damaged components

19070_201_110728.eps
110804

19070_202_110728.eps
110804

Figure 5-11 Mounting attention points [1/2]

2012-Jun-29

Figure 5-12 Mounting attention points [2/2]

back to
div. table

Service Modes, Error Codes, and Fault Finding

QFU1.1E LA

5.

EN 31

In st ru ct io n n o t e SSB rep lacem en t Q55x.x

ST AR T

Before starting:
- prepare a USB memory stick with the latest software
- download the latest Main Software (Fus) from www.p4c.philips.com
- unzip this file
- create a folder upgrades in the root of a USB stick (size > 50 MB) and
save the autorun.upg file in this "upgrades" folder.
Note: it is possible to rename this file, e.g."Q54x_SW_version.upg"; this in
case there are more than one "autorun.upg" files on the USB stick.

Set is still oper ating?


No
Yes

C onnect the U SB stick to the set,


go to SAM and save the current TV settings via Upload to USB

1. D ismount the defective SSB.


2. Replace the SSB by a Service SSB.

Start-up the set


Due to a possible wrong display option code in the received Service
SSB (NVM), its possible that no picture is displayed. Due to this
the download application will not be shown either. This tree enables you
to load the main software step-by-step via the UART logging on the PC
(this for visual feedback).
No pictur e displayed

1) Start up the TV set, equiped with the Service SSB,


and enable the UART logging on the PC.

Set behaviour?

Pictur e displayed
Set is starting up without software
upgrade menu appearing on screen

Pictur e displayed
Set is starting up with software
upgrade menu appearing on screen

2) The TV set will start-up automatically in the


download application if main TV software is not loaded.
1) Plug the USB stick into the TV set and select
the autorun .upg file in the displayed browser.

3) Plug the prepared USB stick into the TV set. Follow the
instructions in the UART log file, press Right cursor key to enter
the list. Navigate to the autorun.upg file in the UART logging
printout via the cursor keys on the remote control. When the
correct file is selected, press Ok.

2) Now the main software will be loaded automatically,


supported by a progress bar.
4) Press "Down" cursor and Ok to start flashing the main
TV software. Printouts like: L: 1-100%, V: 1-100% and
P: 1-100% should be visible now in the UART logging.
3) Wait until the message Operation successful ! is displayed
and remove all inserted media. Restart the TV set.

5) Wait until the message Operation successful ! is logged in


the UART log and remove all inserted media. Restart the TV set.

Set the correct Display code via 062598 -HOME- xxx where
xxx is the 3 digit display panel code (see sticker on the side
or bottom of the cabinet)

After entering the Display Option code, the set is going to


Standby
(= validation of code)
Restart the set

No

Connect PC via the ComPair interface to Service connector.

Saved settings
on USB stick?

Yes

Start TV in Jett mode (DVD I + (OSD))


Open ComPair browser Q54x

Go to SAM and reload settings


via Download from USB function.

In case of settings reloaded from USB, the set type,


serial number, display 12 NC, are automatically stored
when entering display options.

Program set type number, serial number, and display 12 NC


Program E - DFU if needed.
If not already done:
Check latest software on Service website.
Update main and Stand-by software via USB.

Attention point for Net TV: If the set type and serial number are not
filled in, the Net TV functionality will not work. It will not be possible
to connect to the internet.

- Check if correct display option code is programmed.


- Verify option codes according to sticker inside the set.
- Default settings for white drive > see Service Manual.

Check and perform alignments in SAM according to the


Service Manual. Option codes, colour temperature, etc.

Final check of all menus in CSM.


Special attention for HDMI Keys and Mac address.
Check if E - D F U is present.

End

Q55x.E SSB Board swap ER on behalf of VDS


Updated 28-07-2011

19070_200_110728.eps
111103

Figure 5-13 SSB replacement flowchart

back to
div. table

2012-Jun-29

EN 32

5.

QFU1.1E LA

Service Modes, Error Codes, and Fault Finding

Set is st art in g u p in F act o ry m o d e

Set is starting up in F actory m ode?

Noisy picture with bands/lines is visible and the


RED LED is continuous on.

An F is displayed (and the HDMI 1


input is displayed).

- Press the volume minus button on the TVs local keyboard for 5 ~10
seconds
- Press the SOURCE button for 10 seconds until the F disappears
from the screen or the noise on the screen is replaced by blue mute

The noise on the screen is replaced


with the blue mute or the F is disappeared!

Unplug the mains cord to verify the correct


disabling of the Factory mode.

Program display option code


via 062598 MENU, followed by
the 3 digits code of the display
(this code can be found
on a sticker on - or inside - the set).

After entering display option code, the set is


going in stand-by mode (= validation of code)

R estart the set

H_16771_007b.eps
100322

Figure 5-14 SSB replacement flowchart - Factory mode

2012-Jun-29

back to
div. table

Service Modes, Error Codes, and Fault Finding

QFU1.1E LA

5.

EN 33

18753_211_100811.eps
110810

Figure 5-15 SSB start-up

5.9

Software Upgrading

Automatic Software Upgrade


In normal conditions, so when there is no major problem with
the TV, the main software and the default software upgrade
application can be upgraded with the AUTORUN.UPG
(FUS part of the one-zip file: e.g. QF1EU_0.88.0.0.zip). This
can also be done by the consumers themselves, but they will
have to get their software from the commercial Philips website
or via the Software Update Assistant in the user menu (see
eUM). The autorun.upg file must be placed in the root of the
USB stick.
How to upgrade:
1. Copy AUTORUN.UPG to the root of the USB stick.
2. Insert USB stick in the set while the set is operational. The
set will restart and the upgrading will start automatically. As
soon as the programming is finished, a message is shown
to remove the USB stick and restart the set.

Always check for the latest software version on the service


website in relation to the correct CTN!!!
5.9.1

Introduction
The set software and security keys are stored in a NANDFlash, which is connected to the Fusion processor.
It is possible for the user to upgrade the main software via the
USB port. This allows replacement of a software image in a
stand alone set, without the need of an E-JTAG debugger. A
description on how to upgrade the main software can be found
in the electronic User Manual.
Important: When the NAND-Flash must be replaced, a new
SSB must be ordered, due to the presence of the security keys!
(CI +, MAC address, ...).
Perform the following actions after SSB replacement:
1. Set the correct option numbers (see rearcover sticker).
2. Update the TV software => see the eUM (electronic User
Manual) for instructions.
3. Perform the alignments as described in chapter 6 (section
6.5 Reset of Repaired SSB).
4. Check in CSM if Set type, MAC address are valid.
For the correct order number of a new SSB, always refer to the
Spare Parts list!

5.9.2

Manual Software Upgrade


In case that the software upgrade application does not start
automatically, it can also be started manually.
How to start the software upgrade application manually:
1. Disconnect the TV from the Mains/AC Power.
2. Press the OK button on a Philips TV remote control or a
Philips DVD RC-6 remote control (attention : not supported
by use of RF4CE remote due to the fact this application is
not running yet at the time of the OK request). Keep the
OK button pressed while reconnecting the TV to the
Mains/AC Power.
3. The software upgrade application will start.

Main Software Upgrade

Attention!
In case the download application has been started manually,
the autorun.upg will maybe not be recognized.

The UpgradeAll.upg file is only used in the factory.


back to
div. table

2012-Jun-29

EN 34

5.

QFU1.1E LA

Service Modes, Error Codes, and Fault Finding

What to do in this case:


1. Create a directory UPGRADES on the USB stick.
2. Rename the autorun.upg to something else, e.g. to
software.upg. Do not use long or complicated names,
keep it simple. Make sure that AUTORUN.UPG is no
longer present in the root of the USB stick.
3. Copy the renamed upg file into this directory.
4. Insert USB stick into the TV.
5. The renamed upg file will be visible and selectable in the
upgrade application.
Back-up Software Upgrade Application
If the default software upgrade application does not start (could
be due to a corrupted boot sector) via the above described
method, try activating the back-up software upgrade
application.
How to start the back-up software upgrade application
manually:
1. Disconnect the TV from the Mains/AC Power.
2. Press the CURSOR DOWN-button on a Philips TV
remote control while reconnecting the TV to the Mains/AC
Power.(attention : not supported by use of RF4CE remote
due to the fact this application is not running yet at the time
of the CURSOR-DOWN request).
3. The back-up software upgrade application will start.
5.9.3

Standby Software Upgrade via USB


In this chassis it is possible to upgrade the Standby software
via a USB stick. The method is similar as upgrading the main
software via USB.
Use the following steps:
1. Create a directory UPGRADES on the USB stick.
2. Copy the Standby software (one-zip file StandbyUpgrade,
e.g. StandbyFactory_61.0.0.00_13.00.00.upg) into this
directory.
3. Insert the USB stick into the TV.
4. Start the download application manually (see section
Manual Software Upgrade.
5. Select the appropriate file and press the OK button to
upgrade.

5.9.4

Content and Usage of the One-Zip Software File


Below the content of the One-Zip file is explained, and
instructions on how and when to use it.
BLCtrlFPGA_QF1EU_x.x.x.x.zip. Contains the
BLCtrlFPGA software in upg format.SW version available
in CSM 2.5 FPGA video version.Attention : no power
interruption allowed during the upgrade process (upgrade
not full proof).
FUS_QF1EU_x.x.x.x.zip. Contains the autorun.upg
which is needed to upgrade the TV main software and the
software download application.
StandbyUpgrade_QF1EU_x.x.x.x.zip. Contains the
StandbyFactory software in upg format.
ProcessNVM_QF1EU_x.x.x.x.zip. Default NVM content.
Must be programmed via ComPair or can be loaded via
USB, be aware that all alignments stored in NVM are
overwritten here.

5.9.5

UART logging 2K12 (see section 5.8 Fault Finding and


Repair Tips, 5.8.6 Logging)

2012-Jun-29

back to
div. table

Alignments

QFU1.1E LA

6.

EN 35

6. Alignments
Index of this chapter:
6.1 General Alignment Conditions
6.2 Hardware Alignments
6.3 Software Alignments
6.4 Option Settings
6.5 Reset of Repaired SSB
6.6 Total Overview SAM modes

6.1

6.3.1

6.2

100

Brightness

50

Colour

Light Sensor

Off

Picture format

Unscaled

In menu Picture, choose Pixel Precise HD and set


picture settings as follows:

Picture Setting
Dynamic Contrast

Off

Dynamic Backlight

Off

Colour Enhancement

Off

Gamma (advanced)

Go to the SAM and select Alignments-> White point.

White point alignment LCD screens:


Use a 100% white screen (format: 720p50) to the HDMI
input and set the following values:
Colour temperature: Cool.
All White point values to: 127.

First, set the correct options:


In SAM, select Option numbers.
Fill in the option settings for Group 1 and Group 2
according to the set sticker (see also paragraph 6.4
Option Settings).
Press OK on the remote control before the cursor is
moved to the left.
In submenu Option numbers select Store and press
OK on the RC.
OR:
In main menu, select Store again and press OK on
the RC.
Switch the set to Stand-by.
Warming up (>15 minutes).

In case you have a colour analyser:


Measure, in a dark environment, with a calibrated
contactless colour analyser (Minolta CA-210 or Minolta
CS-200) in the centre of the screen and note the x, y value.
Change the pattern to 90% white screen. If a Quantum
Data generator is used, select the GreyAll test pattern at
level = 230.
Adjust the correct x, y coordinates (while holding one of the
White point registers R, G or B on 127) by means of
decreasing the value of one or two other white points to the
correct x, y coordinates (see Table 6-1 White D alignment
values - LED - Minolta CA-210, or 6-2 White D alignment
values - LED - Minolta CS-200). Tolerance: dx: 0.002, dy:
0.002.
Repeat this step for the other colour temperatures that
need to be aligned.
When finished press OK on the RC and then press STORE
(in the SAM root menu) to store the aligned values to the
NVM.
Restore the initial picture settings after the alignments.

Hardware Alignments
Not applicable.

6.3

Contrast

Alignment Sequence

Choose Home, Setup, TV Settings and then Picture


and set picture settings as follows:

Picture Setting

Perform all electrical adjustments under the following


conditions:
Power supply voltage (depends on region):
AP-NTSC: 120 VAC or 230 VAC / 50 Hz ( 10%).
AP-PAL-multi: 120 - 230 VAC / 50 Hz ( 10%).
EU: 230 VAC / 50 Hz ( 10%).
LATAM-NTSC: 120 - 230 VAC / 50 Hz ( 10%).
US: 120 VAC / 60 Hz ( 10%).
Connect the set to the mains via an isolation transformer
with low internal resistance.
Allow the set to warm up for approximately 15 minutes.
Measure voltages and waveforms in relation to correct
ground (e.g. measure audio signals in relation to
AUDIO_GND). Caution: It is not allowed to use heat sinks
as ground.
Test probe: Ri > 10 M, Ci < 20 pF.
Use an isolated trimmer/screwdriver to perform
alignments.
6.1.1

White Point

General Alignment Conditions

LATAM models: an NTSC M TV-signal with a signal


strength of at least 1 mV and a frequency of 61.25 MHz
(channel 3).

Software Alignments
Put the set in SAM mode (see Chapter 5. Service Modes, Error
Codes, and Fault Finding). The SAM menu will now appear on
the screen. Select ALIGNMENTS and go to one of the sub
menus. The alignments are explained below.
The following items can be aligned:
White point
Ambilight.
TCON alignment : not applicable
Reset TCON alignment : not applicable

Table 6-1 White D alignment values - LED - Minolta CA-210


Value

Cool (9800K)

Normal (8250K)

Warm (6190K)

tbd

tbd

tbd

tbd

tbd

tbd

Table 6-2 White D alignment values - LED - Minolta CS-200

To store the data:


Press OK on the RC before the cursor is moved to the
left
In main menu select Store and press OK on the RC
Switch the set to stand-by mode.
For the next alignments, supply the following test signals via a
video generator to the RF input:
EU/AP-PAL models: a PAL B/G TV-signal with a signal
strength of at least 1 mV and a frequency of 475.25 MHz
US/AP-NTSC models: an NTSC M/N TV-signal with a
signal strength of at least 1 mV and a frequency of 61.25
MHz (channel 3).

Value

Cool (11000K)

Normal (9000K)

Warm (6500K)

tbd

tbd

tbd

tbd

tbd

tbd

If you do not have a colour analyser, you can use the default
values. This is the next best solution. The default values are
average values coming from production.
Select a COLOUR TEMPERATURE (e.g. COOL,
NORMAL, or WARM).
Set the RED, GREEN and BLUE default values according
to the values in Table 6-3.
back to
div. table

2012-Jun-29

EN 36

6.

Alignments

QFU1.1E LA

When finished press OK on the RC, then press STORE (in


the SAM root menu) to store the aligned values to the NVM.
Restore the initial picture settings after the alignments.

Table 6-3 White tone default settings 40"


White Tone

e.g. xxPFLx007/x

Colour Temp

Normal

127

99

95

Cool

127

107

115

Warm

127

90

58

6.3.3

TCON alignment (not applicable)

6.4

Option Settings

6.4.1

Introduction
The microprocessor communicates with a large number of I2C
ICs in the set. To ensure good communication and to make
digital diagnosis possible, the microprocessor has to know
which ICs to address.
Notes:
After changing the option number(s), save them by
pressing the OK button on the RC before the cursor is
moved to the left, select STORE in the SAM root menu
and press OK on the RC.
The new option setting is only active after the TV is
switched off / stand-by and on again with the mains
switch (the NVM is then read again).

Table 6-4 White tone default settings 46"


White Tone

e.g. xxPFLx007/x

Colour Temp

Normal

127

92

95

Cool

127

100

113

Warm

127

83

59

6.4.2

Table 6-5 White tone default settings 55"


White Tone

6.3.2

From 2011 onwards, it is not longer possible to change


individual option settings in SAM. Options can only be changed
all at once by using the option codes as described in section
6.4.3.

e.g. xxPFLx007/x

Colour Temp

Normal

127

90

88

Cool

127

97

110

Warm

127

78

50

6.4.3

Ambilight

Diversity
Not all sets with the same Commercial Type Number (CTN)
necessarily have the same option code!
Use of Alternative BOM => an alternative BOM number usually
indicates the use of an alternative display or power supply. This
results in another display code thus in another Option code.
Refer to Chapter 2. Technical Specs, Diversity, and
Connections.

Table 6-6 Overview matrix correction table


fR

fG

fB

Matrix 0

Matrix 1

0.9

0.9

Matrix 2

0.9

0.9

Matrix 3

0.9

0.9

Matrix 4

0.9

Matrix 5

0.9

Matrix 6

0.9

Matrix 7

0.95

Matrix 8

0.95

Matrix 9

0.95

2012-Jun-29

Opt. No. (Option numbers)


Select this sub menu to set all options at once (expressed in
two long strings of numbers).
An option number (or option byte) represents a number of
different options. When you change these numbers directly,
you can set all options very quickly. All options are controlled
via eight option numbers.
When the NVM is replaced, all options will require resetting. To
be certain that the factory settings are reproduced exactly, you
must set both option number lines. You can find the correct
option numbers on the rearcover sticker from the TV set.
Example: The options sticker gives the following option
numbers:
Group 1 : 08192 00133 01387 45160
Group 2 : 12232 04256 00164 00000
The first line (group 1) indicates hardware options 1 to 4, the
second line (group 2) indicate software options 5 to 8.
Every 5-digit number represents 16 bits (so the maximum value
will be 65536 if all options are set).
When all the correct options are set, the sum of the decimal
values of each Option Byte (OB) will give the option number.

Each ambient light module is aligned by a matrix and by the


brightness. After replacement of a spare module, the
brightness/color can be adjust/fine-tuned according the
neighbouring modules.
1. Go to SAM.
2. Select Alignments.
3. Select Ambilight. A white test pattern shall be displayed
by the ambilight modules.
4. Select the number of the module that have to be aligned.
Module 1 is the first one which will come across according
the wiring path, starting at the small signal panel,
proceeding towards the ambient light modules one by one
after the other. The first module will be attached to the next
module 2. Module number 2 to number 3 etc. Herewith the
way to define the ambilight module numbering.
5. Align the brightness, use as reference the neighbouring
modules output. Adjust now by eye side, the brightness is
automatically stored.
6. Select one of 10 matrixes which color matches most with
the neighbouring modules. (see table 6-6 Overview matrix
correction table).
7. The alignment is stored automatically (tip: dont switch off
the set immediately after the alignment is done, automatic
storage can require a time frame of 10 seconds).

Matrix #

(Service) Options

6.4.4

Option Code Overview


Refer to the rearcover sticker in the set for the correct option
codes.
Important: after having edited the option numbers as
described above, you must press OK on the remote control
before the cursor is moved to the left!

6.5

Reset of Repaired SSB


A very important issue towards a repaired SSB from a Service
repair shop (SSB repair on component level) implies the reset
of the NVM on the SSB.
A repaired SSB in Service should get the service Set type
00PF0000000000 and Production code 00000000000000.

back to
div. table

Alignments
Also the virgin bit needs to be set. To set all this, you can use
the ComPair tool or use the NVM editor and Setup => TV
settings => General settings => Reinstall TV (virgin mode).

6.5.1

QFU1.1E LA

6.

EN 37

SSB identification
Whenever ordering a new SSB, it should be noted that the
correct ordering number (12nc) of a SSB is located on a sticker
on the SSB. The format is <12nc SSB><serial number>. The
ordering number of the correct Service SSB is the one
preceded by the letter S in case 2 or more ordering numbers
are present on the bar code sticker.

After a repaired SSB has been mounted in the set (set repair
on board level), the type number (CTN) and production code +
12NCs (SSB, display and supply) of the TV has to be set
according the type plate of the set (no info on 12NCs here). For
this, you can use the NVM editor in SAM. This action also
ensures the correct functioning of the Smart TV feature and
access to the Smart TV portals. The loading of the CTN and
production code can also be done via ComPair (Model number
programming).
After a SSB repair, the original channel map can be restored,
provided that the original channel map was stored on a USB
stick before repair was commenced and that basic functionality
of the TV, needed for this procedure, was not hampered as a
result of the defect. The procedure of channel map cloning is
clearly described in the (electronic) user manual.

18310_221_090318.eps
090319

Figure 6-1 SSB identification

6.6

Total Overview SAM modes


Table 6-7 SAM mode overview
Main Menu

Sub-menu 1

Sub-menu 2

Hardware Info

A. SW version

e.g. Q5551_0.9.1.0

Sub-menu 3

B. Stand-by processor version e.g. STDBY_83.84.0.0


C. Production code

Description
Display TV & Stand-by SW version and CTN serial
number

e.g. see type plate

Operation hours

Displays the accumulated total of operation hours.TV


switched on/off & every 0.5 hours is increase one

Errors

Displayed the most recent errors

Reset error buffer


Alignment

Clears all content in the error buffer


White point

Colour temperature

Normal
Warn

3 different modes of colour temperature can be


selected

Cool
White point red

LCD White Point Alignment. For values,


see Table 6-3 White tone default settings 40" to 6-4
White tone default settings 46"

White point green


White point blue
Ambilight

Select module
Brightness
Select matrix

Dealer options

Virgin mode

Off/On

Select Virgin mode On/Off. TV starts up / does not


start up (once) with a language selection menu after
the mains switch is turned on for the first time (virgin
mode)

E-sticker

Off/On

Select E-sticker On/Off (USPs on-screen)

Auto store mode

None
PDC/VPS
TXT page
PDC/VPS/TXT

Option numbers

Group 1

e.g. 00008.00001.15421.02239

The first line (group 1) indicates hardware options 1


to 4

Group 2

e.g. 44816.34311.33024.00000

The second line (group 2) indicates software options


5 to 8

Store

Store after changing

Initialise NVM

N.A.

Store

Select Store in the SAM root menu after making any


changes

Operation hours display

0003

In case the display must be swapped for repair, you


can reset the Display operation hours to 0. So,
this one does keeps up the lifetime of the display
itself (mainly to compensate the degeneration
behaviour)

back to
div. table

2012-Jun-29

EN 38

6.

QFU1.1E LA

Alignments

Main Menu

Sub-menu 1

Sub-menu 2

Software maintenance

Software events

Display

Sub-menu 3

Description
Display information is for development purposes

Clear
Test reboot
Test cold reboot
Test application crash
Hardware events

Display

Display information is for development purposes

Clear
Test setting

Digital info

Current frequency: 538


QAM modulation: 64-qam

Display information is for development purposes

Symbol rate:
Original network ID: 12871
Network ID: 12871
Transport stream ID: 2
Service ID: 3
Hierarchical modulation: 0
Selected video PID: 35
Selected main audio PID: 99
Selected 2nd audio PID: 8191
Install start frequency

000

Install start frequency from 0 MHz

Install end frequency

999

Install end frequency as 999 MHz

Digital only
Digital + Analogue

Select Digital only or Digital + Analogue before


installation

Display parameters DISPT5.0.9.29

Display information is for development purposes

Default install frequency


Installation
Development file
versions

Development 1 file version

Acoustics parameters ACSTS


5.0.6.20
PQ - TV550 1.0.27.22
PQS- Profile set
PQF - Fixed settings
PQU - User styles
Ambilight parameters PRFAM 5.0.5.2
Development 2 file version

12NC one zip software

Display information is for development purposes

Initial main software


NVM version Q55x1_0.4.5.0
Flash units software
Temp com file version none
Upload to USB

Channel list

Item Channel list removed from the user interface

Personal settings
Option codes
Alignments
Identification data
History list
All (options included)
Download from USB

Channel list

Item Channel list removed from the user interface

Personal settings
Option codes
Alignments
Identification data
All (options included)
NVM editor

2012-Jun-29

Type number

see type plate

Production code

see type plate

NVM editor; re key-in type number and production


code after SSB replacement

back to
div. table

Circuit Descriptions

QFU1.1E LA

7.

EN 39

7. Circuit Descriptions
Index of this chapter:
7.1 Introduction
7.2 Power Supply
7.3 General Power Architecture
7.4 Back-End Processing

7.1

Notes:
Only new circuits (circuits that are not published recently)
are described.
Figures can deviate slightly from the actual situation, due
to different set executions.
For a good understanding of the following circuit
descriptions, please use the wiring-, block- (see chapter
8. Block Diagrams) and circuit diagrams (see chapter
9. Circuit Diagrams and PWB Layouts). Where necessary,
you will find a separate drawing for clarification.
DDR 1GB
4 2Gb

Introduction
The QFU1.1E LA chassis is part of the FUSION platform and
covers sets in the 69xx, 7xxx, 8xxx and 9xxx range.

7.1.1

FUSION 2011 Architecture Overview


For details about the chassis block diagrams refer to
chapter 8. Block Diagrams. An overview of the FUSION 2012
architecture can be found in Figure 7-1 and Figure 7-2.

FLASH
1GB

64/48

Hybrid
Tuner

DVBC/T2

Analogue
Inputs

BL

Cell
FHD@240
CIN@240

BL-PWM
BL-I-CTRL

Backlight

8
PWM

3D_LR

DVB-S2

3D goggle drive
3D-LED
USB

NVM

USB

DVB-S2
Tuner

8 V-by-1 RGB

NR
DEI
PQ Enhancement
FRC
3D: Active
2D-3D conversion

DVB-T/C
ISDB-T
Analogue

CI+
USB
HUB

HDMI
9385
ETH
PHY

3D-IR

FPGA
Spartan 6
LX4

Skype

19210_064_120504.eps
120504

Figure 7-1 Architecture of FUSION platform 2012 (69xx, 7xxx, 8xxx range)

back to
div. table

2012-Jun-29

EN 40

7.

Circuit Descriptions

QFU1.1E LA

DDR 1GB
4 2Gb

FLASH
1GB

64/48

Hybrid
Tuner

DVBC/T2

Analogue
Inputs

BL-SPI

BL
DVB-S2

BL VS
3D_LR

USB

NVM

Cell
FHD@240
CIN@240

USB

DVB-S2
Tuner

8 V-by-1 RGB

NR
DEI
PQ Enhancement
FRC
3D: Active
2D-3D conversion

DVB-T/C
ISDB-T
Analogue

CI+

BL - HDR

3D goggle 3D-LED
drive
3D-IR
FPGA
Spartan 6
LX4

USB
HUB

HDMI
9385
ETH
PHY

Skype

19210_063_120504.eps
120504

Figure 7-2 Architecture of FUSION platform 2012 (9xxx range)

2012-Jun-29

back to
div. table

7.1.2

Circuit Descriptions

QFU1.1E LA

Vx1

SC BL

7.

EN 41

SSB Cell Layout

L,R

Subw

SiS CTRL

Temperature
sensor

VGA out
Class D

1M95 (PSU)

DC-DC

Scart dongle
Hybrid tuner

+12V AL
(PSU)

Fusion SOC

DVBS tuner
USB TS

BL dim
(PSU)

LAN

HDMI ARC

To AL

UART

HDMI

HDMI
MUX

(power + SPI)

usb WIFI
usb SKYPE

DC-DC

Phones

CA+

USB

USB

HDMI

HDMI

analogue inputs
dongles

SPDIF

HDMI

19280_099_120503.eps
120503

Figure 7-3 SSB layout cells (top view)

back to
div. table

2012-Jun-29

EN 42

7.

QFU1.1E LA

Circuit Descriptions

SDM
FPGA

CA+
Set NVM

19280_100_120503.eps
120503

Figure 7-4 SSB layout cells (bottom view)

2012-Jun-29

back to
div. table

Circuit Descriptions
7.2

Power Supply

7.2.1

Power Supply Unit

QFU1.1E LA

7.

EN 43

Display

All power supplies are a black box for Service. When any of
these power supplies is defective, a new board must be
ordered and the defective one must be returned, unless the
main fuse of the board is broken. Always replace a defective
fuse with one with the correct specifications! This part is
available in the regular market.
Consult the Philips Service web portal for the order codes of the
boards.

7.3

1316 1M54
1319

Ambi-light

1M09

SSB

1M99/1M11
1M95

1308

General Power Architecture


For the power architecture refer to figure 7-5 and 7-6.
For start-up steps (for trouble-shooting), refer to figure 7-7. The
start-up sequence is marked with numbers in red.

AC-in
19280_103_120504.eps
120504

Figure 7-5 General power architecture

AL
PSU

switch

+3V3AL

AC in

Tcon

ENABLE-3V3-AMBI

+3V3
DC-DC

+12V
PLF

DC-DC
converters
12V
Undervoltage
detect

STANDBY

DETECT12V
LCD-PWR-ONn
STANDBYn
SPLASH-ON

LED driver

3V3stby

Fusion
SoC

ENABLE-WOLAN
internal
Wifi dongle

POWER-OK

+3V3-STANDBY

switch

+3V3-LAN

Ethernet
PHY

19210_075_120504.eps
120504

Figure 7-6 Functional supply overview

back to
div. table

2012-Jun-29

EN 44

7.

QFU1.1E LA

Circuit Descriptions

10000_000full_090126.eps
091118

Figure 7-7 Functional power overview - power sequence

7.4

Back-End Processing
For the configuration, refer to Figure 7-8 to Figure 7-11.

2012-Jun-29

back to
div. table

Circuit Descriptions

QFU1.1E LA

7.

EN 45

19210_065_120504.eps
120507

Figure 7-8 Back-end configuration xxPFL6xxx/xx series

back to
div. table

2012-Jun-29

EN 46

7.

QFU1.1E LA

Circuit Descriptions

19210_066_120504.eps
120504

Figure 7-9 Back-end configuration xxPFL7xxx/xx & xxPFL8xxx/xx series

2012-Jun-29

back to
div. table

Circuit Descriptions

QFU1.1E LA

7.

EN 47

19210_067_120504.eps
120504

Figure 7-10 Back-end configuration xxPFL9xxx/xx series

back to
div. table

2012-Jun-29

EN 48

7.

QFU1.1E LA

Circuit Descriptions

19210_068_120504.eps
120504

Figure 7-11 Back-end configuration Platinum (Cinema) series

2012-Jun-29

back to
div. table

Block Diagrams

QFU1.1E LA

8.

EN 49

8. Block Diagrams
Wiring diagram 7000 series 40"

7000 series, 2 sided AmbiLight 40"

8A02
8802

8M54
8801

8A01
1A04

1A01

8M99
8C31
8316

1T71

1M95

1M99

14 p

8P

1M54

1A04

1A05

18p

18p

1C31
To Wifi USB

1M54

1316

1M99

1M95

1M09

8P

14 p

9p

1C30

5p 1.25mm

Phono

Fan control or temp


sensor

4p

9p

20p

6p

/1M11 (4p)

USB

FFC 18 p

1D02

3p Sub woofer

1D01

4p

HDMI

Speakers

1F00

HDMI

1D11

1R00
1G51
VGA

51p

(1012)

Opto
SP
DIF

HDMI

HDMI

HDMI

AL

Panel
(1004)

1E01

(1163)

1D35

USB

1C21

1C20/1C21 Local control

3p

08

2p3

1M21

8D01
1A01

Keyboard Control Panel

51p

13

(1164)

(1111)

5p 1.25mm

8308

AmbiLight

SSB

AmbiLight

8G51

(1050)

inlet

AL

41p

MAIN POWER SUPPLY


1G51

Conditionnal access

1G50/1G55

Wifi

SPI
FFC 15p

1A05

1F53

8M95

1A04

8.1

8M20
8M21

Sensor

1M21

1M20

(1010)

Board Level Repair


Component Level Repair
Only for authorized workshops
19210_097_120514.eps
120514

2012-Jun-29 back to

div. table

Block Diagrams

8.

EN 50

Wiring diagram 8000 series 40"

8000 series, 3 sided AmbiLight 40"

AL

1A01

AmbiLight
(1172)

1A03

AL

1A01

AmbiLight
(1170)

1A03

1A01

8802

8M54

8801

8A01

8M99

8A03

1A04

8A02

8A04

8C31
8316

1T71

1M95

1M99

14 p

8P

1M54

1A04

1A05

18p

18p

1C31
To Wifi USB

1M54

1316

1M99

1M95

1M09

14 p

1C30

5p 1.25mm

6p

Phono

1A05

8P

9p

Fan control or temp


sensor

4p

9p

20p

/1M11 (4p)
1F53

8M95

USB

FFC 18 p

1D02

3p Sub woofer

1D01

4p

HDMI

Speakers

1F00

HDMI

1D11

08

1R00
1G51
VGA

51p

(1012)

(1004)

Opto
SP
DIF

HDMI

HDMI

HDMI

AL
1A01

Panel

1E01

(1163)

1D35

USB

1C20/1C21 Local control

3p

13

2p3

1M21

Keyboard Control Panel

51p

1C21

(1164)

(1111)

5p 1.25mm

8308

AmbiLight

SSB

AmbiLight

8G51

(1050)

inlet

AL

41p

MAIN POWER SUPPLY


1G51

SPI
FFC 15p

Conditionnal access

1G50/1G55

Wifi

1A04

8.2

QFU1.1E LA

8D01

8M20
8M21

Sensor

1M21

1M20

(1010)

Board Level Repair


Component Level Repair
Only for authorized workshops
19210_098_120515.eps
120515

2012-Jun-29 back to

div. table

Block Diagrams

8.

EN 51

Wiring diagram 7000 series 46"

7000 series, 2 sided AmbiLight 46"

8A02

1A01

40A1

8A01

8M54

8801

8
8802

8M99

1T71

9p

20p

1M99
8P

1M95
14 p

1M95

1M99

14 p

8P

8M95

6p

1A04

1A05

1F53

5p 1.25mm

5p

Phono

SPI
FFC 15p

Conditionnal access

1G50/1G55

8C31
Wifi

1C30

1C31

5p

9p

Fan control or temp


sensor

4p

/1M11 (4p)

41p

SSB

(1111)

MAIN POWER SUPPLY


(1050)

8G51

51p

USB

1G51

1M54

To Wifi USB

1M09

50A1

1M54

1316

5p 1.25mm

8308

1C20/1C21 Local control

FFC 18 p

1D35

USB

1C21

inlet

3p

1D02

3p Sub woofer

1D01

4p

HDMI

Speakers

8M20

HDMI

HDMI

HDMI

(1163)

Opto
SP
DIF

AL

1G51

(1012)

51p

Panel

1M21

Keyboard Control Panel

AL

1E01

AmbiLight

1F00

1R00
VGA

(1164)

AmbiLight

HDMI

1D11

For possible
extra Audio
amplifier

08

13

2p3

(1004)

8D01

10A1

1A03

8.3

QFU1.1E LA

8M21

Sensor

1M21

1M20

(1010)

Board Level Repair


Component Level Repair
Only for authorized workshops
19210_099_120515.eps
120515

2012-Jun-29 back to

div. table

Block Diagrams

8.

EN 52

Wiring diagram 8000 series 46"

8000 series, 3 sided AmbiLight 46"

AL

1A03

AmbiLight
(1170)

AL

1A03

1A01

AmbiLight
(1172)

1A01

8A02

1A01

1A04

8A04

8A03

8A01

8M54

8801

8
8802

8M99

9p

20p

1M99
8P

1M95
14 p

1M95

1M99

14 p

8P

8M95

6p

1A04

1A05

1F53

5p 1.25mm

5p

Phono

SPI
FFC 15p

Conditionnal access

1G50/1G55

8C31
Wifi

1C30

1C31

5p

9p

Fan control or temp


sensor

4p

/1M11 (4p)

41p

SSB

(1111)

MAIN POWER SUPPLY


(1050)

8G51

51p

USB

1G51

1M54

To Wifi USB

1M09

1A05

1T71

1M54

1316

5p 1.25mm

8308

1C20/1C21 Local control

FFC 18 p

1D35

USB

1C21

inlet

3p

1D02

3p Sub woofer

1D01

4p

HDMI

Speakers

8M20

HDMI

HDMI

HDMI

(1163)

Opto
SP
DIF

AL

1G51

(1012)

51p

Panel

1M21

Keyboard Control Panel

AL

1E01

AmbiLight

1F00

1R00
VGA

(1164)

(1004)

8D01

1A01

AmbiLight

HDMI

1D11

For possible
extra Audio
amplifier

08

13

2p3

1A03

8.4

QFU1.1E LA

8M21

Sensor

1M21

1M20

(1010)

Board Level Repair


Component Level Repair
Only for authorized workshops
19210_100_120515.eps
120515

2012-Jun-29 back to

div. table

Block Diagrams

8.

EN 53

Wiring diagram 7000 series 55"

7000 series, 2 sided AmbiLight 55"

1A01

1A04

8M54
8802

8A02

8316
8801
8M99

9p

1T71

1F53

1M99

14 p

8P

1M54

1A04

1A05

Fan control or temp


sensor

6p

Phono

SPI
FFC 15p

41p

SSB
(1111)

51p

USB

1G51

8G51

1C30

1C31

5p

9p

Conditionnal access

1G50/1G55

6p

(1050)

8M95

1M09

MAIN POWER SUPPLY

1M95

1M95

To Wifi USB

4p

14 p

8A01

1D35

USB

1C21
3p

1D02

3p Sub woofer

1D01

4p

Speakers

HDMI

2p3

1A05

1M54

20p

1M99

1316

8P

1308

HDMI

For possible
extra Audio
amplifier

1F00

1D11

8308

1R00
Opto
SP
DIF

HDMI

HDMI

HDMI

8C31

(1163)

inlet

Wifi

AL

5p 1.25mm

1G51
51p

(1012)

(1004)

1A01

Panel

1M21

1A04

Keyboard Control Panel

(1164)
1A05

AL

1E01

AmbiLight

VGA

AmbiLight

8.5

QFU1.1E LA

8D01

8M20
8M21

Sensor
(1010)

1M21

1M20

Board Level Repair


Component Level Repair
Only for authorized workshops
19210_101_120515.eps
120515

2012-Jun-29 back to

div. table

Block Diagrams

8.

EN 54

Wiring diagram 8000 series 55"

8000 series, 3 sided AmbiLight 55"

1A01

AL

1A05

AmbiLight
(1172)

1A03

1A01

AL

1A05

AmbiLight
(1171)

1A03

1A01

AL

1A05

AmbiLight
(1170)

1A03

8A06
6

1A01

8A05

1A01

8A03

8A04

8M54

8M99

9p

1T71

8P

8P

1M54

1A04

1A05

Fan control or temp


sensor

6p

Phono

SPI
FFC 15p

41p

SSB
(1111)

51p

USB

1G51

8G51

AL

1C30

1C31

5p

9p

Conditionnal access

1G50/1G55

1A03

1F53

6p

(1050)

8M95

1M09

MAIN POWER SUPPLY

1M95

8A07

1M99

14 p

To Wifi USB

4p

14 p

1M95

1A03

1M54

20p

3p

1D02

3p Sub woofer

1D01

4p

HDMI

Speakers

1308
1A05

HDMI

For possible
extra Audio
amplifier

1F00

1D11

8308

1A05

1D35

2p3

USB

1C21

1A01

8A02

1A01

1316

1M99

AL

8A01

(1173)

AmbiLight

8801

(1175)

AmbiLight

8802
8316

1R00
1E01

Opto
SP
DIF

HDMI

HDMI

HDMI

inlet

Wifi
5p 1.25mm

8C31

AL

1G51
51p

(1004)

1A03

1M21

Panel

(1012)

AL

Keyboard Control Panel

(1176)

AmbiLight

VGA

1A03

8.6

QFU1.1E LA

8D01

8M20
8M21

Sensor
(1010)

1M21

1M20

Board Level Repair


Component Level Repair
Only for authorized workshops
19210_102_120515.eps
120515

2012-Jun-29 back to

div. table

Block Diagrams
8.7

QFU1.1E LA

8.

EN 55

Block Diagram Video

VIDEO
B02A

DVBS-FE
7RA0
STV6110A
1R01

DVB-S
TUNER

4
SAT IN

16M

1RA0

30

31

21

IP

20
32
18

IM
XTAL
QP

8
122
12

19

QM

11

AGC

16

DVB-S
CHANNEL
DECODER

9RC2-1

78
75
74

TS-INT-VALID
TS-INT-SOP
TS-INT-CLOCK

9RC2-2

73

TS-INT-DATA

9RC2-3

IF1-_P
IF1-_N

TS-CHDEC-DATA

MAIN HYBRID
TUNER
IF2-_N
IF2-_P
AGC2

1G55

B03E PANEL_USB
LAN_IO

41

TX2,3

DVBT2
CHANNEL
DECODER
IF_AGC

48

2 5KC8

3KA0 IF-N-DVBT2

5KC1 2KCF 3KCB

37

3 5KC9

3KA1 IF-P-DVBT2

5KC0 2KCE 3KCA

38

VbyOne
TO DISPLAY

TX0,1

4
3
5

TS-CHDEC-VALID
TS-CHDEC-SOP
TS-CHDEC-CLK

TS-CHDEC-DATA

TX4,5

PIN NUMBERING
PANEL DEPENDANT
TX6,7

ONLY **PFL***7/T**

B06M

FE

8 5FA5

3FA4

2FS1

5FS1

7 5FA4

3FA3

2FS2

5FS2

7FA1,2
EF

IF-IN-P

F30 IN_P

IF-IN-N

F29 IN_N

SOC-IF-AGC

F27 TAGCO_IF

HDMI
7HA0
SII9387ACT

B03E PANEL_USB
LAN_IO

ERX2+

33

ERX2ERX1+

32
31

ERX1ERX0+

30
R4X
29

TXC_P 86
TXC_N 87
TX0_P 84
TX0_N 85

HDMIF-RXC+

HDMIF-RX1+

9
10

ERX0-

28

ERXC+

27

TX1_P `82
TX1_N 83
TX2_P 80

12

ERXC-

26

TX2_N 81

HDMIF-RX0-

B05B

DRX2DRX1+

23
22

DRX1DRX0+

21
R3X
20

17

CRX2+

15

CRX2CRX1+

14
13

CRX1CRX0+

12
R2X
11

CRX0-

10

CRXC+

1
2
19
18

BRX2BRX1+

5
4

BRX1BRX0+

3
2

9
10

BRX0-

BRXC+

100

12

BRXC-

99

1
3
1
2

3VWW

R1-VGA

2VW5

G1-VGA
B1-VGA

2VW3
2VW4

B06G

13
14

4
6
7

ARX2+

96
95

ARX1ARX0+

94
93

9
10

ARX0-

92

ARXC+

91

12

ARXC-

90

B16 CVBS3
C17 FS1
B17 FB1

PR-R1
Y-G1
PB-B1

A18 PR_R1
A20 Y_G1
A19 PB_B1

B03C

3VAH

H-SYNC-VGA

9VW1

PCHS

3VAJ

V-SYNC-VGA

9VW2

PCVS

J28 PCHS
J27 PCVS

cVC4

DRX0-

C2S2

Y1-IN

2VW6

Y-G2

B20 Y_G2

cVC5

DRXC-

C2S8

PB1-IN

2VW7

PB-B2

B19 PB_B2

PR1-IN

2VW8

PR-R2

B18 PR_R2

PR1-IN

B03D

UMAC 1 DDR3

UMAC 0 DDR3

B03B DDR3
M1-MA

M1-MA(0-15)

M1-MD

M1-MD(0-15)
7J01
H5TQ2G83BFR

B03E AV_IN_OUT

FUSION
UMAC
CONTROLLER

SDRAM
256Mx8

7J02
H5TQ2G83BFR

SDRAM
256Mx8

7J03
H5TQ2G63BFR

7J04
H5TQ2G63BFR

SDRAM
128Mx16

SDRAM
128Mx16

1VA4
R1X

CVBS
CVBS1

CVBS1

B07D

2VW1

CVBS

C15 CVBS1

M0-MA

M0-MA(0-31)

M0-MD

M0-MD(0-15)

B06C

CI
1P00
17

97

ARX2ARX1+

FB1

B03E AV_IN_OUT
C18 PR-R3
C20 Y-G3
C19 PB-B3

ANALOGUE EXTERNALS

1H01

19
18

SC1-BLK

PR-R3
Y-G3

B03A TS_TSB_MCU

VGA
CONNECTOR

1H02

HDMI 1
CONNECTOR

SC1-STATUS

3VAD

YPBPR
BRX2+

PB-B3
CVBS3
FS1

2VW2
9VW4

1VA8

2VWA

SC1-CVBS

SC1-B
3VA9

11

HDMI
SWITCH

CRXC-

2VWB
2VW9

1VA5
5

19
18

1
2

1H03

SC1-R
SC1-G

D(16-31)

18

HDMI 2
CONNECTOR

AUDIO-VIDEO

D(0-15)

19

DRXC-

4
6
7

B04F

18

+5VCA

51
52

R0X
PCMCIA

+5V-HDD

USB

B03E PANEL_USB
LAN_IO
cEC0
AC29 USB2-DM
D2_N
USB2-DP
D2_P AC30
cEC1

1E01
1

B07C

USB INTERN

2
3

USB-MAIN-DM
USB-MAIN-DP

7EH1
CY7C65634

+5V

B03A FLASH
CI_GPIO
FRDx_PODDx

CA-D(0-7)

FRDx_PODAx

CA-A(0-13)
CONDITIONAL
ACCESS

7PA1,2
74LVC245APW
20

D1_N
+3V3

D1_P

cEC2
AB29 USB1-DM
AB30

USB1-DP

cEC4

BUFFER

B06L

USB
HUB

+5V-PORTB
1E02
1
3 USB-PORTB-DM
4 USB-PORTB-DP

10

CONDITIONAL ACCESS

11

MDI(0-7)

USB
HUB
+3V3-LAN
1C31
1

10

2
3

2
3

USB-WIFI-DM
USB-WIFI-DP

3PW2,3
CA-MDI(0-7)

2
3

USB-CAM-DM
USB-CAM-DP

2
3

USB-MAIN-DP 2

11

TS1Dx

CA-MDO(0-7)

B03A TS_TSB_MCU
MDO(0-7)

1E03
1
6 USB-PORTA-DM
7 USB-PORTA-DP

USB-MAIN-DM 1

1C30
1

+5V-PORTA

7EA0
CY7C65632

12M

DRX0DRXC+

12

5
17
9

10

19
18

9
10

HDMI 4
CONNECTOR

HDMI 3
CONNECTOR

A27 RX2_P
B27 RX2_N

18
SCART

15

1
2

24

12

HDMIF-RX2+
HDMIF-RX2-

10
14

DRX2+

9
10

A28 RX1_P
B28 RX1_N

1VA1

4
6
7

HDMIF-RX1-

ANALOGUE EXTERNALS

1H04

4
6
7

B30 RXC_P
C30 RXC_N
A29 RX0_P
B29 RX0_N

HDMIF-RXCHDMIF-RX0+

1EH1

4
6
7

D(8-15)

HDMI 5
CONNECTOR

68P

19
18

1
2

1H05

D(0-7)

B06A

B03A TS_TSB_MCU
T26 TSSDEN
U30 TSSSYNC
U29 TSSCLK
U28 TSSDI

12M

RF IN

V-BY-ONE OUT

7KC0
CXD2834R

1F00
SUT-RE214Z
4

TS-CHDEC-VALID
TS-CHDEC-SOP
TS-CHDEC-CLK

9RC2-4

TUNER-CHANNEL DECODER

AGC1

B04B

FUSION

7J00
FUSION240

ONLY **PFL***7/K**

B02A

B03x

TUNER-CHANNEL DECODER

7RA1
STV0903BAC

1EA0

B02B

12

TS2ODx

13

9EHA

USB-SET-DM
USB-SET-DP

9EHB
WITH SKYPE

2012-Jun-29 back to

div. table

NO SKYPE

19210_002_120313.eps
120419

Block Diagrams
8.8

QFU1.1E LA

8.

EN 56

Block Diagram Audio

AUDIO
B02B DVBS-FE
DVB-S
TUNER

4
SAT IN

16M

1RA0

30

31

21

IP

20
32
18

IM
XTAL
QP

8
122
12

19

QM

11

AGC

DVB-S
CHANNEL
DECODER

9RC2-1

78
75
74

TS-INT-VALID
TS-INT-SOP
TS-INT-CLOCK

9RC2-2

73

TS-INT-DATA

9RC2-3

TS-CHDEC-DATA

16

IF1-_N

MAIN HYBRID
TUNER
IF2-_N
IF2-_P
AGC2

3 5KC9

WSI2SOUT

20
22

SDI2SOUT1 AA30 SDI2SOUT1


SCKI2SOUT
SCKI2SOUT Y26

9D54

L+
L-

5KC1 2KCF 3KCB

4
3
5

TS-CHDEC-VALID
TS-CHDEC-SOP
TS-CHDEC-CLK

TS-CHDEC-DATA

MUTE H26

AUDIO-MUTEn

1 L+
B01A DETECT12V
7D50-1

25

38

R-

36 R-

5FS1

IF-IN-P

F30 IN_P

7 5FA4

3FA3

2FS2

5FS2

IF-IN-N

F29 IN_N

5D72

1D01
1

L+
5D81

1D02
1

R+
R-

SOC-IF-AGC

PASSIVE 2.1

5D71

SPEAKER L
B06Q RESET-FUSION-OUTn

7FA1,2
EF

SPEAKER
WOOFER

SPEAKER R

L-

2FS1

39 R+

ONLY **PFL***7/T**

3FA4

5D80

46 L-

CLASS D
POWER
AMPLIFIER

7D50-2

7D70

8 5FA5

19

B06M FE

1D02
1

2
3

R+

3D63

37

5KC0 2KCE 3KCA

3KA1 IF-P-DVBT2

5D75

SPEAKER L

48

3KA0 IF-N-DVBT2

1D01
1

21
9D52 15

DVBT2
CHANNEL
DECODER
IF_AGC

2 5KC8

5D78
WSI2SOUT Y27

B03A TS_TSB_MCU

1F00
SUT-RE214Z

AGC1

B03E AV_IN_OUT

7KC0
CXD2834R

B02A TUNER-CHANNEL DECODER

IF1-_P

7D60
TAS5731

B03A TS_TSB_MCU
T26 TSSDEN
U30 TSSSYNC
U29 TSSCLK
U28 TSSDI

TS-CHDEC-VALID
TS-CHDEC-SOP
TS-CHDEC-CLK

9RC2-4

ONLY **PFL***7/K**

B05A CLASS-D AMPLIFIER

7J00
FUSION240

7RA1
STV0903BAC

5D83

F27 TAGCO_IF

SPEAKER
WOOFER

SPEAKER R
5D77

B06A HDMI
7HA0
SII9387ACT

B03E PANEL_USB
LAN_IO

HDMIF-RX1+

9
10

ERX0-

28

ERXC+

27

TX1_P `82
TX1_N 83
TX2_P 80

HDMI 5
CONNECTOR

12
14

ERXCHARC3

26

TX2_N 81

B06B

HDMIF-RX0-

DRX2+

24

DRX2DRX1+

23
22

DRX1DRX0+

21
R3X
20

DRX0-

19

DRXC+

18

12
14

DRXCHARC2

17
AUDIO
VGA/DVI

14
13

CRX1CRX0+

12
R2X
11

B06B

CRX0-

10

B06B

CRXC+

B06B
B06B
5
4

BRX1BRX0+

3
2

4
6
7

19
18

1
2

1H02
6

9
10

BRX0-

BRXC+

100

HDMI 2
CONNECTOR

12
14

BRXCHARC0

4
6
7

ARX2+

99

96
95

ARX1ARX0+

94
93

9
10

ARX0-

92

ARXC+

91

HDMI 1
CONNECTOR

12
14

ARXCHARC4

3VWH

2VWJ

AL-3

3VC7

VGA-RIN

3VWK

2VWK

AR-3

9xxx

HARC1

5XXX

9xxx

HARC2

5XXX

9xxx

HARC3

5XXX

9xxx

HARC4

5XXX

9xxx

13

11

ARC-SEL0 B06Q

14

10

ARC-SEL1 B06Q

15

ARC-SEL2 B06Q

AMPLIFIER

1DH4

1
7

B06Q CONTROL

B03A TS_TSB_MCU

STB_RST0 3CUC RESET-FUSION-OUTn

7CW1
PCA9554
B05A B07B

ARC-SEL0 B06B

I/O
8
EXPANDER

ARC-SEL1 B06B

ARC-SEL2 B06B

B23 AL_3
A23 AR_3

B03D

UMAC 1 DDR3

HDMI-ARC

MUX

SPDIF
OUT

1J50 2
1
3

M1-MA(0-15)

M1-MD

M1-MD(0-15)

FUSION
UMAC
CONTROLLER

B03E PANEL_USB
LAN_IO

M1-MA

7J01
H5TQ2G83BFR

12

UMAC 0 DDR3

3HW1

SDRAM
256Mx8

7J04
H5TQ2G63BFR

SDRAM
128Mx16

SDRAM
128Mx16

M0-MA

M0-MA(0-31)

M0-MD

M0-MD(0-15)

E26 SPDIFO

SPDIFO

B06C USB
1P00
17
18

B03E PANEL_USB
LAN_IO
cEC0
AC29 USB2-DM
D2_N
USB2-DP
D2_P AC30
cEC1

+5VCA

51
52
PCMCIA

SDRAM
256Mx8

7J03
H5TQ2G63BFR

T27 HEAC

HEAC

B07D CI

R0X

7J02
H5TQ2G83BFR

B03E AV_IN_OUT
+3V3

+5V-HDD
1E01
1

B07C USB INTERN

2
3

USB-MAIN-DM
USB-MAIN-DP

7EH1
CY7C65634

+5V

B03A FLASH
CI_GPIO

FRDx_PODAx

CA-A(0-13)
CONDITIONAL
ACCESS

7PA1,2
74LVC245APW
20

D1_N
+3V3

D1_P

cEC2
AB29 USB1-DM
AB30

USB1-DP

cEC4

BUFFER

USB
HUB

+5V-PORTB
1E02
1
3 USB-PORTB-DM
4 USB-PORTB-DP

10

B06L CONDITIONAL ACCESS

11

MDI(0-7)

USB
HUB
+3V3-LAN
1C31
1

10

2
3

2
3

USB-WIFI-DM
USB-WIFI-DP

3PW2,3
CA-MDI(0-7)

2
3

USB-CAM-DM
USB-CAM-DP

2
3

USB-MAIN-DP 2

11

TS1Dx

CA-MDO(0-7)

B03A TS_TSB_MCU
MDO(0-7)

1E03
1
6 USB-PORTA-DM
7 USB-PORTA-DP

USB-MAIN-DM 1

1C30
1

+5V-PORTA

7EA0
CY7C65632

FRDx_PODDx

CA-D(0-7)

90
B06B

B03E AV_IN_OUT
E23 AR_4
D23 AL_4

B06P HDMI

7HD0
74HC4052

5XXX

97

ARX2ARX1+

AR-4
AL-4

B06K AUDIO
R1X

B06B

19
18

1
2

2VWE
2VWF

VGA-LIN

HARC0

1H01
1

B03B DDR3

B06B

BRX2BRX1+

3VW7
3VW9

SC-RIN
SC-LIN

3VC6

B06B HDMI-ARC

B06B

BRX2+

HPHOR

B03C

CRX2CRX1+

HPHOL

HPHOR A21

HEADPHONE
OUT 3.5 mm

HDMI
SWITCH

HPHOL B21

B04F AUDIO-VIDEO

3VA7
3VA8

1VA6

15

CRXCHARC1

B06Q RESET-FUSION-OUTn

B06G ANALOGUE EXTERNALS

CRX2+

HDMI 3
CONNECTOR

23
19

SOUND
IN
STAND

7DH1
TPA6111

7DH0-1,2

B03E AV_IN_OUT

STB_RSTO J29

19
18

1
2

SCART

B06B

1H03

12
14

A27 RX2_P
B27 RX2_N

B07B HEADPHONE

1EA0

9
10

9
10

HDMIF-RX2+
HDMIF-RX2-

1VA1

4
6
7

A28 RX1_P
B28 RX1_N

68P

1
2
19
18

HDMI 4
CONNECTOR

HDMIF-RX1-

B05B ANALOGUE EXTERNALS

1H04

4
6
7

B30 RXC_P
C30 RXC_N
A29 RX0_P
B29 RX0_N

HDMIF-RXCHDMIF-RX0+

D(0-15)

30
R4X
29

HDMIF-RXC+

12M

ERX1ERX0+

TXC_P 86
TXC_N 87
TX0_P 84
TX0_N 85

1EH1

32
31

D(8-15)

33

ERX2ERX1+

2
3D81

D(0-7)

ERX2+

3
4
6
7

1D35
1

SPEAKER-DETECTn

12M

19
18

1
2

1H05

B03A FLASH_CI_
GPIO
HPD R30

ACTIVE 2.1

D(16-31)

1R01

RF IN

B03x FUSION

B02A TUNER-CHANNEL DECODER


7RA0
STV6110A

12

TS2ODx

13

9EHA

USB-SET-DM
USB-SET-DP

9EHB
WITH SKYPE

2012-Jun-29 back to

div. table

NO SKYPE

19210_004_120412.eps
120412

Block Diagrams
8.9

QFU1.1E LA

8.

EN 57

Block Diagram Control & Clock Signals

CONTROL + CLOCK SIGNALS

B01F MISCELLANEOUS

ONLY 7000/8000 SERIES

2
3
4

3CYB
3CYC
3CYD

KEYBOARD_IRQ2-SRFn

3CYE

+3V3-STANDBY
RC_IRQ-RF4CEn

3CYF

+5V

8
9
10

11

13
14

3CYK

15
16

3CYM
3CYN

17
18

3CYP
3CYT

RXD-RF4CE

DVB-S
TUNER

IP

IM
XTAL
QP

8
122
12

19

QM

11

2
1RA0

AGC

IRQ-WOLANn

SDRAM
256Mx8

GBE_RXC

M0-MD

M0-MD(0-15)

M0-CONTROL

M0-CONTROL

B06D

B03E UART_JTAG
I2C
TXD

+3V3

SERVICE

B04B

B04A
B04A

MAIN
SW

Y28

TXD-SERVICE

RXD Y29

RXD-SERVICE

MAINSTREAM TV
ONLY

3CS3

3CS4-3

3CS4-1

3CS2

3CS4-2

3CS4-4

B03A FLASH_CI
GPIO

F-READY

8
9

F-OEn
F-CEn

17
16

NAND-ALE
NAND-CLE

18

F-WEn

AG23

3
UART
SERVICE
CONNECTOR

2
1

7CS1
ST232C

AK29
FOE
AJ24
BOOTCS
AK22
FRA14_ALE
AE23
FRA13_CLE
AK24
FWE

B07F

3D-LR-DISP

B03A

CTRL-DISP2

B04A

CTRL-DISP3

LEVEL
SHIFTER

1G55
4

3GVB
3GWH

3GWF

3GV9

SPLASH-ON

9GV1

BL-ON

B04D

CONNECTOR - BACKLIGHT

B03E

BL-SPI-CLK-FUS

B03E

BL-SPI-SDO-FUS

B03E

BL-SPI-CS_BL-I-CTRL-FUS

1G53
13

HOTEL TV ONLY

B02A TUNER-CHANNEL DECODER

3GD8
3GD9
3GD5

3GD3-3

BL-SPI-CLK

3GD3-2

BL-SPI-SDO
BL-SPI-CS_BL-I-CTRL

3GD6

BL-DIM

B04A

3GD3-1

9RC2-1
9RC2-2
9RC2-4
9RC2-3

TS-CHDEC-VALID
TS-CHDEC-SOP
TS-CHDEC-CLK

T26 TSSDEN
U30 TSSSYNC
U29 TSSCLK
U28 TSSDI

TS-CHDEC-DATA

16
34

4
3
DVBT2
CHANNEL 5
DECODER 8

B06Q

RESET-FUSION-OUTn

TS-CHDEC-VALID
TS-CHDEC-SOP
TS-CHDEC-CLK
TS-CHDEC-DATA

29
ONLY **PFL***7/T**

B06N

SERIAL FLASH

7CT3
M25P05-AVMN6

FLASH
128kx8
STANDBY
SW

B03A FUSION
B01F
B04B

SF-CLK

3CT2

SF-WP

1
5
7
2

3CTZ
3CT0
3CT9
3CTH

B03E FUSION

B04D
B04D
B04D

B07D CI

L30 SFCLK
K30 SFWPn

SF-CS
SF-SDI
SF-HOLDn
SF-SDO

SPEAKER-DETECTn
CTRL-DISP1

C10 GPIO2

CTRL-DISP2

C9 GPIO3
H29 XTLO24M

PWM0 E4

B04A CONTROL

B07E FPGA - POWER & CONTROL


3CV3

BL-DIM-FUS

BL-DIM

3CV2

3D-LR-FUS

18

B03A FLASH_CI
GPIO GPIO16 D12

AMBI-SPI-MOSI-FUS

GPIO15 C12

AMBI-SPI-CCLK-FUS

GPIO20 E11

GPIO20

GPIO0 B7

GPIO0

GPIO1 B10

GPIO1

GPIO8 A11

GPIO8

GPIO22 A12
B03A TS_TSB_MCU
STB_GP6 N27

7GG2
M25P40

B01A B04D
3D-LR

3D-LR

MISO

3D-LR

PWRON

LGSEN M30

LGSEN

KYBRD J30

KYBRD

IR M29

BL-SPI-CLK-FUS

B03E PANEL_USB
LAN_IO
A8 H_BK_LITE

BL-SPI-SDO-FUS

C8 TCON_ON

BL-SPI-CS_BL-I-CTRL-FUS

D2 PWM1

STB_RSTO J29
STB_P7 N26
HP_DETECT K27

AMBI-SPI-MOSI 9GG1-4

AMBI-SPI-OUT-MOSI

3CV4

AMBI-SPI-CCLK

AMBI-SPI-CCLK 9GG1-2

AMBI-SPI-OUT-CCLK

3CV7

POWER-OK

3CVM

TXD-RF4CE

3CVP

RXD-RF4CE

3CVA

B06Q CONTROL
STB-P6

AMBI-SPI-MOSI

CTRL-DISP3
RESET-HDMI-MUXn

SPLASH-ON

3CUB

STANDBYn

3CW4

LIGHT-SENSOR

3CW3

KEYBOARD_IRQ2-SRFn

RESET-RF4CE

3CUC

STB-RSTO

RESET-FUSION-OUTn

3CUA

STB-P7
HP-DETECT

RC_IRQ-RF4CEn

3CW5

STB-P8

B03A FLASH
CI_GPIO

51
52
CA-D(0-7)

FPGA-SYS-CLK

B01F
1GGA

B04B
12M
B06A

RESET-ETHERNETn

3CWK

IRQ-WOLANn

B04B

7GF1
XC6SLX4

B01A
B01F

CA-A(0-13)
7PA1,2
74LVC245APW
20

PCMCIA

26 AMBI-SPI-OUT-CCLK
B01F

B01F
B01F

B04B

CA-MDO(0-7)

MDO(0-7)

45
46

D1_N

AB30

USB1-DP

cEC4

FPGA

B02A B06C B07C

+5V-HDD
1E01
1

FPGA-SYS-CLK

65

MISO

64

MOSI

70

CCLK

38

CSO-B

B07C USB INTERN

2
3

USB-MAIN-DM
USB-MAIN-DP

+5V

7EH1
CY7C65634

1C30
1

4
3
4

+5V-PORTA

2
3

6 USB-PORTA-DM
7 USB-PORTA-DP

USB-MAIN-DM 1

USB-MAIN-DP 2

2
3

USB-CAM-DM
USB-CAM-DP

4
17 RESET-FUSION-OUTn
11

10

+5V-PORTB
1E02
1

USB
HUB
3 USB-PORTB-DM
4 USB-PORTB-DP

2
3

B06Q

USB
HUB
+3V3-LAN
1C31
1

10
11

TS1Dx

3D-LR

50

B06E

B03A TS_TSB_MCU

BUFFER

43

B06E

1E03
1

D1_P
+3V3

3D-LED_3D-RF
3D-LR-DISP

B01F

FRDx_PODDx
FRDx_PODAx

27 AMBI-SPI-OUT-MOSI

BL-DIM(1-8)

B01F

7EA0
CY7C65632

cEC2
AB29 USB1-DM

FPGA
SW

B01A

B06C USB
cEC0
AC29 USB2-DM
D2_N
USB2-DP
D2_P AC30
cEC1

FLASH
16Mbit

7GG4
B01A

B03E PANEL_USB
LAN_IO
+5VCA

2
5

CCLK

B07F FPGA - I/O BANKS

3CWG

3CWM

IR

MOSI

CSO-B 1

3CV5

3CV1

GPIO22

PWRON R29

STB_GP8 N25
H30 XTLI24M

1P00
17

CONDITIONAL
ACCESS

L29 SFCES
L28 SFSI
L27 SFHOLDn
L26 SFSO
B03A FLASH
R30 HPD CI_GPIO

1J00

B04B

3CTU

TO
POWER
SUPPLY

11

ONLY 9000 SERIES


B03E PANEL_USB
LAN_IO
BOOST E3

7KC0
CXD2834R

31

5
7

13

B03A TS_TSB_MCU
78 TS-INT-VALID
TS-INT-SOP
75
74 TS-INT-CLOCK
TS-INT-DATA
73

VbyOne
TO DISPLAY

3GWG

ONLY 7000/8000 SERIES

B01A

14

12

CTRL-DISP1

B06Q

11
FREADY

V-BY-ONE OUT

B03A

1E06

FRA_AD

FRA(0-12)

SDRAM
128Mx16

M0-MA(0-31)

GBE_TXEN

NAND-FLASH + EEPROM

FLASH
512kx16

SDRAM
128Mx16

GBE_RXEN

B06Q

7JA0
MT29F8G08

7J04
H5TQ2G63BFR

M0-MA

B06Q

B06Q

35
16M

V30

68P

30

DVB-S
CHANNEL
DECODER

W30

EN-TXEN

RESET-ETHERNETn

7RA1
STV0903BAC
21

EN-RXEN

32

SDRAM
256Mx8

7J03
H5TQ2G63BFR

GBE_MDIO

B06Q

SEE I2C DIAGRAM


SPEAKER-DETECTn
B03A
RESET-RF4CE
B06Q

20
32
18

30

9EF1

7J02
H5TQ2G83BFR

7EF1

9CY1 LED1

7RA0
STV6110A

V25

3EF5

20

B06F

TXD-RF4CE

Y30

EN-RXC

33

1KC0

B02B DVBS

B06Q
3D-LED_3D-RF
B07F
9CY2 LED2
SEE I2C DIAGRAM

11
12

RES

EN-MDIO

39

GBE_MDC

7J01
H5TQ2G83BFR

FUSION
UMAC
CONTROLLER

12M

5
6
7

LIGHT-SENSOR

W25

41M

5
6
7
9
10

FE

3CYA

2
3
4

ETHERNET

25M

1C21

5
1EF0

1C20

EN-MDC

40

CEC

B03E PANEL_USB
LAN_I/O
GBE_RXD
GBE_TXD

ETH-RXD
ETH-TXD

5EF7-1,2
B07F

ETHERNET
CONNECTOR
RJ45

M28

HDMI-CEC

7EF0
AR8030

1E00

BL-DIM(1-8)

TO
LIGHT
SENSOR/
TOUCH
CONTROL

B03A TS_TSB_MCU

PCEC-HDMI

B06E ETHERNET

1M54
2
TO
POWER
SUPPLY

9HA1

D(16-31)

B04A

M1-MD(0-15)

D(0-15)

POWER-OK

M1-MA(0-15)

M1-MD
68

B04A RESET-HDMI-MUXn

5x HDMI
1H01-13
CONNECTOR 1H02-13
1H03-13
1H04-13
1H05-13

M1-CONTROL

M1-MA

1EH1

3UA4

14

B07F
B07E

B03B DDR3
M1-CONTROL

D(8-15)

BL-I-CTRL

74
59

UMAC 0 DDR3

HDMIF-RX

D(0-7)

BL-DIM1

3UA3

B04A

DRX-HOTPLUG
ERX-HOTPLUG

B03E PANEL_USB
LAN_IO

HDMI
SWITCH

12M

3UAA
13

B04B

55

3CS0

BL-DIM

46
50

B03D

UMAC 1 DDR3

1EA0

3UA2

1H03-19
1H04-19
1H05-19

ARX-HOTPLUG
BRX-HOTPLUG
CRX-HOTPLUG

B03C

7J00
FUSION240

24M

12

BL-ON

B06Q
1
2

11

3UA1

STANDBYn

19
18

3UA0

B03x FUSION

7HA0
SII9387ACT

TO PIN:
1H01-19
1H02-19

7UA3

1M95
2
TO
POWER
SUPPLY

B06A HDMI

3CS1

B01A CONNECTORS AND PROTECTIONS

2
3

USB-WIFI-DM
USB-WIFI-DP

B06L CONDITIONAL

12

ACCESS

B06Q

RESET-FUSION-OUTn

17

13

9EHA

USB-SET-DM
USB-SET-DP

3PW2,3
CA-MDI(0-7)

9EHB
MDI(0-7)

TS2ODx

WITH SKYPE

2012-Jun-29 back to

div. table

NO SKYPE

19210_021_120424.eps
120424

Block Diagrams
8.10

QFU1.1E LA

8.

EN 58

Block Diagram I2C

IC

AUDIO
AMPLIFIER

HDMI
MUX

ERR
35

ERR
37

44

3CWY

3CWW

15

BRX-DDC-SDA

16

BRX-DDC-SCL

15

B06D

9NA9

3GF9

3GF8

9NAA

7NA2
LPC1768

3HAA-3

RES

RES

RES

CRX-DDC-SCL

15

1
2

CRX-DDC-SDA

16

3HAC-2

HDMI
CONNECTOR 3
CRX-DDC-SDA

16

CRX-DDC-SCL

15

1
2

1H04

19
18

TO
LIGHT SENSOR
3 TOUCH CONTROL

CIN-5V

57

SERVICE +3V3

HDMI
CONNECTOR 4
1H05
CRX-DDC-SDA

16

CRX-DDC-SCL

15
19
18

58
MAINSTREAM TV
ONLY

HDMI
CONNECTOR 5

2
1

B03A

+5V-EDID

3
UART
SERVICE
CONNECTOR
61
62

HOTEL TV ONLY

B05B

ANALOGUE +5V-VGA
EXTERNALS

VGA-SDA-EDID-HDMI

1VA5

10

3CS4-4

12
15

VGA-SCL-EDID-HDMI

15

3CS4-1

3CS4-2

3CS4-3

3CS2

3CS3

Y29 RXD-SERVICE

11

Y28 TXD-SERVICE

3HAL-2

JTAG
I2C
UART

3HAL-1

1E06

3HAL-2

3CS0

3CS1

FRA_AD

MAIN
SW

3TW0

HDMI
CONNECTOR 2

73

RES
FLASH
CI
GPIO

ERR
38

25

1
2

RES

ERR
42

24

1H03

3HAA-1

3CYG

FPGA
BL

DIN-5V

1C21
1

3CYH

TEMPERATURE
SENSOR

19
18

SET
TEMPERATURE
3
SENSOR
72

DEBUG
3 ONLY

3CUJ

B03A

7CT3
M25P05-AVMN6

ARX-DDC-SCL

1H02

54

1T71
1

1CV8
1

3CUH

3HAA-4

53

3HAC-1

B01F

7GF1
XC6SSLX4

HDMI
CONNECTOR 1

49

MISCELLANEOUS

3TA2

U26 SCL-S

FRA(0-12)

ARX-DDC-SDA

BIN-5V

3HAA-2

M0-MD

FLASH
512kx16

3TW1

45

ERR
23

7TW0
LM75

3NAH

EEPROM
(NVM)

16

3NAJ

I/O
EXPANDER

DEBUG
ONLY

1H01
1
2

7HA0
SII9387

19
18

7D60
TAS5711

48

3CUF

M0-MD(0-15)

CONTROL

1
2

3HAW

3HAV

3D55

AIN-5V
70

MAIN NVM
SW

3TA1

NAND-FLASH + EEPROM

RES
7CS1
ST232C

VGA
CONNECTOR

14

B06Q

LEVEL
SHIFTER

+3V3

B02B

B06M

DVBS-FE

cFS1

SDA-FE

cFS2

20

21

97

SCL-BE

9GM2

SCL-DISP

SDA-BE

9GM1

SDA-DISP

+3V3
ERR
14

2 CHAN.
MULTIPLEX.

3GVD

3GVE

7KC0
CXD2834

TO DISPLAY
PANEL

7RA1
STV0903

DVB-S
CHANNEL
DECODER

DVB-T2
CHANNEL
DECODER

DVB-S
CHANNEL
DECODER

ERR
31

ERR
27

ERR
28

19 SCLT

12

1CWA
DEBUG
3 ONLY
RES

1CWB

B04D

SDA-TUNER

1FA0
1
3

DEBUG
ONLY

18 SDAT

7GM1
PCA9540B

7UP2
LNBH25

1G55

SCL-TUNER

3FA1

3CVG

D1 SDA-M2

TUNER
CHANNEL DECODER

3FA2

DEBUG
ONLY

10

13

11

7RA0
STV6110

1F00
SUT-RE214Z

SATELLITE
TUNER

TUNER

ERR
34

ERR
36

CONNECTOR - BACKLIGHT

DEBUG
3 ONLY
RES
RES
SCL-BL

9GM3

SDA-BL

B06Q

1G53
3GD2

3GD1

CONTROL
+3V3-STANDBY

3CU9

P27 STB-SDA

B06Q

MISCELLANEOUS

CONTROL 1CWD
1
3

3CU8

P26 STB-SCL

B01F

TO DISPLAY
PANEL
3CR7

9GM4

1
SCLMC
SDA-MC

3CYS
3CYR

6
7

3CYV

3CYU

3GM6

3CVF

B02A

RES
98

E2 SCL-M2

FE

5FA6

V-BY-ONE OUT

1CV1

3RA8

B04B

SCL-FE

3RA7

3CWF

CONTROL
+3V3

TUNER
CHANNEL DECODER

3KC3

AA27 SDA-M1

B04A

B02A

DVBS
SUPPLY

3KC2

3CWJ

3UPB

AA28 SCL-M1

ERR
18

B01C

5FA7

3CR7

STANDBY
SW

CONTROL

13

3UPD

12

3CR6

SFBI-CS
SFB-SI
SFB-SDO

11

3CR6

1
5
2

TS
TSB
MCU

3GM3

SFB-WPn

3GM4

SFB-CLK

3GM1

128kx8

3GM2

FLASH

3GM5

SERIAL FLASH

71

23

7JA2
M24C64

CONTROL

U27 SDA-S

B06N

24

CIN-5V

3CUG

M0-MA

7JA0
MT29F8G08

7CW1
PCA9554

ERR
41

+3V3

B06F

SDA-SRF

ERR
13

DEBUG
ONLY

13

RES

M0-MA(0-31)

B06Q

LPC DEBUG

19
18

12

3HAB-3

ERR
24

SCL-SRF

3D56

3JA3

B06Q

B07A

3
3JA2

AA25 SDA-M3

FUSION
UMAC
CONTROLLER

SDRAM
128Mx16

FPGA I/O BANKS

SDA-SSB

2 CHANNEL
MULTIPLEX.

3CUY

3HAL-1

D(0-15)

SDRAM
128Mx16

B07F

TEMPERATURE
SENSOR

1CW6
1

1CW7
1
7J04
H5TQ2G63BFR

B06R

HDMI

SCL-SSB

UMAC 0 DDR3

7J03
H5TQ2G63BFR

B06A

3HAB-1

M1-MD

CLASS-D
AMPLIFIER

3HAB-4

M1-MD(0-15)

7CW0
PCA9540B

AA26 SCL-M3

D(16-31)

B03D

M1-MA

B05A

3HAB-2

B03B

NAND-FLASH
+ EEPROM

+3V3

3CUW

D(8-15)

B03E

M1-MA(0-15)

B06F

CONTROL

+3V3
3CWV

SDRAM
256Mx8

B06Q

FUSION

7J00
FUSION240

3CWU

SDRAM
256Mx8

D(0-7)

7J02
H5TQ2G83BFR

3CUF

B03x

UMAC 1 DDR3

7J01
H5TQ2G83BFR

3CUG

B03C

LED1

7CY6
PCA9633
PWM
2

LED2

7CY1
EF

7CY2
EF

3CYN

DEBUG
ONLY

1C21
16
TO
LIGHT SENSOR
TOUCH CONTROL

3CYC

RES

19210_001_120313.eps
120419

2012-Jun-29 back to

div. table

Block Diagrams

8.

EN 59

Supply Lines Overview

SUPPLY LINES OVERVIEW


1M95
1

6UAF

+3V3-WIFI

1M95
1

2
3
4
5

2
3
4
5

+3V3-STANDBY

STANDBYn

B06Q

+12V
1UA0

PSU

B01D

CONNECTORS AND PROTECTIONS

+12Va

B07c
B01d,B01f,
B03f,B04a,
B05a,B06a,
B06n,B06q,
B06s,B07b

B01a
B01a
B06h
B06h

7
8

1UA1

+3V3-STANDBY

+2V5

9
10

9
10

T 3.0A
+12V-AUDIO

11
12
13

11
12
13

BL-DIM1
BL-I-CTRL

14

14

POWER-OK

BL-DIM

B01F

B04A

B06h

B07F
B07E

B06h

B04A
B01a

B06E
B06h
B06h

2
3
4
5

+5V

+5V

6
7

6
7

AMBI-POWER

B07h

T 2.0A
2-SIDED
AMBILIGHT

+12V

+3V3

+2V5

+2V5

+3V3

+3V3

B02A
B06h

7UAC
B06h
B06a

3-SIDED
AMBILIGHT

1TA1

5TA2

1T71
4

B04D

TEMP
SENSOR
(OPTIONAL)
B06h

7FA0

5FA0

5KC7

+1V2-DVBT2-C

+3V3

B02B

7UAE
RT9715

B06h

HIGH SIDE
POWER
SWITCH

+3V3-AL

B06h

B01a

FUSION SUPPLY
B01c

+12Va

+12Va

7UB5
TPS54429

B01a
5UB7 +1V5

5RA0

+3V3-DEMOD

5RA1

+3V3RF

7RC0

+3V3

B06A

+2V5-DVBS

+1V0-DVBS

+1V0-DVBS

+V-LNB

ENABLE+1V5+1V1
5U02

B03f

+1V1-FD

Synchronous
Buck PWM
Controller

7UC3

5UC2

B03f

B03f

VDD33

5HA6

EPWR33

+1V5-M0

+1V5-M1

+1V5-M1

+1V5-M1

DDR-MVREF11

3J14

DDR-MVREF12

5HA2

VDD12

5HA3

TVDD12

5HA4
+3V3-STANDBY
+5V-VGA

B06h

B02a

7UC4

+Vb

7UC8

B03D

7UC7

B03f

AVDD12

+1V2-MIPS

+1V5-M0

B03f

3J2V

DDR-MVREF01

3J30

DDR-MVREF02

HDMI 4
CONNECTOR
HDMI 3
CONNECTOR

ENABLE+1V5+1V1
HDMI 2
CONNECTOR

B01C
B06h
B02b

B01a

DVBS-SUPPLY

5UR5

+5V

+5V

+2V5-DVBS

+2V5-DVBS

+12V

B03F
B06h
B01a

1UP1

+12V-DVBS

B06h

T 3.0A
B06h
B01b

7UP1
TPS54227
5UP1 8 SYNCHRONOUS 6
STEP DOWN
CONVERTER

LNB
20
CONTROLLER

+3V3-STANDBY
+2V5
+2V5-F

+1V5

5J0R

B06i
+V-LNB

B02b

B06i
B01b

B06B

+1V2-MIPS

B06h
B06h

+1V5-M0

CIN-5V

+1V5-M1

1P05
18

BIN-5V

1P05
18

AIN-5V

+1V2-FA

B06h

+1V1-FA

+1V1-FA

B06h

+1V1-FD

+1V1-FD

+5V

5HD5

+5V-ARC

5HD6

+3V3-ARC

B01a

B07E

+3V3-STANDBY

B06h

+3V3

B06h

LOW
DROP OUT
CONVERTER

+1V1-FA

B03f

+1V2-FA

B03f

B07F

+3V3

FE

+3V3

B07e
+3V3

B07e

PNX85500: STANDBY CONTROLLER

+3V3-STANDBY

B07e

+3V3

+5V

+5V
1E03
+5V-PORTA
9

B06h

+T
1E02
+5V-PORTB 9

B06h

3ECH

B06h

HDMI

+3V3

+3V3-STANDBY

CONTROL

+3V3-STANDBY
+3V3

VCCO1

5GG5

VCCO0

B07f
B07f
B07f
B07f

FPGA - I/O BANKS


VAUX
VCCINT

VCCO3

VCC03

VCCO2

VCCO2

VCCO1

VCCO1

VCCO0

VCCO0

CPLD

+3V3

+3V3
5GC1

VINT

5GC2

VID
RES

AMBILIGHT

+3V3AL

+3V3AL

+3V3-STANDBY
B01a

B06h

5GG4

+5V

B01a
B01a

VCCO2

B07f

+3V3

+5V

B06Q

1E01
9

5GG3

VCCINT

B07H
+5V-HDD

VCCO3

VAUX

B07G
B06P

5GG2

+3V3-STANDBY

B01a

+3V3

B07f

VCCINT

AUDIO

B07e

USB

+T

+3V3
VAUX

IN OUT
COM

+T

CONTROL

+3V3

FPGA - POWER & CONTROL

+3V3

7GG6

+3V3

B06N

3EAC

B06h

+5VCA

+T

7UV1
RT9025

+3V3

B06M

HDMI-ARC

3EA7

B04A

B06h

B03b,B03c

+1V2-FA

+5V

+3V3

B07e

+3V3

B06C

+3V3

+5V

DC-DC

7UV0
VOLT.
REG.

B03b,B03d

+1V2-MIPS

CI

5GG1

+3V3-STANDBY

+2V5-F

+1V5

B02b
B01b

2 SYNCHRONOUS 1,2
BUCK
CONVERTER
7

B07e

+2V5

+5V

3PA1

+3V3

5J0P
5UP2 +1V0-DVBS

7UP2
LNBH25PQ
5UP6 17

+3V3

+3V3

+5V

+3V3

B06h

RES

B06K

HDMI 1
CONNECTOR

FUSION POWER SUPPLY

1P02
18

B06e

+3V3-WIFI

+3V3

B07D
B06h

7UR6
RT8293

EIN-5V

DIN-5V

+3V3-LAN

SBVCC5

1P03
18

+5V

DETECT12V

B06h

+1V5-M0

B06h

ENABLE+3V3

HDMI 5
CONNECTOR

UMAC 0 DDR3

B06h

+12Vb

5UR1 1 SYNCHRONOUS 2,3


BUCK
CONVERTER

B06I

3UD2

B01a

+5V

1P04
18

LOW
DROP OUT
CONVERTER

+3V3-WIFI

8
ENABLE+1V5+1V1

B03f

7URA
RT8288

+5V-VGA

3HAS

7EH4
TPS61200

B01d,B03f,
B04c

SECOND SOURCE
DC-DC CONVERTERS

+5V-EDID
+5V

+2V5

+2V5-F

+12Vb

+3V3-STANDBY

+1V5-M1
3J11

B04H

+1V2-FE

USB INTERN

ENABLE-WOLAN

B01a

LOW
DROP OUT
CONVERTER

LOW
DROP OUT
CONVERTER

ENABLE+2V5

7HA1
RT9025

B05b

UMAC 1 DDR3

B07C

+1V5

FUSION UMAC CONTROLLER

+1V5-M0

B03C

5UC0

5HA5

+1V5

B01b

+V-LNB

7UC2

3
+3V3

B01c

B01a

7UC0
RT8228 5

HDMI

+3V3

B06h

IN OUT
COM

B03B
B03f

ENABLE+3V3

7UW2
RT9025

B03f,B06a

B06a

+3V3-DVBS

5UB5 13 SYNCHRONOUS 10
STEP DOWN 11
14
CONVERTER

7
+5V-VGA

+3V3

B01a,B01d,B01f,
B02a,B02b,B03f,
B04a,B04b,B04c,
B04d,B05a,B06a,
B06b,B06c,B06d,
B06f,B06i,B06k,
B06m,B06p,B06q,
B06r,B07b,B07c,
B07d,B07e,B07g

5UW3 13 SYNCHRONOUS 10 5UB4 +3V3


STEP DOWN 11
14
CONVERTER

1VA5
9

VGA
CONNECTOR

+3V3-STANDBY

B01c,B01f,
B02a,B02b,
B06a,B06b,
B06c,B06p,
B07c,B07d

+5V

7UW1
TPS54426

+12V-AUDIO

ANALOGUE EXTERNALS

HEADPHONE

+3V3

B06h

+3V3D

IN OUT
COM

B07h

+12Vb

+3V3-STANDBY

B01a

+12Vb

5UW0 13 SYNCHRONOUS 10 5UB2


STEP DOWN 11
14
CONVERTER

+1V2-DVBT2-P

7RC1

5RC0

+5V

+3V3-LPC-ANA

DC-DC

+12Vb

+3V3-STANDBY

+12V-AUDIO

DVBS-FE

ENABLE-3V3-AMBI

B01B

B07B
B06H

DETECT12V

B01a

+3V3-LPC
5J20

+12Vb

B01a

7UW0
TPS54426

5D85

+3V3

B06h

7NA0
VOLT.
REG.

+3V3

CLASS-D AMPLIFIER

+3V3-STANDBY

B01a

LPC-DEBUG

RES

1G53
9 BACK
LIGHT

1GD1

B05A

+3V3-DVBT2-D

3KCE

+3V3

B07A

NANDFLASH + EEPROM

+3V3

+VCC-TUNER

5KC6

+1V2-FE

AVDDL-1V1

+3V3-STANDBY

MISCELLANEOUS

T 1.0A

IN OUT
COM

+3V3

VDDH-2V5

6,11,17

1NA2
1 +5V-LPC

B06F

+3V3

TUNER-CHANNEL DECODER

+5V

8,27

STRAP-OPTIONS

+3V3-STANDBY

B01a

B04b

B06h

B05B
B06h

+VDISP

B06S

VDD33-PHY

ETHERNET

1GS1

7GS2

5EF4

7EF0
AR8030 3

B01a

1UA2

GND-AL

+3V3

7GS3
LCD-PWR-ONn

RES

+12V-AL

+3V3

ETHERNET

+3V3-LAN

B07c

+3V3-STANDBY

1M99
1

2
3
4
5

TEMP-SENSOR

+3V3

T 3.0A

+3V3-STANDBY

+12V

OUTPUT - VDISP

+12V

B01a

MISCELLANEOUS

T 1.0A
1M99
1

+VDISP

B04C

ENABLE-2V5

CONTROL

B01a

+3V3
B06h

+3V3
ENABLE-3V3

B01b

B05a

+VDISP

B04c

B06R

SERVICE

+3V3

+2V5

+3V3

B01c,B01d,
B01f,B04c

B04h,B06h,
B07a

B06D

+3V3
B06h

+3V3-STANDBY

ENABLE-1V5-1V1
+12Vb

V-BY-ONE OUT

+3V3

B06h

+12V

T 3.0A
7
8

B04B

POWER SEQUENCING

+12V

5TA1

B01A

6HA0

8.11

QFU1.1E LA

AMBI-POWER

AMBI-POWER

+3V3

19210_061_120426.eps
120426

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

QFU1.1E LA

9.

EN 60

9. Circuit Diagrams and PWB Layouts


9.1

B 310431365664

9-1-1

B01A, Connectors and protections

Connectors and protections

B01A

B01A
+12V

+3V3-WIFI

9UA1-1
9UA1-2
9UA1-3
9UA1-4

+3V3-STANDBY

RES
RES
RES
RES

+3V3-WIFI
4K7

6UAF
B230LA-M3
2UA9 RES

3UAJ
+12V

FUAS

6.3V 330u
2UA0

RES 2UAV

3K3

10n

2UA8

6
3UAH-3
3
5
22K

3UAH-4

4K7

+12V DETECTION

IUAG

6
4
7UA1-1
BC847BS(COL)
1

10K

1n0

100p
2UA7

10n
2UA6

2UA5

10K

8
3UAF-4

3UAD
+3V3-STANDBY

POWER-OK

100R

7
IUAE

BL-I-CTRL

3UA4 100R

DETECT12V

IUAD

BL-DIM

3UA3 100R

OPTIONAL
INSTEAD 1M99

FUAN

22K

3UAH-2

7UA0-1
BC847BPN(COL)

3UAG

3UA2 100R

3UAF-1

6
IUAC
6

1u0 RES

1K0

BL-DIM1

2UAJ

3UAE

BL-ON

22K

2
10K

3UAF-3

10n

100n

3UA1

7UA1-2
BC847BS(COL)
4

IUAF

3UAA 100R

1
2
3
4

IUAA

22K

IUAB

1-2041145-4

1M11

7UA0-2
BC847BPN(COL)

2UA1 RES

100R

6UAA

100p

2UA2

16V

2UA4

2UAT

FUA8
FUA9
FUAA
FUAB

100u

FUAL

1u0
2UA3 RES

+12V

STANDBY

3UAH-1

T
2.0A 63V
FOR DUAL SIDE AL ONLY

10K

3UA0

3UAF-2

+3V3-STANDBY

+12V-AUDIO

AMBI-POWER

+12VAL

330u 6.3V

FUA0
FUA1
FUA2
FUA3
FUA4
FUA5
FUA6
FUA7

PDZ6.2B(COL)

1u0

1M95
1
2
3
4
5
6
7
8
9
10
11
12
13
14

DETECT12Vn

1UA2

1UA0

IUA0

+12Va

T 3.0A 32V
+12V
+12VAL

4K7

4K7
RES 3UAP-4
5
4

4K7

RES 3 3UAP-3 6

4K7

RES 2 3UAP-2 7

4K7

RES 1 3UAP-1 8

4K7
RES 3UAN-4
4
5

4K7

2K2

AMBI-POWER

IUAL

100p

390R
2UAK

3UAR

10K

3UAV-2

K
R
3

FUAJ

2
A

7UAF
TS2431

100n

RES

FUAH

1u0
2UAB RES

2UAA

1M99

+12VAL

GND-AL
FUAP

2UAN

3UAY

IUAN

2K2

1u0

0R1

3
IUAV

3UAT-3

100p
2UAM

4
BC857BS(COL)
7UAA-2

3UAW

IUAJ

2K2

+3V3

RES

10K

3UAV-4

+3V3-STANDBY

6
3UAT-1

2K2

3UA6
RES

100n

GND-AL
5
6
7
8

100R

VIN

FLG

EN
EN

VOUT

1
2
3

PDZ15B(COL) PDZ15B(COL)

2K2

6UAC
6UAD

10K

RES
2UAL

IUAS

6UAB

3u0

10u

2UAS

+3V3AL

AMBILIGHT 3-SIDED PROTECTION

GND-AL

10u

2UAR

GND

AMBI-POWER

5UAA
IUAT

FUAR
4

ENABLE-3V3-AMBI

FUAT

S1D

1u0

+3V3

7UAB
BC847BW
2

7UAC
SI4778DY-GE3

2UAP

STANDBY

6UAE

7UAE
RT9715EGB

3UAS

DBG

330R

LTST-C190KGKT

3UAM DBG

1R0

3UAC

7UA3
BC847BW

220K

10K
10K

3UAK

STANDBYn

100n
3UAB

3UA9

2UAD

100K

3UAT-2

3
IUAR

100p

7UA2
PMV31XN

3UA8

4
10K

IUAM

3UAV-3

RES 9UA0

10K

3UA7

IUAP

RES

2041145-8

1
BC857BS(COL)
7UAA-1

IUAK

1K5

10K

3UA5
+12V

3UAV-1

RES
FUAK
2UAU RES

1
2
3
4
5
6
7
8

RES 3 3UAN-3 6

T 3.0A 32V
+12VAL

3UAT-4

+22V

+12VAL

+12VAL

4K7
RES 3UAN-2
2
7

GND-AL

+12Vb

2041145-4

IUA1

1UA1

RES 3UAN-1
1
8

+12VAL

Connectors and protections

2011-12-16

2011-11-24

8204 000 9215


19280_001_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 61

B01B, Fusion supply DC/DC

Fusion supply

B01B

+Vb

9-1-2

QFU1.1E LA

B01B

+1V5

7UC8-2
LM8337

GND-1V2

4 3UCT-4 5
IUCL

7UC7
PHD38N02LT

3UD0
10R

IUCH

100n

680K

2UC2

220K
3UC6

22K

3UCZ

3UCY

22K

4K7
3UCW

4 3UCH-4 5

6
4K7

4K7
3UCH-3
3

2 3UCH-2 7

8
4K7

7UC8-1
LM8331

IUCK

GND-1V2
GND-1V2
GND-1V2
GND-1V2
GND-1V2

2UC3

330p
1

3UD1

1n0

4K7

2UC4
1n0

IUCJ

FUC3

3UCJ

GND-1V2

3UCM

+1V2-MIPS

2K2
RES

2UCU

1n0
RES

1u0

FUC2

12K 1%
IUCE 2UCV

2UCG

+5V

22R

+12Va

9UC1
RES

7UC4
TS2431

GND-1V2

3UD2

2UCT RES

100K

IUCG

IUCF

IUCD

7UC6-1
BC847BS(COL)
6

7UC6-2
BC847BS(COL)
3
ENABLE+1V5+1V1

3UCH-1

100K

1 3UCT-1 8

10u

GND-1V2

2UCS

6
+12Va

1u0
GND-1V2

cUP9

+Vb

CORE VOLTAGE SUPPLY MIPS FUSION

7UC5
RT9194GE
RES

VCC
5

DRI

33K 1%

270K
RES 3UCL

RES 3UCK

3UC4

GND

1M0

PGOOD

1M0

FB

100K 1%
3UC5

EN

47K 1%
3UCV

GND-1V2

IUCC

DVS2
3UCS

IUCM

5UC1

IUC0

+12Va

5
6
7
8

22u

IUC2

3UC0

7UC2
SI4778DY-GE3

1
2
3

IUC1

3R3

10R

10R

4 3UC3-4 5

10R

3 3UC3-3 6

10R

2 3UC3-2 7

1 3UC3-1 8

6UC2

FUC0

22u

22u
2UCY

+1V1-FD
2u0

2UCW

FB
MODE

2u0
5UC0

IUC8

220u 2.5V

EN

1n0

5UC2

22u

LGATE

2UC1

1n0

3R3

100n

2UCL

CS

IUCB

3UC8

RES

PHASE

IUC7

2UCK RES

UGATE

PGOOD

2UCH

22u

10

TON

IUC6

13

GND GND_HS
GND-1V1F

DDR3 SUPPLY FUSION

CORE VOLTAGE SUPPLY FUSION

GND-1V1F

GND-1V1F

RES 2UCM

GND-1V1F

3UCG

DVS1
ENABLE+1V5+1V1

22p
3UCB

IUC9

180K 1%

220K 1%

22K 1%
22K 1%

3UCN

120K 1%
3UCF

GND-1V5

B340A-M3

7UC3
SI4172DY-GE3

1
2
3

10u

2UCP
10u

3UC7

LTST-C190CKT

15

8
9

IUCA

ENABLE+1V5+1V1

GND PGND GND_HS


5

270K 5%

22u

2UBT

22u

2K2

3UCR RES

GND-1V5
GND-1V5
GND-1V5
GND-1V5

+5V

3UB7 RES
100K

16
17
18
19
20
21
22
23
24
25
26

6UC0 DBG IUCN

3UC9 DBG
IUBG

12

VIA

100n

1%

EN

6
3

150K

SS

1n0

VREG5

11

3UCA

3n3
RES
2UBS

470K RES
2UBY

22K 1%

3UB9

3UB8

PG
VFB

IUC5

2UCF

BOOT

IUCP

1n0

VO

2UBV

12K 1%

2
IUBD

22K 1%
2UBW RES

IUBE
12
IUBF

IUBC

3UB6

22p

VBST

220p

VCC

3UCP

+1V5

VIN2

7UC0
RT8228BGQW

10
11

2UCR RES

SW1
SW2

1u0

14

VIN1

2UC0

13

2UCE

7UB5
TPS54429PWP

22u
2UBP

100n

2UBK

10u

10u
2UBM

2UBL

2u0

2UBN RES

+1V5
30R

2K2

3UC2 RES
RES 6UC1

+12Va

FUB5

5UB7

IUBB

1M0

IUBA

2UCD
IUC3

3UCE

5UB5

7UC1
BC847BW
RES

5
6
7
8

IUC4

PDZ5.6B(COL)

9UC0

+5V

3UC1

10R

2UCJ RES

2UCC

22u

22u
2UCB

2UCA

30R

3UCC

SENSE+1V1-FD

10R
3UCD RES

+1V1-FD

10R
2UCN
1u0

GND-1V1F

GND-1V1F

GND-1V1F

Fusion supply
DC/DC

2011-12-16

2011-11-24

8204 000 9215


19280_002_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 62

B01C, DVBS supply DC/DC

DVBS supply
5UP1

B01C

IUP1

SS

+2V5-DVBS

VBST

IUP6

2UP4
5UP2

100n

SW

EN
VREG5

IUP3

IUP7

IUP9

3u0

IUPG
1u0

10
11

470K

GND-1V0

3UP4

10n

3UP1 RES
68K
3UP2 RES

RES 3UP5

GND-1V0

2UP9

1n0

RES 2UP8

GND_HS GND

2UP7

VIA

+1V0-DVBS

22u

VFB

22u
2UP6 RES

IUP8

8K2 1%
2UPA RES

1%

VIN

STEP DOWN

22p
2UPB RES

22K

100n

10u
2UP2

10u

7UP1
TPS54227DDA

2UP5

30R

+12V-DVBS
2UP1

FUP1

22p
3UP6

SENSE+1V0-DVBS

8K2 1%
GND-1V0

3UP7

GND-1V0

68K

CORE VOLTAGE SUPPLY FOR DVBS DEMODULATOR


cUP1
+12V

+12V-DVBS

1UP1
T

GND-1V0

3.0A 32V

30R

100n
5UP6

2UPL RES

+12V-DVBS

10u

5UP5

10u 25V

10u
RES 2UPM

10u
2UPE

17

7UP2
LNBH25PQ

100n
2UPD

2UPC

IUPJ

VCC

3UPE

18

FLT
BPSW

IUP2
9

VIA

ISEL
GND_HS

6UP6

B230LA-M3

2UPH

1u0

IUPE

LNB SUPPLY

25

PGND

GND

22K

6UP5

LTST-C190KGKT

RS1D

1K0

+5V

NC

IN
OUT

2UPG

DEBUG
6UP1

DETIN

+V-LNB

47u 25V

DEBUG
3UP3

22
23

DSQ

1
5
10
11
12
13
14
24
26
27
28
29
30
31
32
33

47u 25V

19
F22-DISECQ-TX

SDA

20

2UPF

8
47R

470n
FUPA
B230LA-M3

47R

VOUT
SCL

3UPD

SDA-FE

VUP
ADDR

16
21

2UPK

3UPB

SCL-FE

2UPJ

IUPF
VBYP

IUP4 +V-LNB

220n

LX

6UP4

15

B01C

2UP0

9-1-3

QFU1.1E LA

DVBS supply
DC/DC

2011-12-16

2011-11-24

8204 000 9215


19280_003_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 63

B01D, Power sequencing DC/DC

Power sequencing

B01D
IUF8

3UF1

3UFF

+12V
100K

+5V

IUF2

12K

+12V

RES
2

+2V5

7UF3-1
BC847BPN(COL)
1

IUFA

100K

RES 3UF2

ENABLE+1V5+1V1
3
47K

100K

6 3UF7-3 3

10n

IUFG
4 3UF7-4 5

RES

1u0

2UF2

100K

RES 3UFG

100K
3UFA

100K

4 7UF3-2
BC847BPN(COL)

IUF7

7 3UF7-2 2

100n

2UF5

22K

1 3UF7-1 8

ENABLE+2V5

2UF4

3UG2-4

100K

+3V3

7UF8-2
5

IUFS

BC847BS(COL)
4

4 3UFV-4 5
100R RES

+12V

22K

3UG0-1

ENABLE+1V5+1V1

22K

3UG0-3

DETECT12Vn

IUF0
IUF1

ENABLE+3V3

4
BC847BPN(COL)
7UF7-2

+3V3-STANDBY

+12V

3UG2-1

22K

3UG0-2

22K

3UG0-4
IUFP

3UGC

3UG1-4

7UF7-1
BC847BPN(COL)
1

22K
2

IUF3

3UG1-3

DETECT12V

22K

IUFK

22K
IUFL

6
7UF6-1
BC847BPN(COL)
1

IUFM

2UF9

3K3

IUFN
7UF5-1
BC847BPN(COL)
1

22K

22K
3UG1-2

3UG1-1

IUFJ

3UGE

100R

100n

3UGF

IUFR
7UF8-1
BC847BS(COL)
1

IUFE
5

120K

IUFD
5

ENABLE+3V3
ENABLE+2V5

4
BC847BPN(COL)
7UF6-2

100K

3UGB

6
IUFC

4
BC847BPN(COL)
7UF5-2

IUF5

3
IUF6

22K

22K

3UG2-3

+12V
3UG2-2

3 3UFV-3 6
100R RES

+2V5
2 3UFV-2 7
100R RES

B01D

1 3UFV-1 8
100R RES

9-1-4

QFU1.1E LA

Power sequencing
DC/DC

2011-12-16

2011-11-24

8204 000 9215


19280_004_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts


9-1-5

QFU1.1E LA

9.

EN 64

B01E, -

B01E

B01E

Intentionally blank

DC/DC

2011-12-16

2011-11-24

8204 000 9215


19280_005_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 65

B01E, Miscellaneous

B01F

Miscellaneous

B01F

1M54
RES
1T71

FGY2
3GY7
3GY9

100R

3GYB

100R
100R
100R
100R

3GYD

FTA1

SCL-SRF

RES

FTA3

SDA-SRF

FTA2

3TA1
3TA2

RES

10R

100R

1
2
3
4

502386-0470

TEMPERATURE
SENSOR

1n0

RES 5TA1
FTA5

+3V3

1u0

7CY6
PCA9633TKRES

VDD

LED1

SDA

LED2

LED3

VIA

3CYS

3CYR

RES
47R
RES
47R

SCL-MC
SDA-MC

10
11
12
13

10K

3CY2

10K

+3V3-STANDBY +5V

3CY1 RES

SCL

VSS

LED2

LED0

GND_HS

LED1

100n

ITA1

30R

RES 2CYK

+3V3-STANDBY

RES 5TA2
+12V

RES 2TA3

RES
1TA1

30R
T 1.0A 63V

1n0
2GYG

2GYH

1n0

1n0
2GYJ

1n0
2GYE

2GYF

1n0

1n0
2GYD

1n0

FTA6

10R

2041145-9

2GYB

FTA4

10p

100R
100R

BL-DIM1
BL-DIM2
BL-DIM3
BL-DIM4
BL-DIM5
BL-DIM6
BL-DIM7
BL-DIM8

10p
RES 2TA2

FGY3
3GY3
FGY4
3GY8
FGY5
FGY6
3GYA
FGY7
FGY8
FGY9 3GYC
FGYA

RES 2TA1

1
2
3
4
5
6
7
8
9

2GYC

ICY1
9CY1 RES

LED1-OUT

LED1

3CYU

LED2

3CYV

SCL-MC
47R

3CY3

LED1

3CY4

LED1

10K

ICY2

SDA-MC
47R

10K
7CY1
BC847BW

+3V3-STANDBY +3V3

ICY3
9CY2

1u0

2CY1

ICY4

ICY6

FCY3

100R

3CYD

FCY5

10R

RES

10R

FCYA
+5V

FCYB

3CYM
10R
RES

3CYP
100R

ICY7

FCY9
3CYL

RES
1R0

FCYC
FCYD
FCYE

12 13

FH52-11S-0.5SH

100p

100p
2CYE

100p
2CYD

100p
2CYC

100p
2CYB

10p
2CYA

10p
2CY9

100p
2CY8

RES

10p
2CY7 RES

19 20
RES

3CYN
100R
3CYT
100R

0R4

FCY8

10p
2CY6

RXD-RF4CE
LED1-OUT
SPEAKER-DETECTn
RESET-RF4CEn

3CYF
+T

FCY7

100p
2CY5

RES
10R
3CYK

3CYH

RES
10R
3CYJ
100R

RES

IRQ-SRFn

+5V

100R
3CYG

SCL-SRF
SDA-SRF
IRQ-SRFn
TXD-RF4CE

+3V3-STANDBY

FCY6

3CYE

RC_IRQ-RF4CEn

FCY4

1
2
3
4
5
6
7
8
9
10
11

FH52-18S-0.5SH
1u0

KEYBOARD_IRQ-SRFn

1C20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18

FCY2

2CYF

KEYBOARD_IRQ-SRFn

100R
3CYC

3CYB
100R

100n
2CY4

7CY2
BC847BW
RES

FTA7

1C21

FCY1

3CYA

LIGHT-SENSOR
3D-LED_3D-RF
LED2-OUT

10K

10p
2CY3

RES 3CY9

2CYL

LED2

47n

LED2

RES 2CY2

10K

9CY3
RES

3CY8

LED2-OUT

100K

3CY7 RES

+3V3

10K

3CY6 RES

10K

+3V3-STANDBY
3CY5 RES

9-1-6

QFU1.1E LA

Miscellaneous
DC/DC

2011-12-16

2011-11-24

8204 000 9215


19280_006_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 66

B02A, Tuner-channel decoder

B02A

Tuner-channel decoder

B02A

VCC-TUNER
IFA1

3FA0

22u

22u
2FA6

2FA5
100n

1FA2
U.FL-R-SMT-1(10)

2FA8

3KA1

30R

FFA1

3FA2

2FA9
2FAA

10p

100R

FFA2

1FA0 DBG

FFA4

FFA3

100R

3FA1

30R

AFA1

12

5FA7

AFA0
5FA5
330n
10p

330n

14

A3.3V
IF1_P
IF1_N
AGC1
NC1
NC2
IF2_P
IF2_N
AGC2
I2C_SCL
I2C_SDA

10p

FFA6

AFA3

10p
2FAH

FFA7

SCL-TUNER
SDA-TUNER

1n0

2FA4

AFA2
3FA4
47R 5FA6

10p 2FAK
10p

10p
2FAG

VCC-TUNER

100n

10u
2FA2

3FA3
47R

SOC-IF-N
SOC-IF-P

FFA0

OUT
COM

2FA1

2FA0

RES

330u 6.3V

30R

IN

5FA4

10p
2FAC

FFA8

2FAJ

9FA0

2FAB

IFA0

5FA0
+5V

9FA1

1
2
3
4
5
6
7
8
9
10
11

AFA5
AFA4

5KC9

330n
330n

47R
7FA0
LD1117DT33

FFA9

5KC8

47R

TUNER

3KA0

IF-N-DVBT2
IF-P-DVBT2

16

15

1F00
SUT-RE214Z

13

10p

2FA7

2
1FA1 1
U.FL-R-SMT-1(10)

30R

5FA1

0R1

FFAA

1
2
3

BM03B-SRSS-TBT

3KA3

IF-AGC

2KCH

32

7
19
42

10
22
28
44

47R
41

1K0
DKC0
IKC4
3KC7

IF-AGC
2KCJ

3K3

3KC9

1
47
2

48

10K
IKC5

100n
3KC8

0
1
2
3
TSDATA
4
5
6
7

TAINP
TAINM

IKC6

46
45

RFAIN

GPIO0
GPIO1
GPIO2

I2C
ADDRESS
=
0XD8

SCL
SDA

TIFAGC

TTUSCL
TTUSDA

3K3

DKC1
RESET-FUSION-OUTn

26

29

30

33
40

TESTMODE

SLVADR0

VIA

OSCEN_X

RST_X

SLVADR3

NC1
NC2
VSS

1 3KC0-1
47R

TS-CHDEC-CLK
TS-CHDEC-VALID
TS-CHDEC-SOP

3 3KC0-3
47R

TS-CHDEC-DATA

3KCC

22K

3FAD

22K

10p

2FAE

2K7

470R

3FAC

3FAB

470R

3FAA

VCC-TUNER

5KC5

IKC7

5KC7
+3V3-DVBT2-D

VCC-TUNER
3KC2
3KC3

47R

SCL-FE
SDA-FE

50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74

IKC8
+1V2-DVBT2-C

+1V2-FE
30R

30R
5KC6
+3V3
30R

47R

+1V2-DVBT2-C

3KCE

IKC9
+1V2-DVBT2-P

22R

GND_HS
49

25

6
11
18
23
27
31
36
39
43

24

8
9
12
13
14
15
16
17
20
21

6p8
47R
8
2 3KC0-2
47R
6

1u0

10p

+3V3-DVBT2-D

TSCLK
TSVALID
TSSYNC

3KC1

5
4
3

2KCR

2KCG

3KCB

3KC6

4u7

RES 2KCK

PVDD

XTALO

IFA4

IFA5

FKC1

Position Nr

FUSION

3FA7

100R

3FA9

2K7

3FAA

470R

10u

47R
IKC3

38
37

TS-INT-CLK
TS-INT-VALID
TS-INT-SOP
TS-INT-DATA

7FA1-2
BC857BS(COL)
4

2KCS

3KCA

5
8
7
6

1u0

IKC2

10p
2KCF
100n

34

DVDD

9RC2-4
9RC2-1
9RC2-2
9RC2-3

IFA3
2

2KCP

100n

IKC1

CVDD
XTALI

6K8
6

7FA1-1
BC857BS(COL)
1

10K

2KC0

100n

100n

2KC1

100n
2KC2

2KC3

100n

VCC-TUNER

1K0

2KCD
2KCE

5KC1
T2-AGC

3KC4

35

3FA9

7KA0
PDTA114EU
RES

+1V2-DVBT2-P

2KC4
100n

2KC5
100n

100n

2KC7

2KC6
100n

9KC0
9KC1

12p

2KCB

12p
1KC0

4u7
IF-P-DVBT2
IF-N-DVBT2

2
4

2KCC
5KC0

7KC0
CXD2834ER
IKC0

6K8

FFAC

4
1
2
3

IFA6

RES 3FA8

RES 3KA2

100R

+3V3-DVBT2-D

41M
3

10p

3FA7

100R

T2-AGC

+1V2-DVBT2-C

FFA5

2FAF
RES 3KA4

SOC-IF-AGC

22n

FFAB

IF-AGC

2FAD

100R

10n

9-1-7

QFU1.1E LA

TV550-R4

3FAB

10K

3FAC

470R

3FAD

2K7

22K

2FAD

100nF

7FA1

BC857BS

22nF
_

Tuner-channel decoder
Front-end

2011-12-06

8204 000 9218


19280_007_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 67

B02B, DVBS

DVBS

B02B

B02B
7RA1-1
STV0903BAC

22u

2RAG

100n

10n

2RAF

100n

2RAE

10n

2RAD

100n

2RAC

2RAB

+1V0-DVBS

Diversity Matrix (Satellite Tuner dependant)


Position Nr Affected Pin Default Value STV6110 STV6111

2RBU

27

4N7

2RBV

27

68P

9RB9

27

JUMP

3RB3

27

4R7

2K2

10n

2RAP

10n

27

10U

2RB7

10n

JUMP

2RAN

25

X
X

VDDA1V0

5
9
13
114
118
123
127

+2V5-DVBS

VDD3V3

VDDA2V5

N
I1
P

129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165

8
7

IM
IP

N
Q1
P

60
56

F22-DISECQ-TX
NC
NC

IRA0

3RA7

SCL-FE
SDA-FE

47R

47R

IRA1

3RA8

SCLT
SDAT

FRA0

RESET-DVBS
IRA2

+3V3-DVBS

82
83
84
86
87
89
90
91
94
95
108
109
111
115
116
119
120

0
CS
1

128
20
126
107

DISEQCIN1
DISEQCOUT1
FSKRX_IN
FSKRX_OUT
NC

97
98

SCL
SDA

19
18

SCLT
1
SDAT

62
58

RESETB
STDBY

26
23
24
29
27

FRA1
FRA2
FRA3
FRA4
FRA5

63
64
65
67
68
70
71
73
74
75
78
79

0
1
2
3
D
4
5
6
7
CLKOUT
STROUT
DPN
ERROR

COMP

TCK
TDI
TDO
TMS
TRST

101
50
49
47
46
44
43
37
35
34
32
30
55

2RC9 RES

47n

47p

NC
NC
NC

TS-INT-DATA
TS-INT-CLK
TS-INT-SOP
TS-INT-VALID

NC
NC

3RA0-3 3
3RA1
3RA0-2 2
3RA0-1 1

TS-DVBS-DATA
TS-DVBS-CLK
TS-DVBS-SOP
TS-DVBS-VALID

47R
7 47R
8 47R
47R

NC

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

40
41

0
1

1
2
3
4
5
6
GPIO 7
8
9
10
11
12
13

FRA6

NC

AGC

1K0
2RB0

NC

IRA3

3RA3
120K

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

100n

9RB7

VIA

2
3

+1V0-DVBS

2RAW

JUMP

100n

25

2RAM

9RB6

X
X
-

100n

33N

2RAV

100n

2RBW

2RAL

27P

100n

4,5

2RAU

2RCB

100n

2RAK

27P

100n

4,5

2RAT

2RBM

100n

2RAJ

JUMP

100n

4,5

2RAR

9RB8

21
38
54
76
80
92
96
106

+3V3-DEMOD

100n

100P

2RAS

4,5

2RAH

2RBY

VDD1V0

DIRCLK
CLKI
CLKI2
CLKOUT27

SENSE+1V0-DVBS
FRA7

3RA2

16

I2C-ADDRESS : D0

59
104
103
100
11
12

QM
QP

52

VS
AGCRF1

XTALO

6p8

10n

2RAA

100n

10n

2RA9

100n

2RA8

10n

2RA7

100n

10n

2RBK

22u

2RBL

30R

2RA6

2RA5

+3V3RF

+3V3-DVBS

GND_HS

NC
NC

124

RES 2RB1

+1V0-DVBS
IRA7

5RA1

GNDA

NC

MAIN

XTALI

1K0

RES

1
4
6
10
14
113
117
121
125

3RA4

100n

10n

2RA4

100n

2RA3

10n

2RA2

100n

2RA1

22u

2RA0

22u
2RCC

22u
2RCD

RES

2RCE

22u

2RAY

30R

POWER_VIA

10K

15
17
22
25
28
31
33
36
39
42
45
48
51
53
57
61
66
69
72
77
81
85
88
93
99
102
105
110
112

+3V3-DEMOD

2p2

+3V3-DVBS

122

XTAL

3RA6

5RA0

+1V0-DVBS

IRA8

RES 2RCA

7RA1-2
STV0903BAC

+3V3RF

68p

4R7

4n7

2RBU

IRA9

3RB3

10u
2RBV

2RB7

IRA4
9RB9

100n

100n
2RB6

1n0
2RB5

1n0
2RB4

1n0
2RB3

2RB2

7RC1
LD1117DT33

16V

IRC0

7RC0
RT9193-25GB

EN

BP

FRC0

+2V5-DVBS
IRC1

10n

2RC4

10K

3RC2

100n

COM

1u0

10K

OUT

IN

2RC2

+3V3-DVBS

1u0

IRC2

2RC1

+3V3

3RC1

SYN HS
29 33

2RC6

100n

2RC5

10p

10p

10p

10p

IP
IM

2RBS

8
100R

9RB7

GND
RF LNA LT MIX DIG BB VCO
3
9 10 15 17 25 26
5

9RB6

27p

7
34
35
36
37
38
39
40
41
42

QP
QM

RF_IN

2
3RB1-2

5
100R

1u0

VIA

21
20

4
6 3RB1-4
100R
1
7 3RB1-1
100R

+3V3-DVBS

COM

2RC0

NC

3
3RB1-3

2RBP

AS

1K0

FRC1

OUT

IN

30R

XTAL

10p

RF_OUT

AGC

100p

10p

QP
QN

3RB0

10p

I2C-ADDRESS : C6

1
100p

2RBY

2RCB

9RB8

0p56

*
RES 2RBG

100p

1n0
2RBH

SM15T
2RBJ

RES 2RBT

SATELLITE
TUNER

27p

FRA8

+V-LNB

2RBM

27n

8
9 5
10

5RA2

6
7

1
2
3
4

18
19

2RB8

2RC3

1R01

SCL
SDA

IP
IN

32

2RBR

23
24

XTAL_OUT

XTAL_IN

XTAL_CMD

IRC3

+5V

SYN

2RBN

16

VCO

2RBC

9RB0
RES
+3V3RF

MIX DIG BB
VSS

5RC0

28

2RBA

27

2RBB

RES
10p

22

10p

12
13

14

2RB9

2RBD

11

33n

2RC8
AGC

31

10p

RES
10p

LNA LT
30

10p

2RC7
SCLT
SDAT

2RBW

1RA0
16M
2RBF

2 NC 4
NX3225GA

10p

7RA0
STV6110AT

22u

2RBE

47p
6RA0

9-1-8

QFU1.1E LA

* *
+3V3RF
+3V3-DVBS

7RC2
BC847BW

DVBS
Front-end

2011-12-06

8204 000 9218


19280_008_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 68

B03A, LVDS fanout

B03A

LVDS Fanout

B03A

7J00-7
FUSION120

7J00-6
FUSION120

AG29
AD26
AH29
AJ29
AF28
AH30
AG28
AJ30
AJ28
AJ27
AF27
AG27
AG24
AE23
AK22
AJ26

FRA5
FRA6
FRA7
FRA8
CA-OEn

FRA10
FRA11
FRA12
NAND-CLE
NAND-ALE
CA-A14

F-OEn
F-WEn
F-CEn
TS-DVBS-DATA
TS-DVBS-VALID
TS-DVBS-SOP
TS-DVBS-CLK
CA-A06

F-RDY

AK29
AK24
AJ24
AE26
AF23
AK28
AH24
AG22
AG23

PODA4
PODA5
POD_A7
POD_A8
POD_A9
PODIREQ
PODRST
PODVS1
PODWAIT
POD_DIR
PODCE1
PODCE2
PODCD1
POD_CD2

POD_VCC_EN
FRA0_AD0
POD_VPP_EN
FRA1_PODWE
HPD
FRA2_PODIORD
FRA3_PODIOWR
FRA4_PODREG
GPIO0
FRA5_AD1
GPIO1
FRA6_AD2
GPIO2
FRA7_AD3
GPIO3
FRA8_AD4
GPIO4
FRA9_PODOE
GPIO5
FRA10_AD5
GPIO6
GPIO7
FRA11_AD6
GPIO8
FRA12_AD7
GPIO9
FRA13_CLE
FRA14_ALE
GPIO10
FRA15_PODA14
GPIO11

FOE
FWE
BOOTCS
FCE2N
FINT1
FINT2
FCLK
FAVD_PODA6
FREADY

GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
GPIO22
GPIO23
GPIO24

TS_TSB_MCU

AJ22
AH22
AF22
AJ23
AH23

CA-A04
CA-A05
CA-A07
CA-A08
CA-A09

AE27
AG30
AF30
AE28
AE30

CA-RDY
CA-RST
CA-VS1n
CA-WAITn

FJ16

AD28
AD27
AF29
AD30

CA-CE1n
CA-CE2n
CA-CD1n
CA-CD2n

AE29
AD29
R30

SPEAKER-DETECTn

E1
F3
F4
F2
F1
G6
G5
G4
G3
G2
G1
H6

GPIO0
GPIO1
CTRL-DISP1
CTRL-DISP2
SDIO1-D1
SDIO1-WP
SDIO1-D2
SDIO1-D3
GPIO8
SDIO1-D0
SDIO1-CMD
SDIO1-CLK

J6
J5
J4
J3
J2
J1
H1
H2
H3
H4
H5

3FZ1

CA-MDO0
CA-MDO1
CA-MDO2
CA-MDO3
CA-MDO4
CA-MDO5
CA-MDO6
CA-MDO7

AG20
AH20
AJ20
AK20
AE21
AF21
AG21
AH21

CA-MOCLK
CA-MOSTRT
CA-MOVAL

AJ21
AK21
AE22

TS-CHDEC-DATA
TS-CHDEC-CLK
TS-CHDEC-SOP
TS-CHDEC-VALID
IF-IN-P

U28
U29
U30
T26

IF-IN-N

FJ15

AMBI-SPI-CCLK-FUS
AMBI-SPI-MOSI-FUS
GPIO18
GPIO19
GPIO20
ENABLE-3V3-AMBI-FUS
GPIO22
GPIO23
GPIO24

F30
F29

10p
2FZ2
100n
2FZ3

100n

E28
E27

2FZ4
2J10
18p

33R
FJ14

2FZ1

47p

H30
H29

2
4

TS2OCLK
TS2OSYNC
TS2ODEN

TS1CLK
TS1SYNC
TS1DEN

IF
TAGCO
RF

18p

TSSDI
TSSCLK
TSSSYNC
TSSDEN

IN_P
IN_N
P
PD
N

XTLI24M

DGPIO

XTLO24M

TEST-CON
TEST-MOD

P30
P29

ENABLE-STANDBY

H25

SPI-EN
SF-SDI
SF-SDO
SF-WP
SF-HOLDn
SF-CS
SF-CLK

K28
L28
L26
K30
L27
L29
L30

RSTN

TESTCON
TESTMOD
STB_EN

SPI_EN
SFSI
SFSO
SFWPN
SFHOLDN
SFCES
SFSCK

1
2

0
1
2
3
4
STB_GP 5
6
7
8
9
10

STB
J26

AH18
AJ18
AK18
AE19
AF19
AG19
AH19
AJ19

MDI0
MDI1
MDI2
MDI3
MDI4
MDI5
MDI6
MDI7

AK19
AE20
AF20

MICLK
MISTRT
MIVAL

2FZ5

2J11

RESET-STANDBYn

0
1
2
3
TS2OD
4
5
6
7

0
1
2
3
TS1D
4
5
6
7

10p

2FZ6

FRA0
CA-WEn
CA-IORDn
CA-IOWRn
CA-REGn

FRD0_PODD0
FRD1_PODD1
FRD2_PODD2
FRD3_PODD3
FRD4_PODD4
FRD5_PODD5
FRD6_PODD6
FRD7_PODD7
FRD8_PODA0
FRD9_PODA1
FRD10_PODA2
FRD11_PODA3
FRD12_PODA10
FRD13_PODA11
FRD14_PODA12
FRD15_PODA13

24M

AK23
AF26
AE24
AK25
AH25
AH27
AK27
AJ25
AF25
AG26
AK26
AG25
AE25
AH26
AH28
AF24

1J00

CA-D00
CA-D01
CA-D02
CA-D03
CA-D04
CA-D05
CA-D06
CA-D07
CA-A00
CA-A01
CA-A02
CA-A03
CA-A10
CA-A11
CA-A12
CA-A13

FLASH_CI_GPIO

9-1-9

QFU1.1E LA

TXD
RXD
SDA
SCL

LED
IR
KYBRD
LGSEN
CEC
PWRON
AVLINK

1
2

PCVS
PCHS
STB_RSTO
HP_DETECT
MUTE

F27
G26

3FZ0
100R

4n7

SOC-IF-AGC
FJ10

T28
T29

M27
M26
M25
N30
N29
N28
N27
N26
N25
P25
P26

STB-GP0
STB-GP1
STB-GP2
STB-GP3
STB-GP4
STB-GP5
STB-GP6
STB-GP7
STB-GP8
STB-GP9
STB-GP10

R27
R28
P27
P28

STB-TXD
STB-RXD
STB-SDA
STB-SCL

J25
M29
J30
M30
M28
R29

LED
IR
KYBRD
LGSEN
HDMI-CEC
PWRON

K25
K26

AVLINK1
AMBI-TEMP-FUS

J27
J28

PCVS
PCHS

J29

STB-RSTO

K27
H26

HP-DETECT
AUDIO-MUTEn

LVDS Fanout

2011-12-16

2011-11-24

8204 000 9238


19280_009_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 69

B03B, UMAC controller

UMAC controller

B03B
7J00-8
FUSION120

M0-MVREF0

AE11
AE12
AE7
AD18

2J05

100n

1K0

3J06

100n

3J00

240R

MM0ANA

FJ01

P
MM1CK
0
N
1 MM0BA
0
2
MM1VREF
MM0CASN
1
MM0RASN
MZQ1
MM1ANA_TEST
MM0WEN
DDR_RETN
MM0CKE
MM0ODT
MM0RESETN
MM0CSN

U1
P5
R1
T3
V2
U3
R3
V1
N4
P4

M1-BA0
M1-BA1
M1-BA2
M1-CAS#
M1-RAS#
M1-WE#
M1-CKE
M1-ODT
M1-RESET#
M1-CS#

P1
P2

M1-MCLK0
M1-MCLK0#

U7
U6
AA5
K6
AB4

M1-MVREF1

3J01

240R
MM1ANA

+1V5-M1

P
MM0CK
N
0
MM0VREF
1
MZQ0
MM0ANA_TEST

+1V5-M1

DDR-RTN

FJ04

M1-MVREF1

MM1ANA

MM0ANA

2J04

AK14
AJ14

0
MM1BA 1
2
MM1CASN
MM1RASN
MM1WEN
MM1CKE
MM1ODT
MM1RESETN
MM1CSN

100n

M0-MCLK0
M0-MCLK0#

M0-MVREF0

0
1
2
3
4
5
6
7
MM0A
8
9
10
11
12
13
14
15

2J03

1K0

3J05

100n

FJ05

MM0DQS3

M1-MA0
M1-MA1
M1-MA2
M1-MA3
M1-MA4
M1-MA5
M1-MA6
M1-MA7
M1-MA8
M1-MA9
M1-MA10
M1-MA11
M1-MA12
M1-MA13
M1-MA14
M1-MA15

100n

AG12
AF14
AK13
AH12
AF12
AF11
AH13
AG11
AG15
AG14

MM0DQS2

T2
L2
N1
N3
L3
N5
L5
N2
M3
L4
R5
M1
T1
M5
L1
R2

1K0

M0-BA0
M0-BA1
M0-BA2
M0-CAS#
M0-RAS#
M0-WE#
M0-CKE
M0-ODT
M0-RESET#
M0-CS#

+1V5-M0

MM0DQS1

M1-DQS0
M1-DQS#0
M1-DQS1
M1-DQS#1

DB46
DB47

3J03

AJ12
AJ17
AK15
AH15
AH17
AF15
AF17
AJ15
AH16
AG17
AF13
AK16
AK12
AF16
AK17
AJ13

MM0DQS0

AA2
AA3
V3
V4

M1-DQM0
M1-DQM1

1K0

M0-MA0
M0-MA1
M0-MA2
M0-MA3
M0-MA4
M0-MA5
M0-MA6
M0-MA7
M0-MA8
M0-MA9
M0-MA10
M0-MA11
M0-MA12
M0-MA13
M0-MA14
M0-MA15

P
N
P
N
P
N
P
N

DB78
DB75

3J04

AK7
AK6
AJ10
AK10
AF2
AF1
AH4
AG4

DB14
DB16

0
1
2
3
4
5
6
7
MM1A
8
9
10
11
12
13
14
15

DB76

FJ00

FJ03

2J02

M0-DQS0
M0-DQS#0
M0-DQS1
M0-DQS#1
M0-DQS2
M0-DQS#2
M0-DQS3
M0-DQS#3

0
1
MM0DM
2
3

P
N
P
MM1DQS1
N
MM1DQS0

AA1
W3

DB79
DB77

100n

AJ6
AK9
AE1
AH3

M0-DQM0
M0-DQM1
M0-DQM2
M0-DQM3

0
1

M1-MD0
M1-MD1
M1-MD2
M1-MD3
M1-MD4
M1-MD5
M1-MD6
M1-MD7
M1-MD8
M1-MD9
M1-MD10
M1-MD11
M1-MD12
M1-MD13
M1-MD14
M1-MD15

1K0

DB74

MM1DM

W2
AC2
Y1
AC1
Y3
AB1
W1
AB3
T5
Y4
T4
W5
U5
Y5
U4
W4

3J02

DB73

0
1
2
3
4
5
6
7
MM1DQ
8
9
10
11
12
13
14
15

2J00

DB72

DDR3
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
MM0DQ
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31

100p

AH8
AH5
AH7
AJ5
AK8
AH6
AJ8
AK5
AK11
AF9
AJ11
AG9
AF10
AG8
AH10
AH9
AG1
AF3
AE3
AH1
AH2
AD3
AD1
AD2
AK4
AG3
AJ3
AK2
AK3
AJ2
AG5
AJ1

DB71

M0-MD0
M0-MD1
M0-MD2
M0-MD3
M0-MD4
M0-MD5
M0-MD6
M0-MD7
M0-MD8
M0-MD9
M0-MD10
M0-MD11
M0-MD12
M0-MD13
M0-MD14
M0-MD15
M0-MD16
M0-MD17
M0-MD18
M0-MD19
M0-MD20
M0-MD21
M0-MD22
M0-MD23
M0-MD24
M0-MD25
M0-MD26
M0-MD27
M0-MD28
M0-MD29
M0-MD30
M0-MD31

2J06

B03B

2J07

9-1-10

QFU1.1E LA

FJ02

DB80

DB85

DB81

DB86

DB82

DB87

DB83

DB88

DB84

DB89

UMAC controller

2011-12-16

2011-11-24

8204 000 9238


19280_010_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 70

B03C, UMAC 1 DDR3

B03C

UMAC 1 DDR3

B03C
+1V5-M1

+1V5-M1

3J1H

3J1P
3J1R
100R

100R
3J25
3J27

3J2B

3J2A
100R

3J2D

3J2C

3J2H

3J2G
100R

3J2K

3J2J

100n

240R

DB49

DB52

DB51

K4
L8
L4
K3
L9
L3
M9
M3
N9
M4
H8
M8
K8
N4
N8

RAS
ODT
CAS
CK
CK
CKE
CS
WE
RESET

NC

E2
J9

DB57

H9

M1-MA15

DB06

DB64
DB53

M1-BA0
M1-BA1
M1-BA2
M1-RAS#
M1-ODT
M1-CAS#
M1-MCLK0
M1-MCLK0#

VSSQ

DB54

DB55

J3
K9
J4
F4
G2
G4
F8
G8
G10
H3
H4
N3

B10
C2
E3
E10

VDD

VDDQ

0
1
2
3
4
5
6
7
A
8
9
10
11
12
13
14
BC
AP

TDQS
TDQS
DM
DQS
DQS

0
1
2
3
DQ
4
5
6
7

VREFDQ
VREFCA

A8
B8

DB58

M1-DQM1

C4
D4

DB90
DB91

M1-DQS1
M1-DQS#1

B4
C8
C3
C9
E4
E9
D3
E8

DB48

M1-MD14
M1-MD15
M1-MD10
M1-MD11
M1-MD12
M1-MD13
M1-MD8
M1-MD9

DB63

ZQ
BA0
BA1
BA2
RAS
ODT
CAS
CK
CK
CKE
CS
WE
RESET

NC

VSS

A1
A4
A11
F2
F10
H2
H10
J8
N1
N11

M1-MA15

VSSQ

M1-MCLK0#

3J2R

3J2Q
100R

3J2T
100R

2J1A

100n

1K0

2J1B

1K0
+1V5-M1

10n

10n
2J1J

10n
2J1G

10n
2J1E

100n
2J21

100n
2J1C

100n
2J1Z

+1V5-M1

2J1V

DB93

DB98

DBA3

DB94

DB99

DBA4

DB95

DB59

DBA5

DB96

DBA1

DBA6

DB97

DBA2

DBA7

10n

10n
2J1H

10n
2J1F

100n
2J20

100n
2J1D

2J1U

100n
2J1W

+1V5-M1

10n
2J1K

10n

3J15

FJ09

DDR-MVREF12

+1V5-M1

3J14

+1V5-M1

100n

3J2S
100R

M1-MD0
M1-MD5
M1-MD6
M1-MD1
M1-MD2
M1-MD7
M1-MD4
M1-MD3

DB50

DDR-MVREF12

3J2P
100R

M1-DQS0
M1-DQS#0

M1-MA0
M1-MA1
M1-MA2
M1-MA3
M1-MA4
M1-MA5
M1-MA6
M1-MA7
M1-MA8
M1-MA9
M1-MA10
M1-MA11
M1-MA12
M1-MA13
M1-MA14

M1-CKE
M1-CS#
M1-WE#
M1-RESET#

10n

100R
100R

A1
A4
A11
F2
F10
H2
H10
J8
N1
N11

BA0
BA1
BA2

3J2M

3J2N
M1-CKE
M1-RESET#

DB41

M1-DQM0

ZQ

100R

10n
2J84

M1-ODT

DB40

100R
3J2L

10n
2J88

100R
100R

10n
2J83

M1-CS#

10n
2J82

100R

M1-CKE
M1-CS#
M1-WE#
M1-RESET#

3J2F
100R

10n
2J87

M1-WE#

100R
3J2E

10n
2J86

100R

100n
2J81

100R

M1-CAS#

VREFDQ
VREFCA

DB42
DB43

B4
C8
C3
C9
E4
E9
D3
E8

0
1
2
3
DQ
4
5
6
7

VSS

100n
2J85

M1-RAS#

RES

DB01
DB39

100n
2J1T

100R

3J29
100R

DB35
DB36
DB38

10u
2J1S

M1-BA2

+1V5-M1

100R
3J28

M1-BA0
M1-BA1
M1-BA2
M1-RAS#
M1-ODT
M1-CAS#
M1-MCLK0
M1-MCLK0#

10u
2J1R

100R
100R

M1-MCLK0

100R
3J26

F4
G2
G4
F8
G8
G10
H3
H4
N3

C4
D4

DQS
DQS

A2
A9
B2
D9
F3
F9
J2
J10
L2
L10
N2
N10

3J24

M1-BA1

3J10

3J23

3J22

M1-BA0

J3
K9
J4

DB62

2J22

100R

3J21

10u
2J25

M1-MA15

H9

100R

2J24

M1-MA14

100R

100R
3J20

2J27

100R

100n
2J15

3J1Z

47u 16V

100R

M1-MA13

2J14

3J1V
100R

3J1W
M1-MA12

E2
J9

DDR-MVREF11

100R
3J1U

75R

100R

DDR-MVREF11

3J16

100R

M1-MA11

FJ08

3J1T

DB56

75R

M1-MA10

DB33
DB34

100R
3J1Y
3J1S

3J17

100R

1K0

100R

M1-MA9

3J12

M1-MA8

1K0

100R

3J11

3J1M

3J1L
3J1N

DB32

10n

100R

3J1K
100R

10n

M1-MA7

100R
3J1J

2J16

100R

100n

100R

M1-MA6

2J17

M1-MA5

DB31

A2
A9
B2
D9
F3
F9
J2
J10
L2
L10
N2
N10

3J1G

B3
B9
C10
D2
D10

100R

100R

7J02
H5TQ2G83BFR
A8
B8

TDQS
TDQS
DM

240R

3J1E
M1-MA4

+1V5-M1

3J1F

100n

3J1D
100R

VDDQ

VDD
0
1
2
3
4
5
6
7
A
8
9
10
11
12
13
14
BC
AP

3J13

100R
3J1C

100n

M1-MA3

100R

2J12

100R

K4
L8
L4
K3
L9
L3
M9
M3
N9
M4
H8
M8
K8
N4
N8

2J18

3J1B

3J1A
M1-MA2

M1-MA0
M1-MA1
M1-MA2
M1-MA3
M1-MA4
M1-MA5
M1-MA6
M1-MA7
M1-MA8
M1-MA9
M1-MA10
M1-MA11
M1-MA12
M1-MA13
M1-MA14

100R

100n
2J19

100R

B3
B9
C10
D2
D10

3J19

3J18
M1-MA1

A3
A10
D8
G3
G9
K2
K10
M2
M10

M1-MA0

B10
C2
E3
E10

A3
A10
D8
G3
G9
K2
K10
M2
M10

+1V5-M1
7J01
H5TQ2G83BFR

2J89

9-1-11

QFU1.1E LA

UMAC 1 DDR3

2011-12-16

2011-11-24

8204 000 9238


19280_011_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 71

B03D, UMAC 0 DDR3

B03D

UMAC 0 DDR3

B03D
+1V5-M0

3J3D
100R
3J3F

3J3E
100R

100R

100R
100R
3J47

3J46

3J4D

3J4C
100R

3J4F

3J4E
100R

100R

100R

100n

240R

DB19

DB20
DB21

H1
M8

DDR-MVREF02

L8

VSS

VSSQ

M2
N8
M3

DB67

DB22

M0-BA0
M0-BA1
M0-BA2
M0-RAS#
M0-ODT
M0-CAS#
M0-MCLK0
M0-MCLK0#

DB23

J3
K1
K3
J7
K7
K9
L2
DB24 L3
T2
E7
D3

A1
A8
C1
C9
D2
E9
F1
H2
H9
0
1
2
3
DQU
4
5
6
7
DQSU
DQSU
DQSL
DQSL
0
1
2
3
DQL
4
5
6
7

VREFDQ
VREFCA
ZQ
BA0
BA1
BA2
RAS
ODT
CAS
CK
CK
CKE
CS
WE
RESET
DML
DMU

NC

VSS

D7
C3
C8
C2
A7
A2
B8
A3

DB25

DB26

C7
B7

M0-MD16
M0-MD18
M0-MD20
M0-MD23
M0-MD17
M0-MD21
M0-MD19
M0-MD22
M0-DQS2
M0-DQS#2

F3
G3

DB27
DB29

E3
F7
F2
F8
H3
H8
G2
H7

DB30

DB70

M0-DQS3
M0-DQS#3
M0-MD29
M0-MD28
M0-MD25
M0-MD26
M0-MD27
M0-MD30
M0-MD31
M0-MD24

J1
J9
L1
L9

VSSQ

M0-MCLK0#
M0-DQM3
M0-DQM2

100R
3J4P

3J4N

+1V5-M0

1K0

100R

FJ0B

1K0

DDR-MVREF02

10n

DBB3

DBB8

DBB4

DBB9

DBC4

DBB5

DBC0

DBC5

DBB6

DBC1

DBC6

DBB7

DBC2

DBC7

DBC3

10n

10n
2J30

10n
2J2W

10n
2J2U

100n
2J2S

100n
2J3D

100n
2J3B

+1V5-M0

2J39

10n

10n
2J2Y

10n
2J2N

10n
2J2L

+1V5-M0

10n
2J2Z

10n
2J2V

10n
2J2T

100n
2J2R

100n
2J3E

100n
2J3C

+1V5-M0

2J3A

10n

10n
2J2P

10n
2J2M

10n
2J2K

+1V5-M0

100n
2J38

100R

NC

J1
J9
L1
L9

3J4M

3J4L

DB18

M0-CKE
M0-CS#
M0-WE#
M0-RESET#

100n
2J2H

100R

M0-MD15
M0-MD12
M0-MD9
M0-MD10
M0-MD11
M0-MD14
M0-MD13
M0-MD8

3J4K

100n
2J2J

M0-RESET#

E3
F7
F2
F8
DB69
H3
H8 DB17
G2
H7

M0-DQM1
M0-DQM0

100n
2J37

100R

M0-DQS1
M0-DQS#1

100R
3J4J

M0-CKE

DML
DMU

DB13
DB15

3J4H

3J4G
M0-ODT

RAS
ODT
CAS
CK
CK
CKE
CS
WE
RESET

E7
D3

M0-DQS0
M0-DQS#0

VDDQ

0
1
2
3
4
5
A
6
7
8
9
10
11
12
13
14
15
BC
AP

2J2E

100R

100n
2J36

M0-CS#

100n
2J35

100R

100R

100n
2J34

M0-WE#

3J4B

3J4A

DB66

M0-CKE
M0-CS#
M0-WE#
M0-RESET#

100n
2J33

100R

RES

100R

10u
2J32

M0-CAS#

3J49

DB65
DB08

10u
2J3G

M0-RAS#

100R
3J48

DB60
DB04
DB05
DB07

10u
2J31

100R
100R

+1V5-M0
3J45

J3
K1
K3
J7
K7
K9
L2
L3
T2

DB11
DB12

F3
G3

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

2J2F

100R

BA0
BA1
BA2

C7
B7

3J30

100R

M0-BA2

3J2U

3J43

3J44
M0-BA1

M0-MCLK0

100R
3J42

M0-BA0

2J28

3J41

3J40

10u
2J3J

100R

M0-BA0
M0-BA1
M0-BA2
M0-RAS#
M0-ODT
M0-CAS#
M0-MCLK0
M0-MCLK0#

0
1
2
3
DQL
4
5
6
7

ZQ

M2
N8
M3

3J3Z
100R

2J3F

M0-MA15

L8
DB68

100R
3J3W

2J3H

100R

2J3K

100R

M0-MA14

1K0

3J3V

47u 16V

M0-MA13

100n
2J29

3J3T
100R

1K0

100R
3J3S
3J3U

75R

100R

DQSL
DQSL

VREFDQ
VREFCA

3J3R

3J32

100R

M0-MA12

H1
M8

DDR-MVREF01

100R
3J3Y

M0-MA11

DDR-MVREF01

DQSU
DQSU

DB10

100n

100R

FJ0A

3J3P

75R

M0-MA10

DB02
DB03

3J3M

3J3L
3J3N

3J33

100R

100n

M0-MA9

3J3K
100R

3J2W

M0-MA8

100R
3J3J

10n

100R
100R

3J2V

3J3H

3J3G
M0-MA7

DB00

VDD
M0-MA0
M0-MA1
M0-MA2
M0-MA3
M0-MA4
M0-MA5
M0-MA6
M0-MA7
M0-MA8
M0-MA9
M0-MA10
M0-MA11
M0-MA12
M0-MA13
M0-MA14
M0-MA15

3J31

100R

10n

M0-MA6

DB61

DB09

B1
B9
D1
D8
E2
E8
F9
G1
G9

100R
3J3C

2J2A

100R

100n

100R

M0-MA5

2J2B

M0-MA4

M0-MD0
M0-MD5
M0-MD4
M0-MD7
M0-MD2
M0-MD1
M0-MD6
M0-MD3

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

3J3B

D7
C3
C8
C2
A7
A2
B8
A3

240R

100R
3J3A

7J04
H5TQ2G63BFR-PBC
0
1
2
3
DQU
4
5
6
7

100n

100R

2J01

M0-MA3

+1V5-M0

100n

3J39

3J38

3J2Z

100R

100R

0
1
2
3
4
5
A
6
7
8
9
10
11
12
13
14
15
BC
AP

100n
2J2D

3J36
M0-MA2

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

2J2C

3J37

B1
B9
D1
D8
E2
E8
F9
G1
G9

100R

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

100R

M0-MA0
M0-MA1
M0-MA2
M0-MA3
M0-MA4
M0-MA5
M0-MA6
M0-MA7
M0-MA8
M0-MA9
M0-MA10
M0-MA11
M0-MA12
M0-MA13
M0-MA14
M0-MA15

3J35

3J34
M0-MA1

VDDQ

B2
D9
G7
K2
K8
N1
N9
R1
R9

VDD
M0-MA0

+1V5-M0

A1
A8
C1
C9
D2
E9
F1
H2
H9

7J03
H5TQ2G63BFR-PBC

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1V5-M0

2J2G

9-1-12

QFU1.1E LA

UMAC 0 DDR3

2011-12-16

2011-11-24

8204 000 9238


19280_012_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts


9-1-13

QFU1.1E LA

9.

EN 72

B03E, LVDS fanout

LVDS fanout

B03E

B03E

7J00-5
FUSION120

PANEL_USB
LAN_IO TA1_P

7J00-4
FUSION120
A22
B22
E22
D22
A23
B23
E23
D23
A24
B24
E24
D24

AR-1
AL-1

AR-3
AL-3
AR-4
AL-4

AR-6
AL-6

D26
C26
B26
A26

IJ11

AC28
C15
A15
B16
A16

CVBS
CVBS3

C16
Y-G1
PB-B1
PR-R1

A20
A19
A18

Y-G2
PB-B2
PR-R2

B20
B19
B18

Y-G3
PB-B3
PR-R3

C20
C19
C18

IJ12
IJ13
FS1
FB1

D20
D19
D18
C17
B17
D17
A17

AV_IN_OUT
AR_1
AL_1
AR_2
AL_2
AR_3
AL_3
AR_4
AL_4
AR_5
AL_5
AR_6
AL_6

HPHOL
HPHOR
SUBO
SPK_AOR1
SPK_AOL1
AOR2
AOL2

SPDIFIN

SPDIFO

SCKIN
WSI2SIN
SDI2SIN

SCKI2SOUT
WSI2SOUT
1
SDI2SOUT 2
3
I2SCLK

B21
A21

HPHOL
HPHOR

C21
A25
B25
USB1-DP
USB1-DM

D25
C25

USB1-RREF

E26
Y26
Y27
AA30
AA29
AB28
Y25

SPDIFO
3J07
3J08
3J09
3J50
3J51
3J52

GPANA1

10R
10R
10R
10R
10R
10R

SCKI2SOUT
WSI2SOUT
SDI2SOUT1
SDI2SOUT2
SDI2SOUT3
I2SCLK

1
2
CVBS
3
4
C
Y_G1
PB_B1
PR_R1
Y_G2
PB_B2
PR_R2
Y_G3
PB_B3
PR_R3
Y_G4
PB_B4
PR_R4
FS1
FB1
FS2
FB2

1
CVBS_OUT
2

A14
A13

AB30
AB29
AB26
AB27

USB2-RREF

AC30
AC29
AB25
AC27

EN-RXD0
EN-TXD0
EN-RXD1
EN-TXD1
FJ0F
FJ0G
FJ0H
FJ0J

W29
V29
W28
V28
W27
V27
W26
V26

EN-RXC
EN-TXC

V25
U25

EN-RXEN
EN-TXEN

W30
V30

EN-MDC
EN-MDIO

W25
Y30

HDMIF-RX0+
HDMIF-RX0HDMIF-RX1+
HDMIF-RX1HDMIF-RX2+
HDMIF-RX2HDMIF-RXC+
HDMIF-RXC-

A29
B29
A28
B28
A27
B27
B30
C30

HEAC

T27

PWR5V

T30

RREF

C29

USB2-DP
USB2-DM

CVBS-OUT1
IJ10

D1_P
D1_N
USBPPON1
TXRTUNE1
D2_P
D2_N
USBPPON2
TXRTUNE2

GBE_RXD0
GBE_TXD0
GBE_RXD1
GBE_TXD1
GBE_RXD2
GBE_TXD2
GBE_RXD3
GBE_TXD3
GBE_RXC
GBE_TXC
GBE_RXEN
GBE_TXEN
GBE_MDC
GBE_MDIO

RX0_P
RX0_N
RX1_P
RX1_N
RX2_P
RX2_N
RXC_P
RXC_N
HEAC
PWR5V

TA1_N
TB1_P
TB1_N
TC1_P
TC1_N
TCLK1_P
TCLK1_N
TD1_P
TD1_N
TE1_P
TE1_N
TA2_P
TA2_N
TB2_P
TB2_N
TC2_P
TC2_N
TCLK2_P
TCLK2_N
TD2_P
TD2_N
TE2_P
TE2_N
TA3_P
TA3_N
TB3_P
TB3_N
TC3_P
TC3_N
TCLK3_P
TCLK3_N
TD3_P
TD3_N
TE3_P
TE3_N
TA4_P
TA4_N
TB4_P
TB4_N
TC4_P
TC4_N
TCLK4_P
TCLK4_N
TD4_P
TD4_N
TE4_P
TE4_N

RREF
H_BK_LITE
PWM0
PWM1
BOOST
BKLGON
TCON_ON
NC_IDP_HPD
NC_LOCKN
NC_HTPDN

B3
A3
C3
C4
A4
B4
B5
A5
C5
C6
A6
B6

TX1-ATX1-A+
TX1-BTX1-B+
TX1-CTX1-C+
TX1-CLKTX1-CLK+
TX1-DTX1-D+
TX1-ETX1-E+

B9
A9
C9
C10
A10
B10
B11
A11
C11
C12
A12
B12

TX2-ATX2-A+
TX2-BTX2-B+
TX2-CTX2-C+
TX2-CLKTX2-CLK+
TX2-DTX2-D+
TX2-ETX2-E+

E3
D3
E4
D4
F5
F6
D5
E5
D6
E6
D7
E7

TX3-ATX3-A+
TX3-BTX3-B+
TX3-CTX3-C+
TX3-CLKTX3-CLK+
TX3-DTX3-D+
TX3-ETX3-E+

E10
D10
F10
F11
D11
E11
E12
D12
F12
F13
D13
E13

TX4-ATX4-A+
TX4-BTX4-B+
TX4-CTX4-C+
TX4-CLKTX4-CLK+
TX4-DTX4-D+
TX4-ETX4-E+

D2
B2
C1
B1
A2
C2
E9
F9
G9

BL-SPI-CLK-FUS
3D-LR-FUS
BL-SPI-CS_BL-I-CTRL-FUS
BL-DIM-FUS
BKLGON-FUS
BL-SPI-SDO-FUS
9GA2 RES

7J00-9
FUSION120

RXD-SERVICE
TXD-SERVICE

Y29
Y28

EJT-TCK
EJT-TMS
EJT-TDO
EJT-TDI
EJT-TRSTN

K2
K3
K1
K5
K4

JTAG_I2C
UART SCLS
RXD
TXD

TCK
TMS
TDO
TDI
TRSTN

SDAS

SCLM1
SDAM1
SCLM2
SDAM2
SCLM3
SDAM3

U26
U27

SCL-S
SDA-S

AA28
AA27

SCL-M1
SDA-M1

E2
D1

SCL-M2
SDA-M2

AA26
AA25

SCL-M3
SDA-M3

IJ0T
IJ0U

LVDS fanout

2011-12-16

2011-11-24

8204 000 9238


19280_013_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 73

B03F, Fanout power supply

Fanout power supply

B03F
10u

10u
2J63

100n
2J64

100n
2J62

100n
2J61

100n
2J60

100n
2J5W

100n
2J5V

100n
2J5U

100n
2J5Z

10u

10u
2J7L

100n

10n

100n
2J77

100n
2J76

100n
2J75

10n

10n
2J6U

10n
2J6V
10n

10n
2J6L

10n
2J6C

10n
2J67

100n
2J74

100n
10n
2J6P
10n
2J6F
10n
2J66

100n
2J73

10u
2J7J
100n
2J7D
10n
2J6N
10n
2J6E
10n
2J65

100n
2J72

10u
2J7K

10u
2J7G

100n
2J71

100n
2J7B
100n
2J70

10n
2J6M
10n
2J6D
10n
2J68

10n
2J6Y
10n
2J6G
10n
2J69

100n
2J6Z
10n
2J6R
10n
2J6H
10n
2J6A

100n
2J7C

10u
2J7H
100n
2J7A

2J7E
2J79
2J6W
2J6S
2J6J
2J6B

2J08

220u 2V0

2J95
100n

10n

10n

2J5L
10n

2J5M

+1V5

10n

2J5A
2J80

2J5K
10n

120R

2J93

2J59
10u

10n

2J5C
100n
2J5F

5J0P

2J5B
10u

2J5D
100n
2J5G
10n

10n

2J94
10n
2J23

10n
2J09
100n

AA15
Y15
W15
W16
W14

+1V5-M0
IJ0R

10n

2J5N
10n

VDD_1V2

2J78

+1V2-MIPS

10n
2J7Y

2J4N

100n

K29

120R

2J5H
10n

+1V2-MIPS

+1V5
5J0R

10u

10n

2J4K
2J98

+1V1-FA

120R

100n

LDO11_CAP

K13
L13

5J0G

10n

GNDP

G11

+1V5-M1
IJ0S

10n
2J7P

10n

10n

2J4G
2J96

1u0
10n

2J4H

2J4F

IJ0P
VDDP

2J6T

1n0

2J58

2J56

120R

10u

IJ0K

5J0N

A8
B8
C8
D9
K11
L11

10u

LVDSGND
+3V3

+2V5-F

5J0F
120R

2J7F

VSS11A_3

2J4M
10u

VDD33A

IJ0N

2J4Y

D28

LVDSVDD

VSS11A_1

2J4P
10u

2J55

10n
10u

2J54

2J53

100n

D30

AVDD25_HDMI

A7
B7
C7
D8
E8
F8
G8

100n

C27

IJ0J

VSS11A_2

4n7

D27

VDD11A

R4
AB5
AC5
M6
N6
V6
W6
Y6
AA6
AB6
AC6
M7
N7
V7
W7
Y7
AA7
AB7
AC7
P11
V11
P12
V12
P10
V10
W10
Y10

100n
2J92

VQPS

N24

2J4R

2J52

10n
10u

2J51

2J50

100n

C28

5J0M
120R

REF_BG
AVSS25
AVSS25

IJ0H

D29
+2V5

AVDD25

10n
2J7R

K12
L12

120R

100n
2J7Z

100n

2J4Z

10u
2J4W

G10

R10
R11
U10
U11

+2V5-F

5J0E

AC3
AC4

SENSE+1V1-FD

10n
2J7S

VSS_M1P

5J0L
120R

VSSAC_1

IJ0G

5J0K
120R

+1V1-FA

VDD2V5_M1P

VDD33

1u0
10n

AB24
+2V5

IJ0M

VSSAC_2

2J4L

AC24

VDD25

2J4J

10u

100n

2J4V

AC25

100n

AC26

IJ0F

5J0J
120R

2J4U

+3V3

Y12
Y13
Y14
AA13
AA14

120R

10n

VSS_M0P

+2V5-F

5J0D

AG6
AG7
100n

10u

2J4T

100n

120R

2J4S

VDD2V5_M0P

2J99

IJ0L

IJ0E

5J0H

2J97

SUPPLY_2
+2V5

+1V1-FD

IJ00

100n
2J7W

9J04

9J03

7J00-2
FUSION120

2J7V

+2V5-F

5J0C
120R

VDDC

2J44

2J43
10u
2J46

IJ0D

VSS

2J42
2J4A

K16
L16

10n
2J7T

+3V3

5J0B
120R

2J7U

G15

100n

VSSA_LPLL

IJ0C

IJ14

VDDM0

VDD25_LPLL

B13
C13
2J4C

AVSSH

C14

2J4E

DAC2
2
3 INN
4

100n

2J91

2J90

100n

10u
2J3Z

100n

2J40

E18
E19
E20

AVDDH

INN16

2J4B
10u

DAC1
AVSSH

E17

120R

2J4D
10u

VDD33_XTAL

IJ06

5J06

+3V3

5J0A

B14

100n

AVDDH

2J49
10u

AVSS_STB

VDDC

E21
F21

VDDC

AVSS

100n

100n

10u
2J3V

2J3W

AVDD33_STB

+3V3

5J09
120R

VDDM1

G22
G23

IJ0B
J24
H28

120R

AVDD

PWR_GND

AVSSH_CH516

+3V3

5J08
120R

VDDM0

K24

IJ09

IJ0A

AVDDH_CH516

IJ05

5J04
120R

C22
F22
C23
F23
C24
F24
E25

M11
G12
M12
T12
W12
G13
M13
P13
T13
V13
W13
D14
E14
F14
G14
M14
P14
T14
V14
D15
E15
F15
M15
P15
T15
V15
M16
P16
T16
V16
M17
P17
T17
V17
W17
M18
P18
T18
V18
W18
M19
P19
T19
V19
W19
L20
M20
N20
P20
R20
T20
U20
V20
W20
Y20
G21
L24
M24
L25
T11
K10
K21
L10
L21
M10
M21
N21
P21
R21
T10
T21
U21
V21
W21
Y21
AA20
AA21

AA12
AA11
AA10
AE14
AD14
AE13
AD13
AD12
AD11
Y11
W11
AE10
AD10
AE9
AD9
AF8
AE8
AD8
AF7
AD7
AF6
AE6
AD6
AF5
AE5
AD5
AF4
AE4
AD4

100n

10u
2J3T

2J3U

G16

D21

VSS

B15

120R

+3V3-STANDBY

SGNDAU

AVSSL_CH516

120R

VSS

F16

AVDDL_CH516

IJ04

5J03

+3V3-STANDBY

100n

100n

D16
E16

100n

2J3S

120R

+3V3

VREFAU

2J45
10u

AVSSH_CH234

+1V2-FA

5J07

E29
F28

2J48

F18
G18

A1
AK1
M2
U2
Y2
AB2
AE2
AG2
P3
M4
AA4
AJ4
V5
L6
P6
R6
T6
K7
L7
P7
R7
T7
AJ7
AJ9
AG10
N11
AH11
N12
R12
U12
N13
R13
U13
AG13
L14
N14
R14
U14
AH14
L15
N15
R15
U15
AD15
AE15
N16
R16
U16
Y16
AD16
AE16
AG16
AJ16
L17
N17
R17
U17
Y17
AD17
AE17
L18
N18
R18
U18
Y18
L19
N19
R19
U19
Y19
AD20
AD21
P24
U24
V24
W24
A30
AK30
K14
K15
K17
K18
K19
K20
N10
AA16
AA17
AA18
AA19

+3V3

5J05
120R

IJ08
AVDDL_DRX

IJ03

5J02

2J41
10u

AVDDH_CH234

100n

F17
G17

AVSSH_DRX

100n

AVSSL_CH234

2J47
10u

AVDDL_CH234

F20
G20

G29
G30
E30
G27
G28
H27

100n

100n

2J3N

10u
2J3P

2J3Y

120R

+1V2-FA

F19
G19

IJ02

5J01

10u
2J3R

+3V3

10u
2J3M

120R

IJ07

AVDDH_DRX

VSS

SUPPLY_1
IJ01

5J00

VDDC

7J00-1
FUSION120

+1V2-FA

100n
2J5T

2J5R

J7
H7
G7
F7

VDDF2

VDDF1

F26
AD25
T25
G25
F25
AD24
AA24
Y24
T24
H24
G24
AD23
AD22
AD19
AG18
AF18
AE18

VDDF_STB

7J00-3
FUSION120

100n
2J5S

+3V3
R26
R25
R24

2J5Y

+3V3-STANDBY

10u

B03F

10n
2J5P

9-1-14

QFU1.1E LA

Fanout power supply

2011-12-16

2011-11-24

8204 000 9238


19280_014_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 74

B04A, Control

B04A

Control

B04A
RES 9GM1

SDA-DISP

SCL-BE

RES 9GM2

SCL-DISP

SDA-BE

RES 9GM3

SDA-BL

SCL-BE

RES 9GM4

SCL-BL

SDA-BE

3CVF

SCL-M2
9CV0 RES
9CV1

4K7

BM03B-SRSS-TBT

EJT-TRSTN

47R
3CVJ

1CWA DBG
SCL-DISP
BL-DIM
SDA-DISP

47R

5
EJT-TMS

4K7

1
2
3

BM03B-SRSS-TBT

+3V3
3

EJT-TDO
1

47R
2 3CVH-2 7

3D-LR

3GM7 RES

47R
4 3CVH-4 5

FCVB

7GM2 RES
PDTC114EU
2

EJT-TCK

EJT-TDI

47R
1CWB DBG

RES 3CV8

BL-SPI-CLK-FUS

AMBI-SPI-CCLK

10R
RES 3CV9

BL-SPI-SDO-FUS

SCL-BL
SDA-BL

AMBI-SPI-MOSI

10R

BM03B-SRSS-TBT

3CV4

AMBI-SPI-CCLK-FUS

1
2
3

AMBI-SPI-CCLK

10R
3CV5

AMBI-SPI-MOSI-FUS

AMBI-SPI-MOSI

10R
3CV6

ENABLE-3V3-AMBI-FUS
GPIO19

ICV1

GPIO20

ICV2

1CWC DBG
ENABLE-3V3-AMBI

47R

FCVA

2CV7
100n

3CV7

TXD-RF4CE
RXD-RF4CE

POWER-OK

+3V3

47R

10K

3CVA

GPIO22

RES

+3V3

3CVU

POWER-OK

47R
3CVB
+3V3-STANDBY

4K7
IRQ-SRFn

3CVM

RES

10K
RXD-RF4CE

3CVR

RXD-RF4CE

3CVS

RES

10K
3CVT

IRQ-EXPANDERn
IRQ-EXPANDERn

47R

+3V3

3CVN

TXD-RF4CE

47R
GPIO23

10K

TXD-RF4CE

47R
3CVP

GPIO1

3CVL

IRQ-SRFn

47R
GPIO0

BM03B-SRSS-TBT

RESET-HDMI-MUXn

3CVK

GPIO24

1
2
3

+3V3
10K

+3V3
7GM1
PCA9540BGD

1
2
3

VDD

SDA-BE

SCL-BE

SD0
SC0

SDA
SCL

SD1
SC1
VSS

4
5

SDA-DISP
SCL-DISP

7
8

SDA-BL
SCL-BL

SDA-DISP
SCL-DISP
SDA-BL
SCL-BL

RES

3GM2
100K

RES 3GM1
100K

+3V3

3GM3
3GM4

100K

100K

BM06B-SRSS-TBT

BL-DIM-FUS

4K7

FCV9

FCV3
5

47R
3CV3

4K7
3GM6

FCV4
FCV5
FCV6
FCV7
FCV8

SDA-BE

CTRL-DISP3

3CV2

3GM5

4K7

3CVZ

4K7

3CVV-4 4

4K7
3CVV-3 3
6

3CVV-2 2
7

1
3CVV-1
8
1
2
3
4
5
6

FCV2

47R

47R
3 3CVH-3 6

DBG

SDA-BE

47R
3CV1

3D-LR-FUS

1 3CVH-1 8

1CV2

SCL-BE

FCV1

3CVG

SDA-M2

+3V3

1CV1 DBG

SCL-BE

47R

+3V3-STANDBY

GPIO8

4K7

9-1-15

QFU1.1E LA

Control

2011-12-06

8204 000 9231


19280_015_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 75

B04B, LVDS

LVDS

B04B

+VDISP

+3V3

CTRL-DISP3
TX3-ATX3-A+
TX3-BTX3-B+
TX3-CTX3-C+
TX3-CLKTX3-CLK+

2GV1
2GVR
2GV3
2GV4
2GV5
2GV6
2GV7
2GV8

10p
10p
10p
10p
10p
10p
10p
10p

IGV6
IGV7
IGV8
IGV9

FGV5
100R

9GVC
9GVD

FGV6
FGV7
FGV8
FGV9
FGVA
FGVB
FGVC
FGVD

TX3-DTX3-D+
TX3-ETX3-E+

FGVF
FGVG
FGVH
FGVJ
FGVK

TX4-ATX4-A+
TX4-BTX4-B+
TX4-CTX4-C+

FGVL
FGVM
FGVN
FGVP
FGVQ
FGVR

TX4-CLKTX4-CLK+

9GVE
9GVF

TX4-DTX4-D+
TX4-ETX4-E+

FGVS
FGVT
FGVU
FGVV
FGVW
FGVY

41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

10p
10p
10p
10p
1n0
1n0
1n0
10p
10p
1n0

3GVG

CTRL-DISP1

RES

100R

RES 2GV9
RES 2GVA
RES 2GVB
RES 2GVC
RES 2GVD
RES 2GVF
RES 2GVG
RES 2GVL
RES 2GVK
RES 2GVH

1G50
20519-041E
50
51
48
49
46
47
44
45
42
43

BL-ON
SPLASH-ON

9GV1

CTRL-DISP3
SDA-DISP
SCL-DISP
BL-ON
BL-DIM
CTRL-DISP2
3D-LED_3D-RF

FGU7 RES
FGVZ RES
FGW0 RES
FGVE RES
RES
RES
FGU9 RES
FGUF RES
FGWA RES
FGU6 RES
FGWE RES

3D-LR-DISP
CTRL-DISP2
SPLASH-ON
CTRL-DISP1
TX1-ATX1-A+
TX1-BTX1-B+
TX1-CTX1-C+

3GV0
3GVE
3GVD
3GV3
3GV4
3GV5
3GV6
3GV7
3GV8
3GV9
3GVA

100R
10R
10R
10R
100R
100R
100R
100R
100R
100R
100R

TX1-DTX1-D+
TX1-ETX1-E+

TX2-ATX2-A+
TX2-BTX2-B+
TX2-CTX2-C+

FGWB

10p
10p

IGV3
IGV4

FGU0
FGU1

9GVA
9GVB

TX2-CLKTX2-CLK+

1G51
20519-051E
60
61
58
59
56
57
54
55
52
53

IGW1
IGW2
IGW3
IGW4
IGW5
IGW6
IGU8
IGW7
IGW8
IGW9
FGWC
FGWD
FGWF
FGWG
FGWH
FGWJ
FGWK
FGWL
FGWM
FGWN
FGWP
FGWQ
FGWR
FGWS
RES 2GVJ
RES 2GVM
FGWT
FGWU
FGWV
FGWW
FGWY
FGWZ

9GV8
9GV9

TX1-CLKTX1-CLK+

1K0

8
7
6
5
FGV0
RES
RES
RES
RES
RES
RES
RES
RES
3GVB
RES

RES

100R

3GVC RES

3GVF

CTRL-DISP1
9GV4-1
9GV4-2
9GV4-3
9GV4-4

FGU2
FGU3
FGU4
FGU5

TX2-DTX2-D+
TX2-ETX2-E+

1
2
3
4

TO DISPLAY

3GVH-1
3GVH-2
3GVH-3
3GVH-4

8
7
6
5

RES 9GV3

IGV5

FGUA FGUB FGUC FGUD FGUE

100n

+VDISP
2GV2

B04B

RES 1
RES 2
RES 3
RES 4

9-1-16

QFU1.1E LA

51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

TO DISPLAY

LVDS

2011-12-06

8204 000 9231


19280_016_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 76

B04C, VDisp

VDisp

B04C

1 9GS1-1
RES
2 9GS1-2
RES
3 9GS1-3
RES
4 9GS1-4
RES
1 9GS2-1
RES
2 9GS2-2
RES
3 9GS2-3
RES
4 9GS2-4
RES

5
8
7
6
FGS1

+VDISP

22n

7GS3-2
PUMD12
3

IGS4

RES
3GS2

IGS3

47R

RES
2GS4

2GS5
IGS2

1u0

IGS1

100n

3GS4

RES
7GS4
PDTC114EU

7GS3-1
PUMD12
1

4K7

22K

RES 3GS7

3GS6

6
2

47K

27K

3GS5

IGS5

100n
RES

2GS2

22u

RES

3GS1

T 3.0A 32V

2GS3 RES

FGS2

1GS1

6
5
2
1
2GS1

7GS2
SI3443CDV
4

+3V3

DBG

IGS6

6GS1
DBG
LTST-C190KGKT

VDISP-SWITCH
3
IGS7

1
2
7GS5
PDTC114EU
RES
1

220u 2V0

220u 2V0
2JW2

+1V1-FD
2JW1 RES

+2V5

47R

4
+12V

LCD-PWR-ONn

8
7

8
7
6
5

3
2
1
7GS1
SI4835DDY-GE3
RES

4K7

B04C

3GS3

9-1-17

QFU1.1E LA

VDisp

2011-12-06

8204 000 9231


19280_017_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 77

B04D, Connector - Backlight

Connector - Backlight

B04D
IGD1

IGD2

2GD1

10R

3GD3-3

10p

10p

FGDC

2GD2

10R

2GD3

3GD2

SCL-BL

BL-SPI-CLK

10p

3GD1

SDA-BL

100R

1G53
BL-SPI-SDO

2 3GD3-2 7

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

FGD3
2GD4

100R

FGD4

10p

FGDD

FGD6

FGD5

FGD7

1u0

2GD5

FGD8
FGD9
FGDA

9GD1

FGDG

3GD3-1
100R

17

FH52-15S-0.5SH

8
10p

FGDE

BL-SPI-CS_BL-I-CTRL

2GD6

1GD1
FGDB 3GD6

3GD7

10R

10u

10R
BL-SPI-SDO

BL-SPI-CS_BL-I-CTRL

VIN

FLG

EN
EN

VOUT

3GD5

GND

10R

BL-SPI-CS_BL-I-CTRL-FUS

+3V3
3GD9

10u

BL-SPI-SDO-FUS

7GD1
RT9715EGB

3GD8

2GD9

BL-SPI-CLK

6GD1

IGD3

BL-SPI-CLK-FUS

DBG

330R

2GD8

BKLGON-FUS

1.0A 63V

LTST-C190CKT

T
100R

DBG

BL-DIM

10p

B04D

2GD7

9-1-18

QFU1.1E LA

Connector - Backlight

2011-12-06

8204 000 9231


19280_018_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 78

B04E, Tuner CVBS Debug

Tuner CVBS Debug

B04E

470R

3FW4 RES

IFW5

3FW8

IFW3 5FW3 RES

RES

75R

DFW1

1u8
2FW5

150R

RES

150R

RES 3FW7

IFW4

270p

2
IFW2

RES

47u

RES

33p

2FW6

7FW1-1
BC847BPN(COL)
RES
3FW5
1
RES

2FW3

RES

10K

CVBS-OUT1

2FW4

4
7FW1-2
BC847BPN(COL)
RES

IFW1

100p

10K

3FW3

RES

+5V

3FW6

B04E

RES

9-1-19

QFU1.1E LA

DFW2

Tuner CVBS Debug

2011-12-06

8204 000 9231


19280_019_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 79

B04F, Audio - Video

Audio - Video

2VW1

CVBS1

150R

SC1-CVBS

150R

150R

150R

150R

100n
2VW6

3VWS
Y1-IN

150R

100n
2VW7

150R

100n
2VW8

150R

100n
2VW9

3VWT
PB1-IN
3VWU
PR1-IN
3VWV
SC1-G

PB-B1

100n
2VW5

3VWR
R1-VGA

Y-G1

100n
2VW4

3VWP
B1-VGA

CVBS3

100n
2VW3

3VWN
G1-VGA

PR-R1

Y-G2

PB-B2

PR-R2

Y-G3

100n
2VWA

SC1-B

PB-B3

100n
2VWB

SC1-R

B04F

CVBS

100n
2VW2

3VWM

PR-R3

100n
9VW4

SC1-STATUS

SC1-BLK

YPBPR-RIN

3VW3

10K
IVW1

8K2

3VW5

2VWE

9VW5

AR-4

9VW6

AL-4

33K

1u0

3VW8
3VW9

AL-1

33K

IVW3

8K2

SC-LIN

2VWD
1u0

3VW6
3VW7

AR-1

33K

IVW2

8K2

SC-RIN

FB1
2VWC
1u0

3VW4
YPBPR-LIN

FS1

3VWW

IVW4

8K2

2VWF

33K

3VWA

1u0

V-SYNC-VGA

9VW1

PCVS

H-SYNC-VGA

9VW2

PCHS

RES 3VWB

IVW5

8K2

AR-6

33K

1u0

RES 3VWC
RES 3VWD

2VWG RES

IVW6

8K2

2VWH RES

AL-6

33K

RES 3VWE

1u0

4K7

3VWF

+3V3

VGA-LIN

3VWH

4K7

RES 3VWG

AUDIO-MUTEn

IVW7

8K2

3VWK

AL-3

33K

1u0

RES 3VWJ
VGA-RIN

2VWJ

IVW8

8K2

2VWK

AR-3

1u0

33K

B04F

3VWL

9-1-20

QFU1.1E LA

Audio - Video

2011-12-06

8204 000 9231


19280_020_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 80

B04G, EMMC

EMMC

B04G

100n

100n
2EJ6

2EJ5

+3V3

100n

100n
2EJ4

100n
2EJ3

100n
2EJ2

2EJ1

+3V3

M6

FEJ1

SDIO1-CLK
3EJ0

FEJ0 K5
10K

100n

2EJ7

C2

E6
F5
K9
J10

C6
M4
N4
P3
P5
VCCQ
CMD
CLK

VCC
0
1
2
3
DATA
4
5
6
7
VSSQ

MAIN

RST
VDDI
VSS

+3V3

A3
A4
A5
B2
B3
B4
B5
B6

FEJ3
FEJ4
FEJ5
FEJ6

SDIO1-D0
SDIO1-D1
SDIO1-D2
SDIO1-D3

SDIO1-D0

SDIO1-D1

SDIO1-D2

SDIO1-D3

C4
N2
N5
P4
P6

M5

FEJ2

SDIO1-CMD

+3V3
RST
VDDI

7EJ0-1
H26M21001ECR

G5
E7
K8
H10

4K7

+3V3

3EJ2-2
4K7
3EJ2-3
4K7
3EJ2-4
4K7
3EJ2-1

4K7

SDIO1-CLK
SDIO1-CMD

7EJ0-2
H26M21001ECR

+3V3

+3V3

M3
M7
M8
M9
M10
M11
M12
M13
M14
N1
N3
N6
N7
N8
N9
N10
N11
N12
N13
N14
P1
P2
P7
P8
P9
P10
P11
P12
P13
P14

+3V3

NC
SDIO1-D3
+3V3

+3V3

VDDI

A1
A2
A6
A7
A8
A9
A10
A11
A12
A13
A14
B1
B7
B8
B9
B10
B11
B12
B13
B14
C1
C3
C5
C7
C8
C9
C10
C11
C12
C13
C14

NC

NC

NC

H1
H2
H3
H5
H12
H13
H14
J1
J2
J3
J5
J12
J13
J14
K1
K2
K3
K6
K7
K10
K12
K13
K14
L1
L2
L3
L12
L13
L14
M1
M2

+3V3

RST

NC
D1
D2
D3
D4
D12
D13
D14
E1
E2
E3
E5
E8
E9
E10
E12
E13
E14
F1
F2
F3
F10
F12
F13
F14
G1
G2
G3
G10
G12
G13
G14

B04G

3EJ1

9-1-21

QFU1.1E LA

+3V3

EMMC

2011-12-06

8204 000 9231


19280_021_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 81

B04H, Second source DC-DC converters

Second source DC-DC converters

B04H

5UR3
30R
5UR1

IUR0

+12Vb

IUR2

3UR3-1

100n

3UR3-2

IUR9

33R

100n

2UR1

100n

1M0
IUR4

3UR5

1M0

3UR6

+5V

68K 1%

GND
GND HS
1n0

VIA

VIA

3UR4

2
3

EN

VIA

10
11
12
13

14
15
16
17

BOOT

FB

5UR5

VIA
18
19
20
21

3UR7

7URA-2
RT8288AZSP

7
VIN

SW
DETECT12V

+5V
3u6

3UR3-4

IUR3

VCC

FUR1
22
23
24
25
26

1n0
2UR3

7URA-1
RT8288AZSP

5UR2

33R

22u

1n0

IUR8

3UR3-3

22u
2UR9

33R

2UR4

2UR8

2UR0

12K 1%

10u

2UR5

10u

2UR6

33R

30R
2UR7

IURA

+12Vb

5UR6

FURA
+3V3
22u

2URC

10u

22u
2URD

IURB

7UR6-1
RT8293AHGSP

7UR6-2
RT8293AHGSP
IURC

IURE

3URA

CUR5

ENABLE+3V3

GND-3V3r

13K

GND-3V3r

3URF

1n0

IURF

+3V3

VIA

VIA

10
11
12
13

68K 1%
VIA
14
15
16
17

1M0

22K 1%

IURK

COMP
GND
GND HS

3URC RES

3URB

FB

18
19
20
21

100p

SS

100n

3n3

SW

10n

2URF

EN

VIA

2URE

RES 2URH

IURD

BOOT

2URG

VIN

22
23
24
25
26

100n

2URB

22u

2URA

30R

2URJ

B04H

2UR2

9-1-22

QFU1.1E LA

GND-3V3r

GND-3V3r

GND-3V3r
GND-3V3r

GND-3V3r
4

Second source
DC-DC converters

2011-12-06

8204 000 9231


19280_022_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 82

B04I, IR Debug

IR Debug

B04I

ICVW
+3V3-STANDBY
RC_IRQ-RF4CEn

3CVW

100R

3CVY

10R

3
1
1u0

B04I

2CVW

9-1-23

QFU1.1E LA

7CVW
VS
OUT
GND1
GND2
TSOP75236

IR Debug

2011-12-06

8204 000 9231


19280_023_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 83

B05A, Class-D amplifier

Class-D amplifier

3D60

A-STBY

+3V3D

+12V-AUDIO

+12V-AUDIO
10K

30R

220n
5D51

220n
2D65

2D64

10u

10u
2D59

10u
2D58

10u
2D57

10u

2D66

30R
2D63

220n
5D50

220n
2D62

10u
2D61

2D92
2D60

10u

2D84
10u

7D70
PDTC144EU
2

2D96
10u

2D49

2D48

10K

3D82

100u 16V

2D5C

1u0

2D67 1u0

100n
2D93 RES

100n
2D69

+3V3
30R

STEST

VIA

10K

3D83

100u 16V

10n

2D78

220n

2D71
220n

ID53

10n

10n
2D70

30R

2D98

5D78

2
3
4

1D02
1
2
3

ID57

5D72
30R

2041145-3

FD70
1D51

1D50

SPEAKER-R-

1D52

2041145-4
10n

2D99

10n
10n

2D76

2D87

30R

FD33

1D55

10u

22K

SPEAKER-R+

1D01

1D56

3D71
18K2

30R

FD32

ID96

3D70 RES

ID83
ID84

10n
5D81

5D01

2D73

18R
330p
5D76

Left+ FD30
LeftRight+
Right-

FD31

SPEAKER-LSPEAKER-R+

2D95
330p
5D79
10u

ID98

5D80

ID99

SPEAKER-R-

30R

5D77
30R

+3V3D

GND_HS
49

37
38

PGND
AB
CD
47
48

GND

17

AGND

VSS
D DO
28

26

30R

ID94

1D53

SSTIMER

2n2

2D94

3D74
ID52

5D75

ID59

FD52
3D81

SPEAKER-DETECTn
ID85

FD51

100R

1D35
1
2
3
4

100n

33n

33n

36

50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69

10u

ID93

1D54

OC_ADJ
OSC_RES

PBTL

2D85

5D74

2D90

33

ID51

2D82

3D80

ID97

SPEAKER-L-

30R

39
42

7
16

FD69

ID91

SPEAKER-L+
5D71

30R

ID69

ID70

2D56

33n

10n

BST_D
OUT_D

9D51
2D54

2D80

2D81

47n

33n

46

ID63

4n7

BST_C

VR_ANA
PLL_FLTP
PLL_FLTM

470R
2D52

470R
2D53

ID82

100n

SPEAKER-L+

30R

2D91

12
11
10

29

47n

43

5D00

ID88

10u

3D72

2D51

2D79

ID62

ID66

4n7
3D51

3D52

ID81

5D70

220n

OUT_C
2D50

ID65

ID50

100n

220n
2D55

OUT_B
RESET
PDN

2D77

2D83

25
19

ID80

220n

BST_B

31

2D89

BST_A
A_SEL

3D77

15K

D-RESET

14

OUT_A

ID79

18R

ID90

SDA
SCL

10u
2D74

18

330p

VR_DIG

18R

AUDIO
AMPLIFIER

3D73

34
35

2D72

2D75

40
41

3D75

44
45

C
PVDD

18R

2
3

330p

23
24
3D76 RES

2D5D

RES
9D50
5
32

13

OUT
GVDD

2D88

ID89

7D50-2
PUMH2

ID61

LRCLK
SCLK
MCLK
SDIN

30

10K

3D50
3D54

+3V3D

ID56

ID58

27

10K

3D55
47R
47R
10K
9D55

3D56

RES

7D50-1
PUMH2

AVDD DVDD
20
21
15
22

7D60
TAS5711PHP

VREG

SDI2SOUT3

D-RESET

AUDIO-MUTE

FD64
FD66

FD50

+3V3D
SDA-SSB
SCL-SSB

A-STBY

5D85
+3V3D

CD00

10R

RES
9D53
9D54

TAS5731P1

ID76 ID75

ID77

3D57
1R0

FD67
FD63
FD65

ID78

1R0

+3V3D

9D52
WSI2SOUT
I2SCLK
SCKI2SOUT
SDI2SOUT1

RES 3D63

DETECT12V

10u
2D68

2D86
3D58

+3V3D
3D79

2D5B

7D71 RES
PDTC144EU

ID87

16V 100u

SPEAKER-R-

+3V3-STANDBY

ID55

SPEAKER-L100u 16V

ID54

4K7

10K

AUDIO-MUTE

10K
AUDIO-MUTEn

2D5A

10R
3D62
+3V3D

100u 16V

100u 16V

3D78

3D61

10n
5D83

RESET-FUSION-OUTn

B05A

2D97
10u

B05A

47K

9-1-24

QFU1.1E LA

502386-0370

Class-D amplifier

2011-12-16

8204 000 9220


19280_024_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 84

B05B, Analogue externals

Analogue externals

B05B
1VAG

6n8

2VA9

CDS4C12GTA
12V

RES
6VA8

1VAH

6n8

2VAB

CDS4C12GTA
12V

6VA9

1VAJ

75R

3VAG

CDS4C12GTA
12V

RES
6VAA

100p

1VAK

CDS4C12GTA
12V

RES
6VAC

100p

2VAE

1K5

1u0
3VAA

2VAD

6VAB

FVA4

1VAL

75R

3VAB

RES

100p

2VAF

SC1-G

4K7

3VA6

RES

12K

CDS4C12GTA
12V

FVA8

FVAC

6VAD

FVCE

CDS4C12GTA
12V

16

V-SYNC-VGA

6VA4

1VAE

47p

100R
FVA7

100p

2VAA
2VAC

3VAJ

FVA5

24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

FVCF

3VA9

SC1-STATUS

4K7

3VA5

CDS4C12GTA
12V

RES
6VA3

FVA0

49045-0011
25
26

FVAB

CDS4C12GTA
12V

RES
6VA2

150R

3VA4

1VAC
1VAD

2VA3

47p

100R

H-SYNC-VGA

SCART
FVCG

SC1-B

IVA0

3VAH

FVA6

RES

CDS4C12GTA
12V

RES
6VA1

150R

3VA3

1VAB

47p

2VA1
FVA3

2VA4

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
17

47p

2VA2
FVA2
FVA1

FVAA

3VA8

SC-LIN

1K0

B1-VGA

1VA5

100p

2VA8

1K0

G1-VGA

VGA

FVA9

3VA7

SC-RIN

CDS4C12GTA
12V

RES
6VA0

150R

3VA2

1VAA

47p

2VA0

R1-VGA

PDZ2.4B(COL)

B05B

1VA1

1216-02D-15L-2EC

1VAM

75R

3VAC

6VAE

CDS4C12GTA
12V

RES

100p

2VAG
SC1-DETECTn

1VAN

RES

CDS4C12GTA
12V

1VAP

150R

3VAF

1VAF

47p

PB1-IN

CDS4C12GTA
12V

GND

6VAG

C2S7
C2S8

6VAH

DRXC+
DRXC-

FVAF

SC1-CVBS

RES

GND
YPBPR-LIN

100p

C2S5
C2S6

75R
2VAH

DRX2+
DRX2-

+5V-VGA

FVAE

100p

GND
YPBPR-RIN

100R

FVAG

3VAK

2VAK

47R

100p

C2S3
C2S4

3VAD

3VAE

DRX1+
DRX1-

Y1-IN

IVA1

2VAJ

GND

SC1-BLK

6VAF

C2S1
C2S2

6VA6

DRX0+
DRX0-

47p

2VA6

10K

VGA-SCL-EDID-HDMI

FVAD

PDZ2.4B(COL)

FVAH

CDS4C12GTA
12V

RES

SC1-R

CDS4C12GTA
12V

3VA1

6VA5

PR1-IN

RES

PR1-IN

RES

CVBS1

47p

2VA5
CVBS1

VGA-SDA-EDID-HDMI

CDS4C12GTA
12V

RES

RES
10K

6VA7

3VA0

2VA7

9-1-25

QFU1.1E LA

Analogue externals

2011-12-16

8204 000 9220


19280_025_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 85

B06A, HDMI

HDMI

BIN-5V
BRX-HOTPLUG
21 20
23 22

8
9
10
11

CRX1CRX1+
CRX2CRX2+

12
13
14
15
72
73

DRX-DDC-SDA
DRX-DDC-SCL
DDRXCDDRXC+
DDRX0DDRX0+

3HB5
3HB6
3HB7
3HB8

DDRX1DDRX1+
DDRX2DDRX2+

3HB9
3HBA
3HBB
3HBC

3HBD
3HBE
3HBF
3HBG

ERX1ERX1+
ERX2ERX2+

3HBH
3HBJ
3HBK
3HBL

AIN-5V

26
27
28
29

4R7
4R7
4R7
4R7

30
31
32
33

4R7
4R7
4R7
4R7

61
62

VGA-SDA-EDID-HDMI
VGA-SCL-EDID-HDMI

100n

100n
2HB3

2HB2

2HB1

10u

4K7
8K2

3HBN

41
42

3HAR RES

R0XCN
R0XCP
R0X0N
R0X0P

SPDIF_IN

CSCL
CSDA

R0X1N
R0X1P
R0X2N
R0X2P

GPIO_MCON
RESET

DSDA1
DSCL1

TPWR_CI2CA
INT

36

71
70
69
68

3HAV
3HAW

TXCN
TXCP
TX0N
TX0P

R1X1N
R1X1P
R1X2N
R1X2P

TX1N
TX1P
TX2N
TX2P

DSDA2
DSCL2

2HAC

RES
3HAT

100n

390R

RSVDL1
RSVDL2

R2X1N
R2X1P
R2X2N
R2X2P
DSDA3
DSCL3

VIA

R3XCN
R3XCP
R3X0N
R3X0P
R3X1N
R3X1P
R3X2N
R3X2P

100p

100n
2HB0

2HAY

10u

2HAW

100n

100n
2HAV

100n
2HAU

100n
2HAT

2HAS

10u

100n

100n
2HAP

100n
2HAN

100n
2HAM

2HAL

100n

2HAG

10u

75R

+3V3

3HAY

4K7

+3V3

22K
7HA4
BC847BW

3HBP

3HB1 RES

FHA4

SBVCC5

3HBR
MICOM-VCC33
RES

10K

FHA5

4K7

RES

RESET-HDMI-MUXn

9HA1

87
86
85
84

HDMIF-RXCHDMIF-RXC+
HDMIF-RX0HDMIF-RX0+

83
82
81
80

HDMIF-RX1HDMIF-RX1+
HDMIF-RX2HDMIF-RX2+

+1V5

+5V

+3V3

2HAB

7HA1-1
RT9025-12GSP

1u0
VDD

3
2

R2XCN
R2XCP
R2X0N
R2X0P

2HAF

SPDIFO

3HB0
4K7

76
67

pin (64)

FHA6

10R

RES
3HAU

SCL-SSB
SDA-SSB

FHA1
FHA2

FHA3

R1XCN
R1XCP
R1X0N
R1X0P

47R
47R

3HAS
+5V
RES

75R

100n

ETH_TX1P
ETH_TX1N

EPWR33

37
38

2HAE

DSDA0
DSCL0

RES

10u

ETH_RX1P
ETH_RX1N

pin (43)

FHA7

30R

2HAD

HECN
HECP

10u

10u
RES 2HAK

100n
2HAJ

RES 2HAH

30R

PDZ2.4B(COL)
5HA9
2HB5

3K3
6HA1
2K2

3HA6

3HA5 RES

35
88

25
98

64

52

43

2HAR

10u
3HAP

2HB4

10K

RES
5HA6

RES

77
78

VIN

VOUT

EN

ADJ
PGOOD

NC
GND
GND HS

102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117

FHB5

6
7
1

+1V2-FE

5
7HA1-2
RT9025-12GSP

VIA
18
19
20
21

VIA

VIA

10
11
12
13

VIA

1V2 DVB-T2 and HDMI 5-1 mux (8000 and 9000 series)

DSDA4
DSCL4
R4XCN
R4XCP
R4X0N
R4X0P

3HB2

RES

+3V3-STANDBY

22K

R4X1N
R4X1P
R4X2N
R4X2P

7HA2
BC847BW

RES

DSDA5_VGA
DSCL5_VGA
GND_HS

47K

47K

3HAL-1

FHAV
FHAW

ARX-DDC-SCL
ARX-DDC-SDA

ERXCERXC+
ERX0ERX0+

3 3HAB-3 6

ARX0ARXC+

47K

AIN-5V

AIN-5V
ARX-HOTPLUG

57
58

ERX-DDC-SDA
ERX-DDC-SCL

ARX1ARX0+

21 20
23 22

21
22
23
24

4R7
4R7
4R7
4R7

ARX2+
ARX2ARX1+

ARXCPCEC-HDMI
HARC4
ARX-DDC-SCL
ARX-DDC-SDA

17
18
19
20

4R7
4R7
4R7
4R7

VOUT
GND

CBUS_HPD0
CBUS_HPD1
CBUS_HPD2
CBUS_HPD3
CBUS_HPD4

VDD33

3HB3

PCEC-HDMI
FHB6

9HA0

HDMI-CEC

100R
BC847BW
7HA3

+5V-EDID

27K

FHAR
FHAS

BRX-DDC-SCL
BRX-DDC-SDA

CRXCCRXC+
CRX0CRX0+

EN
EN

HDMI_RSVD

3HBS

53
54

FLG

22
23
24
25
26

3
4
5
6

47K

FHAH

BRX1BRX1+
BRX2BRX2+

7 3HAL-2 2

BRXCPCEC-HDMI
HARC0
BRX-DDC-SCL
BRX-DDC-SDA

1 3HAB-1 8

BRX0BRXC+

47K

BIN-5V

BIN-5V

HDMI CONNECTOR 1

99
100
1
2

VIN

pins (7,16,34,89)

FHA8

14
15
16
17

BRX1BRX0+

1H01
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

BRXCBRXC+
BRX0BRX0+

CRX-DDC-SDA
CRX-DDC-SCL

BRX2BRX1+

47K

FHAG

BRX-DDC-SDA
BRX-DDC-SCL

BRX2+

7 3HAB-2 2

HDMI CONNECTOR 2

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

48
49

30R

10u

1H02

94
95
96
97

ARX1ARX1+
ARX2ARX2+

R0PWR5V
R1PWR5V
R2PWR5V
R3PWR5V
R4PWR5V
R5PWR5V_VGA

5HA5
+3V3
7HA5
RT9715EGB

2HAA

CIN-5V

90
91
92
93

VDD12 TVDD12

21 20
23 22

44
45

ARXCARXC+
ARX0ARX0+

AVDD12

FHAN
FHAP

CRX-DDC-SCL
CRX-DDC-SDA

CIN-5V
CRX-HOTPLUG

47K

3 3HAA-3 6

CRXCPCEC-HDMI
HARC1
CRX-DDC-SCL
CRX-DDC-SDA

47K

FHAF

CIN-5V
CRX0CRXC+

5 3HAA-4 4

HDMI CONNECTOR 3

1u0

33
VCC33 VCC5
EPWR MICOM SB

AVDD12

+3V3

40
2HA8 RES
39
ARX-DDC-SDA
ARX-DDC-SCL

CRX1CRX0+

TVDD12

10u

FHBA

CRX2+
CRX2CRX1+

46
50
55
74
59

FHB9

FHBB

63

VDD33
CEC_A

pin (25) pin (98)

FHA9

30R

2HA9

1u0

30R

FHB8

1H03
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

5HA4
+1V2-FE

FHB7

VDD12

SBVCC5

101

DIN-5V

ARX-HOTPLUG
BRX-HOTPLUG
CRX-HOTPLUG
DRX-HOTPLUG
ERX-HOTPLUG

5HA1 RES

5HA0 RES
10p
RES

10R

3HAN

4K7
4K7

2HA0

47
51
56
75
60
65

7
16
34
89

2HA1

66

47K

7 3HAC-2 2

DIN-5V
DRX-HOTPLUG

FHA0
2HA7

TVDD12

MICOM-VCC33

+5V
7HA0
SII9387ACTUC

3HA8

+5V-EDID
ARC-SiI

EPWR33

AVDD12

10R

FHAL
FHAM

DRX-DDC-SCL
DRX-DDC-SDA

21 20
23 22

FHB3

EIN-5V

DIN-5V
DDRX0DDRXC+
DDRXCPCEC-HDMI
HARC2
DRX-DDC-SCL
DRX-DDC-SDA

VDD33

10R

DDRX1DDRX0+

VDD12

pin (79)

FHAA

30R

FHB4

3HA4

DDRX2DDRX1+

47K

FHAE

DDRX2+

1 3HAC-1 8

HDMI CONNECTOR 4

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

DIN-5V

5HA3
+5V-EDID

79

EIN-5V
FHB2

pins (35,88)

FHAB

30R

3HA3
10R

1H04

I2C ADDRESS
0XB2

4K7

2HA4

1u0
2 3HA1-2 7

2HA2

1u0
3 3HA1-3 6

FHB1

4K7

2HA5

1u0

10R

CIN-5V

2HA6
FHAC

4K7

BIN-5V

5HA2
+1V2-FE

VGA-DETECT

3HA2

1u0
4 3HA1-4 5

1 3HAA-1 8

EIN-5V
ERX-HOTPLUG

FHB0

FHAJ
FHAK

ERX-DDC-SCL
ERX-DDC-SDA

21 20
23 22

47K

EIN-5V

1u0
1 3HA1-1 8

3HA0
10R

ERX0ERXC+

3HBM

BAT54 COL
FHAY

AIN-5V

ERX1ERX0+

1u0

ERX2ERX1+

ERXCPCEC-HDMI
HARC3
ERX-DDC-SCL
ERX-DDC-SDA

+5V-VGA

+5V

1u0
3HA9

FHAD

ERX2+

47K

HDMI CONNECTOR 5

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

B06A

6HA0

1H05

7 3HAA-2 2

B06A

5 3HAB-4 4

9-1-26

QFU1.1E LA

3HB4
+3V3-STANDBY
22K

HDMI

2011-12-06

8204 000 9223


19280_026_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 86

B06B, HDMI-ARC

HDMI-ARC
5HD6

B06B

IHDM

+3V3
30R

+3V3-ARC

2HD7

2HDC

680R

3HD0

+3V3-ARC

IHD0

10u

7HD1-1
BC847BS(COL)
IHD9

100n

3HD1

IHDG

ARC1

IHDH

ARC2

IHDJ

ARC3

IHDK

ARC4

RES
9HD2

ARC4

3HD5

100R

3HD4

330R

3HD3

ARC2
2HD8

IHD1

7HD1-2
BC847BS(COL)
IHD8

100n

3HD6
56R

9HD5

ARC4

3HD9

330R

3HD8

2K2

3HD7

30R

100R

ARC3

+5V-ARC

5HD5

FHD3

+5V

+3V3-ARC

+3V3-ARC

3HDE

330R

2K2

3HDD

+3V3-ARC

2HDA

IHD3

7HD2-2
BC847BS(COL)
IHD6

100n

3HDG

9HD7

56R

+3V3-ARC

2HDB

+3V3-ARC

IHD4

7HD3
BC847BW

100n

IHD5

9HD8

3HDM
56R

3HDT

100R

IHDL

HDMI-ARC

RES

+3V3-ARC

3HDK

GND

7
VEE

330R

9HD1

3HDJ

12

330R

HDMI-ARC

15

3HDR

3HDC

680R

G8

3HDF

2K2

9
6

3HDH

9HD0

56R

680R

FHD2

3HDB

9HD6
14

3HDL

ARC-SEL2

0
8X
7

7HD2-1
BC847BS(COL)
IHD7

2K2

10

IHD2

100n

82R

FHD1

3HDP

ARC-SEL1

MDX

13

RES 3HDN

ARC-SEL0

11

100R

VCC
FHD0

680R

3HDA

100n

1u0

2HD9

16

7HD0
74HC4051PW

2HDD

2HD6

30R

100R

FHD8

30R
5HD4

ARC1

+3V3-ARC

100R

30R
5HD3

2K2

3HD2
FHD7

ARC0

680R

30R
5HD2

10p

HARC4

FHD6

+3V3-ARC

ARC0

10p
2HD5

HARC3

FHD5

30R
5HD1

10p
2HD4

HARC2

5HD0

10p
2HD3

HARC1

FHD4

10p
2HD1

HARC0

IHDF
56R

9HD4

3HDS

B06B

2HD0

9-1-27

QFU1.1E LA

HDMI-ARC

2011-12-06

8204 000 9223


19280_027_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 87

B06C, USB

USB

B06C

+5V

9EA5
100n
2EA6

2EA4

100n
2EA5

9EA4

9EA3

+3V3-USBS

100n

2EA3

RES

+3V3

100n

B06C

100n
2EA7

9-1-28

QFU1.1E LA

3EA7

2EA0

+5V
+T 0R4

3
4
25

USB-PORTA-DM
USB-PORTA-DP
USB-PORTA-OC

6
7
24
12
13
20

USB-SET-DM
USB-SET-DP
10K

15
16
19

3EA1
10K

28
17
22
23
8

3EA2 RES
RESET-FUSION-OUTn
3EA4

10n

10K

680R

IEA2

+3V3-USBS

21
VCC_D

3EA6

26

SDA

RES

100K
10K

+3V3

DD3DD3+
OVR3

18

TEST|SCL

IEA3

DD4DD4+
OVR4

3EAC
+5V
3EAD-1
+5V-PORTB

30
31
32
33

VIA1
VIA2
VIA3
VIA4

VREG
RESET
SELFPWR
GANG
RREF

+T 0R4

100K
FEAE

USB-PORTB-OC

3EAD-2
100K
3EAD-3
100K
3EAD-4

100n

100K
2EA2

3ECH
+5V
+T 0R4

+5V-HDD

FEA1
FEA2

1E01

+5V-HDD

FEA3

FEA6
USB-PORTA-DM
USB-PORTA-DP

FEA4

FEA7

1E03

+5V-PORTA

FEA8

1
2
3
4

FEA5

1
2
3
4

FEAC

5401-3C2-100-70
2EAA

100n

1
2
3
4

100n

USB-HDD-DM
USB-HDD-DP

2EA9

5401

FEA9
USB2-DM

cEC0

USB-HDD-DM

USB2-DP

cEC1

USB-HDD-DP

USB1-DM

cEC2

USB-MAIN-DM

USB1-DP

cEC4

USB-MAIN-DP

USB-PORTB-DM
USB-PORTB-DP

1E02

FEAA +5V-PORTB

FEAB
100n

5
2EAB

RES 2EA8

IEA1

3EA3

DD2DD2+
OVR2

100K

+3V3

10K

100K
3EA8-4

+3V3

3EA5

RESET-FUSION-OUTn

+3V3

DD+

DD1DD1+
OVR1

100K
3EA8-3

USB-MAIN-DM
USB-MAIN-DP

29

+3V3

3EA0

1
2

RES
9EA1

USB-PORTB-DM
USB-PORTB-DP
USB-PORTB-OC

XOUT

USB-PORTA-OC

3EA8-2

RES
9EA2

18p

XIN

5
VCC_A_1
9
VCC_A_2
14
VCC_A_3

11

+5V-PORTA
100K
FEAD

GND_HS

10

27

7EA0
CY7C65632-28LTXCT

2EA1

+3V3

3EA8-1
VCC

NC
1EA0

12M

18p

5401

USB

2011-12-06

8204 000 9223


19280_028_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 88

B06D, Service

Service

10K

FCS4

RXD-HTV-RS232

TXD-HTV-RS232

TXD-HTV-TTL

RXD-HTV-TTL
FCS3

3CS0

10K

3CS1

+3V3

RXD-HTV-TTL

TXD-HTV-TTL

B06D

1CWE

FCS5

1
2
3
FCS2

BM03B-SRSS-TBT
FCS1

47R

+3V3

RXD-HTV-RS232

47R

TXD-HTV-RS232

47R

1E06

2
1
MSJ-035-75C-B-RF-PBT-BRF

9CS1

HOTEL TV

1 3CS4-1 8

5
4
3

1CS0

47R

47R

6CS0

6 3CS4-3 3

PDZ5.1B(COL)

3CS3

4 3CS4-4 5

6CS1

47R

TXD-SERVICE

PDZ5.1B(COL)

RXD-SERVICE

7 3CS4-2 2

FCS0

1CS1

3CS2

2CS0
100n
2CS3
100n

TXD-HTV-TTL

RXD-HTV-RS232

1
3
4
5

11
10
13
8

16

7CS1
ST3232C

C1+

VCC

RS232
V-

C1V+

6
2

2CS1
100n

2CS2
100n

C2+
C2-

T1
IN
T2

OUT

T1
T2

R1
IN
R2

OUT

R1
R2

GND

B06D

14
7

TXD-HTV-RS232

12
9

RXD-HTV-TTL

15

9-1-29

QFU1.1E LA

Service

2011-12-06

8204 000 9223


19280_029_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 89

B06E, Ethernet

Ethernet

B06E
5EF5

10n

30R

RES 5EF0
+3V3-STANDBY

100n

100n
2EFH

100n

1u0

30R

2EF2

AVDDL-1V1
2EF0

+3V3-LAN

IEF1

2EF1

30R
5EF4

VDD33-PHY

FEF9

VDD33-PHY

10u
2EF3

10n

2EFS

B06E

2EFT

9-1-30

QFU1.1E LA

5EF6

100n

100n
2EF8

100n
2EF7

100n
2EF6

RES

30R

100n

100n

2EFJ

10u
2EFA

2EF9

100n

2EFU

22u

100n
2EFV

1u0

2EFZ

1u0
2EFG

2EFF

3EF7

RES
510R
RES
510R

6EF0
RES
6EF1
RES

LTST-C190KGKT
LTST-C190KGKT

15 RDTC

RX- 3
RXCT 2
9

11 TD+

5EF7-2

TX+ 6

10 TCT

TXCT 7

9 TD-

TX- 8

RES
5EF3-3
MGH7S
4
5

DEF0
CLK-RMII

9EF1

CLK-25M

RES 9EF2

12
13

75R

100n

98435-111LF

VDD33-PHY
VDD33-PHY

1
2
3
4
5
6
7
8

RX+ 1

16 RD+

15p

RES 2EFN

1
8

CDA5C16GTH
16V

15p

RES 6EF2-1

RES 2EFM

2
7

CDA5C16GTH
16V

15p

RES 6EF2-2

EN-TXD0
EN-TXD1
LED-RES
LED-ACT

3EF6

RES
5EF3-1

FEFE

RXN

21
22
24

TX+ 6

14 RD-

EN-TXEN

34
35

11 TD+
FEFC

75R

32

FEFB

3EG3

RX-ER

1n0

FEF7

TXCT 7

3EG1

25

10 TCT

75R
3EG2

VIA

TX- 8

2EFR

VIA

RX- 3
RES
5EF3-2

FEFA

TXP
TXN
RXP

CDA5C16GTH
16V

LED_ACT
LED_RES
LED_10_100

4u7

5EF1

38

VDD33

DVDDL

14
AVDD33

TXD0
TXD1

EN-RXD0
EN-RXD1

2EFP

47R

FEF6

TX_EN

RXCT 2

1E00
29
28

3EG0

50
51
52
53
54
55
56
57
58

RX_ER
NC

9 TD-

RES 2EFL

BC857BW
7EF1

10K

3EF4

VDDH-2V5

RXD0
RXD1

CLK-RMII
EN-RXEN

22R

RES 6EF2-3

15
16
18
19
36
37

MDC
MDIO
INT

RX+ 1

15 RDTC
14 RD-

33 3EF5
30

15p

FEF5

CLK_RMII
CRS_DV

RES 2EFK

1K5

RES0
RES1

16 RD+

TXP
TXN
RXP
RXN

CDA5C16GTH
16V

3EF3

RBBIAS

5EF7-1

9
10
12
13

RES 6EF2-4
5
4

26
31
40
39
20

EN-MDC
VDD33-PHY

TRXP0
TRXN0
TRXP1
TRXN1

FEF8

27

RES

2K37

RES0
RES1

FEF4

RST

470p

1%

VDDIO_REG

VDDH-2V5

2EFE

FEF3

CLK_25M

LX

VDDH_REG

470p

22R

XTLO

RES

23

3EF2

EN-MDIO
IRQ-WOLANn

1M0

FEF2

RES

AVDDL
XTLI

2EFD

RESET-ETHERNETn

5
4

22p
3EF1

3EFY

1EF0

25M

2EFC
CLK-25M

7EF0
AR8030-AL1A-R

22p

6
11
17

FEF1

2EFB

41
GND_HS
42
43
44
45
46
47
48
49

RES 100n

100K
2EF4

VDD33-PHY

3EF0

2EF5

FEF0

RES

EN-TXC

EN-RXC

VDDH-2V5
3EFE RES
10K
3EFF RES

EN-RXD0

EN-RXD0

EN-RXD1

EN-RXD1

EN-RXEN

EN-RXEN

10K

3EFN
10K
3EFP
10K

3EFG RES
10K
3EFH

RES0

RES0

RES1

RES1

RX-ER

RX-ER

3EFR
10K
3EFS RES
10K

10K
3EFJ

3EFT RES
10K

10K
3EFK RES
10K
3EFL

LED-RES

LED-RES

LED-ACT

LED-ACT

10K

3EFU
10K
3EFV RES
10K

3EFM
10K

3EFW RES
10K

Ethernet

2011-12-06

8204 000 9223


19280_030_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 90

B06F, NAND-Flash & EEPROM

NAND-Flash & EEPROM

B06F

DJA8

DJA9

8
9
17
16
18
19

DJA2
DJA3
DJA4
DJA5
DJA6

DJAA
DJAB
DJAC
DJAD

R
B

RE
CE
ALE
CLE
WE
WP

DNU1
DNU2

4K7

DJAE

0
1
2
3
IO
4
5
6
7

47u 16V

100n
2JA3

9JA1
9JA2

F-RDY
F-CEn

38
47

+3V3
48

13
25
36

+3V3
9JA6

100n

(8K 8)
EEPROM

10K

0
1
2

WC
SCL

ADR
SDA

7
6
5

3JA2
47R

SCL-SSB
3JA3

SDA-SSB

47R

1
IJA0
2
3

2JA4

IJA1
7JA2
M24C64-WDW6

3JA4

+3V3

10K

RES
RES

VSS

9JA5

F-RDY

F-OEn
F-CEn
NAND-ALE
NAND-CLE
F-WEn

DJA7

29
30
31
32
41
42
43
44

DJA1

1
2
3
4
5
6
10
11
14
15
20
21
22
23
24
26
27
28
33
35
40
45
46

DJA0

1
2
3
4
5
6
7
8
9
10
11
NC 12
13
14
15
16
17
18
19
20
21
22
23

3JA5

VCC

FRA0
FRA5
FRA6
FRA7
FRA8
FRA10
FRA11
FRA12

100n
2JA2

100n
2JA1

+3V3

12
34
37
39

7JA0
MT29F8G08ABACAWP:C

9JA3

9JA4

2JA0

+3V3

4K7
RES
3JA1

B06F

3JA0

9-1-31

QFU1.1E LA

FJA0

NAND-Flash & EEPROM

2011-12-06

8204 000 9223


19280_031_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 91

B06G, Analogue externals

Analogue externals

B06G
FVC1

1n0

AUDIO VGA/DVI

1VC7

2VC9

6VC6
RES

100p

2VC8

1K0

CDS4C12GTA
12V

3VC6

VGA-LIN

5
4
3

FVC2

1VC8

cVC3

1n0

cVC2

DRXC+

2VCB

DRX2+

6VC7

DRX1+

RES

cVC0
cVC1

100p

DRX0+

2VCA

1K0

CDS4C12GTA
12V

3VC7

VGA-RIN

1VA6

2
1
MSJ-035-75C-BL-RF-PBT-BRF

FVCB

FVC3

3VC8

YPBPR-DETECTn

FVC4

1VC1

150R

3VC0

CDS4C12GTA
12V

6VC0

1VC2

150R

3VC1

CDS4C12GTA
12V

PB1
RES

PB1

6VC1

cVC5

YPBPR
5
4
3

FVC5

2VC1

DRXC-

RES

Y1

47p

Y1

2VC0

cVC4

47p

DRX0-

100p

2VCC

47R

FVCC

1VA8

2
1
MSJ-035-75C-G-RF-PBT-BRF

FVC6

1VC3

150R

3VC2

CDS4C12GTA
12V

RES
6VC2

47p

2VC2

PR1-IN

FVC7

3VC9

CVBS-DETECTn

1VC4

1n0

2VC6

CDS4C12GTA
12V

RES
6VC3

FVC9

FVCD

1VC5

1n0

2VC7

6VC4

CDS4C12GTA
12V

1K0

CVBS +
AUDIO CVBS / YPBPR
5
4
3

3VC4

YPBPR-L

100p

1VA4

2
1
MSJ-035-75C-Y-RF-PBT-BRF

FVCA

1VC6

150R

3VC5

CVBS1
CDS4C12GTA
12V

YPBPR-L

2VC4

cVC7

100p

2VC3

1K0

DRX2-

FVC8

3VC3

YPBPR-R

RES

YPBPR-R

RES

cVC6

6VC5

DRX1-

100p

2VCD

47R

100p

B06G

2VC5

9-1-32

QFU1.1E LA

Analogue externals

2011-12-06

8204 000 9223


19280_032_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 92

B06H, DC-DC

DC-DC

B06H

IUWB

VBST
VFB
PG
SS
VREG5
EN

1n0

10n
RES
2UWM

220K
2UWL

3UW8

22K 1%

VO

GND-3V3
VIA
FUW4

GND-3V3

GND-3V3 GND-3V3

+22V

22u

2UWJ

22u

22u
2UWH

IUWC 2UWN
12
IUWD
6
3

100n
IUWE

3UW9 RES
100K

16
17
18
19
20
21
22
23
24
25
26

1u0

68K 1%
2UWK RES

10
11

2UWP

IUWA

3UW7

1u0

100n
2UY6 RES

2UY5
100n

3UW6

22p

6UW2

100n

BAV99 COL

10R

10R
3UWJ-4

10R

3UWJ-3

2UY2

+3V3

SW1
SW2

GND PGND GND_HS

15

GND PGND GND_HS

8
9

GND-5V

8
9

+5V

+12Vb

+5V

IUWG
RES

DETECT12V

22u

IUW7

47u
2UY0

RES

2UWY

GND-3V3
GND-5V

ENABLE+3V3

+3V3

330R

1u0

7UW2-2
RT9025-12GSP

7UW2-1
RT9025-12GSP

VDD

7
1
5

18
19
20
21

VIA

VIA

10
11
12
13

VIA

IUWF

82K

3UWE RES

14
15
16
17

NC
GND
GND HS
8

22u

ADJ

+2V5
2UWV

EN

VIA

FUW3

PGOOD

100n

2UWU

VOUT

220K 1%

ENABLE+2V5

VIN

3UWF

+3V3

22
23
24
25
26

2UWR

1n0

RES 2UWS

6UW1

6UW0

FUW2

+2V5-F

LTST-C190CKT

3UWB DBG
DBG

9UW0 RES

4K7

4K7
3UWA-4

4K7

3UWA-3

4K7

3UWA-2

3UWA-1

+2V5

PDZ5.1B(COL)

3UWC

1% 470K
3UWD

2UWW

22K

1n0

470R

3UWH-4
RES

470R

3UWH-3
RES

470R

470R
3UWH-2
RES

3UWH-1
RES

470R

470R
3UWG-4
RES

470R

3UWG-3
RES

470R
3UWG-2
RES

3UWG-1

+3V3

RES

GND-5V

GND-5V

100K

RES

2UY1

VIN

1u0

VIA

16
17
18
19
20
21
22
23
24
25
26

3UW4

1u0
2UY4 RES

GND-5V

IUW6

2UY3

EN

100n
10R
3UWJ-2

VREG5

IUW5
6

3UWJ-1

SS

1n0

10n
RES
2UWA

PG

2UWB

1u0

4
2UW9470K

22K 1%
3UW3

3UW2

VBST
VFB

IUW4
12

10u

2
IUW3

10
11

2UWC

VO

IUW2

3UW0
120K 1%
2UW8RES
22p

SW1
SW2

2UWT

+5V

13

VIN

+3V3

VCC

VCC
13

2u0

14

7UW1
TPS54426PWP

+12Vb

FUW1

5UW4

IUW9
2UWF

2UWD

30R

22u

2UW7

47u 25V

47u 25V
2UW6 RES

2UW5 RES

22u

22u
2UW4

2UW3 RES

14

7UW0
TPS54426PWP

3u6

100n

2UW2

10u

2UW0

30R

10u
2UW1

+5V
30R
5UW1

10u

+12Vb

IUW8

+12Vb

FUW0

5UW2

IUW1

10u
2UWE

IUW0

2UWG RES

5UW3
5UW0

100n

B06H

15

9-1-33

QFU1.1E LA

DC-DC

2011-12-06

8204 000 9223


19280_033_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 93

B06I, DC-DC

DC-DC

B06I

7UV0
LD1117DT12
3

IN

FUV1

OUT

2UV7

1
EN

ADJ

FUV2

5
4

GND

+1V1-FA
100R

OUT

3UV6 RES

IN

2UVB

3UV1
120K 1%

68K 1%

1M0 RES
3UV5

IUV3

3UV4

10u
+3V3

7UV1
RT9187GB

2UV9

IUV1

+1V2-FA

22u 16V

COM

10u

+3V3
100n

B06I

2UV6

9-1-34

QFU1.1E LA

2UVC
1n0
RES

3UV2
33K 1%
IUV2 3UV3
22K RES

DC-DC

2011-12-06

8204 000 9223


19280_034_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 94

B06K, Audio

Audio

B06K

1J50
3150-831-030-H1
2
VCC

FDY0

SPDIFO

CDS4C12GTA
12V

RES 6DY0

V_NOM

100p
1DY1

RES 2DY1

GND
MT
5 4

IDY1

100n

VIN

1R0

+3V3

3DY0

B06K

2DY0

9-1-35

QFU1.1E LA

Audio

2011-12-06

8204 000 9223


19280_035_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts


9-1-36

QFU1.1E LA

9.

EN 95

B06L, Conditional access

B06L

Conditional access

MDI0

3PW2-1

CA-MDI0

33R
3PW3

MDI1

CA-MDI1

33R
3PW4

MDI2

CA-MDI2

33R
MDI3

3PW1-1

CA-MDI3

CA-MDI4

CA-MDI5

CA-MDI6

CA-MDI7

33R
MDI4

3PW2-4
33R

MDI5

3PW1-2
33R

MDI6

3PW2-3
33R

MDI7

3PW2-2
33R
3PW5

MICLK

CA-MICLK

33R
MIVAL

3PW1-4

CA-MIVAL

CA-MISTRT

33R
MISTRT

3PW1-3
33R

Conditional access

2011-12-06

8204 000 9223


19280_036_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts


9-1-37

QFU1.1E LA

9.

EN 96

B06M, FE

B06M

FE

B06M
+3V3

3KW1

TS-CHDEC-DATA

3KW2

TS-CHDEC-DATA

560R

470R

3KW3

3KW4

TS-CHDEC-CLK

TS-CHDEC-CLK

560R
3KW5

470R
TS-CHDEC-VALID

TS-CHDEC-VALID

3KW6

560R

470R

3KW7

3KW8

TS-CHDEC-SOP

TS-CHDEC-SOP

560R

470R

2FS3
10p
SOC-IF-P

SOC-IF-N

2FS1

5FS1

100n
2FS2

4u7
5FS2

100n

4u7

IF-IN-P

IF-IN-N

2FS4
10p

RESET-DVBS

cFS0

RESET-FUSION-OUTn

SCL-FE

cFS1

SCL-TUNER

SDA-FE

cFS2

SDA-TUNER

+3V3

3RW1

TS-DVBS-DATA

3RW2

TS-DVBS-DATA

560R

470R

3RW3

3RW4

TS-DVBS-CLK

TS-DVBS-CLK

560R

470R

3RW5

3RW6

TS-DVBS-VALID

TS-DVBS-VALID

560R

470R

3RW7

3RW8

TS-DVBS-SOP

TS-DVBS-SOP

560R

470R

FE

2011-12-06

8204 000 9223


19280_037_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 97

B06N, Serial flash

B06N

Serial flash

B06N
3CT0

SF-SDI

47R
3CTR

ICT1
RES

4K7

3CTS

+3V3-STANDBY
RES
2CT2
RES
7CT1-1
SN74LVC125APW
100n
2
14

+3V3-STANDBY

47R

RES
3CTT

SFB-SI

47R

EN
7

SFB-EN

3CTU

SF-CLK
3CTJ
RES

4K7

3CTV
+3V3-STANDBY

SFB-SCK

RESET-STANDBYn

+3V3-STANDBY

3CTK
RES

1n0

2CT4

3CTP

47R

47R

7CT1-3
SN74LVC125APW
9

47R

8
10

SFB-SI
SFB-SCK

RES
3CT1

SFB-CS

47R

EN

SFB-WPn

+3V3-STANDBY

3CT3

RES
3CT4

+3V3-STANDBY

47R

+3V3-STANDBY
RES 7CT1-4
SN74LVC125APW
12

FCT5

11
13

FCT6

10K

HOLD

1CTZ

3CT9

SFB-SCK
SFB-CS
SFB-SI
SF-SDO
SFB-EN

47R

RES

4K7

TEST-MOD

3CTD

10K
ENABLE-STANDBY

SFB-EN

47R

FCT1

100n
4

EN

RES
3CTE

1
2
3
4
5
6

502382-0670

SFB-HOLDn

47R

10K

RES 7CT2
74LVC1G125GW
2

RES
2CT3

4K7

+3V3-STANDBY

ICT3

3CTM

+3V3-STANDBY

3CTB

TEST-CON

FCT7

SFB-WPn

47R

EN

SF-HOLDn

10K

8
C

512K
FLASH

FCT8
RES
3CT5

+3V3-STANDBY
10K

FCT4

VSS

SFB-EN

3CT8

47R

ICT2

4K7

10K
RES 3CT7

VCC

FCT3

3CT2

14

3
4

RES

SFB-CS

SFB-HOLDn
SF-WP

DBG

7CT3
M25P05-AVMN6

DETECT12V

1CT7
SKHUBHE010

3CTF

+3V3-STANDBY

+3V3-STANDBY

RES

SFB-EN
RES
7CT5
BC857BW

3CTC

3CTH

FCT9

14

GND

RES

FCT2

3CTZ

4K7

3CTA

SF-SDO

47R

EN

SF-CS

1
2

RES
3CTW

VCC
RESET

47R

10K

7CT4
NCP803

+3V3-STANDBY

7CT1-2
SN74LVC125APW
5

47R

SFB-EN

3CTY

RES

14

+3V3-STANDBY

3CT6

9-1-38

QFU1.1E LA

3CTG
10K

Serial flash

2011-12-06

8204 000 9223


19280_038_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts


9-1-39

QFU1.1E LA

9.

EN 98

B06O, Fusion peripherals

B06O

Fusion peripherals

B06O

USB1-RREF

IEE0

1 3EE2-1 8

USB2-RREF

IEE1

12K
3EE2-2
12K
3EE2-3

12K
4 3EE2-4 5
12K

Fusion peripherals

2011-12-06

8204 000 9223


19280_039_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 99

B06P, HDMI

HDMI

B06P

RES
3HW6
390R
3HW1

FHW0
+5V

HEAC

56R
1%

680R

RES
3HW2

HDMI-ARC

IHW1

3HW3 RES

PWR5V

10n

27K
2HW1

10K
3HW4

3HW5

+3V3

12K

IHW2
RREF

1%

100n

B06P

2HW2

9-1-40

QFU1.1E LA

HDMI

2011-12-06

8204 000 9223


19280_040_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 100

B06Q, Control

Control

B06Q

B06Q
+3V3
3

7CW0
PCA9540BGD

VDD

47R

STB-GP4

22K

100n

100n
2CW3

2CW2

+3V3-STANDBY

47R
3CUA

10K

3CUD
SCL
SDA

47R

INT

VIA

VIA

11

LCD-PWR-ONn

AMBI-TEMP

SDA-M3

FCWV

FCWU

22K

1u0

RES 3AW1

47R
3CU3

IRQ-EXPANDERn

3CU6

SCL-MC

FCWW

SDA-MC

FCWZ

3CU7
47R
3CU8

STB-SCL

+3V3-STANDBY

1
2
3

STANDBYn
BM03B-SRSS-TBT
DETECT12V

EJTAG-MCU-TDO

3CW3

KYBRD

10R
3CW4

LGSEN

KEYBOARD_IRQ-SRFn

KEYBOARD_IRQ-SRFn

LIGHT-SENSOR

LIGHT-SENSOR

RC_IRQ-RF4CEn

RC_IRQ-RF4CEn

10R
TXD-STANDBY

3CW5

IR

100R

47R
STB-RXD

1
2
3

BM03B-SRSS-TBT
1CWD

47R

DCW2
STB-TXD

22
23
24
25

FCWT

47R
3CU1

AVLINK1

LED

100R

SCL-M3

FCWY
3CUB

PWRON

1
2
3

BM03B-SRSS-TBT
1CW4

10K

3CWA
FCW7

FCWN

FCWP

10K

3CR2 100R
3CR0
100R

SC1-DETECTn
YPBPR-DETECTn
CVBS-DETECTn
VGA-DETECT
ARC-SEL0
ARC-SEL1
3CR1
ARC-SEL2

1CW9

SDMn
3AW0

17

VSS GND_HS
6

18
19
20
21

2
3
4
5
FCW5
7
8
9 FCW6
10

10K

IO0
IO1
IO2
IO3
IO4
IO5
IO6
IO7

+3V3-STANDBY

FCWM

RXD-STANDBY

3CWP

+3V3-STANDBY

3CR3

A0
A1
A2

10K

47R

10K
3CUS

3CUR

10K

3CUP

10K
14

3EW0

TXD-STANDBY

47R
STB-GP10

IRQ-WOLANn

+3V3-STANDBY
RESET-RF4CEn

10R

RES 3CUN

10K

10K

RES 3CUE

100n

2CW6

10K

10K
RES 3CUM

3CUL

RES 3CUK

10K
10K

3CUT

10K
3CUV

3CUY

12
47R 13

DCW1

AMBI-TEMP-FUS

3CUW

SCL-SSB
SDA-SSB

3CU0
10K

47R
3CWN

STB-GP9

VDD
15
16
1

RESET-ETHERNETn

3CWM

STB-GP8

+3V3-STANDBY

SPLASH-ON

100R

+3V3

+3V3

LIGHT-SENSOR

3CWG

STB-GP6

SPI-EN

ICW1

+3V3-STANDBY

47R

STB-GP7

+3V3

3CWE

SDMn

10K

3CWL RES

STB-GP5

22K

SDM
FCW0 DCW4

IRQ-WOLANn

1
2
3

BM03B-SRSS-TBT

+3V3-STANDBY
10K

ENABLE-WOLAN

47R
ENABLE-STANDBY

3CWC

DVS2

7CW1
PCA9554BS

5
3CR8

ENABLE-WOLAN

47R
3CWK

HP-DETECT

3CWB

FCW1

EJTAG-MCU-TCK

47R

DVS1

FCW2
SDA-SSB

3CU2

STB-GP3

1CW6

FCW3

SCL-SSB
EJTAG-MCU-TMS

47R
3CWD

STB-GP2

+3V3
2K2

10K

1K0

1K0

3CWT

FCWH

3CR7

SDA-FE

3CU5

STB-GP1

BM03B-SRSS-TBT

2K2

EJTAG-MCU-TDI

47R

1
2
3

10K

FCWG
FCWE

47R
3CU4

STB-GP0

+3V3

SDA-FE

10K
3CRA

EJTAG-MCU-TMS
EJTAG-MCU-TDO
EJTAG-MCU-TCK
EJTAG-MCU-TDI

3CR6

SCL-FE

3CWF

SDA-M1

FCWD
FCWF

FCWC

100K
3CW2

SDA-S

10R

SCL-FE

3CR9

3CUJ

SDA-SRF

FCW4

3CWJ

SCL-M1

FCWB

10K

SDA-DEBUG

1CW7
SCL-SRF

RXD-STANDBY

SCL-MC

22K

DCW6 FCWS

SCL-S

FCWL

2K2

100n
RES
3CWH

FCWK

3CUH
10R

TEST-CON

BM03B-SRSS-TBT

3CWS

1
2
3
4
5
6

SCL-DEBUG

4K7

+3V3
2K2

3CWY

VSS

DCW5 FCWR

2AW0

1CW5
BM06B-SRSS-TBT

1
2
3

4K7

3CWR

1CW8

SDA-SRF
SCL-SRF

100n
RES 3CW6

3CUG

TEST-MOD

SDA-SRF
SCL-SRF

3CWW

22K
2CW5

+3V3
+3V3-STANDBY

4K7

7
8

SD1
SC1

2K2
2K2

100K

3CUF

SCL

3CWV

3CW9 RES

SCL-M3

3CWU

SDA-SSB
SCL-SSB

2CW1

SCL-M3
2K2

SDA-SSB
SCL-SSB

3CW8 RES

2K2

4
5

SD0
SC0

SDA

100n
RES 3CW7

3CW1

SDA-M3

2CW4

+3V3

SDA-M3

3CW0

RES 3CUU

9-1-41

QFU1.1E LA

47R
3CU9

STB-SDA

RESET-FUSION-OUTn

47R
3CUC
47R

SDA-MC

STB-RSTO

SCL-MC

SDA-MC

3CR4 RES
2K2
3CR5 RES

+3V3-STANDBY

+3V3-STANDBY

2K2

Control

2011-12-06

8204 000 9223


19280_041_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 101

B06R, Temperature sensor

Temperature sensor

B06R

47R

47R

SDA

A1

SCL

A2

9TW0
RES
9TW1
RES
9TW2

100n

7
6
5

9TW5
RES

SCL-SSB

3TW1

A0

9TW4

3TW0

SDA-SSB

OS

7TW0
LM75BGD

9TW3

+VS

2TW0

+3V3

GND

B06R

9-1-42

QFU1.1E LA

Temperature sensor

2011-12-06

8204 000 9223


19280_042_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts


9-1-43

QFU1.1E LA

9.

EN 102

B06S, Strap options

B06S

Strap options

B06S

3CP5

NAND-CLE

10K

+3V3-STANDBY

3CP8

RES

F-OEn

F-OEn

10K

FCP6

3CP6
10K

Strap options

2011-12-06

8204 000 9223


19280_043_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts


9-1-44

QFU1.1E LA

9.

EN 103

B07A, LPC debug

LPC debug

B07A

B07A
FNA3

9NA1

+3V3-STANDBY

+3V3-LPC

RES
7NA0
LD1117DT33
OUT

5NA1

9NA2

+3V3-LPC-ANA
30R
2NA8

10n

10n
2NA7

100n

2NA6

100n
2NA5

100n
2NA4

2NA3

22u

2NA1

100n

2NA0

COM

10n

IN

100n
2NA9

+5V-LPC

17

10K

16
18

GND

9NA3
RES

3NA3

9NA4
9NA5

LPC-SDA1
LPC-SCL1
LPC-TXD0
LPC-RXD0

3NA4
3NA5
3NA6
3NA7

100R
100R
100R
100R

1NA7

3NAC
3NAD
3NAE
3NAF

LPC-SDA2
LPC-SCL2
RXD-STANDBY
TXD-STANDBY

BM06B-SRSS-TBT

3NBG

3NBF

47K

10K

100R
100R
100R
100R
3NBH
47K

LPC-USB-CONNECT
3NAG

+3V3

3NAK
3NAL

100R
100R

12
15

RES 18p

19
13

DEBUG MIPS
LPC-TXD2

LPC-SCL2
1
2
3

LPC-SDA2

6NA0
3NB0
3NB1
3NB2
3NB3
3NB4
3NB5

FNAV

47R
47R
47R
47R
47R
10K

3NB6
3NB7
3NB8

100R
100R
10K
9NA7
9NA8

1NA6
1
2
3

1K0

3NBB

SFB-WPn
SFB-HOLDn
POWER-OK
STANDBYn
DETECT12V

6NA1

6 3NAP-3 3

7 3NAP-2 2

8 3NAP-1 1

10K

10K

10K

RES

3NBA
3NB9

LPC-TXD2
LPC-RXD2
+3V3-LPC
RESET-STANDBYn
RESET-FUSION-OUTn

100R
100R

+VDISP

+3V3-LPC

3NBE

LPC-USB-CONNECT

BC857BS(COL)
7NA5-1

10K

FNAP
FNAR

82
85

RXD-SERVICE
TXD-SERVICE

+5V-LPC

LPC-USB-DM
LPC-USB-DP

1NA2
FNA8
FNAD
FNAE
FNA9

LPC-SCL1
LPC-SDA1

FNAG
FNAH
FNAJ
5

BM03B-SRSS-TBT

1
2
3
4
5

502382-0570
3NBJ

FNAA
FNAB
FNAC

LTST-C190KGKT

42
84

10

SFB-EN
47R

1NA3
1
2
3
4
5
6

1NA5
1NA8

3NBK

INA0
INA1

1
2
3

BM03B-SRSS-TBT

LPC-RXD2

SF-SDO
SFB-SI

47R
47R

VSSA

1NA4

LPC-RXD0

3NAW
3NAY

7
VSS

+3V3-LPC-ANA

PROGRAM LPC
FNA5
FNA6
FNA7

27
26

SFB-SCK
SFB-CS

47R
47R

NC

RES

+3V3-LPC

LPC-TXD0

75
74
73
70
69
68
67
66
65
64
53
52
51
50

3NAU
3NAV

VBAT

31
41
55
72
97
83

10K

RES 18p
2NAE

10K

2NAD

10K

10K

3 3NAM-3 6

3NAH
3NAJ

33R
33R

3NAN

7 3NAM-2 2

10K

1 3NAM-1 8

2NAC

+12Vb

10K

9NA9
9NAA

SDA-SSB
SCL-SSB
LPC-USB-DP
LPC-USB-DM

100n

47R
47R
47R
47R
47R

LPC-EJT-RSTN
LPC-EJT-TMS
LPC-EJT-TDO
LPC-EJT-TCK
LPC-EJT-TDI

4 3NAM-4 5

1
2
3
4
5
6

3NAZ
3NA8
3NA9
3NAA
3NAB

46
47
98
99
81
80
79
78
77
76
48
49
62
63
61
60
59
58
57
56
9
8
7
6
25
24
29
30

7NA3-2
BC847BS(COL)

1K0

FNAF
FNAS
FNAT
FNAU
FNAK
FNAL
7

LPC-TRSTn
LPC-TMS
LPC-TDO
LPC-TCK
LPC-TDI

3NBL

LPC-TRSTn

+3V3-LPC
10K

10K

FNA4

3NBC

1K5

14

3NBD

100

FNA2

3NBM

RESET

FNA1

100n

VCC

7NA3-1
BC847BS(COL)

100R

1K0

10K

100R

3NA0-4

3NAT

95
94
93
92
91
90
89
88
87
86
32
33
34
35
36
37
38
39
40
43
44
45
21
20

2NAF

3NA0-3

P1_0|ENET_TXD0
P1_1|ENET_TXD1
P1_4|ENET_TX_EN
P1_8|ENET_CRS
P1_9|ENET_RXD0
P1_10|ENET_RXD1
RTCK
P1_14|ENET_RX_ER
P1_15|ENET_REF_CLK
RSTOUT
P1_16|ENET_MDC
RESET
P1_17|ENET_MDIO
P1_18|USB_UP_LED|PWM1_1|CAP1_0
RTCX1
P1_19|MCOA0|USB_PPWR_|CAP1_1
P1_20|MCI0|PWM1_2|SCK0
RTCX2
P1_21|MCABORT_|PWM1_3|SSEL0
P1_22|MCOB0|USB_PWRD|MAT1_0
P0_0|RD1|TXD3|SDA1
P1_23|MCI1|PWM1_4|MISO0
P0_1|TD1|RXD3|SCL1
P1_24|MCI2|PWM1_5|MOSI0
P0_2|TXD0|AD0_7
P1_25|MCOA1|MAT1_1
P0_3|RXD0|AD0_6
P1_26|MCOB1|PWM1_6|CAP0_0
P0_4|I2SRX_CLK|RD2|CAP2_0
P1_27|CLKOUT|USB_OVRCR_|CAP0_1
P1_28|MCOA2|PCAP1_0|MAT0_0
P0_5|I2SRX_WS|TD2|CAP2_1
P1_29|MCOB2|PCAP1_1|MAT0_1
P0_6|I2SRX_SDA|SSEL1|MAT2_0
P1_30|VBUS|AD0_4
P0_7|I2STX_CLK|SCK1|MAT2_1
P1_31|SCK1|AD0_5
P0_8|I2STX_WS|MISO1|MAT2_2
P0_9|I2STX_SDA|MOSI1|MAT2_3
P2_0|PWM1_1|TXD1
P0_10|TXD2|SDA2|MAT3_0
P2_1|PWM1_2|RXD1
P0_11|RXD2|SCL2|MAT3_1
P2_2|PWM1_3|CTS1|TRACEDATA_3
P0_15|TXD1|SCK0|SCK
P2_3|PWM1_4|DCD1|TRACEDATA_2
P0_16|RXD1|SSEL0|SSEL
P2_4|PWM1_5|DSR1|TRACEDATA_1
P0_17|CTS1|MISO0|MISO
P0_18|DCD1|MOSI0|MOSI
P2_5|PWM1_6|DTR1|TRACEDATA_0
P0_19|DSR1|SDA1
P2_6|PCAP1_0|RI1|TRACECLK
P0_20|DTR1|SCL1
P2_7|RD2|RTS1
P0_21|RI1|RD1
P2_8|TD2|TXD2
P0_22|RTS1|TD1
P2_9|USB_CONNECT|RXD2
P0_23|AD0_0|I2SRX_CLK|CAP3_0
P2_10|EINT0_|NMI
P0_24|AD0_1|I2SRX_WS|CAP3_1
P2_11|EINT1_|I2STX_CLK
P0_25|AD0_2|I2SRX_SDA|TXD3
P2_12|EINT2_|I2STX_WS
P0_26|AD0_3|AOUT|RXD3
P2_13|EINT3_|I2STX_SDA
P0_27|SDA0|USB_SDA
P0_28|SCL0|USB_SCL
P3_25|MAT0_0|PWM1_2
P0_29|USB_D+
P3_26|STCLK|MAT0_1|PWM1_3
P0_30|USB_DP4_28|RX_MCLK|MAT2_0|TXD3
VREFP
P4_29|TX_MCLK|MAT2_1|RXD3
VREFN

100R

TDO|SWO
TDI
TMS|SWDIO
TRST
TCK|SWDCLK

10K

100R

3NAP-4

3NA1

XTAL2

1
2
3
4
5

3NAR

100R
3NA0-2

10K

7NA1
NCP803

23

VDD_REG3V3 VDDA

100R

3NA2

XTAL1

+3V3-LPC

11

+3V3-LPC

VDD

22

18p

3NA0-1

LPC-TDO
LPC-TDI
LPC-TMS
LPC-TRSTn
LPC-TCK

28
54
71
96

1
1NA1
3

2NAB

7NA2
LPC1768FBD100

4
2
24M

18p

1K0

+3V3-LPC-ANA

+3V3-LPC
2NAA

LTST-C190KGKT

3NAS

+3V3-LPC

RES

BM06B-SRSS-TBT
1
2
3

BM03B-SRSS-TBT

BM03B-SRSS-TBT

LPC debug

2011-12-16

8204 000 9222


19280_044_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 104

B07B, Headphone

B07B

Headphone

B07B
+3V3-STANDBY

4
PUMD12
7DH0-2
RESET-HDPHN
3

6
FDH6
2

RESET-FUSION-OUTn

7DH0-1
PUMD12
1
3DH7
10R

2DHA
47p

6
22K

3DH1-3

3DH1-4

22K

22K

3DH1-2

1 3DH1-1 8

22K
2DHB
47p +3V3

7
3

1DH5

100n

3 3DH3-3 6

3 3DH2-3 6

33R
3DH3-1
33R

FDH2
22n

VIA
GND GND_HS

4V 100u

10
11

2
1DH4
3
1
MSJ-035-12D-B-AG-PBT-BRF

FDH5

FDH3

IDH7

10K
22K

RESET-HDPHN

2 3DH3-2 7

22n
2DH9

BYPASS

IDH9

CDS4C12GTA
12V
2DH8

SHUTDOWN

2DH7

9DH1

6DH2

VO
7

FDH1

33R

RES

IDH8

4V 100u

1u0

IDH6

9DH0

CDS4C12GTA
12V
1DH3

2DH5

6DH1

IN-

RES

IDH5

AMPLIFIER

1DH2

10K

2
5 3DH2-4 4

1K0

10K

1
5102-Z4R-J47-59
FDH4

1u0

8 3DH2-1 1

33R
4 3DH3-4 5

1K0
3DH4-1

HPHOR

2DH4

2DH6

3DH4-4

1u0

IDH1

2DH3

IDH4

HPHOL

IDH3

VDD

IDH2

2DH2

2
7DH1
TPA6111A2DGN

RES 3DH6

9-1-45

QFU1.1E LA

HPHOL

9DH2

HPHOR

9DH3

Headphone

2011-12-16

8204 000 9222


19280_045_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 105

B07C, Internal USB

Internal USB

B07C
9EHE-1
9EHE-2
9EHE-3
9EHE-4

RES
RES
RES
RES

DBG
6EH1

330R

7EH2
RT9715EGB

IEH2

4u7

EN

FB

UVLO
L

IEH0

100u 6.3V
2EHV
100n

10

12
13

IEH1

22u

VAUX

22u
2EHT

PS

1n0

2EHU RES

100n

100n
2EHE

100n
2EHD

100n
2EHC

2EHB

100n

5EH0

VOUT

3EHR

VIN

330K

8
22u

2EHR

9EHC

7
2EHA

RES 2EHY

7EH4
TPS61200DRCG4

+3V3-USBN

9EH5

RES 9EH6

+5V +3V3

3EHS

ON
ON

GND_HS
VIA

ON
OFF

PGND

OFF
ON

external regulator
internal regulator

+3V3-LAN

11

9EHC

FEHA

GND

GND

9EH5

VOUT

WIRED NETWORK STANDBY ONLY

9EH6

EN
EN

10u

2EHM

FLG

10u

ENABLE-WOLAN

VIN

2EHL

+3V3-WIFI

LTST-C190KGKT

3EHL DBG

2EHS

B07C

22K

9-1-46

QFU1.1E LA

+3V3

+3V3

10K
15
16
19

3EHD
10K

+3V3

28
17
22
23
8

3EHE
3EHF

10K
100K

680R

RES

100n

3EHG

+3V3-USBN
2EHK

10K

12
13
20

3EHC

RESET-FUSION-OUTn

1n0

RES

2EHH

+3V3

RESET-FUSION-OUTn

3EHH

10K

21
VCC_D

120K

3EHP

22K

2EHJ
SDA

DD2DD2+
OVR2
NC4
NC5
NC6

TEST|SCL

NC1
NC2
NC3
VREG
RESET
SELFPWR
GANG
RREF

3EHT
+3V3

26

3EHK

RES
10K

+3V3

18

VIA1
VIA2
VIA3
VIA4

3EHV
IEHJ
22K

100n

100K

+3V3

3EHB

USB-SET-DM
USB-SET-DP

3EHJ

6
7
24

USB-WIFI-DM
USB-WIFI-DP

+3V3-WIFI

cEH0

10K

1
2

10n

3EHA

DD+

DD1DD1+
OVR1

22K

2EHW

+3V3

XOUT

3EHU

47n

RES 9EH3

3
4
25

2EH9

7EHJ
BC847BW

2EHN RES
+3V3-LAN

9EH4

18p
USB-CAM-DM
USB-CAM-DP

XIN

RES

11

GND_HS

2EHG

30
31
32
33

+3V3

USB-WIFI-DM
USB-WIFI-DP

RES 7EH3
BC857BW
USB-SET-DM

USB-SET-DP

9EHA

9EHB

RES 9EH8-1
RES 9EH8-2
RES 9EH8-3
RES 9EH8-4

9EHD

IRQ-WOLANn

29

10

5
VCC_A_1
9
VCC_A_2
14
VCC_A_3

7EH1
CY7C65634-28LTXCT

VCC

12M

NC

1EH1
3225

18p

27

2EHF

1C31
FEH1
FEH2
FEH3
FEH4
FEH5

1
2
3
4
5
6
7
8
502386-0670

3EHM
47R
RES

USB-WIFI-DM

100n

RES 3EHN
+3V3-LAN
10K
RES 2EHP

USB-WIFI-DP

100n
1C30
USB-CAM-DM
USB-CAM-DP

FEH6
FEH7
FEH8
FEH9

+5V

1
2
3
4
5

502386-0570

Internal USB

2011-12-16

8204 000 9222


19280_046_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts


9-1-47

QFU1.1E LA

9.

EN 106

B07D, Common interface

Common interface

B07D

B07D

3PA1
+5VCA

+3V3

+T 0R4

2PA2

7PA1
74LVC245ABQ
1
19
3PA3

CA-MOVAL
CA-MOSTRT
CA-MDO0
CA-MDO1
CA-MDO2

3PA8-2
100R 2

3PA8-3
100R 3

3PA8-1
100R 1

3PA8-4
100R 4

VCC
3EN2
3EN1
G3

+3V3

2
3
4
5
6
7
8
9

100R

20

100n

18
17
16
15
14
13
12
11

MOVAL
MOSTRT
MDO0
MDO1
MDO2

MOVAL
MOSTRT
MDO0
MDO1
MDO2

3PA6
3PAA-1
1

10K
8 3PAA-2
2

+3V3

10K
10K
7
3PAA-3
3

10K
6
3PAA-4
4

10K
5

1P00
CA-D03
CA-D04
CA-D05
CA-D06
CA-D07
CA-CE1n
CA-A10
CA-OEn
CA-A11
CA-A09
CA-A08
CA-A13
CA-A14
CA-WEn
CA-RDY

21

10

GND GND_HS

+3V3
2PA3

19
3PA2

CA-MOCLK

100R

3PA9-1
100R
8

3PA9-2
7

3PA9-3
100R 6
2 100R

3PA9-4 5
100R

3PA4

100R

VCC
3EN2
3EN1
G3

+5VCA

+3V3

1
2

18
17
16
15
14
13
12
11

MOCLK
MDO7
MDO6
MDO5
MDO4
MDO3

MOCLK
MDO7
MDO6
MDO5
MDO4
MDO3

3PA5

CA-MIVAL
CA-MICLK
CA-A12
CA-A07
CA-A06
CA-A05
CA-A04
CA-A03
CA-A02
CA-A01
CA-A00
CA-D00
CA-D01
CA-D02
CA-WP

10K

3PA7
10K
3PAB-3
3

10K
6

3PAB-2
2

10K
7

3PAB-1
1

10K
8

3PAB-4
4

10K
5

GND GND_HS
21

+3V3

CA-CD1n
CA-CD2n
CA-VS1n
CA-WAITn

DBG
10K

CA-MDI6
CA-MDI7

3PAC
10K

3PC1

10K

DBG

+3V3

3PC0

CA-MDO7
CA-MDO6
CA-MDO5
CA-MDO4
CA-MDO3

2
3
4
5
6
7
8
9

100n

20

7PA2
74LVC245ABQ
1

10

2PA1

22u 16V

+5V

3PAD

3PAE

10K

10K

3PAF
10K

CA-CD1n
MDO3
MDO4
MDO5
MDO6
MDO7
CE2n
CA-VS1n
CA-IORDn
CA-IOWRn
CA-MISTRT
CA-MDI0
CA-MDI1
CA-MDI2
CA-MDI3
+5VCA

+3V3

CA-RST
CA-RDY
3PAL

CE2n
REGn
CA-CE1n

33R

CA-IORDn
CA-IOWRn
CE2n

REGn

RES
9PAA

CA-CE2n
RES
9PAB

CA-OEn
CA-WEn

DBG
1C32

3PAM
100K
3PAP

1
2
3

3PAN
10K

CA-MDI6

5
CA-MDI7

10K
RES 3PAS
10K
RES 3PAU
10K

CA-REGn

BM03B-SRSS-TBT

3PAR RES
10K
3PAT RES
10K

CA-MDI4
CA-MDI5
CA-MDI6
CA-MDI7
MOCLK
CA-RST
CA-WAITn
CA-INPACKn
REGn
MOVAL
MOSTRT
MDO0
MDO1
MDO2
CA-CD2n

3PAV RES

71 69
72 70

10K

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68

92789-055LF
CA-WP
CA-INPACKn

3PAW RES
10K

3PAY RES
10K

Common interface

2011-12-16

8204 000 9222


19280_047_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts


9-1-48

QFU1.1E LA

9.

EN 107

B07E, FPGA - power & control

B07E

FPGA - power & control

B07E

5GG1
+3V3

FGG1

6GG1

VAUX
DONE

DBG 3GG1

DBG

+3V3

470R

LTST-C190KGKT

7GG1
PDTC144EU
2 DBG

220n

2u2
RES 2GG7

2u2
2GG6

2u2
2GG5

2u2
2GG4

2u2
2GG3

2GG2

2u2

RES 2GG1

30R

7GG6
LD1117DT12

+3V3

FGG3

220n

220n
2GGM

220n
2GGL

2u2
2GGK

1
2
3
4
5
6

RES

2u2
2GGJ

2GGH

1GG1

VCCO3

30R

CCLK
CSO-B
MOSI
MISO
PROG-B
7

MOSI
CCLK
CSO-B

7GG2
M25P40-VMN6
VCC

FGG8

FGG9
FGGA

100n

IGG2
Q

S
HOLD

2GH7

10R

4K7 RES

3GG2
5GG2
+3V3

3GG3

FGG7

220n

220n
2GGG

2u2
2GGF

2u2
2GGE

2u2
2GGD

2GGC

22u

22u
2GGB

VCCINT
2GGA

COM

MISO

FGG2

10u

OUT

100n

2GG8

IN

2GG9

+3V3

502382-0670

GND
4

5GG3

FGG4

+3V3

VCCO2

220n

220n
2GGS

2u2
2GGR

2u2
2GGP

RES 2GGN

30R

PROGRAMMING
ENGINEERING

FGGB

6SLX4-4MB-M25P40
6SLX9-4MB-M25P40

+3V3
FGG5
4

VCCO1
1

3GG5 RES

FPGA-SYS-CLK

47R

FPGA-LED1
FPGA-LED2

VALUE

47R
1K0

3GG8

1M0
3GG9

3GG7

4
3

10p

2GHA

12M

5 330R 4
LTST-C190KGKT

6 330R 3

DBG 3GG4-4
DBG
6GG5

7 330R 2

8 330R 1

DBG 3GG4-3
DBG
6GG4

RES

47R

LTST-C190KGKT

3GG6

LTST-C190KGKT

DBG
4

6GG2

1
NC

1GGA
3225
2 NC

10p

RES

5
1

220n

220n
2GH6

220n
2GH5

2u2
2GH4

+3V3
7GG5
74LVC1GU04GW
2
4

NC

2GH9

RES

2u2
2GH3

2GH2

+3V3
7GG4
74LVC1GU04GW
2

DBG

VCCO0

30R

DBG 3GG4-2

FPGA-LED3
DBG 3GG4-1

FGG6

FPGA-LED0
IGG1

100n RES

2GH8

5GG5
+3V3

7GG3
3225 RES

6GG3

220n

220n
2GH1

220n
2GGY

2u2
2GGW

2u2
RES 2GGV

2GGU

30R

LTST-C190KGKT

5GG4
+3V3

FPGA-SYS-CLK

AMBI-SPI-CCLK

2 9GG1-2 7

AMBI-SPI-OUT-CCLK

AMBI-SPI-MOSI

4 9GG1-4 5

AMBI-SPI-OUT-MOSI

AMBI-SPI-MISO

3 9GG1-3 6

AMBI-SPI-OUT-MISO

AMBI-SPI-CSn

1 9GG1-1 8

AMBI-SPI-OUT-CSn

3D-LR

BL-SPI-CS_BL-I-CTRL

9GG2 RES

3D-LED_3D-RF

9GG3 RES

3D-LR-DISP

9GG4

BL-I-CTRL

FPGA - power & control

2011-12-16

8204 000 9222


19280_048_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 108

B07F, FPGA - I/O banks

FPGA - I/O banks

B07F

B07F
7GF1-1
XC6SLX4-2TQG144C0100

BANK0
9GF1 RES 144
143
142
141
140
139
138
137
134
133
132
131

20
36
53
90
129

VCCINT

19
28
52
89
128

VCCO0

122
125
135

VCCO_0

VCCO1

76
86
103

VCCO2

42
63

VCCO3

4
18
31

GND

VCCINT

PWR_GND

VCCAUX

VAUX

VCCO_3 VCCO_2 VCCO_1

7GF1-6
XC6SLX4-2TQG144C0100

3
13
25
49
54
68
77
91
96
108
113
130
136

IO_L1P_HSWAPEN_0
IO_L1N_VREF_0
IO_L2P_0
IO_L2N_0
IO_L3P_0
IO_L3N_0
IO_L4P_0
IO_L4N_0
IO_L34P_GCLK19_0
IO_L34N_GCLK18_0
IO_L35P_GCLK17_0
IO_L35N_GCLK16_0

IO_L36P_GCLK15_0
IO_L36N_GCLK14_0
IO_L37P_GCLK13_0
IO_L37N_GCLK12_0
IO_L62P_0
IO_L62N_VREF_0
IO_L63P_SCP7_0
IO_L63N_SCP6_0
IO_L64P_SCP5_0
IO_L64N_SCP4_0
IO_L65P_SCP3_0
IO_L65N_SCP2_0
IO_L66P_SCP1_0
IO_L66N_SCP0_0

127
126
124
123
121
120
119
118
117
116
115
114
112
111

7GF1-2
XC6SLX4-2TQG144C0100

BANK1
105
104
102
101
100
99
98
97
95
94
93
92

IO_L1P_1
IO_L42P_GCLK7_1
IO_L1N_VREF_1 IO_L42N_GCLK6_TRDY1_1
IO_L32P_1
IO_L43P_GCLK5_1
IO_L32N_1
IO_L43N_GCLK4_1
IO_L33P_1
IO_L45P_1
IO_L33N_1
IO_L45N_1
IO_L34P_1
IO_L46P_1
IO_L34N_1
IO_L46N_1
IO_L40P_GCLK11_1
IO_L47P_1
IO_L40N_GCLK10_1
IO_L47N_1
IO_L41P_GCLK9_IRDY1_1 IO_L74P_AWAKE_1
IO_L41N_GCLK8_1 IO_L74N_DOUT_BUSY_1

88
87
85
84
83
82
81
80
79
78
75
74

7GF1-3
XC6SLX4-2TQG144C0100

BANK2
3GF7

VCCO2

DONE

1K0

DONE
CCLK
AMBI-SPI-CCLK
AMBI-SPI-MOSI
MISO
MOSI
AMBI-SPI-MISO
AMBI-SPI-CSn

FGF1
3GF1
IGF2

10R

3GF2

10R

9GF2
FPGA-LED3
FPGA-LED2

72
71
70
69
67
66
65
64
62
61
60
59
58
57

IO_L30P_GCLK1_D13_2
CMPCS_B_2
DONE_2
IO_L30N_GCLK0_USERCCLK_2
IO_L1P_CCLK_2
IO_L31P_GCLK31_D14_2
IO_L31N_GCLK30_D15_2
IO_L1N_M0_CMPMISO_2
IO_L48P_D7_2
IO_L2P_CMPCLK_2
IO_L48N_RDWR_B_VREF_2
IO_L2N_CMPMOSI_2
IO_L49P_D3_2
IO_L3P_D0_DIN_MISO_MISO1_2
IO_L49N_D4_2
IO_L3N_MOSI_CSI_B_MISO0_2
IO_L62P_D5_2
IO_L12P_D1_MISO2_2
IO_L62N_D6_2
IO_L12N_D2_MISO3_2
IO_L64P_D8_2
IO_L13P_M1_2
IO_L64N_D9_2
IO_L13N_D10_2
IO_L65P_INIT_B_2
IO_L14P_D11_2
IO_L65N_CSO_B_2
IO_L14N_D12_2
PROGRAM_B_2

56
55
51
50
48
47
46
45
44
43
41
40
39
38
37

FPGA-LED1
FPGA-LED0
FPGA-SYS-CLK

3D-LR-DISP
3D-LED_3D-RF

IGF1 2GF1

100n
RES

3GF8
3GF9

10R
10R

3GF3

10R

3D-LR
SCL-SSB
SDA-SSB
CSO-B
PROG-B

FGF9

7GF1-4
XC6SLX4-2TQG144C0100

BANK3
FGF2
VAUX

10K

10K

3GF4

3GF5

CTRL-DISP2
AMBI-SPI-OUT-CSn
AMBI-SPI-OUT-MISO
AMBI-SPI-OUT-MOSI
AMBI-SPI-OUT-CCLK

RES

3GFA
10R

FGF3
7GF1-5
XC6SLX4-2TQG144C0100

MISC
DBG
1GF1

DBG
1GF2
1
2
3
4
5
6

FGF7

8
2GF2

FGF8
FGF4
FGF5
FGF6

100n DBG

9-1-49

QFU1.1E LA

VAUX

1
2
3
4
5
6

109
110
107
106
73

35
34
33
32
30
29
27
26
24
23
22
21

IO_L1P_3
IO_L43P_GCLK23_3
IO_L1N_VREF_3 IO_L43N_GCLK22_IRDY2_3
IO_L2P_3
IO_L44P_GCLK21_3
IO_L2N_3
IO_L44N_GCLK20_3
IO_L36P_3
IO_L49P_3
IO_L36N_3
IO_L49N_3
IO_L37P_3
IO_L50P_3
IO_L37N_3
IO_L50N_3
IO_L41P_GCLK27_3
IO_L51P_3
IO_L41N_GCLK26_3
IO_L51N_3
IO_L42P_GCLK25_TRDY2_3
IO_L52P_3
IO_L42N_GCLK24_3
IO_L52N_3
IO_L83P_3
IO_L83N_VREF_3

17
16
15
14
12
11
10
9
8
7
6
5
2
1

3GFB

RES
10R

BL-DIM1
BL-DIM2
BL-DIM3
BL-DIM4
BL-DIM5
BL-DIM6
BL-DIM7
BL-DIM8
BL-I-CTRL
BL-DIM
BL-SPI-CS_BL-I-CTRL

TCK
TDI
TMS
TDO
SUSPEND

SD51022

FPGA - I/O banks

2011-12-16

8204 000 9222


19280_049_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts


9-1-50

QFU1.1E LA

9.

EN 109

B07G, CPLD

B07G

CPLD

B07G

5GC1

FGC1
VINT

+3V3

5GC2

100n

100n
2GC3

2GC2

1u0

2GC1

30R

FGC2

+3V3

VIO
100n

5 330R 4
LTST-C190KGKT

DBG
3GC9-4
DBG
6GC4

6 330R 3

4
17
25

LTST-C190KGKT

AMBI-SPI-OUT-CCLK
AMBI-SPI-OUT-MISO
AMBI-SPI-OUT-MOSI

DBG
3GC9-3

33R

DBG
6GC3

3GC6

7 330R 2

33R

LTST-C190KGKT

TCK
TDI
TDO
TMS

3GC4

CPLD-LED0
CPLD-LED1
CPLD-LED2
CPLD-LED3

DBG
3GC9-2

19
20
21
22
23
27
28

GND

+3V3

3D-LED_3D-RF
CPLD-LED0
CPLD-LED1
CPLD-LED2
CPLD-LED3

33R

8 330R 1

3GC2

DBG
6GC2

10p

1n0

2GC7

10K
2GC6

3GC7 RES

11
9
24
10

BL-DIM
3D-LR

LTST-C190KGKT

33R
AMBI-TEMP

IXO4_19
IXO4_20
IXO4_21
IXO4_22
IXO4_23
IXO4_27
IXO4_28

IXO2_29
IXO2_30
IXO2_31
IXO2_32
IXO2_37
IXO2_38

9GC2

DBG
3GC9-1

29
30
31
32
37
38

3GC3

AMBI-SPI-OUT-CSn

IXO2_36|GTS1
IXO2_34|GTS2
IXO2_33|GSR

5
6
7
8
12
13
14
16
18

DBG
6GC1

36
34
33

IXO3_5
IXO3_6
IXO3_7
IXO3_8
IXO3_12
IXO3_13
IXO3_14
IXO3_16
IXO3_18

10p

33R

IXO1_2
IXO1_3
IXO1_39
IXO1_40
IXO1_41
IXO1_42

10p
2GCB

3GC1

2
3
39
40
41
42

10p

AMBI-SPI-CSn
AMBI-SPI-MOSI
AMBI-SPI-MISO
AMBI-SPI-CCLK

VCCINT VCCIO
IXO1_43|GCK1
IXO1_44|GCK2
IXO1_1|GCK3

2GC9

43
44
1

9GC1

FPGA-SYS-CLK

15
35

7GC1
XC9572XL-10VQG44C0100

VIO

26

VINT

RES 2GCA

2GC5

1u0

2GC4

30R

DBG
1GC1
1
2
3
4
5
6

FGC4
FGC5
FGC6
FGC7
+3V3

100n

8
DBG
2GC8

FGC3

CPLD

2011-12-16

8204 000 9222


19280_050_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 110

B07H, AmbiLight

AmbiLight

B07H

470p
3AA1

3AA2

100R
2AA7

GND-AL

9AA2

100n
RES

47R

IAA1

AMBI-SPI-OUT-MOSI

IAA2

AMBI-SPI-OUT-CCLK

IAA3

AMBI-TEMP

1u0

3AA3

47R

2AA6

30R

100n

5AA2

2AA5

FAA4
FAA5
FAA6

IAA4

2AA2

9AA1

RES

FAA1
FAA2
FAA3

FAA7

100n

20

10u
2AA9

AMBI-POWER
RES 2AA8

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18

2AA1

1A04

470p

1u0

2AA3

+3V3AL

19

GND-AL
GND-AL

1u0

2AAA

+3V3AL

1A05
IAA5

9AA3
RES

5AA3

30R

IAA6

GND-AL

20

GND-AL

9AA5
RES

100n

IAA7

10u
2AAC

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18

RES 2AAB

B07H

19

9-1-51

QFU1.1E LA

GND-AL
5

AmbiLight

2011-12-16

8204 000 9222


19280_051_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts


9-1-52

QFU1.1E LA

9.

EN 111

B07I, Interconnect

B07I

Interconnect

B07I

+3V3-STANDBY

3CL0

CA-IOWRn

CA-IOWRn

10K

+3V3-STANDBY

3CL1 RES
10K

3CL2

CA-WEn

CA-WEn

10K

3CL3 RES
10K

CA-OEn

3CL4
10K

+3V3-STANDBY

3CL5

CA-IORDn

CA-IORDn

10K

+3V3-STANDBY

3CL7

3CL6 RES
10K

RES

CA-A14

CA-A14

10K

3CL8
10K

Interconnect

2011-12-16

8204 000 9222


19280_052_120322.eps
120322

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 112

2UA6
3UAA

3GM1

3UA1
2UA8

2EJ7

2URC

2URD

2UR8

2FZ3

3CTT

3UA7

3UA8

9UA0

3UAB

7UA3
3UAE

7UA1

3UAG

3UAJ

7UA0

1M11

1UA1

7UF8

3UF1

3UAM

7UAE

1A05

5AA3

2AAB

2AAC

2GC9

9AA2

2AA9 2AA7

1A04

3GC9

2EHE

9EHB

9EHA

2EHN

9EH5

2EHK

2EHA

3EHK

3EHA

3EHB

3EHE

3DH6

2DHB

2DH5

9DH2

2DH6

2EHP

3DH1
3DH2

9DH0

2DH2

7DH1

2DHA

2DH4

2DH3

2DH8

3DH3

2DH7

7DH0

2PA1

3EHG

3EHC

1DH5 1C30 1C31

3EHT

3EHP

2EHD

9EH3 3EHD

1DH4

7NA3

9EHE

3EHM

7EH1

2EHH

9EH4 2EHC

1NA4

1DH3

6NA0

2EHW

9EHD

6DH2 1DH2 6DH1

6NA1

3EA8

3EA7

3EAD

3NAT

5EH0

2EHV
2EHU

3EHH

3DH4

3NAZ

3NA8

3NA9

3NAA

1GC1

3EHS
3EHR

3EHV 2EHJ

9DH3 9DH1
3NBC

3EAC

2EHS

7EHJ

2GHA

2GH9

7EA0

1E03

2GC2

9GC2

2GGB

9GG1

2EHR

7EH4

1NA7

2EAA

2AA1

3GG7 3GG9

1GGA

2UWH

2AA2
3AA2

6GC4

9GG3

9GG2

3GG6

7GG5

7GG4

2GH8

2UWM

1E02

1GF2

2GC5

2GC4

2GCA

3GC6

2GC7

3GC3

2GCB

3GC2

3GG8

2EAB

2UW5

2UW4

7UW1

2AA3

6GC2
6GC3

3AA3

3GG5

3DH7

2UWL

2UWN

3UW8

2UWP

2UW1

3GC4

9GC1

2DH9

1H05

2UWF

3UW7

2UW0

2UWY

3DY0

2UWE

6GC1

7GC1

6GG5

7GG3

1CTZ

1P00

9JA1

2GC3

6GG4

3NAB
3UW2
2UW2

2UWD

2GC6

2GC1

3GC1

6GG3

1NA3

2UWC
3UW3

5UW4

2UW9

3GC7

5GC1

INA0

3CU5

2GC8

2GGA

6GG1

3CT0

1CWD

3CU3

3GFB 9GG4

3CP6 3CP8

7CT3

INA1

3CWT

2UWJ
3UWH 3UWG

2UWB

5UW2
2UW7

2UW6

3HA1

6DY0

3UFF

3UF2

3CVT
3CTS

3CW8

3CT1
3CT4

3CT5

9AA3

3CT2

2JA3

1CT7

3CWS

2UWA

7UW0

1DY1
2DY1
2DY0
3HDE

9JA6
3CWD

3HAL

7HA0
3HBF

3HBE

3HBH

3HBG

3HBL

2VC6

6VC3

3HBD

2HA5

3VC6 2VC8

1H04

3CTH

3HAV

9HD2

1J50

2FZ5

3CWK
9UW0

1CW5

2UV6

1CW9 1CW8

7UV0

2UV7

7UW2
2UWU

2UWR

2HA2
2HA1
3HA0

3CT3

2AAA

1GF1
5GC2

3HAW

3HDT

3HDB

2FZ6
3UV6

3HW6

3HW2

3HW1

2EFS 5EF0

5EF4

3EFT 2EFT

3EFR

3EFN

3EG0

3EFP

3EFS

3EFV

3EFU

2EFG

6EF1
6EF0
2HA6

3HAN

3HBM

3CR3 3HBN

3CUP

3CUN

3CUR

2UWS

6UW0
2UWT

3GY3

2UAS

1GG1

3CTU

3CTJ

3CT8

7JA0

9JA3

3GY7

6UAE
3CTV

3CTR 2CT3

6GG2

2VC3

1VC4

6VC7

2VCA 3VC7 2VCB

3HB9
3HBB

3HBK

1VA6
2VC9

3CR8

9JA5

3UWA

3HBA
3HBC

3CTZ
3CTK

3EW0

9JA4

3GY8

2GYB

3CTW

7CT1

3CTP

2CT4

2UWV

2GYD

2GYC

6UAB

3VWC

3CU0

DCW4

3HB8

3VWB

2GYE 3GY9

5UAA

1NA2

3CWH

3CUD

3UWD

3UWF 3UWC

3UAW

3VW9 3VWA

3VWD 3VW8

2CW3

3CW2 3CR4

3VC3

3HB7

1VC7 6VC6

7HD0

5FS2

2FS4
3CTA

3EF5

3UWE 2UWW

9TW1

3HB6

1VC8

1M54

2VWF

6HA0

9TW0

3HB5

2HD6

5FS1

3HW4

1C32

3VWL

2GYF 3GYA

2UAR

3CUE

9TW2

6VC4

2GYH 3GYD
2GYG 3GYC

2UAP

1NA8
3CTB3CWE 2CW1

3CU4

2VC4

1VC5

7UF3

3UFA

1NA6

3VWP

1NA5

3VWH

7UAC

9VW5

9VW6

3VW6
3VW4 3VWJ

2VWJ

2VWG

3CW9 3CR5

2FS3

3CUA

3EF0

7EF0

2TW0

3HBJ

2VC7

2J42
5J05

3J50

3J09

3EE2

2EF9

3EF2

2EFZ

3EFM

2CS0 2CS3

2EFJ

1CW4 1CW6 1CW7

3VC4

3FZ0

2FS2

2FS1

6EF2

2EFM

2EFL
2EFK
3CUK

3CUS

3CR6

3UWB

1VA4

2UF2

3UFV

3CVS

2VW3

3VW3

2CW2

3CR7

3EF3

6UW1

2VCD

9TW5

7HA1

3VC9

2J41

3EFY

2HAB

2VC5

3VC5

2VC0

3CUT

5EF1

2EFB 2EFC

9TW3

7TW0

2HA9

3VC0

2EFN

5EF3
1CS1
3TW1

1VC1
6VC0

3CUV
3CUU

2UAB

2UR9

2VW4

3VW5

3CTF
2CS2

3CUM

3CUL

1J00
2J10 2J11

2CS1

7CW1

1M99

3UGB

2EJ2 3EJ0

3VWE

3CW0

3CUW

3CUY
2CW6

2UAU

3CVA

2VW5

3VWR

3KW6

3KW4

3KW8

3KW2

3RW6

3RW2

3RW4

3RW8

2VWD
2VWC

2VWH

1EF0
2EFH

3CS3

1CS0

3TW0

1E06

6VC1
1VC2

1VA8
6VC5
1VC6

3CS1

3CS0

2EFR
3VC8

2VCC

6CS1 6CS0 3CS4

3VC1

2VC1

9TW4

3EG3
3EG2

3VC2

2UA9

2UAA

3CVJ

2EA9

2VC2

6VC2
1VC3

9UA1

2UAV

3UR6

3UR7

3UR4

2UR2

2UR3

7URA
2UR1

3UR3

2UR6

2UR7

2UR5

5UR3

5UR1

5UR2

2EJ3

3UR5

3URC

3URB

2URG
2URE

2URB

2EJ5

2J3H

2EFA

9CS1

3CS2

3UAH

2GYJ 3GYB

2J3F

2EFP

7CS1

3UA9

3UAC

3CV4

3VW7

1CWE

2UAD
3UAD
2UAJ

2VW8

3EJ1

2VWE

2EFU

2UA1

3UGE

1UA2

7J00

9VW4
3VWV

3VWK

3EG1

3UA0

3UGC

7UF7

3CVH

3VWW

2VWB

2URH

2URJ

7UF6
3CV5

DB17

2VWK

3EFW

3UAF

7UF5

3CVU

1E00

2UA3

2UA2

3CVB

2VW1

3J2U

2EJ4

3EJ2
2VW2

3CV6

3VWM

DB09

DB00

3VWN

DB71

2EJ6

9CV1

9CV0
DB11

3VWS

2J59

2KCR

DB12

1CV2

7J03

7EJ0

2URA

5UR6

3CVM

3J2Z

DB10

DB61

3CVN

2EJ1

DB22

DB03

5UR5

DB79

DB26

2J31

2FA0

5RA1

DB73

1CWC

DB78

DB84

2J3D 2J30 2J29 2J2T 2J2V 2J2Z

2J39

2J3K

2RBK

2RB1

DB25

9GVF

9GVE

9GVD

9GVC

9GV9

9GVA

2J3J

9GVB

3CV2

3CV9

9GV8

3GD8

3GD9

3CV7

3CVG

3CVF

2CV7

2UR0

DB43DB42

2CVW

2UR4

DB63

3URA

7UR6

3CVY

2J1G
DB40

3URF

2URF

7CVW

DB56

3CVW

2J1J

DB41

2J1E 2J14 2J82 2J20 2J1V

7J01

2UP8

2J7S

2J21DBA5

DB48

DB53

3UAK

6UAA

2J24

3J3V
3J3Y 3J43
3J42

3J20 3J2R
3J21 3J2Q
3J2E
3J2F

DBA2

3J48
3J49

7J04

DB19

2RC6

2RC7

3RA0

7RA1

3RA1

2RB4

9RB0

2RBL

3J1H

3J44 3J4E
3J45 3J4F

3J3A
3J3B

DB21

7RC2

1M95

3GM2

3UA2
2UA7

1CWA

2UF9

2J2W 2J33 2J2U 2J2D 2J2J 2J37

2KCK

2RC8

6RA0

3KC1

2RBP

3RB12RBN

3KC0

2RBS

2RBR

2RB2

3J1G

2UP0

2J35

1FA0

3FA1 5FA7

3UP7

2J1H 2J1B 2J1R 2J7T

5UP1

3J13

3UP1 3UP6

DB32

DB31

3J10

3J3L
3J3M

2RC9

2FAA 2FA9
2RB6

3FA2 5FA6

3UP4
2UPA 3UP5

1T71

3GS6

3GS7

3GD2

3GD1

3GS3

3GD7

3GD6

7GD1

3GS2

7GS2

3GS4

1GS1

3GS5
3GM3

3GM4

3UA3

2JW2

2J27

2J92

DB93

2UP7

2UP4

2UP1

3J3R

3J40
3J41

3J3U

3J36 3J3S
3J37 3J3T
3J3C

3J3H

3KC2

2KCJ 3KC7

3J3G
3KC3

3J3D

7KC0

3KC9

3KC8

3KA1 5KC0 2KCD

2TA3 5TA1

1TA1

2GV8

2GV7

2GV6

2GV5

2GV3

2GV4

2GV1

2GVR

3GVH

2GVA

3GV9

3GVA

2GVK

2GVL

2GVF

2GVC

3GV0 2GVH

3GVE

3GV8

3UA4

2UA0

2JW1

3J24
3J25
3J1R
3J1Y

3CV8

3UC4

3UCV

3UCS

2J08

3J1B
3J1A

3J47
3J46

3KC4

2KCB

9KC0 2KCE 3KCA

9FA0

7UP1

2UP2

5UP2

9RB6
2RBA

7RA0

2RBW

5HD5

2UA5

1CWB

1UP1

7J02

1FA2

1FA1
9FA1

9KC1 2KCF 3KCB

3FA4 3FA3

5FA5 5FA4 5KC9 5KC8

2FAG 2FAH

2FAB 2FAC

1KC0

3KA0 5KC1 2KCG

2RB5

2RB3

3GS1 2GS5

7UA2
2J95

5J0R

2UCG

3UP2 2UPB
2KCC

2RB7

2RBB 2RB9

9RB8 2RBY

2RBG

2RBV

9RB7

1RA0

9RB9

2RBU 3RB3

2RCA

3RB0
2RBE

2RBC

2RBT

2RB8

2RBD

1E01

7GS4

2GS4

1UA0

3J1W

3KA3

1H01

3TA1

2UCL

3GD5

7UC7

1F00

5RA2

3GV4

2UCW

1CV1

3J1Z

1H02

7GS5
2GS3

2UBP

2VA8

3FA0

1H03

7GS3

2UA4

3D54

2UP9

2RBJ

6GD1

3TA2
2TA2

5TA2

2UBN

2UBT

3UD2

7UC4

2RCB

3GD3

7GM1

DB34

2RBM

2GD8

9UC1

5D51

2VAA

2RBF

3GVD

3CVL

3CVK

2UCJ

6UC2

7GS1

2GS1
2UCK

7UC2
2UCF

2UCC

2UC1

2UCA
2UCB

5UB7

6GS1

3GVC

2GD9

9AA5

2UCT

3GVG

2GD72GD62GD42GD3 2GD22GD1

9GS1 9GS2

2AA8 2AA5

7UB5

2UBS

1G53
2GD5

2GS2

2UAT

2UC0

2GV9

2TA1

3CYV

1C21

2UPK

6UP5

3UPE

3UPB

3CYF

5D85

1D52

1D50

1D51

5D77

2D55

5D75
5D71

3UB92UBW

3D63

5UC2

2UBK

2UCS

2FA5
2FA6

2RBH

5UC0

3UC3

7UC3

2UBM

2UBY

2D65

2D67

2D77

7D50
3D55

9D53

3D56

2D74

9D52

3D71

9D54

2D72

9D55

3D76

3D77

2UBL
3UB8 3UB6

1G50
9GV3 2GV2

2J25

3VAA
2VAC

2UCY

2UPF

5UB5

2UBV

3D72

2D95

2D71
2D94

3D50 3D60 3D61

2D86

5D78

5D74

5D70

2D61

3D73
9D50

2D93

3D57

ICY7

2UPG

2UPM

2D59
7D71
2D58
7D70
2D57
2D63

2D69

3CYS

3CYU

IUPE

3UCJ 3UC5

2VAF

2UPD

3D62

3D51

2D53

2UPC

7UP22UPJ

2UPE

1G51

3CYR

9GD1

3UD0

1VAL
1VAK
1VAJ
1VAH
1VAG

6VAF

3VAD
2VAG

7D60

9D51

5UP5

5D79

2D85

3D70

5D80

2D89 2D83

3D52 2D52
2D51

5D83

6VAB

1VA1

1VAP
1VAN

2D88

2D54

5D72

1C20

2D49

2VAK 3VAK

1VAM

5D01

2UPH

2D66

2D79

2D68

2D5A

3D75

2D62 2D64

3UP3 6UP1

5D81

5D76

2D50

3VA4

3D79
3D78

2D97
2D96
2D84

2D78

2D73
2D81

2D75

3D58

1VAA

2D5B 2D60
5D50

2VA5

2VA0

3VA0

1VAB

2D91

2D80 2D82

3D74

2D92
3VA5

2VA1 2VA3 2VA2 2VA7 2VA4 2VA6

1VAD

2D56

3VAJ

3VA3

1VAF

3VA2

1VA5

1VAE
1VAC

2D5D

3VA1

1D02

2D99

6UP6

2D76

1D35

3UPD

1D01

3D82
3D83

2D87 2D98 2D70

1D53

1D54

5D00

1D55

2D48 2D5C

1D56

Layout top

1R01

9-1-53

QFU1.1E LA

SSB Layout top

2011-12-16

3104 313 6566


19280_053_120423.eps
120423

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 113

Layout bottom

3CY8 3CY6

IGV7

2GVM

IGV8
FGS1

IGV9

FGS2

IGV5

9GV4

IGW6

IGW4

3GV3

IGW9

IGV6

IGW1
FCY1

IGS4

IGS3

9GM4

3CYC

2CYE

3CYB

IGW3

9CY3

FCY3

3CY3

FCY6

FCY5

FCY2
FCY8

2CY2

ICY6

FGU69GV1 FGVE

9GM2

IGS1

3UC1

3GM7

9GM1

IGS5

FTA5

3GV5

FGU9

3CYA

FTA7

FGU7

ID85

ICY4

FD52

ID91

FD69

ICY2

2UCD

1GD1

IGW2

3CV3

FGDD

FTA3

IGU8
FGWA

FGUB

IGS2

ID57

FD51

FD30

FCYD

ID94

IUP4

ID88
FD32

FUPA

FD70

FVAH

FD33

6UP4

IUPF
IUP2

FD31

ID99
ID52

ID50

IUC3

FVA7

ID51
ID62

IUPJ

ID93

FCV2

FVA0

FUAB

3VAH

IUCB
FGVZ

ID80

5UC1

ID97

FVCF

ID69
ID66

ID58

ID55

FVA1

FVA2

ID56
ID54

ID65
FD50

3UCG IUC9

ID90

3UCN

IUCN

FVA5

ID83

ID77
IUBF

6VA3
6VA1
6VA5
6VA0

3UC9

3UCF 2UCR

6UC0

3UCR

IUBD

IUBB

ID76

ID70

ID61

IUBG

7UC1

FUC0

3UCB 3UCD

IUCA
IUC4

2UCM 2UCN

2UCH

9UC0

3UCP

FUA4

3UC7

7UC0

IUC6

2UCP

FUA6

FVA8

ID75

IUBC

IUCP

ID81

ID63

IUBA

6UC13UC2

IUC1

IUBE

IUC73UC8

FUA7

IUA0

IUC5

FUAL

ID53

ID87

FD64 ID79

FD66
FUA5

ID84

ID78
FVA6

IUCM

FD65
FD63

FUA3

ID59

ID89

IUAM

FVAG

3UC0

3GM6

ID98

FUB5

IUC0
IUC2

3GM5

FUA8

2UCE

FGWE

FCY4

IUC8

3UCC

FGW0

FUA9

3UB7

3VWF 3VWG

FCV3

3UCE 3UCA

9GM3
FUAA

FD67

FUA2

FVAF2VAJ

3VAF

IVA1
FUA1

FVA9

IUP3

2UP6

DB27

DB29

IKC4

2FA4

3KW1

3RW1

3RW7

FEFC

3J51

2EFF

2EF2

2EF3

5FA1
AFA4

2FAD

IRA4

2RAV

2RAW

2RAF

2RAU

2RAH

FRA4

2RA3

2RCC

2RA5

FCS4

5HD0

IHD1

5HD6

5HA4

2HAV

2HAU

2HB1

2HAF 5HA6 5HA9

FHAN

FHA7

FHD5
FHB0

FHD3

3HAT

FEAC

FEAB

FEAA

FEA9

FVC1

FHB3

5HD3
2HD4

FHBB

3NAS
3NBB

3HBS 9HA0

IHDL

3HD6

2HD7
2HDB

9HD6
2HD9

IHD29HD8

9HD0

IDY1

FHAD

7HA3

FEA6

2HDD

FHD6

IHDH

3HB3

FEA7

2UW3

FUW0

FEA8

3HD9

2HD8

FUW1
FHA8

2UY5

FHB1

FEA5

3HDH
IHD3

FHA9

7HA5

IHD4

FHAS

3HA6

FHAF

9HD5

2HAT

IHDG

2HB5

2HB2

2HAN

3HA9

2HA8

3HAR

2HAS

9HD4

FHB8

2HAC

FHB9

5HD1

5HA2

2HB3

2HAP

2HAW5HA3
3HA8
2HAG

3HAU

3HA3

3HAB

FHAK
FUW4

2HAY

FHA4

3HAC

3HB1

2HB0
2HA7

5HA1
2HB4

3HAP

3HAA

3HAS

FHAP

3HA2

FHAL

6UW2

2HA4

FVCB

FVC2
FHAR

FHAW

2HAR

9HD1

IUWG

IHD8
FHAV

2HAM

2HAK

2HA0

6HA13HA5

IUWB
IUWD

FHAJ

2HAJ

FHA0

5HA5

3UW9

IUW9

9EA5

2HAD

3UWJ

IUW6

IUW0

FEAE

2EA2 9EA3

2UY2

5UW3

IUW8

9EA4

3EA1

3EA2

3EA0

2EA3

9NAA

FHA3

3HBR

9NA2

2EA6
3EA4

IEA2

3UW6

2HAE

FHB4

3HDN

FHB7

FHAY

7HA2

3NAH

3NAJ

2NA0

IUWC

2NAB

3NAP

1NA1
2NAA

3NA2

3NAR

3NA3

5NA1 9NA3

2NAF

3NAG 3NBH

2NA8

7NA1

2NAC
3NBL

3NAN

3NA1

FDH4

3NAM

FDH5

FDH2

2NA9

IUWE

3EA6

2EA0

2UY3
2UY4

2HAL

3HB4

FNA4

FNA2

FNAF

9NA9

3NA0

2UWK

7HD3
3HDL

3HDP

2HAH

3HB2

FNAR

FNAS

FDH6

IDH9

2EA1

FCWY

FVCD

IHD0

3HBP
FHA1

FHB2

FVC9

2UY0

FNAP

IUW4

IUW22UW8

FEAD

3EA3

2HDC
FHAB

3HB0

5HA0

IUV1

FNA1
FNAT

IUWA

IEA1

3EA5

FHAM

FHAA

9HA1

2UY1

2UY6

FNAU

2EA5

3UW4
3UW0

5UW1

3NAK

2NA3

2UWG

3NAL

IJA1

FHA2

FHA6

IUW1
IUW3

IEA3

7HA4

3HAY

IUW5

FCWU

2EA4

2NAE

FHAC

9EA1

3NAV

2NAD

3HA4

7HD1

FVC8

FHBA

IUW7

9EA2

3NA7

3NAY
3NAU

3HD7 3HD5

FHB5

FHA5

3HDF

3JA3

FDY0

2EA8

3NA6

3NBK

3NAW

FNA3

3HD1

3HD0 3HD2

2NA1

2EA7

2NA5

2NA7

3HD3

IHDF

3HD8

7JA2

3HD4

2HAA

FCWV

IHD9

2HD0

3CW1

3JA2

IJA0

9NA8

3JA4

FHD4
FVCA

3CWV

3CWW

FCW3

3NBF 3NBG

7HD2

3HDD

3HDC

FUW2

FCW1

1EA0

3NB9

3HDA

FHAG

FVC7

FUV1

3NAC

9NA1

3NBA

IHD7

FVCC

3CWU

FCW4

FJA0

FCW2

3NA4 9NA4

IHD5

9HD7 2HDA

FVC4

FCS1

7CW0

FCWB

FCWD

3NA5 9NA5

3HDK

5HD4

3CR0

3EFL

3CR2

IHDM

FHD0

FHD1
FHD2

FCWP

3CWY

3UV5

2HD5

3EF6

2EFE

IUWF

FCWN

3CR9

FCWM

IUV2

FCWF

3HDR

5EF5

2EF4

3EFF

3EFE

3EFK

3EFH

2EFV

3EFJ

DJA6
FCWH

3NAD

IDH8

FDH1

IHDK

3HDM

3J08
3J07 3J52
3CWN

DJA5

3UV2

FVC6

IHD6

3CWR

DJA7

2JA1

FHD8

3HDS

FVC5

3CT7 3CTC

FUV2

2UVC

FCS2
FCS0
DCW2

3HDJ

3CRA
FCWG

FCWC

9NA7

3NB8 3NBJ

2NA4

3NB6
3NB5

3NB1

3NAF 3NB7

3NAE

3NB4

2NA6

FNAV

7NA0

3PA1
IDH2

FCW6

3EF4
3EF1

5GG1

3NB2

3NB3

3GF3

FNAK

IDH4

3CR1

3EF7

FCWT

FNAL

IDH6

2AW0 2CW4

2UV9 7UV1

3HDG

FCW7

7EF1

DJA4 3CUF3CUH

DJA3

FHAH

IHDJ
FVC3

FEF6

FCW5

3UV4

FNA7

FEH6

FNA5

IDH3

IDH1

3AW1

7CT5

3JA5

IUV3

2GG8

IDH7

FEF5

DCW5

2GF1

7NA2

FNA6

FGC7

9EH6

DJA0

3UV3

IGG1

3NB0

2GG9

FGG2

2EHG

FGC4

FCS3

3CUG 3CUJ

7CT4
2JA0

9JA2

7GG6

2GG4

2GG3

2GGJ

2GGL

2GGC

2GGG

2GG2

2GG7

5GG2

2GGK

FGC3

IDH5
FEH7

3JA1

DJA2

FCWE

FGF9
FEH8

2EHY

FEH4

2GGM

3EHJ

FGC6

FEH2

FEH1

9EH8

FCWW

DJAD

DJA1
FCT9

3CP5 DJAC

FGF2

FGG1

9EHC

2EHB

3EHF

3EHN
FEH3
FEHA

2EHL

2GGH

2EH9

3EHU

FEH5

2EHF

IEHJ

1EH1

7EH3
FEH9

FGC5

FEF7
FCWL
FCWK

FEF9

2EF7

DCW6 3CT6

DJA8 DJA9 DJAA

FGF3

FGG3

IEH0

FCWR

3CWG
ICW1

FEFA

2EF0

2EFD

9EF2

3CWC

3GF9

IEH1

IEH2

FEF3

9EF1
FHW0

FCWS

3CU9

3GF8

2EHT

6EH1

2EHM

FEFB

FEF4
FEF8
FCS5

3CWP

DJAE

3GFA

FEA2

FEA3

FEF1

2EF6

IHW1

3HW3

FCP6

2GF2

FAA7

FEF0

2EF1

3CU2

ICT2

2GGF

IAA1

7EH2

2EF8

2GGS

2GGN

IGF1

3EHL

5EF6

IEF1

3CWF
3CWJ

3CWB

3CU6

FCT8

9GF2

9GF1

FEF2

IEE1

2EF5

3UV1

2GH2

IEE0

DCW1

2UVB

2GH6
5GG5

IAA4

2CW5

2JA4

2AA6

FAA6

3CTD 3CWL

3JA0 2JA2

2GG6

2RAE

3ECH

FCT2

3CU8

2GGP
FGG4

2RAY

FEA1

2HW1

3GF7

3NBM

FAA3

2GH5
2GGE

3AA1
FAA4

3CW6

3CTY

3CWM

DJAB

FGG6

FCWZ

FCT5

3CTG
ICT1

FCT6

3CU7

3GG4

2GH4

5GG3

5AA2

2GH3

2RA7

3CUC

FUW3

2GGR

IAA2

FAA5

ICT3

DEF0

IHW2

3CTM

FGG7

7GF1

IAA3
FAA2

9AA1

2RAD

3RW5

3RW3

3KW7

3PW5

3CW4

FCT3

2RAJ

IRA33RA3

FEA4

3PW3

3KW3

3PW2

5J0H

2J4S

2J4T

FJ16

FJ0J

FRA3

2RA2

3PW4

3EFG

3GF1

IRA8

IRA2

2RA4

2RCE

3RA6

3CW5

3CWA

3GF2

FAA1

7CT2

3PAR

3PAC

3PAE

9PAA

3PAU

3PAS

3PAN

3PAV

3PAP

3CL6

3PA9

FGF1

IGF2

3CT9

3AW0

3CTE 2CT2

FCT1

3CU1

3CW7
FCT7

FCW0

3PA4

3PA2

3PAT

3PA7

3PA5

2PA2

2PA3

3PAF

3PAY

3PAM

9PAB 3PAL

3PA3

3PAD

3PAW

3NBE

3PA6

3CL8

3CL1

5RA0

FRA0

FRA5

5KC7

5UW0

FGF8

FGC1

FGF4

3CL3

2RA8

5RC0

IJ0E

FRA8

2RA1
FRA2

3RA4

FRA6

FJ02

2J61

IRA7

FRA1

2RA9

FEFE

3CW3

FCT4

2RB0

2RAL

2HW2 3HW5

3CL4

3RA2

2RAA

IVW3

3CUB

2GH7

FGG9

3CL0
3CL5

7GG1

FGG5

3PAA

7PA2

3CL2
3CL7

3FAB
IRA1

2RC4

3RC1

2RAM

FRC1

2RCD

2J5Z

DB81

2RAT

2RA0

7RC1

IRC3

2J5W

FRA7

2RAS

2RAB

2J2S 2J3B

2RC5

IRA9

2RAR

5EF7

7NA5

3GG3
FGG8
FGC2

FGF6

IAA7
FGF5

3GG2

7GG2

2GH1

5GG4

2GGV

2GGU

2GGW

2GG1

3GF5

2GGD

2GGY

3GF4
FGF7

2GG5

IAA5

7PA1
3GG1

FGGB

3PAB

2RAK
2RAC

2RAN

2RAG

8001
8002

3PA8

3RA8

3RA7

9RC2

IRC1

2RAP

IFA0

5FA0

IRC0

DB67
DBB8

DBC4

DBC1

2J3A 2J3C2J3E

IRA0

IRC23RC2

2RC3

DB69

2J28

DB66

DB15
DBC5

3J06

3J05
2J06

2J07

2J2Y

2RC1

FRC0

2RC0

DBB6
DB02

2J2B

2J2R
3J2V
2J2A

2FA1

2RC2

DB04

2J2P

DB18

7RC0

DBB7

DB68

3NBD

FGGA

2FAE 2FAK 2FAJ 2FAF 2FA7


3KCC 2FA8
3FAD

2KC4 2KC1

FFAA

DB08

FJ0F

IVW5

IGG2

7FA1 3FAC

2KC6
2KC2
5KC6
2FA2

2J2C

FFA2

2RA6

2J5K 2J5D

FFA7

IVW6

FUAR

FFA4

FFA8

FFA5

FFAC

7FA0

2J2L 2J32

2J34

3KW5

2J4G

FFA0

FFAB

FFA3

3J2W
DB16

IJ11

5J06

2KCH

3PW1

FJ0G

IFA6 3KA4

DKC03KC6

FFA6

DBB3
DB13

DB82

FJ05

2J5R

AFA1

3FA7

DB20

DBC0

2J2N

DB87

2J5F
2J5C
2J5H

2J4U

2J5Y

2J97

2J5P

2J4R

IJ07

FJ0H

2J5S

2J4F

DB14

5J08 2J63 5J04 2J3W 2J7E


2J4V
5J0M
IJ0F
5J0C 2J64
2J6D

3FA8

DB30

DB72

FJ01

2KC7 2KC3

2KCP5KC5

2J2M

2J5G

2J5L
3J00 2J5M

5J0J

2J79

AFA0

3FA9

7KA0 3KA2

DB05DB07

2J38
2J36

2J98
2J4L
2J7W

2J7V

5J0E

5J0D
2J7G

2J7D

2J6B

3FAA

2J7U 2J1D

2J1U 2J81

3J14
2J1A

2UP5
3J3W
3J4N

IFA5
IKC6

IKC5

FFA1

FJ0ADBC2

2J5B
2J05

2J5N

2J6T

2J78

2J7C

2J70

2J71

2J77

DBC6

AFA5

DB60

DB96

2J3G 2J7F

2J94
2J73

2J6S

2J7R

2J76

2J4H

3J02
2J00
2J96
2J4J 2J4K

2J88
2J09 2J23

FJ14

2J1T

2J87

DB83

2J4N

2J6M
IJ0G

2J6F

2J6W 2J99

2J6J 2J6N

2J3Z

2FZ4

2J22
5J0F

2J75
2J7A

2J6U

2J6P
2J69

2J7B

2J6L
2J65

2J3T

IJ05

2J6Y
2J74

2J47
2J5V 2J5T 2J3V 2J6E
2J43

2FZ2

IVW4

2J03

IJ0N

IJ0J

2J44

5J0N 2J55 2J53


IJ08
FJ10 5J07
2J56 2J58

IVW8

9VW2

2J54

IJ0K

2FZ1

FNAE

2J66

2VW9

2VW6

3VWT
IVW7

IJ06

FNAD

FNA8

2J45

5J0L IJ0H
2J52 2J51 2J50

2J40

IVW1

FNAG

9VW1

2UAL

6UAC 3UAS

IVW2

FGY3

5J00

FNAJ

FNAH

IUAR

IJ02

2J3M

2J7Y

DB89

3J01

5J0K 2J68
2J4Z 2J6C 2J6R
5J03
2J7K
5J0A 2J6G 2J67
2J3P 5J0B IJ14
5J02 5J01 2J6V 2J6H

IJ0A

FNAB

FNA9

IUAT

3UAV

3UAT

6UAD

2UAM

IJ13

2J3N
5J09 2J48 2J46 IJ09

3PC1

IUAV

2J3R
9J03 2J90
9J04 2J91

IJ01

3VWU

FGY4

IJ12

2J4B

IJ04

2J49

5J0G

2VW7

FUAT

7UAB

2J3S

IJ0C

3UAP 3UAN

FGY8

FNAA

DB76

2J7H
2J6Z 2J7J

2J4P
2J72
2J6A

IJ10

2J3U
2J4A
IJ03
2J4C

2VWA

FGYA

3UA5

2J4Y

3UA6

IJ0B

FCV9

2J7L

2J4W

IJ0U

2J3Y

2J4D

2J4E

2J4M

9GA2

3CVV

2J5U

IJ0T

IJ0D
IJ0P

FCV8

FNAC

IKC8

DBB9

DB65

2J2H
3J30
2J2E

DB70

DB74

DB23

2J62

3CVP

3CVR

DB77

7UAF

3PC0

IKC2

IKC7

DBB5

DB24

2J2F
DBB4
3J31

DB85

IJ0M

DB75

DB88

FCV4
FCV6

IUAP

DB80

2J7Z

FCV5
FCV7

IUAN3UAY

3J4H

3J3K 3J3N
3J4P 3J3Z

ICV2
IGD3

DB86

FUR1

IUAL

3J4G

FJ0BDBC3

IJ0L

DB46

FJ15

3CVZ

IUAJ

3J4A 3J4J
3J4B 3J4K

2J02

DB91

FCVB

FEJ3

FEJ0

FURA

2UAN

2J80

3CV1

FJ04

2J04
3J03
3J04

DB90

3FZ1

FEJ4

IUAK

2J93 5J0P

IFA4

IFA3

2KC5 2KC0

3J34
3J35

3J4D
2J01 3J4L
2J2G
3J4M
3J4C

DBC7

FEJ6

7UAA

3J2H

IJ0R

IJ00

FEJ2

FFA9

2KCS

IKC9

IKC3

3J2N
3J2P

DB47

2UAK

IKC0

2J2K

FCVA

3UAR

AFA2
IKC1

3KCE
DKC1

2J5A

FEJ5

IUAS

FVCE

IUP9

FJ00

FEJ1

FGY5

2J1Z

FVCG

IFA1

3J2G

2J1F

2VA9

6VAH
6VAG
6VAE
6VAD
6VAC
6VAA
6VA9
6VA8

AFA3

IUP1

FKC1

IUA1

FGY6

2J12
3J17
3J16

3VAG

3VA8 2VAB
3VA7

IUP8

3J32
3J33

IFW4
IURA

IUR2
IUR8

FUAP

DB99

DB58

FVAB
FVAA

IFW2

IURC

IUR3

IUFG

FGY7

2J1S

2J17
3J12

2J85
3J11
2J16

DB59

3VAB

3VA9 2VAE

2VAD

ICV1

IURB
IUR0

2FW4

2UF4

3UFG

3FW3 3FW5

IUP6

3VAC

IVA0

IUCF

3J2M
DB98

FCV1

3FW6
IUF5

2UC2

2UCU3UC6

IUP7

3FW7
IUF8

FUC2

IUCK

3J2K
3J2J
3J2L

DB52

DB54

2J1C
2J1W

3UF7

FGY9

2J19

3J15
2J18

IUFJ

2J1K

DB95

2J60

3UG0

IUF1

IUF7

IUFS

DB62
DB55

DB97

ICVW

IUF0

IUFA

FUAH

DB06

IUR9

IUFP

FUAJ

FJ09

DBA6

DB35

FJ08
IURK
IURE

IUR4

2J15
DB36DB38

FVAC

2J89

7FW1

IURF

IUF2

IUF6

DB57
DB39

DB50
DBA3

DB01

IUFD

2UF53UGF

FUAK

IURD

IUFC

3UG2

IUFN

FGY2

DB64

3FW4

IUFR

IUFE
IUF3

DBA7

3UCH

FUP1

DB51

DBA4

2J86

3UG1
IUFL

DB94

DBA1

2J83 2J7P

IFW5
IFW1

2J84

IFW3

IUFK

IUFM

FUAS

DB33

IUAG

DB49

IUCL

3UCW IUCG

IUCH

IUCJ

IUPG

2FW5

7UC5 3UCT

2UC4

3J1F
3J1E
3J2A
3J28 3J2B
3J29 3J2D
3J2C
3J1U
3J26
3J1V
3J27

3J1L

2FW3

5FW3

3J1M

3FW8

6UAF

IUAE

2UC3

3UCZ

2FW6

IUAC

IUAB

2UCV 3UCM

3J3F 3J38
3J3E 3J39
3J3J 3J3P

FJ03

IJ0S

FVAD
FVA4

7UC8

DFW1
IUAD
IUAF

IUCD

3UD1

FUAN

IUCC

IUCE3UCL

7UC6

3J18
3J19
3J1K
3J1J

FUC3

3J1S 3J1C
3J1T 3J1D

3J22 3J1N
3J23 3J1P

3UCY

3UCK

3J2S
3J2T

IUAA

IAA6

3VAE 2VAH

FVAE

DFW2
FUA0

2HD1

FTA4

FTA1

3GVF
FGUA

IGW5

3GV6

IGW8

FGUE

FGDB

IGD2

7GM2

FGDC

IGS7

FTA2

FGUD

FGDE

IGD1

ITA1

7CY1

ICY13CY4

IGW7

3GV7

IGV3

FGWB

FGV0

IGS6

IGV4

2GVB

7CY2

9CY2

3CY2
9CY1

6VA2
6VA4
6VA7
6VA6

FGWD

FVA3

FGWJ

3VA6

FGWH

ID82

FGWM

3D81

FGWQ

3D80

FGWS

2D90

FGWU

3CY9

FGWW

ID96

FGVK

FGWN

2UPL

FGWK

FGV7

2CYL

FGVB

FGVA

FCYE3CYT

FGVD

FGVG

FGVJ

2CY3

FGVM

2CY4

FGVP

2CY1

FGVR

2CYB

FGVS

2CYA

FGVT

2CYC

FGVY

2CYD

FGDG

3CYP

FGWZ

FGWC

3CYN

FGU0

FGWF

5UP6

FGWG

FCYB

FGWL

FCYC

FGWP

3CY1

FGWR

ICY3

FGWT

2CY5

FGWV

2CY6

FGU1

FGWY

3CYJ

FGU5

FGU3

3CY5

FGD8

FGU2

3CYD

FGD7

3GVB

FGD3

FGU4

FGV5

3CYK

FGUC

FGV6

3CYM

FGV8

FCY9

FGV9

FCYA

FGVC

2CY7

FGVF

3CYH

FGVH

2CY9

FGVL

2CY8

FGVN

2CYF

FGVQ

3CYG

FGVU

FCY7

FGVV

3CYL

FGVW

FGUF

3CYE

FGD5

2GVD

FGDA

2GVG

FGD9

2GVJ

FGD6

7CY62CYK

3CY7

FGD4

FTA6

9-1-54

QFU1.1E LA

FHAE

5HD2
2HD3

FHD7
FHB6

FDH3

SSB Layout bottom

2011-12-16

3104 313 6566


19280_054_120423.eps
120423

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts


9.2
9-2-1

QFU1.1E LA

9.

EN 114

E 272217190673 - 272217190698 Keyboard


Keyboard control panel

Keyboard control panel

J2
8
7
6
5
4
3
2
1
CON8

ZD1
5V6
RES

R6

1k
R1
150

C1
0.01 F

CH+

R2
330

CH-

R3
680

R4
1k5

SOURCE VOL-

R5
3k9

VOL+

PWR

Keyboard control panel

2012-02-24

2722 171 90673


2722 171 90698
19210_087_120507.eps
120507

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 115

J 272217190536 Sensor board


Sensor board

IR/LED, RF, Light sensor

J
+3.3V

RF4CE

+3.3V
Keyboard-IRQ-SRF

C50
100pF
RES

VSS

VSS

LED2
3D
LIGHT SENSOR

U3
CC2533F96RHA

C17

VSS

3D-LED

1C21
HF52-18-0.5

1
2
3
4

+3.3V

C10
100pF

R1510R
VSS

R37
100k

+5V

R8
100R

White LED

RJ2 10K
CSn
SCLK
MOSI
MISO

Red LED

R8*
47R

Q4
VSS
BC847

R4
47R

36
DD 35
DC 34

1.2pF
C15

IR-IRQ-RF4CE
+3.3V

D1

VSS

D2
LED2

VSS
BC847

3
RESET

P2_0
P2_1
P2_2

RF_N

C18

C19

0.1uF 220pF 0.1uF

21
24
27
28
29
31

C20

C21

0.1uF 1uF

C22
2.2uF

C23

C24

0.1uF 0.1uF
VSS
AT1

U2
BALUN
25 RF-P

26 RF-N

SDBTPTR3015
C25

B-Port
B-Port

U-port

C26
1.5pF

2.7pF
VSS VSS

P2_4/XOSC32_Q1
P2_3/XOSC32_Q2

P0_0
P0_1
P0_2
P0_3
P0_4
P0_5
P0_6
P0_7

XOSC_Q1
XOSC_Q2

RESET_N

RBIAS
DCOUPL

32
VSS
33 IRQ-SRF
22
23
X1
32MHz
30

40

C34

C35

15pF

15pF

C33
1uF

103
NPC803SN293D3T1G

VSS

AVDD5
AVDD3
AVDD2
AVDD1
AVDD4
AVDD6
RF_P

P1_0
P1_1
P1_2
P1_3
P1_4
P1_5
P1_6
P1_7

C16

R34
56k

VSS

VSS

R7
10k

R32
10K
RESETn 20

NC
SCL
SDA
NC

C14
102

ZD3
5.6V

R30 10R

U6

GND

Q1
BC857

+3.3V

RXD-RF4CE

104

LED1

10k

C32

10k
R6

VCC

Q3

11
9
8
7
6
5
38
37
19
18
17
16
15
14
13
12

R31 10R

TXD-RF4CE

+3.3V

LED2 R3

L3
1uH

GND

C5
10pF

+5V

IR-IRQ-RF4CE

+3.3V

VSS

10

10R

+3.3V

R14
10k
SCL-SRF

R10

VSS

Keyboard-IRQ-SRF

1C02
TYCO 2.0- 3pin

C4
10pF

VSS

SCL

10R

+3.3V

VSS

TXD-RF4CE
IRQ-SRF
SDA

1
2
3

VSS

R9

DVDD2

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
0 18

39

R13
10k
SDA-SRF

DVDD1

VSS

RJ7 0R RESETn
WHITE LED1
LED1
RXD-RF4CE

Connector

GND PAD

VSS
VSS

VSS

VSS
+5V
R27
4R7

+3.3V

ECAS D40J107M

VSS

R28
4R7

10K
2

VSS
4
R45
10K

R17
10R

EN

IR-IRQ-RF4CE

R1

U1

10R

3
2

+3.3V

C43
104

U4
3D-LED

R29
4R7

S12304BDS
Q5
C44
103

ZD2
5.6V
RES

R2
100R

C3
10uF/6.3V
VSS

R18
47K

OUT
VDD
GND
GND

U5
SCL-SRF R40
10R

SDA-SRF R41
10R

VSS

SCL

INT

SDA

LDR

TSOP75236

+3.3V
R38
10K

IRQ-SRF

TSL25715FN
3

R16

IR

VSS
+5V

C40
1u

Light & proximity sensor

VSMY3850

VSMY3850

VDD

ECAS D40J107M015

D7

GND

3D-IR

D6

C46

C45

74LVC1G126
3

9-3-1

9.3

QFU1.1E LA

VSS

VSS

VSS

IR/LED, RF, Light sensor

2012-02-22

2722 171 90536


19280_057_120424.eps
120424

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts


9-3-2

QFU1.1E LA

9.

EN 116

Sensor board layout

Layout top

Layout bottom

Layout

2012-02-22

2722 171 90536

19280_064_120426.eps
120426

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 117

AL 310431365771 16 LED AmbiLight


AL1,16 LED Everlight single spectra

16 LED Everlight single spectra

AL1

AL1
2101
SCKI-BUF

100R
10p

2105
F002

3109

SDI

SDI-BUF

+3V3

F010

100R

AMBI-TEMP

BAT54 COL

LMV321AP5X

18K 1%

SDI

3107

-T 10K

RES
3106

3105

3K3 1%

SCKI

100n

2104

AMBI-TEMP

F005

6101

4
3

10p

F004
F003

RES
9106

7102
5

3102

F001

3103

27K

-T

9101

100n
3101

+3V3

+3V3

10K 1%

SCKI

2106

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18

3108

10K

+12V

1A02
FH34SRJ-18S-0.5SH(50)

9104
+3V3

19

20

9300

+12V

9102

+12V

9301

9103

+3V3

+3V3

2102

2320
100n

IREF

3324
1K5 1%

9108

SCKI

3
4
14
17

SDI
9105
+3V3

SDTI
SCKI

SDTO
SCKO

NC
VIA

22
23
24

PWM1-R2
PWM1-G2
PWM1-B2

7
8
9

PWM1-R1
PWM1-G1
PWM1-B1

15

1u0

16

IREF

R
OUT1 G
B

1K5 1%

2
1
2

SDO1
SDO1
SCKO

26
27
28
29

SCKI-BUF

9112

SCKO

9113

3
4
14
17

9109

R
OUT3 G
B
SDTI
SCKI

SDTO
SCKO

NC
VIA

18

PWM2-R3
PWM2-G3
PWM2-B3

22
23
24

PWM2-R2
PWM2-G2
PWM2-B2

7
8
9

PWM2-R1
PWM2-G1
PWM2-B1

10
11
12
6
5

3110
220R

26
27
28
29

SDO

GND_HS

25

GND_HS

R
OUT2 G
B

19
20
21

F007

+12V

+3V3AL

1X00
310430135421

1X01
310430135421

18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

1X02
310430135421

20

19

F006
+3V3

R
OUT0 G
B

3104

10
11
12
6
5

VREG

GND
GND
18

20

1
2

R
OUT2 G
B
R
OUT3 G
B

AMBI-TEMP
SDI-BUF
SCKI-BUF

R
OUT1 G
B

PWM1-R3
PWM1-G3
PWM1-B3

100p

16

R
OUT0 G
B

19
20
21

2107

1u0

VREG

VCC

2103

VCC
15

7101
TLC5971RGE

25

1A05
FH34SRJ-18S-0.5SH(50)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18

2323

+12V

7303
TLC5971RGE

13

+3V3AL

+3V3AL

13

100n

9107

9-4-1

19

9.4

QFU1.1E LA

9110
F008

AMBI-TEMP
SCKI
SDO
9111
F009

+3V3

1A04
FH34SRJ-18S-0.5SH(50)

16 LED Everlight
single spectra

2011-12-12

3104 313 6577


19280_084_120427.eps
120427

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 118

AL2, 16 LED Everlight single spectra

16 LED Everlight single spectra

AL2

8 3215-1 1

5 3215-4 4

PWM2-R1

1 3216-1 8

220R
2

750R
3216-2

BLUE

BLUE

GREEN

GREEN

RED

RED

+12V

750R
3

3216-3

100n

220R

2202

6 3215-3 3

220R

100n

PWM2-G1

7 3215-2 2

2201

PWM2-B1

7015
P4518

7016
P4518

220R

750R
4 3216-4 5
750R

7014
P4518

7013
P4518

7012
P4518

PWM2-B2

BLUE

BLUE

BLUE

PWM2-G2

GREEN

GREEN

GREEN

PWM2-R2

RED

RED

RED

2 3214-2 7

100n

560R

2204

3214-1

100n

+12V

2203

560R
3 3214-3 6
560R
4 3214-4 5
560R

7010
P4518

7009
P4518

BLUE

BLUE

BLUE

PWM2-G3

GREEN

GREEN

GREEN

PWM2-R3

RED

RED

RED

1 3211-1 8
560R

+12V

2 3211-2 7

100n

PWM2-B3

2206

7011
P4518

100n

AL2

2205

9-4-2

QFU1.1E LA

560R
3

3211-3

560R
4 3211-4 5
560R

16 LED Everlight
single spectra

2011-12-12

3104 313 6577


19280_085_120427.eps
120427

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 119

AL3, 16 LED Everlight single spectra

16 LED Everlight single spectra

AL3
7006
P4518

BLUE

BLUE

BLUE

PWM1-G1

GREEN

GREEN

GREEN

PWM1-R1

RED

RED

RED

1 3308-1 8

+12V

2307

560R
2 3308-2 7

100n

2308

PWM1-B1

100n

7007
P4518

7008
P4518

560R
3 3308-3 6

560R
3308-4

560R

7005
P4518
5

BLUE

PWM1-G2

PWM1-R2

PWM1-B2

BLUE

BLUE

GREEN

GREEN

GREEN

RED

RED

RED

+12V

2303

2 3305-2 7

100n

560R

2304

3305-1

7003
P4518

100n

7004
P4518

560R
3 3305-3 6
560R
4 3305-4 5
560R

3 3302-3 6

1 3302-1 8

220R

220R

PWM1-G3
PWM1-R3

2 3302-2 7
220R

1 3301-1 8
750R

BLUE

BLUE

GREEN

GREEN

RED

RED

+12V

2 3301-2 7

100n

4 3302-4 5

2302

PWM1-B3

7001
P4518

7002
P4518

220R

100n

AL3

2301

9-4-3

QFU1.1E LA

750R
3 3301-3 6
750R
4 3301-4 5
750R

16 LED Everlight
single spectra

2011-12-12

3104 313 6577


19280_086_120427.eps
120427

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts


9.5

AL 310431365781 15 LED AmbiLight

9-5-1

AL1, 15 LED Everlight single spectra

9.

EN 120

15 LED Everlight single spectra

AL1

AL1

2101
+12V

1A02
FH34SRJ-18S-0.5SH(50)

3108

SCKI

SCKI-BUF

100n
3101

+3V3

+3V3

100R
10K 1%

F001
F002

F010

3109

SDI

+3V3

SDI-BUF

2
3107

AMBI-TEMP

BAT54 COL

LMV321AP5X

18K 1%

-T 10K

SCKI
F005

RES
3106

3105

3K3 1%

100n

2104

AMBI-TEMP

10p

3
2106

F004

6101

100R

F003

RES
9106

7102
5

3103

10K
-T

3102

10p

27K
2105

9101

SDI

9104
+3V3

19

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18

QFU1.1E LA

20

9300

+12V

9102

+12V

9301

9103

+3V3

2102

+3V3

2320
100n

1K5 1%

9108

SCKI

1
2

SDI-BUF
SCKI-BUF

3
4
14
17

SDI
9105
20

+3V3

R
OUT1 G
B
R
OUT2 G
B
R
OUT3 G
B

AMBI-TEMP
SDTI
SCKI

VCC

SDTO
SCKO

NC
VIA

22
23
24

PWM1-R2
PWM1-G2
PWM1-B2

7
8
9

PWM1-R3
PWM1-G3
PWM1-B3

15

1u0

16

VREG
IREF

3104
R
OUT1 G
B

1K5 1%

10
11
12

1
2

SDO1

6
5

SDO1
SCKO

26
27
28
29

SCKI-BUF

9112

SCKO

9113

3
4
14
17

SDTI
SCKI

SDTO
SCKO

NC
VIA

18

19
20
21

PWM2-R1
PWM2-G1
PWM2-B1

22
23
24

PWM2-R2
PWM2-G2
PWM2-B2

7
8
9
10
11
12
6
5
26
27
28
29

3110
220R

SDO

GND_HS

25

18

GND_HS

R
OUT2 G
B
R
OUT3 G
B

GND
GND

R
OUT0 G
B

100p

IREF

PWM1-R1
PWM1-G1
PWM1-B1

2107

16

R
OUT0 G
B

3324

19

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18

1u0

VREG

19
20
21

25

1A05
FH34SRJ-18S-0.5SH(50)

15

7101
TLC5971RGE

2103

VCC

2323

+12V

7303
TLC5971RGE

13

+3V3AL

+3V3AL

13

100n

+3V3

9109

F007
+3V3AL
9107

F006

18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

1X00
310430135421

1X01
310430135421

1X02
310430135421

20

19

+12V

9110
F008

AMBI-TEMP
SCKI
SDO
9111
F009

+3V3

1A04
FH34SRJ-18S-0.5SH(50)
1

15 LED Everlight
single spectra

2011-12-12

3104 313 6578


19210_084_120507.eps
120507

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 121

AL2, 15 LED Everlight single spectra

15 LED Everlight single spectra

AL2

7015
P4518

7014
P4518

BLUE

BLUE

BLUE

PWM2-G2

GREEN

GREEN

GREEN

PWM2-R2

RED

RED

RED

1 3216-1 8

+12V

2201

560R
2 3216-2 7

100n

2202

PWM2-B2

100n

7016
P4518

560R
3

3216-3

560R
4 3216-4 5
560R

7012
P4518

7011
P4518

BLUE

BLUE

BLUE

PWM2-G1

GREEN

GREEN

GREEN

PWM2-R1

RED

RED

RED

1 3214-1 8

560R
3214-2

+12V

100n

PWM2-B1

2204

7013
P4518

100n

AL2

2203

9-5-2

QFU1.1E LA

560R
3

3214-3

560R
4 3214-4 5
560R

15 LED Everlight
single spectra

2011-12-12

3104 313 6578


19210_085_120507.eps
120507

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 122

AL3, 15 LED Everlight single spectra

15 LED Everlight single spectra

AL3
7008
P4518

BLUE

BLUE

BLUE

PWM1-G3

GREEN

GREEN

GREEN

PWM1-R3

RED

RED

RED

1 3310-1 8

+12V

2308

560R
2 3310-2 7

100n

PWM1-B3

2309

7009
P4518

100n

7010
P4518

560R
3 3310-3 6

560R
3310-4

560R

7005
P4518

BLUE

BLUE

BLUE

PWM1-G2

GREEN

GREEN

GREEN

PWM1-R2

RED

RED

RED

1 3307-1 8

560R
3307-2

+12V

100n

PWM1-B2

2306

7006
P4518

100n

7007
P4518

2305

560R
3 3307-3 6
560R
4 3307-4 5
560R

7002
P4518

PWM1-B1

BLUE

BLUE

BLUE

PWM1-G1

GREEN

GREEN

GREEN

PWM1-R1

RED

RED

RED

1 3304-1 8
560R

+12V

2 3304-2 7

100n

7003
P4518

2302

7004
P4518

100n

AL3

2301

9-5-3

QFU1.1E LA

560R
3 3304-3 6

560R
3304-4

560R

15 LED Everlight
single spectra

2011-12-12

3104 313 6578


19210_086_120507.eps
120507

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 123

AL 310431365804 12 LED AmbiLight


AL1,12 LED Everlight single spectra

12 LED Everlight single spectra

AL1

AL1
2101

+12V

1A02
FH34SRJ-18S-0.5SH(50)

3108

+3V3

SCKI-BUF

100n
3101

+3V3

27K
+3V3
RES
9106

7102

F010
3109

LMV321AP5X

AMBI-TEMP

BAT54 COL

18K 1%

SCKI
F005

3107

3105

100n

2104

10p

AMBI-TEMP

F003

6101

4
3

100R
F004

SDI-BUF

-T 10K

SDI

RES
3106

F002

F001

3K3 1%

9101

10K 1%

3103

10K
-T

3102

10p

2105

100R

2106

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18

SCKI

SDI

9104
+3V3

19

20

9102

+12V

9103

+3V3

2102
100n

IREF

3104
R
OUT1 G
B

1K5 1%

R
OUT2 G
B

9108

AMBI-TEMP
SCKI
SDI
9105

SDI-BUF
SCKI-BUF

1
2
3
4
14
17

R
OUT3 G
B
SDTI
SCKI

SDTO
SCKO

NC
VIA

+3V3
18

GND

GND_HS
25

20

R
OUT0 G
B

19
20
21

PWM-R1
PWM-G1
PWM-B1

22
23
24

PWM-R2
PWM-G2
PWM-B2

7
8
9

PWM-R3
PWM-G3
PWM-B3

10
11
12

PWM-R4
PWM-G4
PWM-B4

6
5
26
27
28
29

+12V

3110
220R

SDO

18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

20

19

16

VREG

100p

1A05
FH34SRJ-18S-0.5SH(50)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18

1u0

+12V

VCC
15

2107

2103

7101
TLC5971RGE

13

+3V3AL

9110
F008

AMBI-TEMP
SCKI
SDO
9111
F009

+3V3

1A04
FH34SRJ-18S-0.5SH(50)

F006
+3V3

9109

F007
+3V3AL
9107

9-6-1

19

9.6

QFU1.1E LA

1X00
310430135421

1X01
310430135421

1X02
310430135421

12 LED Everlight
single spectra

2011-11-30

3104 313 6580


19280_075 _120427.eps
120427

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 124

AL2, 12 LED Everlight single spectra

12 LED Everlight single spectra


PWM-B4

BLUE

BLUE

BLUE

PWM-G4

GREEN

GREEN

GREEN

PWM-R4

RED

RED

RED

2201

7 3216-2 2

100n

560R

2202

3216-1

+12V

100n

AL2

7014
P4518

7015
P4518

7016
P4518

560R
6 3216-3 3
560R
5 3216-4 4
560R

7013
P4518

7011
P4518

7012
P4518

PWM-B3

BLUE

BLUE

BLUE

PWM-G3

GREEN

GREEN

GREEN

PWM-R3

RED

RED

RED

+12V

100n

2203

7 3213-2 2

2204

560R

100n

3213-1

560R
6 3213-3 3
560R
5 3213-4 4
560R

7008
P4518

BLUE

BLUE

BLUE

GREEN

GREEN

GREEN

PWM-R2

RED

RED

RED

1 3210-1 8
560R

+12V

2 3210-2 7

100n

PWM-G2

100n

PWM-B2

2206

7009
P4518

7010
P4518

2205

560R
3

3210-3

560R
4 3210-4 5
560R

7007
P4518

7006
P4518

PWM-B1

BLUE

BLUE

PWM-G1

GREEN

GREEN

PWM-R1

RED

RED

BLUE

GREEN

RED

6
+12V

560R
2 3207-2 7

100n

3207-1

2208

7005
P4518

100n

AL2

2207

9-6-2

QFU1.1E LA

560R
3 3207-3 6
560R
4 3207-4 5

12 LED Everlight
single spectra

560R

2011-11-30

3104 313 6580


19280_076_120427.eps
120427

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts


9.7

AL 310431365813 10 LED AmbiLight

9-7-1

AL1, 10 LED Everlight single spectra

QFU1.1E LA

9.

EN 125

10 LED Everlight single spectra

AL1

AL1
2101

+12V

1A02
FH34SRJ-18S-0.5SH(50)

3108

100n
3101

+3V3

+3V3

SCKI-BUF

27K
3103

+3V3
RES
9106

7102

F010
3109

AMBI-TEMP

BAT54 COL

LMV321AP5X

18K 1%

SCKI
F005

3107

3105

100n

2104

AMBI-TEMP

10p

2106

F004

6101

4
3

100R

F003

SDI-BUF

-T 10K

SDI

RES
3106

F002

F001

3K3 1%

9101

10K 1%

10K
-T

3102

10p

2105

100R

SDI

9104
+3V3

19

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18

SCKI

20

9102

+12V

9103

+3V3

2102
100n

VCC

16

IREF

R
OUT0 G
B

3104
R
OUT1 G
B

1K5 1%

R
OUT2 G
B

9108

SDI-BUF
SCKI-BUF

1
2

SCKI
SDI
9105

SDTI
SCKI

SDTO
SCKO

NC
VIA

18

GND

22
23
24

PWM1-R2
PWM1-G2
PWM1-B2

7
8
9

PWM1-R3
PWM1-G3
PWM1-B3

10
11
12

PWM1-R4
PWM1-G4
PWM1-B4

6
5
26
27
28
29

GND_HS

+12V

3110
220R

SDO

18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

20

9110
F008

AMBI-TEMP
SCKI
SDO
9111
F009

+3V3

1A04
FH34SRJ-18S-0.5SH(50)

F006
+3V3

9109

F007
+3V3AL
9107

20

+3V3

3
4
14
17

R
OUT3 G
B

PWM1-R1
PWM1-G1
PWM1-B1

25

AMBI-TEMP

19

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18

19
20
21

19

1u0

VREG

100p

1A05
FH34SRJ-18S-0.5SH(50)

15

2107

2103
+12V

7101
TLC5971RGE

13

+3V3AL

1X00
310430135421

1X01
310430135421

10 LED Everlight
single spectra

2011-11-30

3104 313 6581


19280_072_120427.eps
120427

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 126

AL2, 10 LED Everlight single spectra

10 LED Everlight single spectra

1
7016
P4518

220R

PWM1-G4

7 3215-2 2

6 3215-3 3

220R

220R
5 3215-4 4

PWM1-R4

8 3216-1 1

220R

BLUE

BLUE

GREEN

GREEN

RED

RED

+12V

750R
2201

7 3216-2 2
750R

100n

PWM1-B4

7015
P4518

2202

3215-1

100n

AL2

6 3216-3 3
750R
5 3216-4 4
750R

7012
P4518

PWM1-B3

BLUE

BLUE

BLUE

PWM1-G3

GREEN

GREEN

GREEN

PWM1-R3

RED

RED

RED

8 3214-1 1
560R

+12V

7 3214-2 2

100n

7013
P4518

2204

7014
P4518

100n

AL2

2203

9-7-2

QFU1.1E LA

560R
6 3214-3 3
560R
5 3214-4 4
560R

10 LED Everlight
single spectra

2011-11-30

3104 313 6581


19280_073_120427.eps
120427

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 127

AL3, 10 LED Everlight single spectra

10 LED Everlight single spectra

AL3

7009
P4518

BLUE

BLUE

BLUE

PWM1-G2

GREEN

GREEN

GREEN

PWM1-R2

RED

RED

RED

8 3211-1 1

+12V

560R
7 3211-2 2

100n

PWM1-B2

2206

7010
P4518

100n

7011
P4518

2205

560R
6 3211-3 3

560R
3211-4

560R

5 3307-4 4

7 3307-2 2

220R

220R
8 3307-1 1
220R

8 3308-1 1

BLUE

BLUE

GREEN

GREEN

RED

RED

560R

+12V

7 3308-2 2

100n

PWM1-G1
PWM1-R1

6 3307-3 3

2308

PWM1-B1

7007
P4518

7008
P4518

220R

100n

AL3

2307

9-7-3

QFU1.1E LA

560R
6 3308-3 3
560R
5 3308-4 4
560R

10 LED Everlight
single spectra

2011-11-30

3104 313 6581


19280_074_120427.eps
120427

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 128

AL 310431365823 9 LED AmbiLight


AL1,9 LED Everlight single spectra

AL1

9 LED Everlight single spectra

AL1
2101

+12V

1A02
FH34SRJ-18S-0.5SH(50)

100n
3101

+3V3

+3V3

SCKI-BUF

27K
+3V3
RES
9106

7102

F010
3109

3107

SCKI
F005

AMBI-TEMP

BAT54 COL

LMV321AP5X

18K 1%

100n

3105

2104

AMBI-TEMP

10p

F004

6101

4
3

100R

F003

SDI-BUF

-T 10K

SDI

RES
3106

F002

F001

3K3 1%

9101

10K 1%

3103

10K
-T

3102

10p

2105

100R

2106

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18

3108

SCKI

SDI

9104
20

+3V3

19

9102

+12V

9103

+3V3

2102
100n

VREG
IREF

R
OUT0 G
B

3104
R
OUT1 G
B

1K5 1%
9108

R
OUT2 G
B
R
OUT3 G
B

AMBI-TEMP

SDI
9105
20

+3V3

SDI-BUF
SCKI-BUF

1
2
3
4
14
17

SDTI
SCKI

SDTO
SCKO

NC
VIA

GND

22
23
24

PWM2-R2
PWM2-G2
PWM2-B2

7
8
9

PWM2-R3
PWM2-G3
PWM2-B3

10
11
12
6
5
26
27
28
29

3110
220R

+3V3AL

+12V

SDO

GND_HS
25

SCKI

PWM2-R1
PWM2-G1
PWM2-B1

F007

18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

20

19

16

19
20
21

9109

9107

15

100p

1u0

F006
+3V3

VCC

2107

+12V

1A05
FH34SRJ-18S-0.5SH(50)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18

2103

7101
TLC5971RGE

13

+3V3AL

18

9-8-1

19

9.8

QFU1.1E LA

9110
F008

AMBI-TEMP
SCKI
SDO
9111
F009

+3V3

1A04
FH34SRJ-18S-0.5SH(50)

1X00
310430135421

1X01
310430135421

9 LED Everlight
single spectra

2011-12-06

3104 313 6582


19280_082_120427.eps
120427

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 129

AL2, 9 LED Everlight single spectra

9 LED Everlight single spectra

AL2
7014
P4518

BLUE

BLUE

BLUE

GREEN

GREEN

GREEN

RED

RED

RED

PWM2-R3

1 3216-1 8

560R
3216-2

+12V

560R
3

3216-3

100n

PWM2-G3

2201

PWM2-B3

2202

7015
P4518

100n

7016
P4518

560R
4 3216-4 5
560R

7011
P4518

BLUE

BLUE

BLUE

GREEN

GREEN

GREEN

PWM2-R2

RED

RED

RED

1 3213-1 8

+12V

560R
2 3213-2 7

100n

PWM2-G2

2204

PWM2-B2

100n

7012
P4518

7013
P4518

2203

560R
3 3213-3 6

560R
3213-4

560R

7009
P4518

7008
P4518

BLUE

BLUE

BLUE

PWM2-G1

GREEN

GREEN

GREEN

PWM2-R1

RED

RED

RED

1 3210-1 8

560R
3210-2

+12V

100n

PWM2-B1

100n

7010
P4518

2206

AL2

2205

9-8-2

QFU1.1E LA

560R
3 3210-3 6
560R
4 3210-4 5
560R

9 LED Everlight
single spectra

2011-12-06

3104 313 6582


19280_083_120427.eps
120427

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 130

AL 310431365833 7 LED AmbiLight

9-9-1

AL1,7 LED Everlight single spectra

7 LED Everlight single spectra

AL1

AL1

+12V

1A02
FH34SRJ-18S-0.5SH(50)

2101

100R

AMBI-TEMP
3109

3103

9102

9103

LMV321AP5X

AMBI-TEMP

BAT54 COL

18K 1%

3107

-T 10K

3105

100n

2104

10p

+3V3

+12V

6101

4
3

2106

SDI

9104

RES
9106

SDI-BUF

100R
F005

+3V3
7102

F010
SDI

RES
3106

SCKI

3K3 1%

F004
F003

10K 1%

10K
-T

2105

27K

3102

F001
F002

20

100n
3101

+3V3

+3V3

SCKI-BUF

10p

9101

3108

SCKI

19

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18

+3V3

2102
F006
100n

VCC

16

IREF

R
OUT0 G
B

3104
R
OUT1 G
B

1K5 1%

R
OUT2 G
B

AMBI-TEMP
SCKI

R
OUT3 G
B

SDI

20

+3V3

SDI-BUF
SCKI-BUF

1
2
3
4
14
17

SDTI
SCKI

SDTO
SCKO

PWM2-R1
PWM2-G1
PWM2-B1

22
23
24

PWM2-R2
PWM2-G2
PWM2-B2

7
8
9

PWM2-R3
PWM2-G3
PWM2-B3

F007
+3V3AL

VIA

+12V

10
11
12
6
5
26
27
28
29

NC

GND

19
20
21

GND_HS
25

9105

9109

3110
220R

SDO

18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

20

19

1u0

VREG

100p

15

2107

2103

9108

7101
TLC5971RGE

+3V3

9107

+3V3AL

18

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18

+12V
13

1A05
FH34SRJ-18S-0.5SH(50)

19

9.9

QFU1.1E LA

9110
F008

AMBI-TEMP
SCKI
SDO
9111
F009

+3V3

1A04
FH34SRJ-18S-0.5SH(50)

1X00
310430135421

1X01
310430135421

7 LED Everlight
single spectra

2011-12-06

3104 313 6583


19280_080_120427.eps
120427

2012-Jun-29 back to

div. table

Circuit Diagrams and PWB Layouts

9.

EN 131

AL2, 7 LED Everlight single spectra

7 LED Everlight single spectra

PWM2-G3

2 3215-2 7

3 3215-3 6

220R

220R
4 3215-4 5

PWM2-R3

1 3216-1 8

BLUE

BLUE

GREEN

GREEN

RED

RED

+12V

750R

220R

2201

2 3216-2 7
750R

100n

PWM2-B3

7015
P4518

7016
P4518

220R

2202

3215-1

100n

AL2

3 3216-3 6
750R
4 3216-4 5
750R

7012
P4518

BLUE

BLUE

BLUE

PWM2-G2

GREEN

GREEN

GREEN

PWM2-R2

RED

RED

RED

1 3214-1 8

2203

560R

+12V

2 3214-2 7

100n

2204

PWM2-B2

100n

7013
P4518

7014
P4518

560R
3 3214-3 6
560R
4 3214-4 5
560R

4 3211-4 5
220R
3 3211-3 6

PWM2-R1

220R
1 3211-1 8
220R

BLUE

BLUE

GREEN

GREEN

RED

RED

+12V

1 3210-1 8
560R
2 3210-2 7

100n

PWM2-G1

2 3211-2 7

2206

PWM2-B1

7010
P4518

7011
P4518

220R

100n

AL2

2205

9-9-2

QFU1.1E LA

560R
3 3210-3 6

560R
3210-4

560R

7 LED Everlight
single spectra

2011-12-06

3104 313 6583


19280_081_120427.eps
120427

2012-Jun-29 back to

div. table

Styling Sheets

QFU1.1E LA

10.

EN 132

10. Styling Sheets


10.1

7000 series 40"

7000 series 40"

0016

1130

0013
1040

1129
0456

1163

0159
1041

1127

0015
0112

1111

1164

0450

1043

1131

0034

0109
Pos No.

0460

1050
1012
0455
0453

0007

1010

1004

0007

0007
0013
0015
0016
0032
0034
0109
0112
0159
0202
0270
0416
0450
0453
0455
0456
0460
1004
1010
1012
1040
1041
1043
1050
1085
1090
1092
1111
1127
1129
1130
1131
1131
1163
1164

Description
Deco front
Back cover
Swivel back piece
Ambilight door
Sensor board assembly
Wifi bracket
Mains inlet
Stand interface
PCMCIA cardguide
Dolby I/O label
3D gogles
Stand coverplate screw
Thermal foam
V0 sheet PSU
Thermal foam
Spring grounding
V0 sheet mains inlet
LCD display
Sensor board
Keyboard control panel
Wifi antenne
Wifi antenne
Wifi module USB
PSU
Remote control
Cinch connection
3 Cinch extention cable
SSB
Speaker
Stand coverplate
Stand neck
Base plate
Smallware box
Ambilight left
Ambilight right

Remarks

Not displayed
Not displayed
Not displayed

Not displayed
Not displayed
Not displayed

Not displayed

FOR ELECTRICAL PARTS/ASSEMBLIES SEE WIRING DIAGRAM CHAPTER 9


19210_088_120508.eps
120508

2012-Jun-29 back to

div. table

Styling Sheets
10.2

QFU1.1E LA

10.

EN 133

8000 series 40"

8000 series 40"

1130
1170

0016

0456
1129
1111

1163
1040

0159

1041
1127

0160
1172

0162

0450
0015

1164

0013

1131

0034
0460
1043

0112

1050

1012

0109
0453

0455

1010
1004

0032
0007

Pos No.
0007
0013
0015
0016
0032
0034
0109
0112
0159
0160
0162
0202
0270
0416
0450
0453
0455
0456
0460
1004
1010
1012
1040
1041
1043
1050
1085
1090
1092
1111
1127
1129
1130
1131
1131
1135
1163
1164
1170
1172

Description
Deco front
Back cover
Swivel back piece
Ambilight door
Leading edge assembly
Wifi bracket
Mains inlet
Stand interface
PCMCIA cardguide
Side I/O bracket
Bottom I/O bracket
Dolby I/O label
3D gogles
Stand coverplate screw
Thermal foam
V0 sheet psu
Thermal foam
Spring grounding
V0 sheet mains inlet
LCD display
Sensor board
Keyboard control panel
Wifi antenne
Wifi antenne
Wifi module USB
PSU
Remote control
Cinch connection
3 Cinch extention cable
SSB
Speaker
Stand coverplate
Stand neck
Base plate
Smallware box
Skype assembly
Ambilight left
Ambilight right
Ambilight left
Ambilight right

Remarks

Not displayed
Not displayed
Not displayed

Not displayed
Not displayed
Not displayed

Not displayed
Not displayed

FOR ELECTRICAL PARTS/ASSEMBLIES SEE WIRING DIAGRAM CHAPTER 9


19210_092_120511.eps
120511

2012-Jun-29 back to

div. table

Styling Sheets
10.3

QFU1.1E LA

10.

EN 134

7000 series 46"

7000 series 46"

0016
1130
0013
1040
1163
1129

0456
0159
0160
1041

0162

1127

0015

1111

1164

0112

0450

1131
1043 0034

Pos No.

0460

0109

1050
0453

1012
0455

0032

1010
1004

0007

0007
0013
0015
0016
0032
0034
0109
0112
0159
0160
0162
0202
0270
0416
0450
0453
0454
0456
0460
1004
1010
1012
1040
1041
1043
1050
1085
1090
1092
1111
1127
1129
1130
1131
1131
1163
1164

Description
Deco front
Back cover
Swivel back piece
Ambilight door
Sensor board assembly
Wifi bracket
Mains inlet
Stand interface
PCMCIA cardguide
Side I/O bracket
Bottom I/O bracket
Dolby I/O label
3D gogles
Stand coverplate screw
Thermal foam
V0 sheet PSU
Thermal foam
Spring grounding
V0 sheet mains inlet
LCD display
Sensor board
Keyboard control panel
Wifi antenne
Wifi antenne
Wifi module USB
PSU
Remote control
Cinch connection
3 Cinch extention cable
SSB
Speaker
Stand coverplate
Stand neck
Base plate
Smallware box
Ambilight left
Ambilight right

Remarks

Not displayed
Not displayed
Not displayed

Not displayed
Not displayed
Not displayed

Not displayed

FOR ELECTRICAL PARTS/ASSEMBLIES SEE WIRING DIAGRAM CHAPTER 9


19210_093_120514.eps
120514

2012-Jun-29 back to

div. table

Styling Sheets
10.4

QFU1.1E LA

10.

EN 135

8000 series 46"

8000 series 46"

1130
1170
0016
0456

1163
1129

1111
0159
1040
1127

0160

1041

0162

0034

0450
1172
0015

1043

0112
0109

1050

1012
0453
0460

0455

1010
1004

0032

0007

1164
Pos No.
0007
0013
0015
0016
0032
0034
0109
0112
0159
0160
0162
0202
0270
0416
0450
0453
0455
0456
0460
1004
1010
1012
1040
1041
1043
1050
1085
1090
1092
1111
1127
1129
1130
1131
1131
1135
1163
1164
1170
1172

1131

0013
Description
Deco front
Back cover
Swivel back piece
Ambilight door
Leading edge assembly
Wifi bracket
Mains inlet
Stand interface
PCMCIA cardguide
Side I/O bracket
Bottom I/O bracket
Dolby I/O label
3D gogles
Stand coverplate screw
Thermal foam
V0 sheet psu
Thermal foam
Spring grounding
V0 sheet mains inlet
LCD display
Sensor board
Keyboard control panel
Wifi antenne
Wifi antenne
Wifi module USB
PSU
Remote control
Cinch connection
3 Cinch extention cable
SSB
Speaker
Stand coverplate
Stand neck
Base plate
Smallware box
Skype assembly
Ambilight left
Ambilight right
Ambilight left
Ambilight right

Remarks

Not displayed
Not displayed
Not displayed

Not displayed
Not displayed
Not displayed

Not displayed
Not displayed

FOR ELECTRICAL PARTS/ASSEMBLIES SEE WIRING DIAGRAM CHAPTER 9


19210_094_120514.eps
120514

2012-Jun-29 back to

div. table

Styling Sheets
10.5

QFU1.1E LA

10.

EN 136

7000 series 55"

7000 series 55"


0016

0013
1040
1130
1163
0456
0159
1129
0160
0162
1043

1111

0034

0015
1041

0112

0450

1127

1164
1131
1050

0460

0453

1012
0455

0032

Pos No.

0109

1010
1004

0007

0007
0013
0015
0016
0032
0034
0109
0112
0159
0160
0162
0202
0270
0416
0450
0453
0454
0456
0460
1004
1010
1012
1040
1041
1043
1050
1085
1090
1092
1111
1127
1129
1130
1131
1131
1163
1164

Description
Deco front
Back cover
Swivel back piece
Ambilight door
Sensor board assembly
Wifi bracket
Mains inlet
Stand interface
PCMCIA cardguide
Side I/O bracket
Bottom I/O bracket
Dolby I/O label
3D gogles
Stand coverplate screw
Thermal foam
V0 sheet PSU
Thermal foam
Spring grounding
V0 sheet mains inlet
LCD display
Sensor board
Keyboard control panel
Wifi antenne
Wifi antenne
Wifi module USB
PSU
Remote control
Cinch connection
3 Cinch extention cable
SSB
Speaker
Stand coverplate
Stand neck
Base plate
Smallware box
Ambilight left
Ambilight right

Remarks

Not displayed
Not displayed
Not displayed

Not displayed
Not displayed
Not displayed

Not displayed

FOR ELECTRICAL PARTS/ASSEMBLIES SEE WIRING DIAGRAM CHAPTER 9


19210_095_120514.eps
120514

2012-Jun-29 back to

div. table

Styling Sheets
10.6

QFU1.1E LA

10.

EN 137

8000 series 55"

8000 series 55"

0016
1130
1173
0456
1111

1174

0159

1040

1170

1129
1171

0034
0162

0160

1172
1043
1041

1127

0450
0015

1175

0109
0112

1050

1012

0455
0453

1010

1004

0032

0007

Pos No.
0007
0013
0015
0016
0032
0034
0109
0112
0159
0160
0162
0202
0270
0416
0450
0453
0455
0456
0460
1004
1010
1012
1040
1041
1043
1050
1085
1090
1092
1111
1127
1129
1130
1131
1131
1135
1170
1172
1171
1173
1174
1175
1176

1131

0013

1176
Description
Deco front
Back cover
Swivel back piece
Ambilight door
Leading edge assembly
Wifi bracket
Mains inlet
Stand interface
Pcmcia cardguide
Side I/O bracket
Bottom I/O bracket
Dolby I/O label
3D gogles
Stand coverplate screw
Thermal foam
V0 sheet PSU
Thermal foam
Spring grounding
V0 sheet mains inlet
LCD display
Sensor board
Keyboard control panel
Wifi antenne
Wifi antenne
Wifi module USB
PSU
Remote control
Cinch connection
3 cinch extention cable
SSB
Speaker
Stand coverplate
Stand neck
Base plate
Smallware box
Skype assembly
Ambilight top left
Ambilight top right
Ambilight top middle
Ambilight left upper
Ambilight lower left
Ambilight right upper
Ambilight right lower

Remarks

Not displayed
Not displayed
Not displayed

Not displayed

Not displayed
Not displayed
Not displayed

Not displayed
Not displayed

FOR ELECTRICAL PARTS/ASSEMBLIES SEE WIRING DIAGRAM CHAPTER 9


19210_096_120514.eps
120514

2012-Jun-29 back to

div. table

Potrebbero piacerti anche