BTS 724G

Smart High-Side Power Switch

Four Channels: 4 x 90m
Status Feedback
Product Summary
Vbb
Active channels
On-state Resistance
RON
Nominal load current
IL(NOM)
Current limitation
IL(SCr)

Package

Operating Voltage

one
90m
3.3A
12A

5.5...40V
four parallel
22.5m
7.3A
12A

P-DSO-20

General Description

N channel vertical power MOSFET with charge pump, ground referenced CMOS compatible input and

diagnostic feedback, monolithically integrated in Smart SIPMOS technology.

Providing embedded protective functions

Applications

C compatible high-side power switch with diagnostic feedback for 12V and 24V grounded loads
All types of resistive, inductive and capacitve loads
Most suitable for loads with high inrush currents, so as lamps
Replaces electromechanical relays, fuses and discrete circuits

Basic Functions

Very low standby current

CMOS compatible input
Improved electromagnetic compatibility (EMC)
Fast demagnetization of inductive loads
Stable behaviour at undervoltage
Wide operating voltage range
Logic ground independent from load ground

Protection Functions

Block Diagram

Short circuit protection

Overload protection
Current limitation
Thermal shutdown
Overvoltage protection (including load dump) with external
resistor
Reverse battery protection with external resistor
Loss of ground and loss of Vbb protection
Electrostatic discharge protection (ESD)

Diagnostic Function

IN1
ST1/2
IN2

Logic
Channel 1
Channel 2

IN3
ST3/4

Logic
Channel 3
Channel 4

GND

1 of 14

Load 1
Load 2

IN4

Diagnostic feedback with open drain output

Open load detection in OFF-state
Feedback of thermal shutdown in ON-state

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Vbb

Load 3

Load 4

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BTS 724G

Functional diagram

overvoltage
protection

internal
voltage supply

logic

gate
control
+
charge
pump

current limit

VBB

clamp for
inductive load
OUT1

IN1

ESD

temperature
sensor

reverse
battery
protection

Open load
detection

LOAD

channel 1

ST1/2

IN2

control and protection circuit

of
channel 2

GND1/2

IN3

OUT2

control and protection circuit

of
channel 3
OUT3

ST3/4

IN4

control and protection circuit

of
channel 4

GND3/4

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OUT4

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BTS 724G

Pin Definitions and Functions

Pin
1,10,
11,12,
15,16,
19,20
3
5
7
9
18
17
14
13
4
8
2
6

Pin configuration

Symbol Function
Vbb
Positive power supply voltage. Design the
wiring for the simultaneous max. short circuit
currents from channel 1 to 2 and also for low
thermal resistance
IN1
Input 1,2,3,4 activates channel 1,2,3,4 in case
of logic high signal
IN2
IN3
IN4
OUT1
Output 1,2,3,4 protected high-side power output
of channel 1,2,3,4. Design the wiring for the
OUT2
max. short circuit current
OUT3
OUT4
ST1/2
Diagnostic feedback 1/2,3/4 of channel 1,2,3,4
ST3/4
open drain, low on failure
GND1/2 Ground of chip 1 (channel 1,2)
GND3/4 Ground of chip 2 (channel 3,4)

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(top view)

Vbb
GND1/2
IN1
ST1/2
IN2
GND3/4
IN3
ST3/4
IN4
Vbb

1
2
3
4
5
6
7
8
9
10

20
19
18
17
16
15
14
13
12
11

Vbb
Vbb
OUT1
OUT2
Vbb
Vbb
OUT3
OUT4
Vbb
Vbb

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BTS 724G
Maximum Ratings at Tj = 25C unless otherwise specified
Parameter

Symbol

Supply voltage (overvoltage protection see page 6)

Supply voltage for full short circuit protection
Tj,start = -40 ...+150C
Load current (Short-circuit current, see page 6)
Load dump protection1) VLoadDump = VA + Vs, VA = 13.5 V
RI2) = 2 , td = 400 ms; IN = low or high,
each channel loaded with RL = 13.5 ,
Operating temperature range
Storage temperature range
Power dissipation (DC)4)
Ta = 25C:
Ta = 85C:
(all channels active)
Maximal switchable inductance, single pulse
Vbb = 12V, Tj,start = 150C4), see diagrams on page 10
IL = 3.3 A, EAS = 120 mJ, 0
one channel:
IL = 4.7 A, EAS = 140 mJ, 0
two parallel channels:
IL = 7.3 A, EAS = 160 mJ, 0
four parallel channels:
Electrostatic discharge capability (ESD)
IN:
(Human Body Model)
ST:
out to all other pins shorted:

Vbb
Vbb

Values

Unit
43
36

V
V

IL
VLoad dump3)

self-limited
60

A
V

Tj
Tstg
Ptot

-40 ...+150
-55 ...+150
3.6
1.9

16,5
19
18

mH

1.0
4.0
8.0

kV

-10 ... +16

0.3
5.0
5.0

V
mA

ZL

VESD

acc. MIL-STD883D, method 3015.7 and ESD assn. std. S5.1-1993

R=1.5k; C=100pF

Input voltage (DC) see internal circuit diagram page 9

Current through input pin (DC)
Pulsed current through input pin5)
Current through status pin (DC)

1)
2)
3)
4)
5)

VIN
IIN
IINp
IST

Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins (a 150
resistor for the GND connection is recommended.
RI = internal resistance of the load dump test pulse generator
VLoad dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839
Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70m thick) copper area for Vbb
connection. PCB is vertical without blown air. See page 14
only for testing

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BTS 724G
Thermal Characteristics
Parameter and Conditions

Symbol
min

Thermal resistance
junction - soldering point6)7)
junction ambient6)
@ 6 cm2 cooling area

each channel: Rthjs

Rthja
one channel active:
all channels active:

Values
typ
max

--

--

15

---

42
34

---

Unit

K/W

Electrical Characteristics
Parameter and Conditions, each of the four channels

Symbol

at Tj = -40...+150C, Vbb = 12 V unless otherwise specified

Load Switching Capabilities and Characteristics

On-state resistance (Vbb to OUT); IL = 2 A
each channel,
Tj = 25C: RON
Tj = 150C:
two parallel channels, Tj = 25C:
four parallel channels, Tj = 25C:

Values
min
typ
max

Unit

-----

70
140
35
17.5

90
180
45
22.5

3.0
4.3
6.5

3.3
4.7
7.3

----

--

--

mA

---

100
100

250
270

0.2
0.2

---

1.0
1.1

V/s
V/s

see diagram, page 11

Nominal load current

one channel active: IL(NOM)

two parallel channels active:
four parallel channels active:

Device on PCB6), Ta = 85C, Tj 150C

Output current while GND disconnected or pulled up8); IL(GNDhigh)

Vbb = 32 V, VIN = 0,
see diagram page 9
Turn-on time9)

Turn-off time
RL = 12
Slew rate on 9)
Slew rate off 9)

6)
7)
8)
9)

IN
IN

to 90% VOUT: ton

to 10% VOUT: toff

10 to 30% VOUT, RL = 12 : dV/dton

70 to 40% VOUT, RL = 12 : -dV/dtoff

Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70m thick) copper area for Vbb
connection. PCB is vertical without blown air. See page 14
Soldering point: upper side of solder edge of device pin 15. See page 14
not subject to production test, specified by design
See timing diagram on page 12.

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BTS 724G
Parameter and Conditions, each of the four channels

Symbol

at Tj = -40...+150C, Vbb = 12 V unless otherwise specified

Operating Parameters
Operating voltage
Undervoltage switch off10)
Overvoltage protection12)
I bb = 40 mA
Standby current13)
VIN = 0; see diagram page 11

Vbb(on)
Tj =-40C...25C: Vbb(u so)
Tj =125C:
Vbb(AZ)

Tj =-40C...25C: Ibb(off)
Tj =150C:
Tj =125C:
Off-State output current (included in Ibb(off))
IL(off)
VIN = 0; each channel
Operating current 14), VIN = 5V,
IGND = IGND1 + IGND2,
one channel on: IGND
all channels on:
Protection Functions15)
Current limit, Vout = 0V, (see timing diagrams, page 12)
Tj =-40C: IL(lim)
Tj =25C:
Tj =+150C:
Repetitive short circuit current limit,
Tj = Tjt
each channel IL(SCr)
two,three or four parallel channels

Values
min
typ
max

Unit

5.5
--41

---47

40
4.5
4.511)
52

V
V

-----

9
--1

20
30
2011)
5

---

0.6
2.4

1.2
4.8

mA

--9

-15
--

23
---

---

12
12

---

--

--

ms

41

47

52

150
--

-10

---

C
K

(see timing diagrams, page 12)

Initial short circuit shutdown time

Vout = 0V

Tj,start =25C: toff(SC)

(see timing diagrams on page 12)

Output clamp (inductive load switch off)16)

VON(CL)

at VON(CL) = Vbb - VOUT, IL= 40 mA

Thermal overload trip temperature

Thermal hysteresis

10)
11)
12)

13)
14)
15)

16)

Tjt
Tjt

is the voltage, where the device doesnt change its switching condition for 15ms after the supply voltage
falling below the lower limit of Vbb(on)
not subject to production test, specified by design
Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins (a 150
resistor for the GND connection is recommended). See also VON(CL) in table of protection functions and
circuit diagram on page 9.
Measured with load; for the whole device; all channels off
Add IST, if IST > 0
Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not
designed for continuous repetitive operation.
If channels are connected in parallel, output clamp is usually accomplished by the channel with the lowest
VON(CL)

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BTS 724G
Parameter and Conditions, each of the four channels

Symbol

at Tj = -40...+150C, Vbb = 12 V unless otherwise specified

Reverse Battery
Reverse battery voltage 17)
Drain-source diode voltage (Vout > Vbb)
IL = - 2.0 A, Tj = +150C

-Vbb
-VON

Values
min
typ
max

Unit

---

-600

32
--

V
mV

Diagnostic Characteristics
Open load detection voltage

V OUT(OL)

1.7

2.8

4.0

Input and Status Feedback18)

Input resistance

RI

2.5

4.0

6.0

VIN(T+)
VIN(T-)
VIN(T)
td(STon)

-1.0
---

--0.2
10

2.5
--20

V
V
V
s

td(STon)

30

--

--

td(SToff)

--

--

500

td(SToff)

--

--

20

IIN(off)
IIN(on)

5
10

-35

20
60

A
A

VST(high)
VST(low)

5.4
--

---

-0.6

(see circuit page 9)

Input turn-on threshold voltage

Input turn-off threshold voltage
Input threshold hysteresis
Status change after positive input slope19)
with open load
Status change after positive input slope19)
with overload
Status change after negative input slope
with open load
Status change after negative input slope19)
with overtemperature
Off state input current
VIN = 0.4 V:
On state input current
VIN = 5 V:
Status output (open drain)
Zener limit voltage
IST = +1.6 mA:
ST low voltage
IST = +1.6 mA:

17)

Requires a 150 resistor in GND connection. The reverse load current through the intrinsic drain-source
diode has to be limited by the connected load. Power dissipation is higher compared to normal operating
conditions due to the voltage drop across the drain-source diode. The temperature protection is not active
during reverse current operation! Input and Status currents have to be limited (see max. ratings page 4 and
circuit page 9).
18) If ground resistors R
GND are used, add the voltage drop across these resistors.
19) not subject to production test, specified by design

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BTS 724G
Truth Table
Channel 1 and 2
Channel 3 and 4
(equivalent to channel 1 and 2)

Chip 1
Chip 2

Normal operation

Open load

Channel 1 (3)
Channel 2 (4)

Overtemperature

both channel

Channel 1 (3)
Channel 2 (4)

L = "Low" Level
H = "High" Level

IN1
IN3

IN2
IN4

OUT1
OUT3

OUT2
OUT4

ST1/2
ST3/4

L
L
H
H
L
H

L
H
L
H
X
X

L
L
H
H
Z
H

L
H
L
H
X
X

H
H
H
H

X
X
L
X
H
L
H
X
X

L
H
L
H
X
X
X
L
H

X
X
L
L
L
L
L
X
X

Z
H
L
L
L
X
X
L
L

L20)
H
L15)
H
H
L
L
H
L
H
L

X = don't care
Z = high impedance, potential depends on external circuit
Status signal valid after the time delay shown in the timing diagrams

Parallel switching of channel 1 and 2 (also channel 3 and 4) is easily possible by connecting the inputs and
outputs in parallel (see truth table). If switching channel 1 to 4 in parallel, the status outputs ST1/2 and ST3/4
have to be configured as a 'Wired OR' function with a single pull-up resistor.

Terms

Ibb
bb

I IN2
I ST1/2
V

V
ON1
V
ON2

Leadframe
I IN1

IN1 V IN2 VST1/2

3
5
4

Vbb

IN1
IN2

OUT1
PROFET
Chip 1

OUT2

ST1/2 GND1/2

I L1

17

I L2
V

2
R

18

I
GND1/2

I IN4
I ST3/4
V

OUT1

V
ON3
V
ON4

Leadframe
I IN3

IN3 V IN4 VST3/4

7
9
8

Vbb

IN3
IN4

OUT3
PROFET
Chip 2

ST3/4 GND3/4

I L3

13

I L4
V

V OUT2

GND1/2

OUT4

14

I
GND3/4

OUT3

V OUT4

GND3/4

Leadframe (Vbb) is connected to pin 1,10,11,12,15,16,19,20

External RGND optional; two resistors RGND1, RGND2 = 150 or a single resistor RGND = 75 for reverse
battery protection up to the max. operating voltage.

20)

L, if potential at the Output exceeds the OpenLoad detection voltage

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BTS 724G
Overvolt. and reverse batt. protection

Input circuit (ESD protection), IN1 to IN4

+ 5V

R
IN

+ Vbb

R ST

V
IN

ESD-ZD I

RI

Z2

Logic

I
R ST ST

GND

OUT
V

Z1

The use of ESD zener diodes as voltage clamp at DC

conditions is not recommended.

GND

R GND
Signal GND

Status output, ST1/2 or ST3/4

ST

Open-load detection, OUT1...4

ESDZD

GND

Load GND

VZ1 = 6.1 V typ., VZ2 = 47 V typ., RGND = 150 ,

RST= 15 k, RI= 3.5 k typ.
In case of reverse battery the load current has to be
limited by the load. Temperature protection is not
active

+5V

R ST(ON)

R Load

OFF-state diagnostic condition:

Open Load, if VOUT > 3 V typ.; IN low

ESD-Zener diode: 6.1 V typ., max 0.3 mA; RST(ON) < 375
at 1.6 mA. The use of ESD zener diodes as voltage clamp at
DC conditions is not recommended.

bb

R
EXT

Inductive and overvoltage output clamp,

OFF

OUT1...4

+Vbb
VZ

Logic
unit
V

OUT

Open load
detection

ON

Signal GND

OUT

GND disconnect
Power GND

VON clamped to VON(CL) = 47 V typ.

IN

Vbb
PROFET

OUT

ST
GND
V

bb

IN

ST

V
GND

Any kind of load. In case of IN = high is VOUT VIN - VIN(T+).

Due to VGND > 0, no VST = low signal available.

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BTS 724G
Inductive load switch-off energy
dissipation

GND disconnect with GND pull up

E bb
IN

Vbb

E AS

PROFET

OUT

IN

ST
GND

PROFET

=
V

V
bb

IN ST

ST

GND

Vbb disconnect with energized inductive

load

IN

ZL

{
R

EL

ER

Energy stored in load inductance:

2

EL = 1/2LI L
While demagnetizing load inductance, the energy
dissipated in PROFET is
EAS= Ebb + EL - ER= VON(CL)iL(t) dt,

Vbb
PROFET

OUT

GND

Any kind of load. If VGND > VIN - VIN(T+) device stays off
Due to VGND > 0, no VST = low signal available.

high

ELoad

Vbb

with an approximate solution for RL > 0 :

OUT

EAS=

ST

IL L
(V + |VOUT(CL)|)
2RL bb

ln (1+ |V

ILRL

OUT(CL)|

GND

Maximum allowable load inductance for

a single switch off (one channel)4)
L = f (IL ); Tj,start = 150C, Vbb = 12 V, RL = 0

bb

For inductive load currents up to the limits defined by ZL

(max. ratings and diagram on page 10) each switch is
protected against loss of Vbb.

ZL [mH]
1000

Consider at your PCB layout that in the case of Vbb disconnection with energized inductive load all the load current
flows through the GND connection.
100

10

1
1

10

11

IL [A]

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BTS 724G
Typ. on-state resistance
RON = f (Vbb,Tj ); IL = 2 A, IN = high
RON [mOhm]

Tj = 150C

160

120

25C

80

-40C
40

0
5

11

30

40
Vbb [V]

Typ. standby current

Ibb(off) = f (Tj ); Vbb = 9...34 V, IN1,2,3,4 = low
Ibb(off) [A]
45
40
35
30
25
20
15
10
5
0
-50

50

100

150

200

Tj [C]

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BTS 724G

Timing diagrams
All channels are symmetric and consequently the diagrams are valid for channel 1 to
channel 4
Figure 2b: Switching a lamp:

Figure 1a: Vbb turn on:

IN1

IN

IN2
V bb

ST

OUT1

OUT

OUT2

ST1 open drain

ST2 open drain

Figure 2a: Switching a resistive load,

turn-on/off time and slew rate definition:

Figure 3a: Turn on into short circuit:

shut down by overtemperature, restart by cooling

IN

IN1

other channel: normal operation

VOUT
I

90%
t on

L1

dV/dtoff

L(lim)
I

dV/dton
10%

L(SCr)

off

IL

ST

off(SC)

t
Heating up of the chip may require several milliseconds, depending
on external conditions

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BTS 724G
Figure 5a: Open load: detection in OFF-state, turn
on/off to open load
Open load of channel 1; other channels normal
operation

Figure 3b: Turn on into short circuit:

shut down by overtemperature, restart by cooling
(two parallel switched channels 1 and 2)
IN1/2

IN1
I

L1

+I

VOUT1

L2

2xIL(lim)

I L1
I

L(SCr)

ST
off(SC)

ST1/2
10s

500s

t
ST1 and ST2 have to be configured as a 'Wired OR' function
ST1/2 with a single pull-up resistor.

Figure 6a: Status change after, turn on/off to

overtemperature
Overtemperature of channel 1; other channels normal
operation

Figure 4a: Overtemperature:

Reset if Tj <Tjt

IN1
IN

ST
ST
30s

20s

OUT

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BTS 724G

Package and Ordering Code

Standard: P-DSO-20-15
Sales Code

BTS 724G

Ordering Code

Q67060-S7026

Published by
Infineon Technologies AG,
St.-Martin-Strasse 53,
D-81669 Mnchen
Infineon Technologies AG 2001
All Rights Reserved.

All dimensions in millimetres

Attention please!
The information herein is given to describe certain components and
shall not be considered as a guarantee of characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited
to warranties of non-infringement, regarding circuits, descriptions
and charts stated herein.
Infineon Technologies is an approved CECC manufacturer.
Information
For further information on technology, delivery terms and conditions
and prices please contact your nearest Infineon Technologies Office
in Germany or our Infineon Technologies Representatives worldwide
(see address list).
Warnings
Due to technical requirements components may contain dangerous
substances. For information on the types in question please contact
your nearest Infineon Technologies Office.

Definition of soldering point with temperature Ts:

upper side of solder edge of device pin 15.

Pin 15

Printed circuit board (FR4, 1.5mm thick, one layer

70m, 6cm2 active heatsink area) as a reference for
max. power dissipation Ptot, nominal load current
IL(NOM) and thermal resistance Rthja

Infineon Technologies AG

Infineon Technologies Components may only be used in life-support

devices or systems with the express written approval of Infineon
Technologies, if a failure of such components can reasonably be
expected to cause the failure of that life-support device or system, or
to affect the safety or effectiveness of that device or system. Life
support devices or systems are intended to be implanted in the
human body, or to support and/or maintain and sustain and/or
protect human life. If they fail, it is reasonable to assume that the
health of the user or other persons may be endangered.

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