California State University, Fresno

Department of Electrical and Computer Engineering

ECE 240 - Advanced VLSI Design

Instructor: Dr. Nan Wang

CMOS INVERTER using Magic VLSI Tool

By,
Abhishek Gubbi Basavaraj
Prateek Telkar

Introduction:
In this project, we will be designing a Inverter using the PMOS and NMOS
MOSFET as discussed in the ECE 240 course work.
As you can see from Figure below, a CMOS circuit composed of two
MOSFETs. The top MOSFET is a PMOS type device while the bottom MOSFET
is an NMOS type. Since body of each device is directly connected to the devices
source, the body effect is not present n either of the device. Both gates are
connected to the input line. The output line connects to the drains of both FETs.

Take a look at the Voltage transfer characteristics in the above Figure. The curve
represents the output voltage taken from node 3. You can easily see that the
CMOS circuit functions as an inverter by noting that when VIN is five volts,
VOUT is zero, and vice versa. Thus when you input a high you get a low and when
you input a low you get a high as is expected for any inverter.
Process:
Step 1:
Start Magic from the Terminal(CTRL+ALT+T):
Type: magic -T scmos inverter2 //it opes a file with technology scmos and name
inverter 2.
Step 2:
There will be two windows one is layout window and another one for tckcon window.
Type G in the tckcon window to see the grid, SHIFT+ Z to zoom out the layout
window

Step 3:
Enable tools Bar from the options in the layout window, so that we can select the type
of materials like substrate, contact type etc. from here.
Step 4:
Using the tool bar in the layout window, design the Inverter by following steps:
1. Draw the PMOS by two steps
Select the area and go to toolbar and click N-Well
Inside the area of the Nwell region select the area and click P-diffusion
from the Toolbar
2. Draw NMOS by selecting the area and click N-diffusion in toolbar
3. Now draw the Gate area and select the Polysilicon from toolbar, this area will
connect both NMOS and PMOS
4. Draw Metal layer for VDD, which is connected to PMOS, and Draw another
Metal layer which will be connected to NMOS
5. A metal layer is drawn as Drain for both NMOS and PMOS and this taken as
Output of Inverter
6. Layers are overlapping, so to make a connection between metal layer Vdd and
PMOS select some part of the overlapping area and click on PDcontact on the
toolbar. Similarly do for GND and NMOS for that use ND contact
7. Repeat the same for connecting the drain which is shorted between NMOS and
PMOS. Also place substrate contact on Vdd layer and ground layer.
For Vdd layer we will select N-substrate form the toolbar as Vdd is
connected to PMOS and for the ground layer we will select P-substrate
as it is connected to NMOS.
Check for the DRC error before moving to the next step during the design
Label the Vin,Vout ,VDD and GND using Label command in tckcon window.

Layout of a CMOS Inverter design using Magic VLSI Tool

Simulation Results:
The below simulation was carried out using IRSIM and it shows the output Vout
for the input Vin. The test bench script file used to carry out the simulation is also
provided below.

Test Bench:

Analyser output of Inverter