IJSTE - International Journal of Science Technology & Engineering | Volume 2 | Issue 12 | June 2016

ISSN (online): 2349-784X

An Efficient Face Recognition using DWT and

FFT Algorithm
Roopashri Kamate. S.
PG Student
Department of VLSI Design & Embedded System
CPGS, Visvesvaraya Technological University, Belagavi

Dr. Meghana Kulkarni

Professor
Department of VLSI Design & Embedded System
CPGS, Visvesvaraya Technological University, Belagavi

Abstract
Face recognition is one of most important biometrics compared to other biometric traits. In this paper, we propose Face
recognition using DWT and FFT. First the face images are resized and then the features are extracted using DWT by considering
LL band features and FFT by considering magnitude features. Further, these features are fused to obtain database final features.
The test picture is rehashed with same procedure to create test picture final features and coordinating is performed by contrasting
database picture and test picture highlights utilizing Euclidean distance (ED). The performance analysis is carried out by varying
number of images with threshold to obtain optimized parameters. The performance parameters such as %FAR, %FRR, %TSR
and also hardware utilization are better in comparison with existing techniques.
Keywords: DWT; FFT; ED; FAR; TSR; Biometrics; Face Detection
________________________________________________________________________________________________________
I.

INTRODUCTION

In todays advanced technology computers are necessary for all activities. Due to computerized systems security is a main
concern of any organization. Normally PIN, Password and Smart Card are used to provide security. But those can be misplaced
or forgotten. In this way, Biometric Innovation has taken its pace to keep any security breaks and fake. Presently like biometric
machine face recognition identifies the person based on physiological features like fingerprints or facial features. The face
recognition has biological characteristics, so forging of secured systems is very difficult and can be overcome with fraud of
secured systems. In real world applications it is necessary to have good standalone face recognition system because such systems
can give higher robustness, optimization in the hardware utilization so integration is easy. Face recognition is one of the most
important biometric technology due to advances in image capture devices such as surveillance cameras. The accuracy of face
recognition depends on the variety of environmental factors such as illumination, facial angle, expression, age, motion and facial
wear. In almost of the cases changing light intensity is the foremost challenge. After extensive research into the area of face
recognition we have found that there is still some room left for changes upon existing face recognition techniques or systems.
That changes may include robustness of the design, accuracy and speed of the systems. An FPGA can give us these
improvements in face recognition systems with necessary resources. These resources include many IP cores (intellectual
properties), communication interfaces and memory types along with millions of logic gates.
II. LITERATURE SURVEY
Ajay kumar banasal et al., [1] proposed the performance evaluation of face recognition using PCA and N-PCA. Performance
difference of PCA (principle component analysis) and NPCA (normalized principle component analysis) feature extraction is
done for various standard databases. Results indicate that NPCA can be better approach compared to PCA in terms of accuracy.
Rajath kumar et al., [2] proposed the FPGA implementation of face recognition system using efficient 5/3 2D lifting scheme. 2D
5/3 lifting scheme is used to get LL band features. Gaussian mask is used for filtering purpose. Comparison is done among the
test and database images using Euclidean distance for accurate matching. And this recognition system is implemented on Virtex5 xc5vlx110 device. Performance is improved in terms of speed, accuracy and area parameters. Jungak cho et al., [3] proposed
the FPGA based face detection using Haar classifiers. Hardware implementation of face detection is done using Haar features.
Image scaling, integral image generation, pipelining processing and classifier are explained in hardware techniques. It is coded in
Verilog HDL and implemented on Xilinx virtex-5 FPGA. System performance is increased 35 times as compared to its software
implementation. Senthilsingh.c. et al., [4] proposed the design and implementation of FPGA based real time very low resolution
face recognition system. It is coded in Verilog HDL code and implemented on xc5vlx30 Virtex-5 FPGA kit. System resulted in
highly accurate and fast processing.

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An Efficient Face Recognition using DWT and FFT Algorithm

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III. PROPOSED BLOCK DIAGRAM

Loading Databases
The database consists of standard face images and can be varied with different persons of random samples to calculate the
performance parameters. The ORL database is considered where random of 90 samples are chosen from different persons of data
base.
Preprocessing
The preprocessing includes Resizing, Noise removal and Smoothing. The face images are resized to 256x256.This helps in
elimination or at least minimization of the variations and also memory efficient on hardware.
Feature Extraction
Feature extraction involves simplifying the measure of assets important to depict a vast arrangement of information precisely.
Likewise this will deliver comparing highlights from the info information.
DWT (Discrete Wavelet Transform)
DWT is a flexible technique for breaking of the signals. 2D DWT breaks the images into scaling functions and wavelet
coefficients. Here signal energy is concentrated only to particular wavelet coefficients. Here we have used HAAR wavelet. This
is used for image compression applications by considering only required coefficients and neglecting extra cofactors.
HAAR is sequence of square shaped function. HAAR wavelets mother wavelet function is
1
0 < 0.5
() = {
(1)
1
0.5 < 1
0 .
HAAR transform divides the signal into two components, one is called average and another is difference or fluctuation i.e. A=
(a+b)/2 and D= (a-b)/2 respectively.
FFT (Fast Fourier Transform)
This algorithm computes the DFT (discrete Fourier transform) of a sequence .Fourier analysis transforms a signal from its
original to frequency domain representation and vice versa. FFT gives complex valued outputs and it contains both magnitude
and phase values so it gives accurate information about faces. Also it is faster process. So this technique can enhance the speed
and accuracy of face recognition. FFT computes the DFT in N log operations instead of 2.
Let x0, x1.XN-1 be the complex numbers.
The DFT equation is given by equation (2) modified into butterfly diagram of FFT shown in equation (3).
2/
Xk=1
k=0 N-1
(2)
=0 ()
()2
()2
1
1
() = =0
=0
(3)

Matching
The features of test image are compared with database image features using Euclidian Distance. Threshold value is required in
matching process to decide whether the face belongs to same person or outsider. The selection of threshold value should be

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An Efficient Face Recognition using DWT and FFT Algorithm

(IJSTE/ Volume 2 / Issue 12 / 046)

minimize FAR and FRR and increase TSR. If the distance is less than the Threshold matching is considered as successful else as
failure.
The pair-wise distance formula is given by equation (4).
d(a, b) = (a1 b1 )2 + (a 2 b2 )2 + + (a n bn )2
(4)
a=Database features
b=Test image features
IV. RESULTS AND SIMULATIONS
Simulation
The simulation is performed using MATLAB 2012a and the results of the Total Success Rate (TSR) obtained for best
of 0.6 is 96.46 % for randomly selected 90 samples from ORL database.

threshold

Table 1
Comparison % TSR of Existing Techniques with Proposed Method
Authors
Techniques
%TSR
N-PCA
92.50
Ajay et al.,[1]
PCA
90.00
Rajath et al.,[2] LIFT 5/3 DWT 93.33
Proposed
DWT+FFT
96.46

The comparison of percentage TSR of existing technique with proposed method is as shown in TABLE I. It can be observed
from TABLE I that the proposed method has higher Total Success Rate (TSR) when compared to Ajay et al., and Rajath et al.,.
Hardware Utilization
The VHDL language is used to design the hardware modules and is synthesized on Vertex5 xc5vlx110 FPGA board. The
hardware utilization of the proposed method is shown in Table II.
Table 2
Hardware Utilization of Proposed Method

The device utilization and frequency comparison between proposed and existing techniques is shown in Table III. It is
observed that the proposed methodology utilizes 507 slice registers and 941 slice LUTs with the maximum operating frequency
of 273.108 MHz, which is comparatively very less compared to J Cho et al., [3], indicating efficient utilization of the hardware
with a much higher frequency. The high performance of proposed method is due to the use of DWT, it compress the image
features. Hence it reduces the use of hardware. And due to use of FFT the speed of the proposed work is higher when compared
to Senthilsingh.C et al., [4] and Rajath et al., [2].
Table 3
Device Utilization and Frequency Comparison of Existing Techniques with Proposed Method
Logic utilization
Jungukcho et al.,[3] Senthilsingh. C et al., [4] Rajath et al.,[2] Proposed Method
No. of slice registers
18122
302
645
507
No. of slice LUTs
62890
2643
5485
941
Speed in MHz
207.009
258.35
273.108

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An Efficient Face Recognition using DWT and FFT Algorithm

(IJSTE/ Volume 2 / Issue 12 / 046)

V. CONCLUSION
In this paper, Face Recognition using DWT and FFT is proposed. The standard ORL data bases are considered. The transform
domain DWT technique is applied on preprocessed image to generate LL band features, these results in the compressed image.
The FFT is connected on compressed picture to create FFT extent highlights. The Euclidian Separation is utilized to contrast
elements of test picture and components of database pictures. The performance parameters are better in the case of proposed
algorithm compared to existing algorithms. Results indicate that there is reduction in hardware utilization of about 21.39% and
82.28 % of slice registers and slice LUTs respectively. And also 5% increase in speed compared to the existing techniques. Total
success rate of 96.46% is achieved. Implementation is done on both Virtex-5 FPGA and Spartan 6 FPGA board.
REFERENCES
[1]
[2]
[3]
[4]
[5]
[6]
[7]

Ajay Kumar Bansal and Pankaj Chawla, Performance Evaluation of Face Recognition using PCA and N-PCA, International Journal of Computer
Applications, Vol. 76, No.8, pp. 14-20, August 2013.
Rajath, Satish, Varsha and sindhu, Fpga implementation of face recognition system using 5/3 lift DWT, IEEE SATA, Jan 2016.
J.Cho, S.Mirzaei, J.Oberg and R.Kastner, FPGA-Based Face Detection System Using Haar Classifiers, Proceedings of International Symposium On
FPGA, Monterey, California, USA, February 2009.
Senthilsingh. C and Manikandan. M, Design and Implementation of an FPGA-Based Real-Time Very Low Resolution Face Recognition System,
International Journal of Advanced Informmation Science and Technology, Vol. 7, No. 7, pp. 59-65, November 2012.
Smitha k.g, A.p.Vinod, Hardware Efficient FPGA Implementation of Emotion Recognizer for Autistic Children, IEEEConnecct2013.
Sateesh Kumar h. c., Sayantam Sarakar and et al., FPGA Implementation of Moving Object and Face Detection Using Adaptive Threshold, International
journal of VLSICS, VOL 6, NO 5, oct 2015.
Yogesh.y,Raut et al., FPGA Based Face Detection System Using Xilinx System Generator,International journal of advanced research in computer and
communication engineering Vol 4, Issue 6, June 2015.

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